TWI456727B - 晶粒封裝結構以及相關的晶粒封裝結構製造方法 - Google Patents

晶粒封裝結構以及相關的晶粒封裝結構製造方法 Download PDF

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TWI456727B
TWI456727B TW099145752A TW99145752A TWI456727B TW I456727 B TWI456727 B TW I456727B TW 099145752 A TW099145752 A TW 099145752A TW 99145752 A TW99145752 A TW 99145752A TW I456727 B TWI456727 B TW I456727B
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die
core material
material layer
package structure
providing
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TW099145752A
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TW201203492A (en
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Jen Chung Chen
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Nanya Technology Corp
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    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
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Claims (12)

  1. 一種晶粒封裝結構，包含：一第一晶粒；一第二晶粒；一核心材料層，位於該第一晶粒和該第二晶粒之間；至少一通孔，穿過該第一晶粒、該第二晶粒以及該核心材料層；一金屬材料，填入該通孔中，使得該第一晶粒、該第二晶粒以及該核心材料層可以彼此電性連接；至少一訊號傳收單元，接觸該金屬材料；以及一介電層，包圍該第一晶粒，包含暴露該訊號傳收單元的至少一開口。
  2. 如申請專利範圍第1項的晶粒封裝結構，其中該第一晶粒係為一主機裝置，且該第二晶粒係為一僕裝置。
  3. 如申請專利範圍第1項的晶粒封裝結構，更包含一第三晶粒，具有至少一通孔，使得該第三晶粒可電性連接至該第二晶粒。
  4. 如申請專利範圍第1項的晶粒封裝結構，更包含填充材料，該填充材料位於該第一晶粒以及該核心材料，以及該第二晶粒和該核心材料之間。
  5. 如申請專利範圍第1項的晶粒封裝結構，更包含位於該開口旁的 連接墊。
  6. 如申請專利範圍第1項的晶粒封裝結構，其中該核心材料層包含聚合物材料。
  7. 一種晶粒封裝結構製造方法，包含：(a)形成具有通孔的一核心材料層，該通孔中具有金屬，其中該金屬具有一突出部份，該突出部份突出該核心材料層；(b)在該核心材料層的一第一側提供一第一晶粒，其中該第一晶粒具有通孔，且該第一晶粒的該通孔電性連接至該第一晶粒之一第一側上的核心材料層之該通孔；(c)於該第一晶粒上提供至少一訊號傳收單元，其中該訊號傳收單元位於該第一晶粒的一第二側上，其中該第一晶粒的該第二側相對於該第一晶粒的該第一側；(d)在該第一晶粒和該核心材料層上形成一介電層，其中該介電層包含暴露該訊號傳收單元的至少一開口；以及(e)於該核心材料層的一第二側上形成一第二晶粒，其中該核心材料層的該第二側相對於該核心材料層的該第一側。
  8. 如申請專利範圍第7項的晶粒封裝結構製造方法，更包含提供一第三晶粒，該第三晶粒具有至少一通孔，使得該第三晶粒可電性連接至該第二晶粒。
  9. 如申請專利範圍第7項的晶粒封裝結構製造方法，更包含提供填充材料，該填充材料位於該第一晶粒以及該核心材料之間，以及該第二晶粒和該核心材料之間。
  10. 如申請專利範圍第7項的晶粒封裝結構製造方法，其中該步驟(a)包含：於該核心材料層中形成該通孔；於該核心材料層的一表面上以及該通孔中鍍上金屬；以及於該金屬上提供一光阻層並蝕刻該金屬的其他部份以形成該突出部份。
  11. 如申請專利範圍第7項的晶粒封裝結構製造方法，更包含：在提供一第二晶粒於該核心材料層之一第二側上之前，於核心材料層之該第二側上提供一光阻層。
  12. 如申請專利範圍第7項的晶粒封裝結構製造方法，其中該步驟(e)包含：於該訊號傳收單元上提供一光阻層；提供該介電層；以及移除該訊號傳收單元上的該光阻層。
TW099145752A 2010-07-15 2010-12-24 晶粒封裝結構以及相關的晶粒封裝結構製造方法 TWI456727B (zh)

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Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8421193B2 (en) * 2010-11-18 2013-04-16 Nanya Technology Corporation Integrated circuit device having through via and method for preparing the same
US20120168935A1 (en) * 2011-01-03 2012-07-05 Nanya Technology Corp. Integrated circuit device and method for preparing the same
US20130264688A1 (en) * 2012-04-06 2013-10-10 Omnivision Technologies, Inc. Method and apparatus providing integrated circuit system with interconnected stacked device wafers
US9142581B2 (en) 2012-11-05 2015-09-22 Omnivision Technologies, Inc. Die seal ring for integrated circuit system with stacked device wafers
TWI492340B (zh) * 2012-12-12 2015-07-11 Ind Tech Res Inst 封裝結構及其製造方法
KR102190382B1 (ko) 2012-12-20 2020-12-11 삼성전자주식회사 반도체 패키지

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6714418B2 (en) * 2001-11-02 2004-03-30 Infineon Technologies Ag Method for producing an electronic component having a plurality of chips that are stacked one above the other and contact-connected to one another
TW200802660A (en) * 2006-06-28 2008-01-01 Megica Corp Semiconductor chip structure
US20090134527A1 (en) * 2007-11-26 2009-05-28 Shu-Ming Chang Structure of three-dimensional stacked dice with vertical electrical self-interconnections and method for manufacturing the same
US7598607B2 (en) * 2007-05-22 2009-10-06 Samsung Electronics Co., Ltd. Semiconductor packages with enhanced joint reliability and methods of fabricating the same
TW200947662A (en) * 2008-05-13 2009-11-16 Ind Tech Res Inst Structure of three-dimensional stacking dice and method for manufacturing the same
TW201017852A (en) * 2008-09-11 2010-05-01 Micron Technology Inc Interconnect structures for stacked dies, including penetrating structures for through-silicon vias, and associated systems and methods

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI331391B (en) * 2007-03-20 2010-10-01 Siliconware Precision Industries Co Ltd Stackable semiconductor device and fabrication method thereof
US7883938B2 (en) * 2007-05-22 2011-02-08 United Test And Assembly Center Ltd. Stacked die semiconductor package and method of assembly
US8586465B2 (en) * 2007-06-07 2013-11-19 United Test And Assembly Center Ltd Through silicon via dies and packages
TWI362102B (en) * 2007-07-11 2012-04-11 Ind Tech Res Inst Three-dimensional dice-stacking package structure and method for manufactruing the same
US7915080B2 (en) * 2008-12-19 2011-03-29 Texas Instruments Incorporated Bonding IC die to TSV wafers
US8487444B2 (en) * 2009-03-06 2013-07-16 Taiwan Semiconductor Manufacturing Company, Ltd. Three-dimensional system-in-package architecture
TWI370532B (en) * 2009-11-12 2012-08-11 Ind Tech Res Inst Chip package structure and method for fabricating the same
CN102104009B (zh) * 2009-12-16 2012-10-10 中国科学院微电子研究所 一种三维硅基电容器的制作方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6714418B2 (en) * 2001-11-02 2004-03-30 Infineon Technologies Ag Method for producing an electronic component having a plurality of chips that are stacked one above the other and contact-connected to one another
TW200802660A (en) * 2006-06-28 2008-01-01 Megica Corp Semiconductor chip structure
US7598607B2 (en) * 2007-05-22 2009-10-06 Samsung Electronics Co., Ltd. Semiconductor packages with enhanced joint reliability and methods of fabricating the same
US20090134527A1 (en) * 2007-11-26 2009-05-28 Shu-Ming Chang Structure of three-dimensional stacked dice with vertical electrical self-interconnections and method for manufacturing the same
TW200947662A (en) * 2008-05-13 2009-11-16 Ind Tech Res Inst Structure of three-dimensional stacking dice and method for manufacturing the same
TW201017852A (en) * 2008-09-11 2010-05-01 Micron Technology Inc Interconnect structures for stacked dies, including penetrating structures for through-silicon vias, and associated systems and methods

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