TW200802660A - Semiconductor chip structure - Google Patents
Semiconductor chip structureInfo
- Publication number
- TW200802660A TW200802660A TW96123392A TW96123392A TW200802660A TW 200802660 A TW200802660 A TW 200802660A TW 96123392 A TW96123392 A TW 96123392A TW 96123392 A TW96123392 A TW 96123392A TW 200802660 A TW200802660 A TW 200802660A
- Authority
- TW
- Taiwan
- Prior art keywords
- layer
- passivation layer
- adhesion
- pads
- metal
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
A semiconductor chip structure includes a semiconductor substrate, an circuit structure, a passivation layer, a first adhesion/barrier layer, a metal cap and a metal layer. The semiconductor substrate has multiple electric devices located on a surface layer of a surface of the substrate. The circuit structure had multiple circuit layers electrically connecting with each other and electrically connecting with the electric devices. One of the circuit layers has multiple pads. The passivation layer is located on the circuit structure and has multiple openings penetrating through the passivation layer. The openings expose the pads. The first adhesion/barrier layer is over the pads and the passivation layer. The metal cap is located on the first adhesion/barrier layer and the passivation layer. The metal layer is on the metal layer.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US80598706P | 2006-06-28 | 2006-06-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW200802660A true TW200802660A (en) | 2008-01-01 |
Family
ID=44765458
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW96123392A TW200802660A (en) | 2006-06-28 | 2007-06-28 | Semiconductor chip structure |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TW200802660A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI456727B (en) * | 2010-07-15 | 2014-10-11 | Nanya Technology Corp | Die package and related die package structure manufacturing method |
| TWI855429B (en) | 2022-11-22 | 2024-09-11 | 南亞科技股份有限公司 | Semiconductor structures and manufacturing method thereof |
-
2007
- 2007-06-28 TW TW96123392A patent/TW200802660A/en unknown
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI456727B (en) * | 2010-07-15 | 2014-10-11 | Nanya Technology Corp | Die package and related die package structure manufacturing method |
| TWI855429B (en) | 2022-11-22 | 2024-09-11 | 南亞科技股份有限公司 | Semiconductor structures and manufacturing method thereof |
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