JP2005024373A - Stationary power supply current measuring device for semiconductor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a stationary power supply current measuring device for semiconductor which can precisely determine whether a semiconductor to be measured has defect parts or not. <P>SOLUTION: A stationary power supply current output from a power terminal of an LSI (DUT) to be measured 10 is sequentially converted to voltage signals by a power supply current converting circuit 12. Sample-and-hold circuits 14 and 15 generate a signal by sampling and holding the voltage signals using the first clock signal (CLK) and a signal by sampling and holding the voltage signals using the second clock signal having a phase difference against the first clock. A differential capacitor 16 generates a differential voltage signal by calculating the difference of those signals and inputs it to an LSI tester 20. The LSI tester 20 measures the differential voltage signal and determines whether the stationary power supply current is abnormal or not to determine whether the LSI to be measured 10 has defect parts or not. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor static power supply current inspection apparatus for inspecting a semiconductor static power supply current.
[0002]
[Prior art]
Conventionally, in the inspection of CMOS LSI, it is very difficult to create a test pattern that covers all nodes of the internal circuit of the LSI, and it is only necessary to achieve a failure detection rate of about 95%.
[0003]
Therefore, in order to screen for a failure that cannot be detected by a test pattern, a quiescent power supply current test has been conventionally performed (see, for example, Patent Document 1).
When the logic combination is stationary in the CMOS logic circuit, either the P-channel transistor or the N-channel transistor is turned off, so that almost no current flows and the logic combination inside the CMOS LSI is stationary. When the internal logic circuit of the CMOS LSI is normal, the power source current (static power source current) at is a very small current. On the other hand, when there is a failure location in the internal logic circuit, a leak current flows from the CMOS logic circuit. Therefore, when an abnormal current is detected, the CMOS LSI has a failure location.
[0004]
Therefore, in the conventional quiescent power supply current test, a predetermined input pattern is generated by the LSI tester to quiesce the logic combination inside the semiconductor under test, and the quiescent power supply current is measured to determine whether the quiescent power supply current is an abnormal current. Thus, it is determined whether or not there is a failure portion in the semiconductor to be measured.
[0005]
However, in recent years, the gate oxide film has been made thinner and the gate breakdown voltage has been lowered with the progress of miniaturization of semiconductors, so that the power supply voltage tends to be lowered. Further, when the power supply voltage is lowered, the current of the MOS transistor is reduced and the operation speed of the circuit is lowered. Therefore, the threshold voltage of the MOS transistor tends to be lowered similarly to the power supply voltage in order to prevent the circuit operation speed from being deteriorated.
[0006]
On the other hand, the characteristic of MOS transistors is that off-leakage current increases exponentially when the threshold voltage decreases.
Therefore, as the semiconductor becomes finer and the circuit scale increases, the quiescent power supply current increases.
[0007]
Therefore, in recent years, it has become necessary to use an LSI tester having a large measurement range as an LSI tester current measurement device for measuring a quiescent power supply current.
However, the LSI tester's current measurement device has a problem that when a large measurement range is used, the resolution increases as well, and a minute leak current generated when a semiconductor has a faulty part cannot be detected accurately.
[0008]
Therefore, in the conventional quiescent power supply current test, the failure detection rate has decreased, and it has become difficult to screen for failures that cannot be detected by the test pattern.
[0009]
[Patent Document 1]
JP 2000-88914 A (page 2-3)
[0010]
[Problems to be solved by the invention]
In view of the above problems, the present invention converts a quiescent power supply current into a voltage signal, samples and holds this voltage signal with first and second clock signals having a phase difference, takes a difference, and uses a tester to Provided is a semiconductor static power supply current inspection device capable of accurately determining whether or not a semiconductor has a failure by measuring a differential signal and determining whether or not the static power supply current is an abnormal current. The purpose is to do. That is, since the quiescent power supply current is converted into a voltage signal, it is not necessary to use a current measuring device for measuring a large current with a coarse resolution, and an accurate quiescent power supply current measurement can be performed. Further, since the difference between the quiescent power supply currents is measured, the current that steadily flows when the internal logic combination is stationary is omitted, and the minute leak current can be detected more accurately. Accordingly, it is possible to improve the failure detection rate by the quiescent power supply current test and to screen for a failure portion that cannot be detected by the test pattern.
[0011]
[Means for Solving the Problems]
According to a first aspect of the present invention, there is provided a semiconductor quiescent power supply current inspection apparatus including a tester for generating an input pattern for quiescing a logic combination at a predetermined location in a semiconductor to be measured. Is a semiconductor static power supply current inspection device for determining whether or not the current is an abnormal current, a conversion circuit for converting a power supply current input from a semiconductor to be measured into a voltage signal, and the voltage signal as a first clock signal A differential circuit that generates a differential voltage signal by taking a difference between the signal sampled and held by the first clock signal and a signal sampled and held by the second clock signal having a phase difference with respect to the first clock signal; And measuring the differential voltage signal with the tester to determine whether or not the power supply current of the semiconductor under measurement is an abnormal current.
[0012]
A semiconductor quiescent power supply current inspection device according to claim 2 of the present invention is the semiconductor quiescent power supply current inspection device according to claim 1, further comprising an analog / digital conversion circuit for converting the differential voltage signal into a digital signal. The tester compares the output of the analog / digital conversion circuit with an expected value pattern for the input pattern to determine whether or not the power supply current of the semiconductor to be measured is an abnormal current.
[0013]
A semiconductor quiescent power supply current inspection device according to claim 3 of the present invention is the semiconductor quiescent power supply current inspection device according to claim 1, wherein the differential voltage signal is measured and the power supply current of the semiconductor to be measured is an abnormal current. It has a determination circuit for determining whether or not there is, and the determination result of the determination circuit is detected by the tester.
[0014]
According to the present invention, it is possible to accurately detect a minute leak current that occurs when a semiconductor having a large circuit scale has a failure portion, and to accurately determine whether or not a semiconductor has a failure portion. Therefore, it is possible to improve the failure detection rate by the quiescent power supply current test and to screen for a failure portion that cannot be detected by the test pattern.
[0015]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail. In addition, embodiment shown here is an example to the last, Comprising: It is not necessarily limited to the following embodiment.
[0016]
(Embodiment 1)
FIG. 1 is a block diagram showing a configuration of a semiconductor static power supply current inspection apparatus according to the first embodiment.
[0017]
In FIG. 1, on an LSI tester interface board 11, a current-voltage conversion circuit 12 connected to a power supply terminal of an LSI to be measured (DUT) 10 and converting a quiescent power supply current into a voltage signal, and a first clock signal (CLK ), A sample-and-hold circuit 14 that samples and holds the voltage signal by a first clock signal that does not pass through the delay circuit 13 (hereinafter referred to as “sample-and-hold”), and a delay by the delay circuit 13 A sample-and-hold circuit 15 that samples and holds the voltage signal based on the clock signal (second clock signal), and a differential circuit 16 that takes the difference between the outputs of the sample-and-hold circuits 14 and 15 and generates a differential voltage signal. It has been.
[0018]
Further, the LSI tester 20 generates an input pattern that causes a predetermined logic combination in the LSI 10 to be measured to be stationary, measures the output of the differential circuit 16, and determines whether the static power supply current is an abnormal current from the measurement result. Determine whether.
[0019]
Next, the operation of the inspection apparatus configured as described above will be described.
First, a predetermined input pattern is input from the LSI tester 20 to the LSI to be measured 10, and a logic combination at a predetermined location inside the LSI to be measured 10 is stopped.
[0020]
In this state, the quiescent power supply current output from the power supply terminal of the LSI to be measured 10 is sequentially converted into a voltage signal by the current-voltage conversion circuit 12.
The sample and hold circuit 14 samples and holds the output voltage of the current / voltage conversion circuit 12 in accordance with the first clock signal. Similarly, the sample and hold circuit 15 passes through the delay circuit 13 and samples and holds the output voltage of the current-voltage conversion circuit 12 by a second clock signal having a phase difference with respect to the first clock signal.
[0021]
The differential circuit 16 takes the difference between the outputs of the sample and hold circuits 14 and 15 to generate a differential voltage signal and outputs it to the LSI tester 20.
The LSI tester 20 measures the input differential voltage signal to detect a minute leak current, and determines whether or not the logic circuit at a predetermined location has failed by determining whether or not the quiescent power supply current is an abnormal current. judge.
[0022]
According to the first embodiment, unlike the prior art, the quiescent power supply current actually output from the power supply terminal is not directly measured by the LSI tester, but the current voltage once provided on the LSI tester interface board 11 is temporarily set. By converting the voltage into a voltage by the conversion circuit, it is not necessary to use a current measuring device for measuring a large current with a low resolution when measuring with an LSI tester, and an accurate quiescent power supply current measurement can be performed. Furthermore, since the difference between the quiescent power supply currents is taken and the current that constantly flows when the internal logic combination is at rest is omitted, it becomes easier to detect the minute leak current that flows when there is a failure in the LSI under measurement. As a result, it is possible to improve the failure detection rate by the quiescent power supply current test and to screen for a failure portion that cannot be detected by the test pattern.
[0023]
(Embodiment 2)
Next, a semiconductor static power supply current inspection apparatus according to the second embodiment will be described.
[0024]
FIG. 2 is a block diagram showing the configuration of the semiconductor static power supply current inspection apparatus according to the second embodiment. In addition, the same number is attached | subjected to the member which has the same structure as Embodiment 1 mentioned above, and description is abbreviate | omitted.
[0025]
The inspection apparatus according to the second embodiment includes an analog / digital conversion circuit (A / D conversion circuit) 18 that converts an analog signal output from the differential circuit 16 into a digital signal on the LSI tester interface board 11. The difference from the first embodiment is that the LSI tester 20 determines whether or not the quiescent power supply current is an abnormal current based on the digital signal output from the analog / digital conversion circuit 18.
[0026]
In FIG. 2, the delay circuit 17 delays the first clock signal (CLK) and inputs it to the analog / digital conversion circuit 18, and the analog / digital conversion circuit 18 uses the delayed third clock signal to perform a differential circuit. 16 output signals are converted into digital signals. In addition, the LSI tester 20 generates an input pattern that stops a logic combination at a predetermined location in the LSI 10 to be measured, generates an expected value pattern for the input pattern, and outputs the digitized differential voltage signal and the expected value pattern. By comparing, it is determined whether or not the stationary power supply current is an abnormal current.
[0027]
The delay circuit 17 uses the signal output from the differential circuit 16 for inspection until the signal is output from the sample hold circuit 15 using at least the second clock signal obtained by delaying the first clock signal. In the LSI tester 20 side, at least until the signal is output from the sample-and-hold circuit 15 using the second clock signal obtained by delaying the first clock signal. The value comparison may not be performed, and in this way, the delay circuit 17 can be omitted.
[0028]
In the first embodiment, the differential voltage signal from the differential circuit is measured by the LSI tester, and the abnormal current is detected from the measurement result. On the other hand, in the second embodiment, the LSI tester only has to compare the digitized differential voltage signal with the expected value pattern, and it is possible to detect an abnormal current in a functional test. Become. Therefore, compared with the first embodiment, the inspection time in the LSI tester can be shortened to the extent that it is not necessary to measure the analog signal.
[0029]
For example, even when the inspection operation is repeated for each of the plurality of logic circuits in the LSI to be measured, the inspection time in the LSI tester can be increased without much increase compared to the first embodiment.
[0030]
(Embodiment 3)
Next, a semiconductor static power supply current inspection apparatus according to the third embodiment will be described.
[0031]
FIG. 3 is a block diagram showing a configuration of a semiconductor static power supply current inspection apparatus according to the third embodiment. In addition, the same number is attached | subjected to the member which has the same structure as Embodiment 1 mentioned above, and description is abbreviate | omitted.
[0032]
The inspection apparatus according to the third embodiment includes a determination circuit 19 that measures the output of the differential circuit 16 on the LSI tester interface board 11 and determines whether or not the quiescent power supply current is an abnormal current, and the LSI tester 20 However, the present embodiment is different from the first embodiment in that only the determination result by the determination circuit 19 is detected.
[0033]
In the third embodiment, since the LSI tester only needs to detect the determination result output from the determination circuit, the inspection time in the LSI tester can be shortened. For this reason, for example, when a plurality of LSIs to be measured are inspected by one LSI tester, an input pattern can be generated to another LSI to be measured while determining a certain LSI to be measured.
[0034]
Further, it is not necessary to generate a complicated expected value pattern in the LSI tester as in the second embodiment.
[0035]
【The invention's effect】
As described above, according to the present invention, it is not necessary to use a current measuring device for measuring a large current with a low resolution, and furthermore, the current that flows constantly when the internal logic combination is stationary can be omitted. It is possible to accurately detect the minute leak current that occurs when there is a failure point in a large semiconductor, and to accurately determine whether or not there is a failure point in the semiconductor. The rate is improved, and it becomes possible to perform screening of a failure portion that cannot be detected by the test pattern.
[0036]
In addition, an analog / digital conversion circuit that converts the analog signal output from the differential circuit to a digital signal is provided, and the tester stops by comparing the expected value pattern with the digital signal output from the analog / digital conversion circuit. Since it is determined whether or not the power supply current is an abnormal current, it is possible to shorten the inspection time in the tester.
[0037]
In addition, a determination circuit that measures the output of the differential circuit and determines whether or not the quiescent power supply current is an abnormal current is provided, and the tester only detects the determination result by this determination circuit. In addition, it is not necessary to generate a complicated expected value pattern in the tester.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of a semiconductor quiescent power supply current inspection apparatus according to a first embodiment of the present invention. FIG. 2 shows a configuration of a semiconductor quiescent power supply current inspection apparatus according to a second embodiment of the present invention. FIG. 3 is a block diagram showing a configuration of a semiconductor quiescent power supply current inspection apparatus according to a third embodiment of the present invention.
10 LSI to be measured (Semiconductor to be measured)
11 LSI Tester Interface Board 12 Current / Voltage Conversion Circuits 13 and 17 Delay Circuits 14 and 15 Sample Hold Circuit 16 Differential Circuit 18 Analog / Digital Conversion Circuit 19 Judgment Circuit 20 LSI Tester

Claims (3)

A tester for generating an input pattern for quiescing a logic combination at a predetermined location inside a semiconductor to be measured, and a semiconductor quiescent power supply current test for determining whether the power supply current when the logic combination at the predetermined location is stationary is an abnormal current A device,
A conversion circuit for converting a power supply current input from a semiconductor to be measured into a voltage signal, a signal obtained by sampling and holding the voltage signal with a first clock signal, and a phase difference with respect to the first clock signal A differential circuit that takes a difference from the signal sampled and held by the second clock signal and generates a differential voltage signal;
A semiconductor static power supply current inspection apparatus, wherein the differential voltage signal is measured by the tester to determine whether or not the power supply current of the semiconductor to be measured is an abnormal current. 2. The semiconductor static power supply current inspection apparatus according to claim 1, further comprising an analog / digital conversion circuit that converts the differential voltage signal into a digital signal, and the output of the analog / digital conversion circuit and the input by the tester. A semiconductor static power supply current inspection apparatus, characterized by comparing an expected value pattern for a pattern and determining whether or not a power supply current of a semiconductor to be measured is an abnormal current. The semiconductor static power supply current inspection device according to claim 1, further comprising a determination circuit that measures the differential voltage signal and determines whether or not the power supply current of the semiconductor to be measured is an abnormal current. A quiescent power supply current inspection device for a semiconductor, wherein a determination result of the determination circuit is detected.

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