JP2004536452A5 - - Google Patents
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- JP2004536452A5 JP2004536452A5 JP2003511391A JP2003511391A JP2004536452A5 JP 2004536452 A5 JP2004536452 A5 JP 2004536452A5 JP 2003511391 A JP2003511391 A JP 2003511391A JP 2003511391 A JP2003511391 A JP 2003511391A JP 2004536452 A5 JP2004536452 A5 JP 2004536452A5
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- 210000000746 body regions Anatomy 0.000 claims 8
- 239000000463 material Substances 0.000 claims 4
- 230000000295 complement Effects 0.000 claims 3
- 239000003990 capacitor Substances 0.000 claims 2
- 239000004020 conductor Substances 0.000 claims 1
- 230000001808 coupling Effects 0.000 claims 1
- 238000010168 coupling process Methods 0.000 claims 1
- 238000005859 coupling reaction Methods 0.000 claims 1
- 238000002955 isolation Methods 0.000 claims 1
- 230000001902 propagating Effects 0.000 claims 1
- 230000001105 regulatory Effects 0.000 claims 1
Claims (46)
前記第一の複数の経路は、互いに電気的に分離して配置され、第一の補足的な関係で配向された少なくとも2つの経路を有し、
前記第二の複数の経路の少なくとも一番目の数は、該第二の複数の経路の二番目の数から電気的に分離されて配置され、
前記第二の複数の経路の少なくとも2つの経路は、前記第一の複数の経路から電気的に分離されたことを特徴とするデバイス。 A device having at least a first and a second plurality of paths,
The first plurality of paths have at least two paths disposed in electrical isolation from each other and oriented in a first complementary relationship;
At least a first number of the second plurality of paths is disposed electrically separated from a second number of the second plurality of paths;
At least two paths of the second plurality of paths are electrically separated from the first plurality of paths.
前記第二の複数の経路の前記二番目の数の少なくとも2つの経路は、互いに電気的に結合されたことを特徴とする請求項1に記載のデバイス。 The first number of at least two paths of the second plurality of paths are electrically coupled together;
The device of claim 1, wherein the second number of at least two paths of the second plurality of paths are electrically coupled to each other.
前記第二の複数の経路の前記二番目の数は、1以上の奇数であり、
前記第二の複数の経路の前記一番目の数の少なくとも2つの経路は、互いに電気的に結合されて、
前記第二の複数の経路の前記二番目の数の少なくとも2つの経路は、互いに電気的に結合されたことを特徴とする請求項1に記載のデバイス。 The first number of the second plurality of paths is an odd number of 1 or more;
The second number of the second plurality of paths is an odd number greater than or equal to 1,
The first number of at least two paths of the second plurality of paths are electrically coupled together;
The device of claim 1, wherein the second number of at least two paths of the second plurality of paths are electrically coupled to each other.
前記第二の複数の経路の前記二番目の数は、第二のアライメントであることを特徴とする請求項1に記載のデバイス。 The first number of the second plurality of paths is a first alignment;
The device of claim 1, wherein the second number of the second plurality of paths is a second alignment.
前記第二の複数の経路の前記二番目の数は、第二の重ね合わされたアライメントであることを特徴とする請求項1に記載のデバイス。 The first number of the second plurality of paths is a first superimposed alignment;
The device of claim 1, wherein the second number of the second plurality of paths is a second superimposed alignment.
前記経路の前記二番目の数の少なくとも2つの経路は、前記第二のアライメントで互いに電気的に結合して配置され、
前記経路の前記一番目の数は1以上の奇数の経路であり、前記経路の前記二番目の数は1以上の奇数の経路であり、
前記第一の複数の経路の総数は、少なくとも2以上の偶数であることを特徴とする請求項1に記載のデバイス。 The first number of at least two paths of the paths are arranged electrically coupled to each other in the first alignment;
The second number of at least two paths of the paths are arranged in electrical coupling with each other in the second alignment;
The first number of the paths is an odd path of 1 or more, and the second number of the paths is an odd path of 1 or more;
The device according to claim 1, wherein a total number of the first plurality of paths is an even number of at least two or more.
前記第二の複数の経路の前記二番目の数の少なくとも2つの経路は、互いに電気的に結合された第二のアライメントで配置されて、
前記第一の複数の経路の総数は、少なくとも2以上の偶数であることを特徴とする請求項1に記載のデバイス。 The first number of at least two paths of the second plurality of paths are arranged in a first alignment electrically coupled to each other;
The second number of at least two paths of the second plurality of paths are arranged in a second alignment electrically coupled to each other;
The device according to claim 1, wherein a total number of the first plurality of paths is an even number of at least two or more.
前記第二の複数の経路は複数の遮蔽された経路であることを特徴とする請求項1に記載のデバイス。 The first plurality of paths are a plurality of shielded paths;
The device of claim 1, wherein the second plurality of paths is a plurality of shielded paths.
前記第一の複数の経路は、互いに電気的に分離されて相互に補足的な位置で配置された、経路の少なくとも一つのペアを有し、
前記第二の複数の経路の少なくとも一番目の数は、該第二の複数の経路の二番目の数から電気的に分離されて配置され、前記第二の複数の経路は、前記第一の複数の経路から電気的に分離された少なくとも2つの経路を有し、
前記第二の複数の経路の一番目の数の少なくとも2つの経路は、互いに電気的に結合され、
前記第二の複数の経路の二番目の数の少なくとも2つの経路は、互いに電気的に結合されたことを特徴とする電気的な配置。 An electrical arrangement having at least a first and a second plurality of paths,
The first plurality of paths has at least one pair of paths electrically separated from each other and arranged in complementary positions;
At least a first number of the second plurality of paths is arranged to be electrically separated from a second number of the second plurality of paths, and the second plurality of paths are the first number Having at least two paths electrically separated from the plurality of paths;
The first number of at least two paths of the second plurality of paths are electrically coupled together;
An electrical arrangement characterized in that a second number of at least two paths of the second plurality of paths are electrically coupled to each other.
前記回路配置の少なくとも4つの経路は、互いに電気的に分離されることを特徴とする請求項15に記載の電気的な配置。 The second plurality of paths has at least two paths arranged in co-planar with each other;
The electrical arrangement of claim 15, wherein at least four paths of the circuit arrangement are electrically isolated from each other.
前記回路配置の少なくとも4つの経路は、互いに電気的に分離されることを特徴とする請求項15に記載の電気的な配置。 The second plurality of paths has at least two paths arranged in co-planar with each other;
The electrical arrangement of claim 15, wherein at least four paths of the circuit arrangement are electrically isolated from each other.
前記回路配置の少なくとも4つの経路は、互いに電気的に分離されることを特徴とする請求項15に記載の電気的な配置。 The first and second plurality of paths are stacked in a non-cooperative plane,
The electrical arrangement of claim 15, wherein at least four paths of the circuit arrangement are electrically isolated from each other.
前記第二の複数の経路は、複数の遮蔽する経路であることを特徴とする請求項15に記載の電気的な配置。 The first plurality of paths has a plurality of passages;
16. The electrical arrangement according to claim 15, wherein the second plurality of paths are a plurality of shielding paths.
前記複数の経路の各々のそれぞれの経路だけが互いに電気的に結合し、
前記少なくとも4つの複数の少なくとも2つは、前記経路の少なくとも4つの複数の少なくとも他の2つのための遮蔽を提供することを特徴とするデバイス。 A device having at least four paths,
Only each path of each of the plurality of paths is electrically coupled to each other;
The device, wherein at least two of the at least four plurality provide shielding for at least the other two of the at least four plurality of paths.
前記複数の各々のそれぞれの経路だけが互いに電気的に結合され、
前記第一の複数は前記第二の複数を遮蔽し、
前記第三の複数は前記第四の複数を遮蔽することを特徴とするデバイス。 A device having at least a plurality of first, second, third and fourth paths,
Only each respective path of the plurality is electrically coupled to each other;
The first plurality shields the second plurality;
The device wherein the third plurality shields the fourth plurality.
少なくとも第一及び第二の複数の遮蔽された経路と、を有する回路配置であって、
前記遮蔽する経路及び遮蔽された経路は、前記回路配置と交互に配置されて、
前記複数の各々のそれぞれの経路だけが互いに電気的に結合され、
前記回路配置の各々の前記複数が互いに電気的に分離されたことを特徴とする回路配置。 At least a first and a second plurality of shielding paths;
A circuit arrangement having at least a first and a second plurality of shielded paths,
The shielding path and the shielding path are arranged alternately with the circuit arrangement,
Only each respective path of the plurality is electrically coupled to each other;
A circuit arrangement wherein the plurality of each of the circuit arrangements are electrically isolated from each other.
共に伝導的に結合された複数の経路と、
共に伝導的に結合された第一の複数の遮蔽と、
共に伝導的に結合され、少なくとも前記第一の複数から電気的に分離された、第二の複数の遮蔽と、を有するシステムであって、
前記遮蔽と前記経路の各々は交互に配置され、前記遮蔽は前記集積回路から離れてエネルギーを伝播するために適切な少なくとも一つの低いインピーダンス経路を展開し、
前記経路は前記集積回路のパッケージ内でのエネルギー伝播に適切な低いインダクタンス経路を展開し、前記エネルギー伝播は少なくとも前記複数の遮蔽によって調節されることを特徴とするシステム。 An integrated circuit package having at least one integrated circuit;
A plurality of paths conductively coupled together;
A first plurality of shields conductively coupled together;
A second plurality of shields conductively coupled together and at least electrically isolated from said first plurality of,
Each of the shields and the paths are interleaved, and the shields develop at least one low impedance path suitable for propagating energy away from the integrated circuit;
The path develops a low inductance path suitable for energy propagation within the package of the integrated circuit, the energy propagation being regulated by at least the plurality of shields.
少なくとも第一の複数が前記集積回路に電気的に結合されたことを特徴とするデバイス。 13. A device according to any of claims 1-8 or 10-12, wherein the device is a first level interconnect arrangement coupled to an integrated circuit.
At least a first plurality is electrically coupled to the integrated circuit.
前記第一の複数は前記集積回路に電気的に結合され、
前記第二の複数は前記集積回路から電気的に分離されたことを特徴とするデバイス。 13. A device according to any of claims 1-8 or 10-12, wherein the device is a first level interconnect arrangement coupled to an integrated circuit.
The first plurality is electrically coupled to the integrated circuit;
The device wherein the second plurality is electrically isolated from the integrated circuit.
第三平面に存在する第三の電気的な伝導性の遮蔽層と、A third electrically conductive shielding layer present in the third plane;
第五平面に存在する第五の電気的な伝導性の遮蔽層と、A fifth electrically conductive shielding layer present in the fifth plane;
前記第一平面と前記第五平面との間の前記第三平面と、The third plane between the first plane and the fifth plane;
前記第一平面と前記第三平面との間の第二平面に存在する第一の電気的な伝導性の電極層と、A first electrically conductive electrode layer present in a second plane between the first plane and the third plane;
前記第三平面と前記第五平面との間の第四平面に存在する第三の電気的な伝導性の電極層と、A third electrically conductive electrode layer present in a fourth plane between the third plane and the fifth plane;
第二の電気的な伝導性の遮蔽層と、A second electrically conductive shielding layer;
第四の電気的な伝導性の遮蔽層と、A fourth electrically conductive shielding layer;
第六の電気的な伝導性の遮蔽層と、A sixth electrically conductive shielding layer;
第二の電気的な伝導性の電極層と、A second electrically conductive electrode layer;
第四の電気的な伝導性の電極層とを有するデバイスであってA device having a fourth electrically conductive electrode layer,
前記デバイスは、前記第一の電気的な伝導性の遮蔽層、前記第三の電気的な伝導性の遮蔽層及び前記第五の電気的な伝導性の遮蔽層と互いに電気的に接続し、The device is electrically connected to the first electrically conductive shielding layer, the third electrically conductive shielding layer, and the fifth electrically conductive shielding layer;
前記第一の電気的な伝導性の遮蔽層、前記第三の電気的な伝導性の遮蔽層及び前記第五の電気的な伝導性の遮蔽層は積層され、前記第一の電気的な伝導性の電極層は、実質的に前記第一の電気的な伝導性の遮蔽層と前記第三の電気的な伝導性の遮蔽層との間にあり、前記第三の電気的な伝導性の電極層は、実質的に前記第三の電気的な伝導性の遮蔽層と前記第五の電気的な伝導性の遮蔽層との間にあり、The first electrically conductive shielding layer, the third electrically conductive shielding layer, and the fifth electrically conductive shielding layer are laminated to form the first electrically conductive shield layer. The conductive electrode layer is substantially between the first electrically conductive shielding layer and the third electrically conductive shielding layer, and the third electrically conductive shielding layer. An electrode layer is substantially between the third electrically conductive shielding layer and the fifth electrically conductive shielding layer;
前記デバイスは、前記第二の電気的な伝導性の遮蔽層、前記第四の電気的な伝導性の遮蔽層及び前記第六の電気的な伝導性の遮蔽層と互いに電気的に接続し、The device is electrically connected to the second electrically conductive shielding layer, the fourth electrically conductive shielding layer and the sixth electrically conductive shielding layer;
前記第二の電気的な伝導性の遮蔽層、前記第四の電気的な伝導性の遮蔽層及び前記第六の電気的な伝導性の遮蔽層は積層され、前記第二の電気的な伝導性の電極層は、実質的に前記第二の電気的な伝導性の遮蔽層と前記第四の電気的な伝導性の遮蔽層との間にあり、前記第四の電気的な伝導性の電極層は、実質的に前記第四の電気的な伝導性の遮蔽層と前記第六の電気的な伝導性の遮蔽層との間にあることを特徴とするデバイス。The second electrically conductive shielding layer, the fourth electrically conductive shielding layer, and the sixth electrically conductive shielding layer are stacked to form the second electrically conductive shield layer. A conductive electrode layer substantially between the second electrically conductive shield layer and the fourth electrically conductive shield layer, wherein the fourth electrically conductive shield layer; A device wherein an electrode layer is substantially between the fourth electrically conductive shielding layer and the sixth electrically conductive shielding layer.
前記第一の電気的な伝導性の電極層及び前記第二の電気的な伝導性の電極層は、前記第一平面と前記第三平面との間の第二平面に存在し、The first electrically conductive electrode layer and the second electrically conductive electrode layer are in a second plane between the first plane and the third plane;
前記第三の電気的な伝導性の遮蔽層及び前記第四の電気的な伝導性の遮蔽層は、第三平面に存在し、The third electrically conductive shielding layer and the fourth electrically conductive shielding layer are in a third plane;
前記第五の電気的な伝導性の遮蔽層及び前記第六の電気的な伝導性の遮蔽層は、第五平面に存在し、The fifth electrically conductive shielding layer and the sixth electrically conductive shielding layer are in a fifth plane;
前記第三の電気的な伝導性の電極層及び前記第四の電気的な伝導性の電極層は、前記第三平面と前記第五平面との間の第四平面に存在することを特徴とする請求項37に記載のデバイス。The third electrically conductive electrode layer and the fourth electrically conductive electrode layer are present in a fourth plane between the third plane and the fifth plane. 38. The device of claim 37.
前記第三の電気的な伝導性の電極層は、第三の電気的に伝導性の層の本体領域及び第三の電気的に伝導性の層のタブ領域を確定し、前記第三の電気的に伝導性の層のタブ領域は前記第一方向と反対の第二方向で前記第三の電気的に伝導性の層の本体領域から突出することを特徴とする請求項39に記載のデバイス。The third electrically conductive electrode layer defines a body region of the third electrically conductive layer and a tab region of the third electrically conductive layer, the third electrically conductive layer. 40. The device of claim 39, wherein a tab region of the electrically conductive layer protrudes from a body region of the third electrically conductive layer in a second direction opposite to the first direction. .
前記第四の電気的な伝導性の電極層は、第四の電気的に伝導性の層の本体領域及び第四の電気的に伝導性の層のタブ領域を確定し、前記第四の電気的に伝導性の層のタブ領域は前記第三方向と反対の第四方向で前記第四の電気的に伝導性の層の本体領域から突出することを特徴とする請求項40に記載のデバイス。The fourth electrically conductive electrode layer defines a body region of the fourth electrically conductive layer and a tab region of the fourth electrically conductive layer, and the fourth electrically conductive layer. 41. The device of claim 40, wherein a tab region of the electrically conductive layer protrudes from a body region of the fourth electrically conductive layer in a fourth direction opposite to the third direction. .
前記デバイスの表面から突出する1セットのパッドをさらに有し、Further comprising a set of pads protruding from the surface of the device;
前記電気的に伝導性の相互接続のセットの各々が前記パッドのセットの異なるものに接続することを特徴とする請求項37に記載のデバイス。38. The device of claim 37, wherein each of the electrically conductive interconnect sets connects to a different set of pads.
Applications Claiming Priority (8)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US30242901P | 2001-07-02 | 2001-07-02 | |
US31096201P | 2001-08-08 | 2001-08-08 | |
US09/982,553 US20020079116A1 (en) | 2000-10-17 | 2001-10-17 | Amalgam of shielding and shielded energy pathways and other elements for single or multiple circuitries with common reference node |
US37110101P | 2001-11-15 | 2001-11-15 | |
US09/996,355 US20020089812A1 (en) | 2000-11-15 | 2001-11-29 | Energy pathway arrangement |
US10/023,467 US20020131231A1 (en) | 2000-10-17 | 2001-12-17 | Energy pathway arrangements for energy conditioning |
US38838802P | 2002-06-12 | 2002-06-12 | |
PCT/US2002/021238 WO2003005541A2 (en) | 2001-07-02 | 2002-07-02 | Arrangement for energy conditioning |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2004536452A JP2004536452A (en) | 2004-12-02 |
JP2004536452A5 true JP2004536452A5 (en) | 2008-02-21 |
Family
ID=33545708
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2003511391A Pending JP2004536452A (en) | 2001-07-02 | 2002-07-02 | Arrangement for energy regulation |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2004536452A (en) |
-
2002
- 2002-07-02 JP JP2003511391A patent/JP2004536452A/en active Pending
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