JPH07161568A - Multilayer capacitor array - Google Patents

Abstract

PURPOSE:To reduce a crosstalk attributed to capacitive coupling by forming through-holes in capacitor element s and constituting a shielding body.of conductors filled in these through-holes. CONSTITUTION:Four internal electrodes 15... extended in the short side direction of a rectangle, brought into contact only with one of long sides and composed of a conductive material are formed onto a first dielectric sheet 11, and three through-holes 20... penetrated into the first dielectric sheet 11 are formed among the internal electrodes 15. Four internal electrodes 16... extended in the short side direction of the rectangle, brought into contact only with the other side of the long sides and consisting of the conductive material are shaped onto a second dielectric sheet 12, and three through-holes 21... penetrated into the second dielectric sheet 12 are formed mutually among the four internal electrodes 16.... The through-holes 20... and 21... are filled with conductors 23... and 24....

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a composite ceramic chip capacitor in which at least two or more multilayer capacitors are formed in one ceramic chip.

[0002]

2. Description of the Related Art With the widespread use of various electronic devices, the size and weight of these devices have been rapidly reduced. In particular, in electronic devices intended for carrying such as a camera-integrated VTR, a mobile phone, a notebook personal computer, and a palmtop computer, the speed of size reduction and weight reduction is remarkable. As electronic devices used in such electronic devices are being made smaller and lighter, various electronic components are being made smaller and lighter, and means for mounting the electronic components are also used in through holes provided in a conventional printed circuit board. Surface mounting technology (S) that mounts and solders electronic parts on the land of the conductive pattern provided on the printed circuit board
MT).

The electronic components used in this SMT are generically referred to as surface mounting devices (SMD), and are semiconductor components, capacitors, resistors, inductors, filters, etc. And resistors are called chip components. These ceramic chip parts include circuit elements,
For example, there is a multilayer capacitor array in which a plurality of capacitors, resistors, and inductors are built in instead of one, and a composite chip component called a resistor array. is there.

FIG. 1 shows a multilayer capacitor array composed of four dielectric layers in which four multilayer capacitor elements are combined in order to explain the structure of a conventional multilayer capacitor array. This multilayer capacitor array has a rectangular shape
The dielectric sheet 1, the second dielectric sheet 2, the third dielectric sheet 3 and the fourth dielectric sheet 4 are laminated in this order. In addition, in this figure, what is shown in (b), (d), (f) and (h) is
It is sectional drawing which cut | disconnected the dielectric sheet of (a), (c), (e), (g) by the bb line, the dd line, the ff line, and the hh line, respectively.

On the first dielectric sheet 1, four internal electrodes 5 ... (G) made of a conductive material and extending in the direction of the shorter side of the rectangle and contacting only one of the longer sides are (g) and As shown in (h), four internal parts made of a conductive material are formed on the second dielectric sheet 2 and extend in the short side direction of the rectangle and contact only the other long side. Electrode 6 ... is (e)
And (f) are formed on the third dielectric sheet 3 so as to extend in the short side direction of the rectangle and contact only one of the long sides, as in the first dielectric sheet 1. Four internal electrodes 7 ... Made of the above material are formed as shown in (c) and (d), and the dielectric sheet 3 is laminated in this way.
The dielectric sheet 4 shown in (a) and (b) in which the internal electrode is not formed is laminated on the upper surface of the.

(I) shows the external shape of the multilayer capacitor array thus constructed, and (j) shows a cross section taken along the line j--j. Four terminal electrodes 8 ... Are attached to the internal electrodes 5 and 7 by means of printing or the like in order to connect each multilayer capacitor forming the multilayer capacitor array to an external printed circuit pattern. Four terminal electrodes 9 ... Are attached to the multilayer capacitor 6 by means of printing or the like in order to connect each multilayer capacitor forming the multilayer capacitor array to an external printed circuit pattern. These terminal electrodes 8 and 9 are extended to a part of upper and lower surfaces which are mounting surfaces. Note that (k) is an electrical connection diagram of this multilayer capacitor array.
Further, the number of dielectric sheets to be laminated and the number of laminated capacitor elements formed inside are appropriately selected as necessary.

The distance between the multilayer capacitor elements formed inside the conventional multilayer capacitor array having such a structure is small. In addition, since the multilayer capacitor elements are adjacent to each other via the dielectric, capacitive coupling may occur between the adjacent multilayer capacitor elements. This capacitive coupling has less serious consequences when the frequency of use of the circuit is low, but in circuits where the frequency of use exceeds several 100 MHz, such as portable telephones, the signal that passes through the adjacent multilayer capacitors is used. Crosstalk may occur between them, causing a serious failure such as a reduction in the signal-to-noise ratio or, in the worst case, malfunction of the onboard equipment.

[0008]

SUMMARY OF THE INVENTION The present invention has been made to cope with such a situation, and an object thereof is to reduce crosstalk of capacitive coupling between respective multilayer capacitor elements. Therefore, in the present invention, the shield electrode is formed between each of the multilayer capacitor elements forming the multilayer capacitor array. The shield electrodes electrostatically shield between the multilayer capacitor elements that form the multilayer capacitor array,
Capacitive coupling is reduced and crosstalk between signals through adjacent multilayer capacitors is reduced.

[0009]

EXAMPLES Examples of the present invention will be described. FIG. 2 shows a first embodiment of a multilayer capacitor array according to the present invention, in which four multilayer capacitors are combined in the same manner as the conventional multilayer capacitor array shown in FIG. 1, according to the present invention. This multilayer capacitor array is constructed by stacking a rectangular first dielectric sheet 11, a second dielectric sheet 12, a third dielectric sheet 13 and a fourth dielectric sheet 14 in this order. ing. In addition, in this figure, what is shown in (b), (d), (f) and (h) is
It is sectional drawing which cut | disconnected the dielectric sheet of (a), (c), (e), (g) by the bb line, the dd line, the ff line, and the hh line, respectively.

On the first dielectric sheet 11, there are four internal electrodes 15 ... (G) made of a conductive material and extending in the direction of the shorter side of the rectangle and contacting only one of the longer sides. As shown in the drawing, three through holes 20 are formed between the internal electrodes 15 so as to penetrate the first dielectric sheet 11, and the conductors 23 are formed in the through holes 20. It is filled as shown in h).

On the second dielectric sheet 12, four internal electrodes 16 made of a conductive material, which extend in the direction of the shorter side of the rectangle and contact only the other of the longer sides, are formed ( e), the four internal electrodes 16 ...
Three through holes 21 are formed between the two dielectric sheets 12 so as to penetrate the second dielectric sheet 12.
.. are filled with conductors 24 .. as shown in (f).

On the third dielectric sheet 13, four internal electrodes 17 made of a conductive material, which are in contact with only one of the long sides of the rectangle, are formed on the third dielectric sheet 11, as in the first dielectric sheet 11. The internal electrodes 17 are formed as shown in FIG.
· Three through holes 22 ··· that penetrate the third dielectric sheet 13 are formed between them, and conductors 25 ··· are filled in the through holes 22 ··· as shown in (d). ing.

The internal electrodes 15 of the first dielectric sheet 11
A conductive layer 26 is formed on the surface opposite to the side where the ... Is formed, and the conductive layer 26 is electrically connected to the conductor 23 filled in the through hole 20. .
Further, the dielectric sheet 14 shown in (a), in which the internal electrodes are not formed, is laminated on the upper surface of the dielectric sheet 13 thus laminated.

(I) shows the external shape of the multilayer capacitor array thus constructed, and (j) shows a cross section taken along the line j--j. Internal electrodes 15 ... and 17 ...
Four terminal electrodes 18 ... Are connected by means of printing or the like in order to connect each of the multilayer capacitors constituting the multilayer capacitor array to an external printed circuit pattern,
The internal electrodes 16 ... Are provided with four terminal electrodes 19 by means of printing or the like in order to connect each multilayer capacitor forming the multilayer capacitor array to an external printed circuit pattern.
... are connected. These terminal electrodes 18 ...
, And 19 ... Are extended to a part of the upper and lower surfaces which are the mounting surfaces, but this extended portion is not always necessary. Note that (m) is an electrical connection diagram of this multilayer capacitor array.

Through holes 20, ..., 21 ... And 22
.. are electrically connected to each other to form three conductors 23 ... And electrically connected to the conductive layer 26 formed on the first dielectric sheet 11 as a whole. The terminal electrodes 28, 28 are attached by means of printing or the like to ground the conductive layer 26. This terminal electrode 2
It goes without saying that the number of 8, 28 may be one. This terminal electrode 28 is extended to a part of the upper and lower surfaces which are mounting surfaces, but this extended portion is not always necessary. . By grounding the conductive layer 26 in this manner, electrostatic shielding between the multilayer capacitors is performed, and this electrostatic shielding prevents crosstalk, which is a problem in the conventional multilayer capacitor array.

Modified examples are shown in (k) and (l). When the conductive pattern of the printed circuit board exists under the multilayer capacitor array, a short circuit with the conductive layer 26 may occur. As a countermeasure against this, as shown in (k), another dielectric layer 29 is provided under the dielectric layer 11, and a conductive layer is formed on this dielectric layer 28. By doing so, the conductive pattern of the printed circuit board can be arranged under the multilayer capacitor array of the present invention, so that the degree of integration of the circuit can be increased.

If the electrostatic shield is not sufficient if a conductor is formed only between the internal electrodes, the lowermost dielectric 11 and the uppermost dielectric 14 are also passed through as shown in (l). By forming holes and conductors, a more complete electrostatic shield can be obtained.

FIG. 3 shows a conventional multilayer capacitor array having a configuration different from that shown in FIG.
While each of the multilayer capacitor elements of the multilayer capacitor array shown in FIG. 3 is separated from each other and independent, one electrode of each of the multilayer capacitor elements of the multilayer capacitor array shown in FIG. 3 is a common electrode. This multilayer capacitor array also has a rectangular first dielectric sheet 31, a second dielectric sheet 32, a third dielectric sheet 33, and a fourth dielectric sheet 34, which have the same rectangular shape as that of FIG. It is configured by being laminated. In addition, in this figure, what is shown in (b), (d), (f) and (h) is
It is sectional drawing which cut | disconnected the dielectric sheet of (a), (c), (e), (g) by the bb line, the dd line, the ff line, and the hh line, respectively.

On the first dielectric sheet 31, there are four internal electrodes 35 (g), which extend in the direction of the shorter side of the rectangle and are in contact with only one of the longer sides and are made of a conductive material. (H)
One internal electrode 36 made of a conductive material that is formed as shown in FIG. 2 and extends in the direction of the longer side of the rectangle on the second dielectric sheet 32 and is in contact with only the two short sides (e) and (F)
And formed on the third dielectric sheet 33 in the same manner as the first dielectric sheet 31 and extending in the direction of the short side of the rectangle, and made of a conductive material that contacts only one of the long sides. Four
The individual internal electrodes 37 ... Are formed as shown in (c) and (d), and the internal electrodes are not formed on the upper surface of the dielectric sheet 33 thus laminated (a). And the dielectric sheets 34 shown in (b) are laminated.

(I) shows the external shape of the thus-configured multilayer capacitor array, and (j) shows a cross section taken along the line j--j. Four terminal electrodes 38 ... Are attached to the internal electrodes 35 and 37 by means of printing or the like in order to connect each multilayer capacitor constituting the multilayer capacitor array to an external printed circuit pattern.
Two terminal electrodes 39 are attached to 6 by means of printing or the like in order to connect each multilayer capacitor forming the multilayer capacitor array to an external printed circuit pattern. These terminal electrodes 38 and 39 are extended to a part of upper and lower surfaces which are mounting surfaces. Note that (k) is an electrical connection diagram of this multilayer capacitor array.

Also in the case of the multilayer capacitor array having such a structure, the interval between the multilayer capacitor elements formed inside is small as in the case shown in FIG. Not only that, because the multilayer capacitor elements are adjacent to each other via the dielectric, capacitive coupling occurs between the adjacent multilayer capacitor elements, resulting in crosstalk between signals, deterioration of the signal-to-noise ratio, or In the worst case, it may cause a serious failure such as malfunction of the onboard equipment.

FIG. 4 shows an embodiment in which the present invention is applied to the multilayer capacitor array shown in FIG. This multi-layer capacitor array is configured by combining four multi-layer capacitors each having four layers of dielectric material, like the conventional multi-layer capacitor array shown in FIG. This multilayer capacitor array is constructed by stacking a rectangular first dielectric sheet 41, a second dielectric sheet 42, a third dielectric sheet 43, and a fourth dielectric sheet 44 in this order. ing. In this figure, (b), (d), (f) and (h) show (a), (c), (e),
The dielectric sheet of (g) was used for bb line, dd line, and f- line, respectively.
It is sectional drawing cut | disconnected by the f line and the hh line.

On the first dielectric sheet 41, four internal electrodes 45, which extend in the direction of the shorter side of the rectangle and are in contact with only one of the longer sides, are made of a conductive material and are (g) and (H)
It is formed as shown in FIG.

On the second dielectric sheet 42, an internal electrode 46 made of a conductive material and extending in the long side direction of the rectangle and contacting only both short sides is formed as shown in (e). , The second dielectric sheet 42 includes a dielectric sheet 42
Are formed to pass through the through holes 48, ... And the through holes 48 ... Are filled with the conductors 50 as shown in (f).

As with the first dielectric sheet 41, four internal electrodes 47, which are made of a conductive material and are in contact with only one of the long sides of the rectangle, are formed on the third dielectric sheet 43. The internal electrode 47 is formed as shown in FIG.
· Three through holes 49 ··· that penetrate the third dielectric sheet 43 are formed between them, and the through holes 49 ··· are filled with conductors 51 ··· as shown in (d). ing.

Further, the dielectric sheets 44 shown in (a) and (b) in which the internal electrodes are not formed are laminated on the upper surface of the dielectric sheets 43 thus laminated.

(I) shows the external shape of the thus-configured multilayer capacitor array, and (j) shows a cross section taken along the line j--j. Four terminal electrodes 53 ... Are attached to the internal electrodes 45 and 47 by means of printing or the like in order to connect each multilayer capacitor forming the multilayer capacitor array to an external printed circuit pattern. 46
Two terminal electrodes 54, 54 are attached by means of printing or the like in order to connect each of the multilayer capacitors constituting the multilayer capacitor array to an external printed circuit pattern. It goes without saying that the number of these terminal electrodes 54, 54 may be one. Further, these terminal electrodes 53 ... And 54, 54 are extended to a part of the upper and lower surfaces which are the mounting surfaces, but this extended portion is not always necessary.

The conductor 50 filled in the through holes 48 ... And the conductor 5 filled in the through holes 49.
.. together with one another form three conductors 52 .., and are electrically connected to the internal electrodes 46. Note that (m) is an electrical connection diagram of this multilayer capacitor array. By grounding the terminal electrodes 54 and 54 and grounding the conductive layer 46 and the conductors 52, ..., Electrostatic shielding is performed between the multilayer capacitors.

Modified examples are shown in (k) and (l).
The modified embodiment shown in (k) has internal electrodes 45 ...
The arrangement relationship of 6, 47 ... Is changed, and the internal electrodes 45 ... Are arranged between the two internal electrodes 46, 46 '. Further, when the electric shield is not sufficient if the conductor is formed only between the internal electrodes, through holes are also formed in the lowermost dielectric 41 and the uppermost dielectric 44 as shown in (l). By forming and filling the conductors 55, ..., A more complete electrostatic shield can be obtained.

The internal electrodes and the lead-out electrodes of the conventional multilayer capacitor array shown in FIG. 3 and the multilayer capacitor array of the embodiment shown in FIG. 4 are in contact with only one long side of the rectangle and the other long side. Since they are not in contact with each other, the multilayer capacitors are only arranged in the long side direction. However, in the actually used multilayer capacitor array, another set of internal electrodes and extraction electrodes is in contact with the other long side. Even for the multilayer capacitor array having such a configuration, it is possible to perform electrostatic shielding by the conductor shown in FIG.

FIG. 5 shows an embodiment of a further improved multilayer capacitor array in which conductors for electrostatic shielding are also arranged between the multilayer capacitors arranged on both long sides of the multilayer capacitor array thus constructed. .

This multilayer capacitor array is composed of four layers of dielectric material like the multilayer capacitor array of the embodiment shown in FIG. 4, but unlike the multilayer capacitor array of the embodiment shown in FIG. It is configured by arranging four multilayer capacitors on each side and combining a total of eight multilayer capacitors. This multilayer capacitor array is constructed by stacking a rectangular first dielectric sheet 61, a second dielectric sheet 62, a third dielectric sheet 63, and a fourth dielectric sheet 64 in this order. ing. In this figure, (b), (d),
(F) and (h) show (a), (c),
The dielectric sheets of (e) and (g) are respectively attached to line bb and line dd.
It is sectional drawing cut | disconnected by the line, the ff line, and the hh line.

On the first dielectric sheet 61, four internal electrodes 65, which are made of a conductive material and extend in the short side direction of the rectangle and contact only one long side, and the short side direction of the rectangle. , And four inner electrodes 65 '... made of a conductive material that are in contact with only the other long side are formed as shown in (g). Further, three through holes 70 penetrating the first dielectric sheet 61 are provided between the internal electrodes 65.
Are formed, and three through holes 70 '... penetrating the first dielectric sheet 61 are formed between the internal electrodes 65', and the internal electrodes 65 ... And the internal electrodes 65 '...
Through holes 70 "are formed between the through holes. These through holes are integrally formed,
As shown in (h), the through holes 70 ..., 70 '...
And 70 ″ are filled with a conductor 73.

On the second dielectric sheet 62, an internal electrode 66 made of a conductive material and extending in the long side direction of the rectangle and contacting only the two short sides is formed as shown in (e). , The second dielectric sheet 62 has through holes 70, ..., 70 '... formed in the first dielectric sheet 61.
And 70 "at positions corresponding to the second dielectric sheet 6 respectively.
Through holes 71, ..., 71 '...
1 "is formed. These through holes are formed as one body, and the through holes 71 ..., 71 '... and 71" are filled with the conductor 74 as shown in (f). There is.

On the third dielectric sheet 63, like the first dielectric sheet 61, four internal electrodes made of a conductive material extending in the short side direction of the rectangle and contacting only one long side. 67 and four internal electrodes 67 'made of a conductive material extending in the direction of the shorter side of the rectangle and contacting only the other long side.
... are formed as shown in (g). Further, three through holes 72 are formed between the internal electrodes 67 to penetrate the third dielectric sheet 63, and the third dielectric sheet 63 is penetrated between the internal electrodes 67 '. 3 through holes 72 ′ ...
.. and internal electrodes 67 '... are formed with through holes 72 ". These through holes are integrally formed, and as shown in FIG. Conductors 7 at 72, ..., 72 '... and 72 "
5 is filled.

Further, on the upper surface of the thus laminated dielectric sheet 63, the dielectric sheet 64 shown in (a) and (b) without the internal electrodes is laminated.

(I) shows the external shape of the multilayer capacitor array thus constructed, and (j) shows a cross section taken along the line j--j. Four terminal electrodes 69 ... Are attached to the internal electrodes 65 and 67 by means of printing or the like in order to connect each multilayer capacitor forming the multilayer capacitor array to an external printed circuit pattern. 6
5'and 67 'are provided with four terminal electrodes 69' ... by means of printing or the like in order to connect the respective multilayer capacitors constituting the multilayer capacitor array to an external printed circuit pattern.
Is attached, and two terminal electrodes 77, 77 'are attached to the internal electrodes 66 by means of printing or the like in order to connect each multilayer capacitor forming the multilayer capacitor array to an external printed circuit pattern. ing. In addition,
It goes without saying that the number of these terminal electrodes 77, 77 'may be one. In addition, these terminal electrodes 69
········································ s and 69, 77 ′ are partially extended on the upper and lower surfaces, which are mounting surfaces, but the extended portions are not always necessary.

Each laminated dielectric sheet 61, 62, 6
The conductors 74, 75 and 76 filled in 3 are integrated to form three conductors 76 ... And are electrically connected to the internal electrode 66. Note that (m) is an electrical connection diagram of this multilayer capacitor array. The terminal electrodes 77 and 77 'are grounded and the conductive layer 66 and the conductors 76 ... Are grounded to provide electrostatic shielding between the multilayer capacitors.

Modified examples are shown in (k) and (l). When the conductive pattern of the printed circuit board exists under the multilayer capacitor array, a short circuit with the conductor 76 may occur. As a countermeasure, another dielectric layer 78 is provided below the dielectric layer 61 as shown in (k). By doing so, the conductive pattern of the printed circuit board can be arranged under the multilayer capacitor array of the present invention, so that the degree of integration of the circuit can be increased. (L)
The modified embodiment shown in FIG.
, 66, 67 ..., 67 '... The arrangement relationship is changed, and the internal electrode 6 is provided between the internal electrodes 66, 66'.
5 ..., 65 '... are arranged. In addition, if the electricity shielding is not sufficient if the conductor is formed only between the internal electrodes, form a through hole in the lowermost layer dielectric and the uppermost layer dielectric to fill the conductor. Due to
A more complete electrostatic shield can be obtained.

Although the dielectric sheet has a rectangular shape in the above-described embodiments, the dielectric sheet may have any other shape that can implement the present invention. Of course, what you can do is. Further, the position where the plurality of internal electrodes are in contact may be any position other than the long side of the rectangle, and the position where the single internal electrode is in contact is other than the short side of the rectangle. However, it goes without saying that any position may be adopted as long as the present invention can be implemented.

[0041]

As is apparent from the above description, in the present invention, through holes are formed between the capacitor elements, and the conductor is filled in these through holes to form the shield. The electrostatic shielding by the body can reduce capacitively coupled crosstalk.

[Brief description of drawings]

FIG. 1 is an internal configuration diagram, an overall configuration diagram and a sectional view of a conventional multilayer capacitor array.

FIG. 2 is an internal configuration diagram, an overall configuration diagram and a sectional view of a multilayer capacitor array according to a first embodiment of the present application.

FIG. 3 is an internal configuration diagram, an overall configuration diagram and a cross-sectional view of another conventional multilayer capacitor array.

FIG. 4 is an internal configuration diagram, an overall configuration diagram and a sectional view of a multilayer capacitor array according to a second invention example of the present application.

5A and 5B are an internal configuration diagram, an overall configuration diagram, and a sectional view of a multilayer capacitor array according to a third embodiment of the present invention.

[Explanation of symbols]

1,2,3,4,21,22,23,24,29,3
1, 32, 33, 34, 41, 42, 43, 44, 6
1,62,63,64 Dielectric sheet 5,6,7,15,16,17,35,36,37,4
5,46,46 ', 47,65,70,71,72 internal electrodes 8,9,18,19,28,38,39,53,54,
69, 77 Terminal electrodes 20, 21, 22, 48, 49, 70, 71, 72 Through holes 23, 24, 25, 27, 50, 51, 52, 55, 7
3,74,75 Conductor 23,42,76 Shielding electrode 26,27 Conductive layer

Claims (7)

[Claims] 1. A first dielectric sheet having a plurality of first internal electrodes formed in parallel on one surface, and a plurality of second dielectric sheets corresponding to the first dielectric internal electrodes on one surface. Second dielectric sheets in which internal electrodes are formed in parallel are alternately laminated, and a first dielectric sheet between the plurality of first inner electrodes is formed on the plurality of first inner electrodes. A plurality of first through holes extending along the plurality of first through holes are formed, and a plurality of first through holes extending along the plurality of second inner electrodes are formed on the second dielectric sheet between the plurality of second inner electrodes. A multilayer capacitor array in which two through holes are formed, the first and second through holes are filled with a conductor, and the conductors are electrically connected. 2. The multilayer capacitor array according to claim 1, wherein the electrical connection is made by a conductive layer formed outside the multilayer capacitor array. 3. The multilayer capacitor array according to claim 1, wherein the electrical connection is made by a conductive layer formed inside the multilayer capacitor array. 4. A first dielectric sheet in which a plurality of first internal electrodes are formed in parallel on one surface, and a single second internal electrode is formed over the entire surface of one surface. A plurality of first dielectric sheets that are alternately laminated and that extend along the plurality of first inner electrodes on the first dielectric sheet between the plurality of first inner electrodes; Through holes are formed between the second internal electrodes of the second dielectric sheet.
A plurality of second through holes are formed at positions corresponding to the through holes, the first and second through holes are filled with a conductor, and the conductor is electrically connected. 5. The multilayer capacitor array according to claim 3, wherein the electrical connection is made by a conductive layer formed outside the multilayer capacitor array. 6. The multilayer capacitor array according to claim 3, wherein the electrical connection is made by a conductive layer formed inside the multilayer capacitor array. 7. A first dielectric sheet having a plurality of parallel first internal electrodes arranged in two rows on one surface, and a single second internal electrode over the entire surface of one surface. Formed second dielectric sheets are alternately laminated, and a first dielectric sheet between the plurality of first inner electrodes extends along the plurality of first inner electrodes. A first through hole is formed, a second through hole extending orthogonally to the first through hole is formed between the plurality of first internal electrodes arranged and formed in the two rows, and the second through hole is formed. A plurality of third through holes are formed in the dielectric sheet at positions corresponding to the first through holes between the second internal electrodes, and in the second through holes of the second dielectric sheet. A plurality of fourth through holes are formed at corresponding positions, and the first, second, and And a fourth conductor is filled in the through hole, the multilayer capacitor array in the conductor is electrically connected.