JP2009194567A - Functional sheet - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a functional sheet which can add high frequency devices or easily add filter circuits even if there are design changes in a mother circuit board. <P>SOLUTION: Conductive layers 6A to 6E formed between electrodes of a laminate 1A that a plurality of dielectric films 2 to 5 are laminated are formed in a specified pattern to form capacitors C1 and C2, and a coil 7 on the conductive layer 6C. The capacitor C1, the coil 7 and each of electrodes 1a to 1c are connected using a conductor 8A of via holes 8a to 8c which are formed in each of the dielectric films, so that a low-pass filter is formed. Dielectric films 2 which have high permittivity ε<SB>H</SB>are laminated on first and forth layers, and dielectric films 3 and 4 which have low permittivity ε<SB>L</SB>are laminated on second and third layers to form the laminate 1A, so that the other circuit such as a high-pass filter can also be formed. Thereby, filter circuits can easily be added by arranging the functional sheet 10A between a high frequency device and a mother circuit board. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a functional sheet that is provided on a mother circuit board on which a high-frequency device is mounted and provides a filter function to the high-frequency device.

  An electronic device such as a cellular phone includes a high-frequency device such as a high-frequency amplifier (RF amplifier). If high-frequency noise emitted from such a high-frequency device is superimposed on a signal line wired on a mother circuit board, a malfunction occurs. Therefore, it is general to provide a plurality of filter circuits on the mother circuit board.

  This type of filter circuit is formed by combining chip-type capacitors and coils, but if multiple chip parts are mounted for each of multiple divisions (terminals) provided on the mother circuit board, the size and thickness of the filter circuit is reduced. There is a problem that it is difficult to reduce the manufacturing cost as well as obstructing reduction in weight or weight.

Therefore, as shown in the following patent documents, conventionally, a multilayer wiring technique is used to form capacitors and coils constituting the filter circuit inside the multilayer substrate.
Japanese Patent Laid-Open No. 6-20870 JP 2000-349225 A JP 2003-37465 A JP 2004-289195 A JP 2004-356264 A

  However, the high-frequency device and the mother circuit board are often designed separately. Moreover, since the filter circuit is mounted at a plurality of positions on one mother circuit board, it is necessary to design the filter circuit for each mother circuit board.

  For this reason, if there is a design change for adding a high-frequency device or a design change for the mother circuit board itself, there is a problem that a complicated design change operation is forced on the filter circuit.

  The present invention is to solve the above-described conventional problems, and to provide a functional sheet capable of easily adding a filter circuit or the like even when a high frequency device is added or a mother circuit board has a design change. It is aimed.

The present invention is a functional sheet comprising a laminate in which a plurality of dielectric films are laminated, and conductive layers formed in a predetermined pattern on the upper and lower surfaces of each dielectric film,
The uppermost layer and the lowermost layer of the laminate are formed of a dielectric film having a higher dielectric constant than the other layers.

  In the present invention, various circuits such as a filter are formed in a film and sandwiched between a high-frequency device and a mother circuit board, and a high-density structure including a small-diameter via hole and a fine conductor pattern. A plurality of filter circuits can be formed inside the functional sheet by configuring the land for connecting the high-frequency device and the mother circuit board with the same area. Therefore, a necessary filter circuit can be arranged without changing the design of the high-frequency device and the mother circuit board. Thereby, generalization of a high frequency device can be achieved.

It is preferable that one or both of a capacitor and a coil are formed at a plurality of locations of the laminate, and the capacitor is formed by a conductive layer disposed opposite to each other with at least one dielectric film interposed therebetween. Those are preferred.
In the above, it is preferable that the laminate has a four-layer structure.

  In the above means, capacitors and coils can be arranged at a plurality of locations in a single laminate. For this reason, the individual design of the filter circuit can be optimized. Therefore, the mutual influence which arises between a high frequency device and a specific mother circuit board can be made small, and the improvement of the performance of a product and the stabilization of a performance can be aimed at.

In addition, it is preferable that the uppermost layer and the lowermost layer of the laminate are formed thinner than the other layers.
With the above means, the capacitance of the capacitor can be increased.

The coil is preferably a plane spiral.
In the above means, an inductance can be formed in the thin functional sheet.

  It is preferable that the coil is formed so as to contact only a layer other than the uppermost layer and the lowermost layer.

  With the above means, the parasitic capacitance can be reduced, and it can function effectively as an inductance.

Further, it is preferable that the dielectric film has a via hole in which a conductor is embedded, and one end of the capacitor and one end of the coil are conductively connected via the conductor in the via hole.
In the above configuration, the capacitor and the coil can be electrically connected to each other.

  It is preferable that a plurality of filter circuits are provided by the plurality of capacitors and the plurality of coils. For example, the filter circuit includes any of a low-pass filter, a high-pass filter, a band-pass filter, and a trap.

  In addition, the conductive layer formed on the outer surface of the uppermost layer stack has input / output electrodes used for input / output with other substrates, and the conductive layer formed on the outer surface of the lowermost layer stack. Preferably, an input / output electrode used for input / output with another substrate is formed at a position corresponding to the input / output electrode.

  When the mother board is connected to another board, the impedance between them can be easily matched.

Furthermore, it is preferable that the laminated body is formed on the innermost surface of the uppermost layer or the lowermost layer, and at least a part of the conductive layer forming the input / output electrode and the capacitor is connected to a ground terminal.
With the above means, various filters can be formed.

  In the present invention, a plurality of capacitors and coils can be formed on a laminate made of a dielectric film, and a functional sheet in which a filter circuit is arranged at an arbitrary location can be provided.

  For this reason, it is not necessary to secure a space for forming the filter circuit on the mother circuit board. In addition, since it is not necessary to arrange a large number of chip parts, the mother circuit board provided with the high-frequency device can be reduced in size, thickness, or weight.

  Further, even if a high frequency device is added or a design change is made on the mother circuit board, it is possible to easily add a filter circuit or the like.

The function sheet will be described below with reference to the drawings (basic configuration).
FIG. 1 is a cross-sectional view showing a basic configuration of a functional sheet 10 of the present invention.

  As shown in FIG. 1, the functional sheet 10 of the present invention is formed by laminating a plurality of dielectric films 2, 3, 4, and 5 composed of first to fourth layers in the thickness (Z) direction. A laminated body 1A is provided, and thin conductive layers 6A, 6B, 6C, 6D, and 6E are patterned on the upper and lower surfaces of the dielectric films 2, 3, 4, and 5, respectively. The conductive layers 6A, 6B, 6C, 6D, and 6E are formed with a fine conductor pattern (not shown) by using a conductive material such as gold, silver, copper, or an alloy thereof.

In the functional sheet 10 shown as the present invention, the dielectric film 2 located at the lowermost layer of the laminate and the dielectric film 5 located at the uppermost layer have a high dielectric constant (ε _H ), and the dielectric disposed between them. Films 3 and 4 have a low dielectric constant (ε _L ). Or the thickness dimension of the lowermost layer (dielectric film 2) and uppermost layer (dielectric film 5) of a laminated body is formed thinner than the thickness dimension of the dielectric films 3 and 4 which are the other layers.

  The conductive layers 6A to 6E are patterned in a predetermined shape on the surfaces of the dielectric films 2, 3, 4, and 5 by a screen printing process or an etching process.

  Such a functional sheet 10 is a thin sheet as a whole, and a filter circuit having various characteristics is formed at an arbitrary position of the functional sheet 10. Such a functional sheet 10 is fixed on the mother circuit board, and is connected between the circuit pattern on the functional sheet 10 and the high-frequency device circuit to exhibit the desired circuit characteristics.

  Below, the circuit formed in the function sheet | seat 10 which has the said basic structure is demonstrated.

(First embodiment)
FIG. 2 shows a low-pass filter (LPF) formed on the functional sheet as the first embodiment of the present invention, (A) is an equivalent circuit diagram of the low-pass filter, and (B) is a cross-sectional view of the functional sheet. .

  A functional sheet 10A shown as the first embodiment in FIG. 2A shows a low-pass filter (LPF) as an example. Such a low-pass filter is formed in a partial region of the functional sheet 10A.

  As shown in FIG. 2A, the low pass filter (LPF) 10A is provided between the capacitor C1 provided between the input terminal 1a and the ground terminal 1c, and between the input terminal 1a and the output terminal 1b. And a coil L1.

  As shown in FIG. 2B, an input electrode 6a formed by patterning a conductive layer 6A on the lower surface of the laminate 1A, that is, the lower surface of the dielectric film 2 forming the first layer which is the lowest layer. And a ground electrode 6c. Similarly, an output electrode 6b formed by patterning the conductive layer 6E is formed on the upper surface of the stacked body 1A, that is, the upper surface of the fourth layer that is the uppermost layer.

  The input electrode 6a, the output electrode 6b, and the ground electrode 6c have a predetermined area, and are formed in a shape such as a circle or a quadrangle, for example. The input electrode 6a shown in FIG. 2B forms the input terminal 1a shown in FIG. 2A. Similarly, the output electrode 6b forms the output terminal 1b, and the ground electrode 6c forms the ground terminal 1c. .

  As shown in FIG. 2B, for example, solder balls 11 and 11 are formed on the input electrode 6a forming the input terminal 1a and further on the ground electrode 6c forming the ground terminal 1c.

The input electrode 6a is opposed to the counter electrode 6d formed by a part of the conductive layer 6B provided on the upper side of the lowermost dielectric film 2, and a capacitor C1 is formed therebetween. That is, the capacitor C1 includes an input electrode 6a that is a part of the conductive layer 6A formed on the lower surface of the multilayer body 1A, a counter electrode 6d that is provided on a part of the conductive layer 6B provided on the upper layer side thereof, It is formed as a parallel plate type capacitor comprising a dielectric film 2 having a high dielectric constant ε _H provided between them.

  A planar coil 7 having a planar spiral pattern is formed in a pattern on the conductive layer 6C provided in the intermediate portion of the multilayer body 1A. A terminal 7a is formed on the center side of the planar coil 7, and a terminal 7b is formed on the outer peripheral side. The planar coil 7 forms a coil L1 on the equivalent circuit shown in FIG.

  A through hole 6B1 is formed on the conductive layer 6B at a position facing the terminal 7a of the planar coil 7, and the dielectric film 2 and the third layer, which are the second layers, are formed inside the through hole 6B1. A via hole 8a penetrating through the dielectric film 3 is formed in the plate thickness (Z) direction. The lower end of the via hole 8a reaches the conductive layer 6A, and the upper end extends to the conductive layer 6C. A conductor 8A made of gold, silver, copper, or an alloy thereof is embedded in the via hole 8a. By this conductor 8A, the input electrode 6a (input terminal 1a) formed on the conductive layer 6A and the terminal 7a on the center side of the planar coil 7 formed on the conductive layer 6C are conductively connected.

  Further, via holes 8b are formed in other portions of the dielectric film 2 so as to penetrate between the conductive layer 6B and the ground electrode 6c formed in the conductive layer 6A, and a conductor 8A is embedded therein. The conductor 8A is electrically connected between the conductive layer 6B and the ground electrode 6c (ground terminal 1c).

  Similarly, a via hole 8c penetrating in the plate thickness direction is formed between the dielectric film 4 forming the third layer and the dielectric film 5 forming the fourth layer, and the conductor 8A is formed inside the via hole 8c. Buried.

  A through hole 6D1 is formed in the conductive layer 6D, and a via hole 8c that penetrates the dielectric film 4 and the dielectric film 5 in the plate thickness (Z) direction is formed in the through hole 6D1. . A conductor 8A is embedded in the via hole 8c. The conductor 8A is electrically connected between the terminal 7b on the outer peripheral side of the planar coil 7 and the output electrode 6b (output terminal 6b). The conductive layer 6D is not connected to any of them and is set in an electrically floating state.

In the functional sheet 10A thus formed, the dielectric constant (ε _H ) of the dielectric film 2 located in the lowermost layer (first layer) and the dielectric film 5 located in the uppermost layer (fourth layer) is The dielectric constant (ε _L ) of the second-layer dielectric film 3 and the third-layer dielectric film 4 disposed between them is higher.

For this reason, the capacitance of the capacitor C1 formed between the input electrode 6a and the counter electrode 6d can be increased. On the other hand, the planar coil 7 is formed between the third and fourth dielectric films 3 and 4 having a low dielectric constant (ε _L ). For this reason, the planar coil 7 comes into contact only with a layer having a low dielectric constant other than the lowermost layer (first dielectric film 2) and the uppermost layer (fourth dielectric film 5). It is possible to reduce the parasitic capacitance coupled to, and to sufficiently exhibit the function as the coil L1 and further the function as the low-pass filter (LPF). Thereby, it can be set as the functional sheet | seat 10A which has LPF as shown by a continuous line in FIG. 2 (A).

  Note that an equivalent circuit of a low-pass filter formed by connecting two or more LPFs is a π type in which a capacitor C2 is disposed between an output terminal 1b and a ground terminal 1c as shown by a dotted line in FIG. It becomes. In order to obtain such a π-type low-pass filter, the conductive layer 6D and the conductive layer 6B are conductively connected as shown by a dotted line in FIG. 2B, and the conductive layer 6D is connected to the ground electrode 6c (the ground terminal 1c). ), The capacitor C2 can be formed between the conductive layer 6D and the output electrode 6b (output terminal 6b). Specifically, a via hole 8d similar to the above is formed between the dielectric films 3 and 4 of the third and fourth layers, and the conductive layer 6D and the conductive layer 6B are electrically connected by the conductor 8A embedded therein. do it.

(Second Embodiment)
FIG. 3 shows a high-pass filter (HPF) formed on a functional sheet as a second embodiment of the present invention, (A) is an equivalent circuit diagram of the high-pass filter, and (B) is a sectional view of the functional sheet. .

  As shown in FIG. 3A, the functional sheet 10B shown in the second embodiment includes a coil 7 provided between the input terminal 1a and the ground terminal 1c, an input terminal 1a, and an output terminal 1b. A capacitor C1 provided between the two is formed. Such a high-pass filter HPF is formed at a plurality of locations in the region on the functional sheet 10B.

  As shown in FIG. 3B, the functional sheet 10B includes dielectric films 2, 3, 3 from the first layer to the fourth layer between the five conductive layers 6A, 6B, 6C, 6D, 6E. 4 and 5 are arranged.

An input electrode 6a for forming the input terminal 1a is provided on the lowermost conductive layer 6A, and an output electrode 6b for forming the output terminal 1b is formed on the uppermost conductive layer 6E. Also in this embodiment, the dielectric constant (ε _H ) of the dielectric film 2 located in the lowermost layer (first layer) and the dielectric film 5 located in the uppermost layer (fourth layer) are arranged between them. In addition, the dielectric layer 3 of the second layer and the dielectric film 4 of the third layer 4 are formed so as to be higher than the dielectric constant (ε _L ).

  The conductive layer 6D positioned on the lower surface of the fourth dielectric film 5 is provided with a counter electrode 6d that forms a parallel plate type capacitor C1 with the output electrode 6b. Between the counter electrode 6d and the input electrode 6a, first to third dielectric films 2, 3, and 4 are disposed. The dielectric films 2, 3, and 4 have a thickness (Z). Via holes 8a, 8b, and 8c that penetrate continuously in the direction are formed. Conductors 8A are buried in these via holes 8a, 8b and 8c, respectively, and the input electrode 6a and the counter electrode 6d which is one terminal of the capacitor C1 are electrically connected.

  As shown in FIG. 3B, a planar coil 7 having a planar spiral shape similar to that of the first embodiment is formed in the conductive layer 6C provided in the middle of the laminated body 1A. The planar coil 7 forms a coil L1 on the equivalent circuit of FIG.

  The central terminal 7a of the planar coil 7 is electrically connected to the conductor 8A embedded in the via hole 8b and the conductor 8A embedded in the via hole 8c. Further, the terminal 7b on the outer peripheral side of the planar coil 7 is connected to the conductor 8A in the via hole 8d formed in the second dielectric film 3, the relay portion 9 formed in a part of the conductive layer 6B, and the first layer dielectric. The conductor 8A in the via hole 8e formed in the body film 2 is conductively connected to the ground electrode 6c that is the ground terminal 1c formed on the conductive layer 6A that is the lowermost surface of the multilayer body 1A.

Also in this embodiment, the fourth dielectric film 5 having a high dielectric constant (ε _H ) is formed so as to be interposed between the pair of output electrodes 6b and the counter electrode 6d forming the capacitor C1. Yes. For this reason, the capacitance of the capacitor C1 can be increased.

Further, the planar coil 7 is formed between the second and third dielectric films 3 and 4 having a low dielectric constant (ε _L ), and the first and fourth layers having a high dielectric constant (ε _H ). The dielectric films 2 and 5 are not in contact with each other. For this reason, the parasitic capacitance coupled to the planar coil 7 can be reduced, and a sufficient function as the coil L1 and further as a high-pass filter can be exhibited.

(Third embodiment)
FIG. 4 shows a high-pass filter (HPF) formed on a functional sheet as a third embodiment of the present invention, (A) is an equivalent circuit diagram of the high-pass filter, and (B) is a cross-sectional view of the functional sheet.

  The functional sheet 10C shown in the third embodiment is formed with a T-type high pass filter. That is, as shown in FIG. 4A, in this high pass filter, capacitors C1 and C2 are connected in series between an input terminal 1a and an output terminal 1b, and a capacitor C1 and a capacitor C2 are connected. And a ground terminal 1c are provided with a coil L1.

As shown in FIG. 4 (B), the functional sheet 10C is also composed of the first to fourth layers of dielectric film 2 between the five conductive layers 6A, 6B, 6C, 6D, and 6E. , 3, 4, and 5 are arranged. The dielectric layer 2 located in the lowermost layer (first layer) and the dielectric constant (ε _H ) of the dielectric film 5 located in the uppermost layer (fourth layer) are the second layer disposed between them. Similarly, the dielectric film 3 and the third-layer dielectric film 4 are formed so as to be higher in dielectric constant (ε _L ).

  An input electrode 6a for forming the input terminal 1a is provided on the conductive layer 6A formed on one surface of the dielectric film 2 of the lowermost layer (first layer), and the first is formed on the conductive layer 6B formed on the other surface. The counter electrode 6d is provided, and a parallel plate type capacitor C1 is formed by these. Similarly, an output electrode 6b for forming the output terminal 1b is provided on the conductive layer 6E formed on one surface of the dielectric film 5 of the uppermost layer (fourth layer), and a conductive layer 6D formed on the other surface. Is provided with a second counter electrode 6e, which forms a parallel plate type capacitor C2. A planar coil 7 is provided between the second dielectric film 3 and the third dielectric film 4 to form a coil L1.

  Between the first counter electrode 6d forming the capacitor C1 and the terminal 7a on the center side of the planar coil 7, and between the second counter electrode 6e forming the capacitor C2 and the terminal 7a on the center side of the planar coil 7 Are electrically connected by via holes 8a and 8b and conductors 8A and 8A embedded therein.

  Terminals 7b on the outer peripheral side of the planar coil 7 are formed in the conductor 8A of the via hole 8c formed in the second-layer dielectric film 3, the relay portion 9 formed in the conductive layer 6B, and the first-layer dielectric film 2. The via hole 8d is connected to the ground electrode 6c that forms the ground terminal 1c through the conductor 8A.

  Also in this embodiment, the capacitors C1 and C2 are formed by the pair of electrodes provided on the upper and lower surfaces of the first and fourth layers made of the dielectric films 2 and 5 having a high dielectric constant. The capacitance of C2 can be increased.

Furthermore, the planar coil 7 is formed between the dielectric films 3 and 4 having a low dielectric constant (ε _L ) and is in contact with the first and fourth dielectric films 2 and 5 having a high dielectric constant (ε _H ). It is a configuration that does not. For this reason, it is possible to reduce the parasitic capacitance coupled to the planar coil 7 and to exhibit a sufficient function as the coil L1 and further as a high-pass filter.

(Fourth embodiment)
FIG. 5 shows a part of a bandpass filter (BPF) formed on a functional sheet as a fourth embodiment of the present invention, (A) is an equivalent circuit diagram of a part of the bandpass filter, ) Is a cross-sectional view of the functional sheet.

  As shown in FIG. 5A, this functional sheet 10D has a band in which a capacitor C1 and a coil L1 are connected in parallel between a signal line connecting the input terminal 1a and the output terminal 1b and the ground terminal 1c. A pass filter (BPF) is provided.

As shown in FIG. 5 (B), this functional sheet 10D also has a dielectric film 2 composed of first to fourth layers between five conductive layers 6A, 6B, 6C, 6D, and 6E. 3, 4 and 5 are arranged. The dielectric layer 2 located in the lowermost layer (first layer) and the dielectric constant (ε _H ) of the dielectric film 5 located in the uppermost layer (fourth layer) are the second layer disposed between them. Similarly, the dielectric film 3 and the third-layer dielectric film 4 are formed so as to be higher in dielectric constant (ε _L ).

  An input electrode 6a for forming the input terminal 1a and a ground electrode 6c for forming the ground terminal 1c are provided on the conductive layer 6A provided on one lower surface of the first dielectric film 2, and a fourth dielectric layer is provided. An output electrode 6b for forming an output terminal 1b is formed on a conductive layer 6E provided on one upper surface of the film 5.

  A conductive layer 6B is provided between the first dielectric film 2 and the second dielectric film 3, and the dielectric film 2 having a high dielectric constant provided therebetween is provided. A parallel plate type capacitor C1 is formed in a portion facing each other.

  Between the input electrode 6a and the output electrode 6b, via holes 8a, 8b, and 8c formed in the plate thickness direction in the first to fourth dielectric films 2, 3, 4, and 5 forming the laminated body 1A. And 8d and the conductors 8A and 8A embedded therein are electrically connected. The conductive layer 6B has a through hole 6B1, and the via holes 8a and 8b are formed in the through hole 6B1. Therefore, the conductor 8A of the via holes 8a and 8b and the conductive layer 6B are in an insulated state.

  The conductive layer 6C provided between the second dielectric film 3 and the third dielectric film 4 is provided with a spiral planar coil 7 that forms the coil L1. One terminal on the center side of the planar coil 7 is conductively connected to conductors 8A and 8A embedded in the via holes 8b and 8c. The other terminal 7b located on the outer peripheral side of the planar coil 7 is connected to the conductive layer 6B formed on the dielectric film 3 as the second layer via the via hole 8d and the conductor 8A, and further on the first layer. A ground electrode 6c formed on a certain dielectric film 2 is connected via a via hole 8e and a conductor 8A.

Also in this embodiment, the capacitor C1 is formed by disposing a pair of electrodes facing each other on the upper and lower surfaces of the first dielectric film 2 having a high dielectric constant (ε _H ). Can be increased in capacitance.

Further, since the planar coil 7 is formed between the second and third dielectric films 3 and 4 having a low dielectric constant (ε _L ), the parasitic capacitance coupled to the coil L1 of the planar coil 7 is reduced. Therefore, the function as the coil C1 and the function as the band-pass filter (BPF) can be sufficiently exhibited.

(Fifth embodiment)
FIG. 6 shows a trap circuit formed on a functional sheet as a fifth embodiment of the present invention, where (A) is an equivalent circuit diagram of the trap circuit and (B) is a cross-sectional view of the functional sheet.

  As shown in FIG. 6A, the functional sheet 10E has a trap in which a capacitor C1 and a coil L1 are connected in series between a signal line connecting the input terminal 1a and the output terminal 1b and the ground terminal 1c. A circuit is formed.

As shown in FIG. 6B, this functional sheet 10E also has the first to fourth dielectric films 2, 3, 4 between the five conductive layers 6A, 6B, 6C, 6D, 6E as described above. , 5 are arranged. The dielectric layer 2 located in the lowermost layer (first layer) and the dielectric constant (ε _H ) of the dielectric film 5 located in the uppermost layer (fourth layer) are the second layer disposed between them. Similarly, the dielectric film 3 and the third-layer dielectric film 4 are formed so as to be higher in dielectric constant (ε _L ).

  An input electrode 6a for forming the input terminal 1a and a ground electrode 6c for forming the ground terminal 1c are provided on the conductive layer 6A provided on one lower surface of the first dielectric film 2, and a fourth dielectric layer is provided. An output electrode 6b for forming an output terminal 1b is formed on a conductive layer 6E provided on one upper surface of the film 5.

  Between the input electrode 6a and the output electrode 6b, via holes 8a, 8b, which are formed in the plate thickness direction in the dielectric films 2, 3, 4 and 5 which are the first to fourth layers forming the laminated body 1A, 8c and 8d and the conductors 8A and 8A embedded therein are electrically connected.

  A through hole 6B1 is formed in the conductive layer 6B formed between the first dielectric film 2 and the second dielectric film 3, and the via holes 8a and 8b pass therethrough. Yes. Similarly, a through hole 6D1 is also formed in the conductive layer 6D formed between the third dielectric film 4 and the fourth dielectric film 5, and the via holes 8c and 8d pass therethrough. ing. Therefore, the conductor 8A and the conductive layer 6B in the via holes 8a and 8b are insulated from each other, and similarly, the conductor 8A and the conductive layer 6D in the via holes 8c and 8d are insulated from each other.

  The conductive layer 6C provided between the second dielectric film 3 and the third dielectric film 4 is provided with a spiral planar coil 7 that forms the coil L1. The upper and lower surfaces of one terminal 7a on the center side of the planar coil 7 are electrically connected to the conductors 8A and 8A in the via holes 8b and 8c, respectively. The other terminal 7b located on the outer peripheral side of the planar coil 7 is connected to the planar electrode 7A formed on the same conductive layer 6C. The terminal 7b of the planar coil 7 forms part of the planar electrode 7A. That is, the planar electrode 7A is formed to be continuous with the other terminal 7b of the planar coil 7 and have a relatively large area. For this reason, a capacitor C11 is formed between the lower surface of the planar electrode 7A and the upper surface of the conductive portion 6B facing each other through the second-layer dielectric film 3, and the upper surface of the planar electrode 7A and the third-layer dielectric are similarly formed. A capacitor C12 is formed between the lower surface of the conductive portion 6D facing each other through the body film 4.

  The conductive layer 6B and the conductive layer 6D are connected to each other via a via hole 8e and a conductor 8A, and are connected to a ground electrode 6c that forms a ground terminal 1c. For this reason, the capacitor C11 and the capacitor C12 are connected in parallel, so that one capacitor C1 (= C11 + C12) is formed.

  In this embodiment, a capacitor C11 and a capacitor C12 are respectively formed between the planar electrode 7A and the conductive layers 6B and 6D facing each other with the dielectric films 3 and 4 having a low dielectric constant positioned above and below the planar electrode 7A. However, by configuring them in parallel, it is possible to increase the capacitance of the capacitor C1 as a result.

Since the planar coil 7 is formed between the dielectric films 3 and 4 having a low dielectric constant (ε _L ) as described above, the parasitic capacitance coupled to the planar coil 7 does not increase. Can function sufficiently as a trap circuit

(Sixth embodiment)
FIG. 7 shows a feedthrough capacitor formed on a functional sheet as a sixth embodiment of the present invention, where (A) is an equivalent circuit diagram of the feedthrough capacitor and (B) is a cross-sectional view of the functional sheet.

  As shown in FIG. 7A, this functional sheet 10F is formed with a feedthrough capacitor formed by connecting a capacitor C1 between a signal line connecting the input terminal 1a and the output terminal 1b and the ground terminal 1c. Has been.

As shown in FIG. 7 (B), this functional sheet 10F also has a dielectric film 2, consisting of the first to third layers, between the five conductive layers 6A, 6B, 6C, 6D, and 6E, as described above. 3, 4 and 5 are arranged. Furthermore, the dielectric constant (ε _H ) of the dielectric film 2 located in the lowermost layer (first layer) and the dielectric film 5 located in the uppermost layer (fourth layer) is the same as that of the second layer disposed between them. The point that the dielectric film 3 and the dielectric film 4 of the third layer are formed so as to be higher than the dielectric constant (ε _L ) is the same as described above.

  The conductive layer 6A provided on one lower surface of the first dielectric film 2 is provided with an input electrode 6a for forming the input terminal 1a, and the conductive film provided on one upper surface of the fourth dielectric film 5 is provided. An output electrode 6b for forming the output terminal 1b is formed on the layer 6E.

  Between the input electrode 6a and the output electrode 6b, via holes 8a and 8b formed through the first to fourth dielectric films 2, 3, 4, and 5 forming the laminated body 1A in the plate thickness direction. , 8c, d and the conductors 8A, 8A embedded therein are electrically connected.

  A through hole 6B1 is formed in the conductive layer 6B formed between the first dielectric film 2 and the second dielectric film 3, and the via holes 8a and 8b pass therethrough. Yes. Similarly, a through-hole 6D1 is formed in the conductive layer 6D formed between the third-layer dielectric film 4 and the fourth-layer dielectric film 5, and the via holes 8c and 8d pass through the through-hole 6D1. ing. Therefore, the conductor 8A and the conductive layer 6B in the via holes 8a and 8b are insulated from each other, and similarly, the conductor 8A and the conductive layer 6D in the via holes 8c and 8d are insulated from each other.

  A planar electrode 6f is formed on the conductive layer 6C formed between the second dielectric film 3 and the third dielectric film 4. The conductor 8A of the via hole 8b is connected to the lower surface of the planar electrode 6f, and the conductor 8A of the via hole 8c is connected to the upper surface of the planar electrode 6f. Therefore, the input electrode 6a, the planar electrode 6f, and the output electrode 6b are set to the same potential.

  A capacitor C11 is formed in a region where the input electrode 6a and the conductive layer 6B face each other with the first dielectric film 2 interposed therebetween, and the conductive layer 6B and the planar electrode 6f connect the second dielectric film 3 to each other. The capacitor C12 is formed in a region opposed to each other, the planar electrode 6f and the conductive layer 6D are formed in a region opposed to each other through the third dielectric film 4, and the conductive layer 6D and the output electrode 6b are formed. Capacitors C14 are formed in regions facing each other via the fourth dielectric film 5.

  The conductive layer 6B and the conductive layer 6D are connected to the ground electrode 6c that forms the ground terminal 1c by the conductors 8A and 8A of the via holes 8a and 8b, so that the capacitors C11, C12, C13, and C14 are connected in parallel. One capacitor C1 is formed.

  In this embodiment, capacitors C11 and C14 having a large capacitance are formed by the dielectric films 2 and 5 having a high dielectric constant in the first layer and the fourth layer, and a dielectric constant is formed in the second layer and the third layer. Capacitors C12 and C13 having a small capacitance are formed by the low dielectric films 3 and 4. The overall capacitance of the feedthrough capacitor C1 is C1 = C11 + C12 + C13 + C14, and a feedthrough capacitor having a large capacitance can be obtained.

  As described above, in the present invention, various electrical circuits can be provided on one functional sheet 10 by forming various laminated structures inside the laminated body 1A.

Next, a method for using the function sheet 10 will be described.
FIG. 8 is a perspective view showing an example of a usage state of the function sheet.

  As shown in FIG. 8, the functional sheet 10 is installed and used between the mother circuit board 30 and the high-frequency device 20. That is, the functional sheet 10 is fixed on the mother circuit board 30, and the high-frequency device 20 is fixed on the functional sheet 10. The mother circuit board 30 and the functional sheet 10 are fixed by soldering between the connection electrode 31 formed on the mother circuit board 30 and the input electrode 6a or the ground electrode 6c provided on the lower surface side of the functional sheet 10A. Soldering is performed via balls 11 and 11, respectively.

  The functional sheet 10 and the high-frequency device 20 are fixed by soldering the solder balls 21 provided on the bottom surface of the high-frequency device 20 to the output electrode 6b provided on the upper surface side of the functional sheet 10A.

  As described above, the functional sheet 10 is interposed between the mother circuit board 30 and the high-frequency device 20, and the above-described embodiment is shown between each terminal of the high-frequency device 20 and the terminal on the mother circuit board 30. Any one of the circuits can be arranged, and it is not necessary to secure a space for mounting the chip parts forming the filter circuit. For this reason, the whole mother circuit board on which the high-frequency device 20 is mounted can be reduced in size, thickness, or weight. Moreover, even when the specifications of the high-frequency device 20 and the mother circuit board 30 are changed, a necessary circuit can be easily provided by simply selecting the function sheet 10 to be interposed.

  In the present invention, the first and fourth layers are the dielectric films 2 and 5 having a high dielectric constant, and the second and third layers are the laminate 1A having the dielectric films 3 and 4 having a low dielectric constant. It is possible to arrange a plurality of types of circuits on one functional sheet.

  For this reason, it is possible to easily provide a necessary circuit at a necessary location on the mother circuit board 30 by simply installing such a functional sheet on the mother circuit board.

  For this reason, it becomes possible to easily match the impedance between the mother circuit board and another electronic component on which the mother circuit board is installed, or another circuit board connected to the mother circuit board. In addition, even if there is a design change of the mother circuit board itself or a design change due to the addition of a high-frequency device, it becomes possible to cope flexibly.

  In each of the above embodiments, the laminated body 1A has been described as being composed of the first to fourth dielectric films. However, the present invention is not limited to this, and the multilayer structure may be more than that. Good.

  In each of the above embodiments, the ground electrode 6c forming the ground terminal 1c has been described on the lower surface (the lowermost surface of the lowermost layer) side of the functional sheet 10, but the present invention is not limited to this. Instead, the ground electrode 6 c may be configured to be provided on the upper surface (upper surface of the uppermost layer) side of the functional sheet 10.

Sectional drawing which shows the basic composition of the functional sheet 1 of this invention, The low-pass filter (LPF) formed in the functional sheet | seat as the 1st Embodiment of this invention is shown, (A) is an equivalent circuit schematic of a low-pass filter, (B) is sectional drawing of a functional sheet | seat, The high pass filter (HPF) formed in the functional sheet as the second embodiment of the present invention is shown, (A) is an equivalent circuit diagram of the high pass filter, (B) is a sectional view of the functional sheet, The high pass filter (HPF) formed in the functional sheet as the third embodiment of the present invention is shown, (A) is an equivalent circuit diagram of the high pass filter, (B) is a sectional view of the functional sheet, The part of the band pass filter (BPF) formed in the function sheet | seat as the 4th Embodiment of this invention is shown, (A) is an equivalent circuit schematic of a part of band pass filter, (B) is a function. Sectional view of the sheet, The trap circuit formed in the function sheet | seat as the 5th Embodiment of this invention is shown, (A) is an equivalent circuit schematic of a trap circuit, (B) is sectional drawing of a function sheet | seat, The feedthrough capacitor formed in the functional sheet as a 6th embodiment of the present invention is shown, (A) is an equivalent circuit diagram of a feedthrough capacitor, (B) is a sectional view of a functional sheet, The perspective view which shows an example of the use condition of a function sheet,

Explanation of symbols

1A Laminate 1a Input terminal 1b Output terminal 1c Ground terminal 2 Dielectric film having a high dielectric constant (first layer)
3 Dielectric film with low dielectric constant (second layer)
4 Dielectric film with low dielectric constant (third layer)
5 Dielectric film with high dielectric constant (4th layer)
6A, 6B, 6C, 6D, 6E Conductive layer 6a Input electrode 6b Output electrode 6c Ground electrode 7 Planar coil 7a Center end 7b Coil outer end 8a, 8b, 8c, 8d, 8e Via hole 8A Conductor 10, 10A, 10B, 10C, 10D, 10E, 10F in via hole Function sheet 20 High frequency device 30 Mother circuit board

Claims (12)

A functional sheet comprising a laminate in which a plurality of dielectric films are laminated, and conductive layers formed in a predetermined pattern on the upper and lower surfaces of each dielectric film,
A functional sheet, wherein the uppermost layer and the lowermost layer of the laminate are formed of a dielectric film having a higher dielectric constant than the other layers.   The functional sheet according to claim 1, wherein the laminate has a four-layer structure.   The functional sheet according to claim 1 or 2, wherein the uppermost layer and the lowermost layer of the laminate are formed thinner than the other layers.   The functional sheet according to any one of claims 1 to 3, wherein one or both of a capacitor and a coil are formed at a plurality of locations of the laminate.   The functional sheet according to claim 4, wherein the capacitor is formed by conductive layers disposed to face each other with at least one dielectric film interposed therebetween.   The functional sheet according to claim 4, wherein the coil has a planar spiral shape.   The functional sheet according to claim 6, wherein the coil is formed so as to contact only a layer other than the uppermost layer and the lowermost layer.   8. The dielectric film is provided with a via hole in which a conductor is embedded, and one end of the capacitor and one end of the coil are conductively connected via a conductor in the via hole. The functional sheet in any one of.   The functional sheet according to claim 4, wherein a plurality of filter circuits are provided by the plurality of capacitors and the plurality of coils.   The function sheet according to claim 9, wherein the filter circuit includes any one of a low-pass filter, a high-pass filter, a band-pass filter, and a trap.   In the conductive layer formed on the outer surface of the uppermost layer stack, input / output electrodes used for input / output with other substrates are formed, and in the conductive layer formed on the outer surface of the lowermost layer stack, The function sheet according to claim 1, wherein an input / output electrode used for input / output with another substrate is formed at a position corresponding to the input / output electrode.   The functional sheet according to claim 11, wherein the functional sheet is formed on an inner surface of an uppermost layer or a lowermost layer of the laminate, and at least a part of the conductive layer forming the input / output electrode and the capacitor is connected to a ground terminal.