JP2004536452A - Arrangement for energy regulation - Google Patents

Abstract

An embodiment of a circuit arrangement that uses a relative grouping of energy paths with shielding circuit arrangements that can maintain and adjust electrically supplemental energy merging.

Description

[0001]
Technical field
This application is a continuation-in-part of co-pending application Ser. No. 10 / 023,467, filed Nov. 17, 2001, and is a co-pending application of co-pending application Ser. No. 09 / 996,355, filed Nov. 29, 2001. No. 09 / 982,553 filed Oct. 17, 2001, which is a continuation-in-part application of co-pending application No. 10 / 003,711 filed on Nov. 17, 2001. Is a continuation-in-part application.
[0002]
In addition, this application is filed in US Provisional Application No. 60 / 302,429, filed July 2, 2001, and US Provisional Application No. 60 / 310,962, filed August 8, 2001, January 8, 2002. Claims the advantages of US Provisional Application No. 60 / 349,954, filed on Jan. 12, and US Provisional Application No. (not yet selected), filed June 12, 2002.
[0003]
This application relates to a balanced shielding arrangement that uses supplemental and relative groupings of energy paths, such as paths for various energy transmissions for multiple energy regulation functions. Such a shielding arrangement may be operable as an individual or non-individual embodiment capable of maintaining and adjusting the electrical supplemental energy merging.
[0004]
Background art
Today, as the density of electrons in applications increases, unwanted noise as a by-product of the increased density limits the performance of electronic circuits. As a result, avoiding the effects of unwanted noise by-products, such as circuit isolation or immunization, on the effects of unwanted noise is important in circuit layout and circuit design considerations.
[0005]
Differential and common mode noise energy may be caused by energy paths, cables, circuit board tracks or traces, high speed transmission lines, and / or bus line paths, and energy paths, cables, circuit board tracks or traces, high speed transmission lines, And / or along or around the bus line path. The energy conductors may, for example, act as antennas emitting an energy field. The performance of such antennas and analogs is such that energy propagation utilizing conventional passive devices at high frequencies will experience increased levels of energy parasitic interference, such as various capacitive and / or inductive parasitics. May exacerbate the noise problem.
[0006]
These increases may be due to a combination of inherent design or design imbalances and the limitations of prior art solutions from the functional or structural limitations associated with the lack of performance of the prior art. These deficiencies inherently create or cause unwanted and unbalanced interference energy for the associated electronics, thereby providing at least partial shielding from parasitic and desirable electromagnetic interference. As a result, in a wide frequency operating environment, solving those problems requires careful systems with various grounding or noise immunity arrangements, as well as extensive isolation in combination with at least partial electrostatic and electromagnetic shielding. Requires at least a combination of simultaneous filters.
Therefore, it additionally has other elements combined in a discrete or non-discrete configuration and is at least selected from a decoupling function, a primary suppression function, a noise suppression function, an energy blocking function, and an energy suppression function. A stand-alone energy conditioning arrangement that utilizes a simple energy path arrangement that may be used in most circuit applications in providing an effective, contrasting and sustainable, simultaneous energy state function There is a need for
[0007]
An understanding of the present invention will be facilitated by considering the following detailed description of a preferred embodiment of the invention in connection with the accompanying drawings.
[0008]
Detailed description of the invention
This application is a continuation-in-part of co-pending application Ser. No. 10 / 023,467, filed Nov. 17, 2001, and is a co-pending application of co-pending application Ser. No. 09 / 996,355, filed Nov. 29, 2001. No. 09 / 982,553 filed Oct. 17, 2001, which is a continuation-in-part application of co-pending application No. 10 / 003,711 filed on Nov. 17, 2001. Which are incorporated herein by reference.
[0009]
In addition, this application is filed in US Provisional Application No. 60 / 302,429, filed July 2, 2001, and US Provisional Application No. 60 / 310,962, filed August 8, 2001, January 8, 2002. Claims the advantages of US Provisional Application No. 60 / 349,954, filed on Jan. 12, and US Provisional Application No. (not yet selected), filed June 12, 2002. These are incorporated herein by reference.
[0010]
BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings and description of the invention have been simplified to illustrate elements that will clarify an obvious understanding of the invention, while for clarity purposes it will be viewed with typical energy conditioning systems and methods. It should be understood that many other elements are excluded. Those skilled in the art will recognize that other elements and / or steps are desirable and / or required for practice with the present invention. However, a discussion of such elements and steps is not required here, as such elements and steps are well known in the art and are not easily understood by the present invention. The disclosure herein leads to all changes and modifications to such elements and methods that are well known to those skilled in the art. Unless otherwise noted, in addition to including "energy", "systems", circuits, etc., in whole or in part, which are considered to be used and included, partially and throughout The terms used in will be apparent to those skilled in the art.
[0011]
As used herein, an "energy path" or "path" has at least one or multiple conductive materials, each operable in sustained propagation of energy. The pathway is conductive, thereby connecting directly or indirectly to the pathway, or better propagating various electrical energies compared to adjacent, non-conductive or semiconductor materials. . The energy paths are not limited to shielding, orientation, and / or positioning of energy paths in various arrangements of energy paths having orientation and / or positioning. Allowance may facilitate propagation of the first energy, thereby allowing interaction of the first energy to propagate energy that is at least complementary to the first energy. The energy path has an energy path portion, an overall energy path, a conductor, an energy conductor, an electrode, at least one process-generating conductor, and / or a shield. The plurality of energy paths may include a plurality of each device or element described above with respect to the energy paths. Further, as generally used herein, a conductor may be, for example, an individual conductive material portion, a conductive plane, a conductive path, a path, an electrical wire, a via, an aperture, a resistive lead, etc. May include an electrical plate, such as a conductive portion, a portion of conductive material, or a plane separated by at least one medium 801.
[0012]
The shield includes a shield electrode, a portion of a shield path, a shield path, a shield conductor, a shield energy conductor, a shield electrode, and / or at least one process-generated shield path section. The plurality of shields may include the plurality of devices discussed above for shielding.
[0013]
As generally used herein, a path is defined with respect to entities 80, 81 having various path extensions denoted by 79 "X", 812 "X", 811 "X", and 99 "X". , Supplementarily positioned or supplementally oriented. The subjects 80, 81 may be individually, in pairs, in groups, and / or in multiples, such as distance, orientation, position, superimposition, non-overlap, alignment, partial alignment, wrapping, non-wrapping, and partial wrapping. It is a three-dimensional physical relationship. The superimposed main paths 80 may be physically opposite and oppositely oriented, for example, one or any combination of electrical zero, electrical complement, electrical difference, or electrical reciprocity. It has a pair of main routes 80.
[0014]
The path arrangement conducts at least one shield that at least partially shields the at least one energy path, or conducts at least a conductively separated pair of at least two energy paths, such as a passage, an aperture, or a complementary pair of paths. May include a group of shields forming a shielding structure that at least partially shields through a gender shield.
[0015]
An exemplary embodiment is an energy transfer to a conductively separated pair, such as a complementary pair of paths, which causes the transmission of energy to at least one group of shields acting as a common shield or a separate circuit. Enable. Such an embodiment may allow for the formation of a low inductance path with a single at least one pair of separate discrete parallel paths, serving at least one discrete and separate discrete circuit system. An exemplary embodiment is the development of at least a low inductance path and at least one other isolation for utilization of energy propagating in at least one parallel path of at least two sets of separated individual parallel paths. May allow development along at least one parallel path of at least one other low inductance path for utilization of energy propagating along the individual circuit system.
[0016]
A typical embodiment utilized as part of a circuit assembly may have at least one path of relatively low inductance, while the other path is electrically connected to an energy source or energy load. Good. The path of the second plurality of paths may have a low impedance operable at an energy portion derived from either the same at least one energy source or at least one energy load of the circuit assembly. Such identical paths of low impedance may not be electrically connected directly to either the same at least one energy source or at least one energy load of the circuit assembly as one path of low inductance. The system may have both a low inductance path and a low impedance path that are not the same path.
[0017]
In contrast to capacitors used in the industry, where the equivalent continuous inductance (ESL) of a capacitor device is generally size dependent, the present invention provides a low impedance path and low inductance in a circuit for energy conditioning. May be achieved independent of the physical size of the device. Those aspects depend on the given capacity developed by the given layers in the present invention.
[0018]
Adjusting the path may be, for example, the transfer of energy, or the path of the path to primarily determine the relative efficiency or effect between at least one source of energy and one energy utilizing the load of the integrated circuit. Enables resistance of conductive materials. ESL is a more negligible factor than the primary factor for the decoupling of transmitted power or weakening inductance.
[0019]
In the exemplary path configurations illustrated in FIGS. 1A, 1B, 1C, 5A, and 5B, various propagating energies may be complementary, and the path configurations located in the circuit configuration may be within or within an energy path with the path configuration. May allow for the propagation of energy along, thereby causing the interaction of opposing portions of the path-providing electromagnetic field created by the propagation of energy field currents radiating outward from each set of supplementary conductors Enable. Such interaction may result in mutual cancellation in embodiments, where some paths may be partially or wholly physically shielded from other supplementary paths, and the distance affected by other supplementary paths. May be located within. In addition, the substantial similarity in the size and shape of each supplementary path, including the spaced-apart relationships and inter-positioning of the shielding between the paths and the path-separated relations of the paths, is such a mutual cancellation effect. May contribute. In addition, the shielding operation may be based on the relative positioning of the paired path matches with respect to the conductive electrostatic shielding. At least the supplemental energy regulation features and electrostatic shielding dynamics described herein may affect various energy propagations in various directions along various predetermined paths, and may provide mechanical manipulation that exploits the placement of the paths. It may be operated with a circuit having.
[0020]
The sub-combinations of electromagnetically / electrostatically actuated impedance states may be deployed along or within the path arrangement to form an energy conditioning circuit, or individual or multiple shields. It may be deployed along or within an outer conductive portion that is conductively coupled to and closed to the group. For example, they operate electromagnetically / electrostatically, not for one set of pairs of paths in one circuit part, but because they do not require deployment on another set of pairs of paths from another circuit part. The set impedance state may be developed.
[0021]
According to aspects of the invention, each shield may have a subject 81. The subjects 81 may be collectively and conductively coupled to each other, while at the same time substantially excluding and shielding the subject 81 of the energy path. In another embodiment of the invention, the collectively shielding subject 81 may be only partially confined, or may shield the path subject 80s in at least one portion of the shielding.
[0022]
In accordance with another aspect of the invention, a balanced and symmetrical path arrangement may be provided by contrasting certain layered shields, by sizing and shaping supplementary paths, and / or by co-locating the supplementary paths. And may result from pairing. The manufacturable, balanced, or contrasting physical arrangement of the pathways, where dynamic energy propagation, interaction, pairing, or matching of various mechanical quantities occurs, is the exact basis of the test facility. It may be operated slightly less than the limit. Thus, if those supplemental energy content portions interact simultaneously, the energy may exceed the measurable range of a typical test facility. Thus, the range over which the measurements may be obtained may use the increased controllability, so that the effect on the electrical properties and features is the desired measurability, behavior, or enhancement provided. And may be controlled by a corresponding arrangement of the elements, such as by a specific arrangement of the elements to provide the desired measurability or effect. For example, the desired electrical characteristics may be supplemental balances, sizes, types, and contrasts of at least one pathway pairing, eg, as described below and in FIGS. 1A, 1B, 1C, 5A, and 5B. May be predetermined in the desired enhancement by changing at least one portion of
[0023]
Thus, for example, the extent of the energy interaction, the timing of the mutual energy propagation and the interference may be controlled by the durability in the path arrangement. For example, manufacturing processes such as semiconductor process control or computer durability control may control their durability. Thus, the paths of the embodiments may be formed using manufacturing processes, such as passive device processing, that will be apparent to those skilled in the art. Thereby, the measurement of mutual energy propagation may be eliminated or suppressed by the formation of the path arrangement and the forming process.
[0024]
A path arrangement as described above has successively located groups of paths in a congruent electronic structure with a balanced group of paths. The balanced group may comprise a predetermined path structure having a stacked class of paths that are symmetrically and complementary in number and complementary to each other, thereby forming a pair, Each of the pairs is substantially equidistant from each side of the centrally located shield, and as depicted in FIGS. 1A-4I, each shield is in both the path of each pair and the rank of the entire path. In contrast, balanced points may be provided. Thus, a supplementary positioned path of a given identical size may be present on each side of the centrally located shield in each individual circuit part. The entire circuit is split in contrast to a complementary physical format with opposite mirror image positioning of the path shielded in pairs and shaped in complementary size, sandwiching at least one stack of shielding. Have a complementary part of the whole circuit.
[0025]
According to aspects of the present invention, for example, each path may be the result of a surrounding interconnecting or holding substrate, an integrated circuit wafer, deposition, etching or doping, for example, the shielding The substrate, the energy modulating embodiment or the energy modulating substrate, may be the result of deposition, etching, doping, and may be, for example, a resistive property. Additional elements may be utilized having conductive and non-conductive elements between the various paths. These additional elements may be in the form of a ferromagnetic material or a ferromagnetic dielectric layer and / or a dielectric derivative of inductive ferrite. Structural elements of the additional pathways can be, for example, conductive and non-conductive of different conductive material configurations to provide an optional host to regulate energy, in addition to various combinations of materials and structural elements. Multiple paths to conductivity, hybrid and conductive polymer sheets of materials affecting conductive magnetic fields, various treated conductive and non-conductive laminates, straight conductive deposition, multiple shielding paths, various Routes utilizing various types of magnetic material shielding and selective shielding, conductively doped and conductively deposited materials, and stop solders may be utilized.
[0026]
Non-conductive materials may also provide structural support for various pathways, which are fully activated to maintain simultaneous, constant and unhindered energy transfer as they move along the pathway. May support the circuit. For example, the dielectric material may have one or more layers of material elements that are compatible with processing technology. The dielectric material may be a semiconductor material such as silicon, germanium, gallium arsenide, or any other potassium and non-potassium semiconductor and insulating material that is a high and low potassium dielectric.
[0027]
The pathway and conductor material may be selected from the group consisting of Ag, Ag / Pd, Cu, Ni, Pt, Au, Pd, and may be another such conductive material and metal. Combinations of such metal materials may be suitable for the purposes described herein, and may include suitable metal oxides, such as ruthenium oxide, depending on the essentials of the particular application, May be diluted with metal. Other paths may be formed of a substantially non-resistive conductive material. Conductive, non-conductive, semiconductor materials and / or circuits that create conductive areas such as doped polysilicon, sintered polycrystals, metals, polysilicon silicates, or polysilicon silicides. Any substrate and process that may generate a path from the board material or any substrate or process may be used in or in the path configuration.
[0028]
Exemplary embodiments of the present invention may utilize the structural configuration of the inner shield to ensure a form of energy balancing in various arrangements rather than a specific external circuit balance. This form of equilibrium is a shared, centrally located shield and a specific amount positioned to provide simultaneous shielding in the path of electrically opposing shields utilized by propagating energy It depends on the relative positioning of all the screens with respect to the actually screened screens that are paired. This allows them to be electrically and physically located on opposite sides of a shared common conductive shield centered on their electrically opposing complementary paths. Such insertion of a centrally shared shield creates a voltage divider that divides in half the various circuit voltages and provides each of the shielded conductors in pairs that opposes half of the expected voltage energy. Good. Activated circuits with shielded conductors can be balanced in an electrically or anti-charge manner with respect to centrally located shields, common and shared paths, or each respective isolated circuit system part May be. Each common circuit element of the isolated circuit system may be added or coupled to a common area or common path, thereby providing an external common zero voltage. Thus, the embodiments are supported by an additional external sandwich-like shield, additionally coupled and shown in the figure as -IM, and at least one of the inserted shielding relations is variously electrical. It may have multiple sets of shields that are electrically or physically located between shielded pairs or grouped supplemental pairs that are of opposite or opposite charge.
[0029]
Exemplary embodiments may also be located in one or more energy circuits that may utilize different energy sources and provide one or more separate individual energy utilization loads. When activated for multiple energy conditioning operations and activated to provide simultaneous and effective energy conditioning functions such as interference filters, suppression, energy decoupling and energy surge protection, each separate individual The circuit utilizes a plurality of commonly shared universal shielding structures and circuit reference images or nodes.
[0030]
In accordance with aspects of the present invention, the energy regulation function may maintain a well-balanced energy voltage reference and energy supply at each respective energy utilization load in the circuit. This activated arrangement may allow for specific energy propagation utilizing one or more separate circuit arrangements and may not require balancing with a single, centralized shield. The shield may be physically and electrically located between one or more energy sources and one or more energy utilization loads, depending on a number of discrete paths. Thus, the shielding for the centralized path may be co-planar and may stack variations of typical embodiments.
[0031]
When the internally located pair of shielded paths is substantially added to, or conductively coupled to, an externally manufactured path, the internally located pair of shields is a gauge-like shielding structure. May be substantially encased within, thereby minimizing the wandering and parasitics of internally generated energy that would normally escape or couple to adjacent shielding paths. These shielding modes exploit the propagation of energy for the various paths and may be a separation of the electrostatic shielding effect created by the activation of the shielding structure. The propagation of energy propagating in a complementary manner is mutually contradictory as a result of the adjacent propagation of the opposite propagation and provides an energy field of mutually canceled fields. The complementary paired path provides an internally balanced resistive loading function.
[0032]
A device according to aspects of the present invention may mimic the functionality of at least one electrostatically shielded transformer. Transformers are widely used to magnetically link primary windings to secondary windings that convert energy, and to provide common mode separation that relies on mode conversion of differences at the input. Good. As a result, common mode voltages in the main winding are rejected. One problem inherent in the manufacture of transformers is the spread of the energy source capacitance between the primary and secondary windings. As the frequency of the circuit increases, capacitive coupling increases until circuit isolation is compromised. If there is sufficient parasitic capacitance, the high frequency RF energy may pass through the transformer and cause confusion in the circuit opposite the isolation gap that experiences the temporary event. Shielding may be provided between the primary and secondary windings by coupling to a common path reference designed to prevent capacitive coupling between multiple sets of windings. Devices in accordance with aspects of the present invention improve upon and reduce the need for circuit transformers. The device may use physical and correlated common path shielding to suppress parasitics, and furthermore, in order to function effectively as a transformer, in combination with various external circuitry, Correlated positioning of the shields, complementary paired path stratification, various combinations of path stratification, and external conductive couplings to conductive areas per isolated circuit system may be used. If the isolated circuit system temporarily reverses, the function of the electrostatically shielded transformer of the device described herein may be effective in temporary suppression and protection, and the combined difference And the common mode filter may function simultaneously. Each set of correlated shields and correlated conductors may be conductively coupled to at least the same external path, for example, to provide transformer functionality.
[0033]
The propagated electromagnetic interference may be the creation of both electric and magnetic fields. Devices according to aspects of the invention include DC, AC, and AC / DC, including energy conditioning in systems that may have different types of energy propagation formats and systems that may have one or more circuit propagation characteristics. Energy adjustment using a hybrid type of propagation.
[0034]
In an exemplary embodiment, the surrounding conductive binding material for coupling or connecting the external components of the exemplary embodiment into the assembly by conductive coupling is based on the respective portions of the exemplary embodiment. Or by most, by the addition of conductive or non-conductive to various types of inclined, parallel or vertical, applying for conductors known as at least another path, aperture or blind or non-blind passage. May be. Connecting to at least one or more loads, such as a portion of an integrated circuit, in one aspect of the invention may or may not include selective coupling to various types of conductors, such as apertures and passes. Is also good.
[0035]
Assembling the path may include forming one or more plate through holes (PTH) through one or more levels of the path. Electronic packages commonly include a plurality of interconnect levels. In such a package, the invention is directed to a method of forming a conductive material of one interconnect level, which may be electrically insulated from another conductive material of another interconnect level, such as by a layer of dielectric material. May be included.
[0036]
Connections or couplings between conductive materials at various interconnect levels may be made by passing through insulating portions or layers or forming openings referred to herein as apertures, and instead, patterned or shared conductive layers. A biographical conductive structure can be provided such that the paths from the active material portions or different levels are brought into electrical contact with each other. The structures can be extended by one or more interconnect levels. The use of conductive, non-conductive or conductively filled apertures and passages allows the propagation of energy to intersect with a typical embodiment, as if utilizing the bypass or supply path configuration of the embodiment. I do. Embodiments may include supports, systems, or both layered active and passive components or the layered active and passive components that provide the described benefits for modulating energy transmitted between at least one source and at least one load. It may serve as a subsystem platform, which may have either.
[0037]
Aspects of the invention may provide an integrated circuit package having a structure or other element suitable for inclusion in a conductive configuration or package. Another factor is simultaneous physical and electrical shielding by allowing simultaneous energy interaction to occur between grouped and activated supplementary conductors supplied by other pathways May be coupled directly to the The typical capacitive balance seen between at least one shielding path may be seen when measuring the opposite side of a shared shielding structure for each isolated circuit, and furthermore, a common non-specific Even the use of dielectric or via dielectric material may be maintained at measured capacitive levels within such isolated circuit portions. Thus, the durability of balancing such type of supplemental capacitive balancing or characteristics of electrical circuits by positioning, size, separation and additional positioning of elements is conductively coupled and activated and separated With respect to the division of the shielding structure located in the separated circuit system for passing through the circuit system, it is maintained between the electrically opposing pairs of complementary paths of each respective separated circuit system. To allow for the associated 3% capacitive endurance, an exemplary embodiment having a separate circuit system manufactured internally with 3% capacitive endurance is enabled.
[0038]
Typical embodiments may be able to utilize relatively inexpensive dielectrics, conductive materials and a variety of other material components in a wide variety of approaches. Due to the nature of the configuration, the resulting structure, which physically and electrically divides, allows voltage to be divided and balanced in grouping and adjacent elements, coupling or connection from the energy source to the respective load and back from the load to the source. Are usually split or lost to the following effects, as well as the instantaneous ability to appear on a load that harnesses various energies as a simultaneous, explicitly open energy flow on the electrical side on both sides of the path Hysteresis of the material and the effects of piezoelectric phenomena may be minimized to the extent that the energy transfer may be maintained in the form of essentially effective component switching reaction times.
[0039]
Structural layers may be used to perform various adjustments or decoupling of the lines, for example, to support or enable modification of the electrical transmission of energy to desirable or predetermined electrical properties. May be shaped, embedded, included, or inserted into a generic system and subsystem. Dielectric materials that are specific or specific to the effect of regulating energy or maintaining voltage balance may no longer require bypassing, supplying, or decoupling energy for the circuit.
[0040]
A device according to an aspect of the invention as described above is located between each isolated circuit and a plurality of paths or differential paths. This exemplary device may operate effectively over a broad frequency range, as compared to a single discrete capacitor or inductor component, and may also operate in isolated circuit systems operating above GHz. May be executed continuously and effectively.
[0041]
As mentioned above, typical devices may perform shielding functions in such broad frequency ranges. Physically shielding the paired electrically opposing adjacent complementary paths may be a result of the size of the common path with respect to the size of the complementary path, and may further comprise a sandwich-like complementary conductor. And may be the result of activated and electrostatic suppression or minimization of parasitics, preventing external parasitics. In addition, shielding positioning relative to more conductive shielding may be used to protect against induced energy and "H-field" coupling. Such a technique is known as mutual inductive erasure.
[0042]
Parasitic coupling is known as electric field coupling. The shielding function described above provides the primary shielding of the electrostatic and variously shielded paths against electric field parasitics. Parasitic coupling, including the passage of energy that disturbs and propagates through mutual or wandering parasitic energy derived from supplementary conductor paths, may be suppressed thereby. For example, a device according to aspects of the present invention may block capacitive coupling by including oppositely phased conductors in a universal shielding configuration with stacked conductive hierarchical evolution, thereby Providing an electrostatic or Faraday shielding effect with respect to the positioning of the path, such as the respective layering and positioning of the path both vertically and horizontally. The configuration of the shielding path is the internal and external potential between the noisy and sacrificial conductors, such as due to the loading of multiple common path layers that are larger than the small paired complementary paths. It may be used to suppress and prevent parasitic back coupling, but is located between each of the pair of complementary path conductors that suppresses and each of the pair of complementary path conductors that have the wandering parasite.
[0043]
As discussed above, the more conductive, shielding-correlated positioning of the shield may also be used for induced energy and "H-Field" coupling. Such erasure is achieved with physical shielding energy, while positioned and supplemented to enable insertion of paired complementary paths contained within the area size corresponding to the shielding size. Use the paired routes at the same time. Devices according to aspects of the present invention are adapted to use discrete shielding as internal shielding or grouping, thereby substantially isolating and sandwiching pairs of electrically opposing complementary pathways. , Thereby providing physically robust or minimal energy and circuit loop propagation between each shield and the active load. Shielded and unshielded neighbors may allow energy along the shield, even if there is direct electrical separation by 801 material type or spacing.
[0044]
Flux elimination, in pairs, where energy propagates along electrically opposing or disparate paths, is separated by very small distances in opposing and phasewise biographically complementary operations. , Thereby simultaneously suppressing wandering parasites and resulting in a containment function due to tandem shielding, thereby enhancing energy regulation.
[0045]
Upon reaching the minimum area in the various circuit loops of the isolated circuit system, additional shielding energy currents may be distributed around the structure shielding the component. The multiple screens as described above may be electrically coupled either as a separate circuit reference node or chassis ground, and may also rely on a commonly used reference path in the circuit. Thus, the various groups of complementary paths that are internally paired may include the propagation of energy derived from one or more energy sources that propagate along an external path coupled to the circuit by a conductive material. Thus, energy may enter the device, be regulated, and be continuous with each individual load.
[0046]
The shielding structure is a portion of the shielding that acts as a low impedance path for damping and suppression, as well as at least partially blocking unwanted electromagnetic interference noise and energy returns entering each of the activated circuits. May be enabled. In embodiments, the internally located shield may be conductively coupled to the conductive area, thereby adaptively utilizing the shielding structure to dampen and suppress low impedance, as well as undesirable electromagnetic interference noise and noise. At least partially block the return block of energy. In addition, another set of internally located shields may be conductively coupled to the second conductive area, thereby utilizing the shields to dampen and suppress low impedance, as well as unwanted electromagnetic fields. At least partially blocking interference noise and energy returns. The conductive areas may be electrically or conductively separated from one another.
[0047]
Simultaneous suppression of energy parasitics may contribute to the inclusion and shielding path structures in combination with the elimination of mutually contradictory energy fields, and in circuits that are isolated in various ways to receive regulatory effects generated by the propagating energy. Electrically opposing shielded paths along the paths of the various interacting circuits further contribute to the transmitted energy. This adjustment is used instantaneously and contradictoryly by pairing with respect to the energy utilization seen along the low and high impedance shielding paired procedure given the potential of the shielding. By means of separate circuits that maintain a defined electrical area adjacent to the dynamic, simultaneously low and high impedance paths of the various paired paths, each potentially switching to each other, etc. , Minimizing the effect of the H-field and E-field energies due to simultaneous functions.
[0048]
The various distance relationships created by the positional superposition of energy routing in isolated circuits enhances and eliminates the varying degrees of adverse energy disruption that typically occurs in active components or loads. Combine with a variety of dynamic energy transfers. Efficient energy conditioning functions that occur within the passive layered structure are coupled in common to both complementary paths, and are added or conductively coupled in various circuits and circuits Depending on the dynamics, allowing the development of a dynamic "zero" impedance energy "black hole" or energy drain along a third path that allows the energy to be included and erased. Thus, electrically opposing energies may be separated by dielectric materials and / or intervening shielding structures, thereby allowing a dynamic and closed distance relationship within the specific circuit structure, thereby reducing the energy Propagation energies and relative distances that enable the use of mutually enhancing erasing and electrostatic suppression phenomena that enable dielectric elements to be exponential with layered conductivity that is more efficient in throughput. Use
[0049]
According to aspects of the present invention, the device may utilize a single low impedance path or a common low impedance path as a voltage reference, while being maintained and balanced within correlated electrical reference points. Circuits are utilized, thereby maintaining minimal parasitic contributions and destructive energy parasitics in isolated circuit systems. The various mounting schemes described herein develop a “0” voltage as described above for each pair or plurality of paired complementary conductors located opposite the shared central shield. References may be made possible, thereby maintaining and balancing even multiple simultaneous switching operations on transistor gates located in active integrated circuits with minimal destructive energy in isolated circuits. Enable the voltage taken.
[0050]
The shields may be coupled using the principle of a cage-like conductive shield structure that creates one or more shields. The conductive coupling of the shield with a large external conductive area may suppress the emitted electromagnetic radiation and, as a large area, provide a large conductive area where voltage and vibration burnout may occur. One or more of the plurality of conductive or dielectric materials having different electrical properties may be maintained between the shields. Certain supplemental pathways provide differently phased adjustments to the "balanced" or paired reciprocally phased or charged structures that form half of the sum of the fabricated supplementary pathways. There may be a plurality of common conductive structures that perform, with half of such supplemental paths forming a first plurality of paths and a second half forming a second plurality of paths. The sum of the supplementary paths of the first and second plurality of paths may be electrically evenly separated by an equal number of simultaneously used paths, but is half of the sum of the individual supplementary circuits, e.g., The operation is performed within a range of 1 degree or approximately 180 degrees electrically from the contradictory grouping process. In addition to inserting shielding that is not physically or conductively coupled directly to any shielded path that the dielectric supplementally manipulates, small amounts of dielectric material, such as microns or less, may reduce the conductivity between the paths. It may be used as a material separator.
[0051]
The external ground area is combined or conductively connected as an alternative common path. An additional number of paired external paths may be attached to low circuit impedance. Such low impedance phenomena may occur using alternative or auxiliary circuit return paths.
[0052]
The shielding structure may couple the shielding together, thereby facilitating energy propagation along the newly developed low impedance path, thereby causing unwanted electromagnetic interference or noise to occur at the low impedance generated here. Move to the route.
[0053]
Referring to FIGS. 1A-5B, both common and individual variations of the exemplary embodiment embodied in coplanar variations (FIGS. 1A-4I) and stacked variations (FIGS. 5A and 5B). Various common principles are generally illustrated.
[0054]
In FIG. 1A, the relative positions of the various path extensions disclosed in accordance with aspects of the present invention are shown. 8 The portion of the relatively balanced and complementary symmetrical arrangement utilizing the central shielding path denoted by "XX" through "X" M is the balanced conductivity in coplanar variations. It is adapted in an arrangement as a fulcrum of the part. At least a first and second plurality of paths, wherein the first plurality are disposed electrically separate from each other and provide at least one pair of paths oriented in a first complementary relationship. An example of the route arrangement is shown. In addition, at least one half of the second plurality is disposed electrically separated from the second halves of the second plurality, such at least two paths of the second plurality being separated from the first plurality of paths. Electrically isolated. The path arrangement may also comprise a dielectric, ferromagnetic, or material having characteristics such as, for example, a varistor spaced apart from the path of the path arrangement. The second plurality of first half paths are electrically coupled to each other and the second plurality of second half paths are electrically coupled to each other. The total number of first half paths of the second plurality may be one or more odd numbers, and the total number of second half paths of the second plurality may also be one or more odd numbers. According to an aspect of the present invention, the second plurality of first half paths are located in a first overlay alignment, while the second plurality of second half paths are described herein as a coplanar arrangement. The first and second superposition alignments in the mutual superposition alignment performed are located in a second superposition alignment.
[0055]
In a non-coplanar arrangement, with the first and second superposition alignments in one arrangement on the other, the second plurality of first half paths may be located in the first superposition alignment; Of the plurality of second halves may be located in a second overlay alignment. In one arrangement, at least four paths are electrically isolated.
[0056]
Embodiments illustrating the invention may have at least three of a plurality of paths, having a first plurality of paths and a second plurality of paths. The first and second plurality of paths may have a first plurality of path elements having equally opposite path elements found in the second plurality of paths. The elements of the first and second plurality of paths may be substantially the same size and shape, may be supplementarily positioned, and may be operated in an electrically supplementary manner. Therefore, the first and second pairs of paths may have the same number of elements of the first and second paths. Exemplary embodiments may provide at least first and second shields that allow for the development of individual, isolated low circuit impedance paths. Structurally, shielding may be achieved by a third plurality of paths and a fourth plurality of paths. A plurality of each shield may have equally sized and shaped shields. Each of the third and fourth plurality of paths may be conductively coupled. Conductive coupling may be achieved by various methods and materials well known in the art for processing. Thus, if the third and fourth pluralities are grouped as two sets of shields utilizing the first and second pluralities that receive the shield, the third and fourth pluralities are adjusted for circuit energy. May be coupled to a common path to develop a path of low circuit impedance in energy propagation.
[0057]
For example, as shown as a mirror image depicted in FIGS. 5A and 5B, the main path 80 located face-to-face with the exception of any path expansion, such as the lower sub-circuits 812NNE, 811NNE, 812SSW and 811SSW. May be additionally arranged in a bypass arrangement, if they can be superimposed and aligned.
[0058]
Within the plurality, the individual path elements may be substantially the same size and shape and may be conductively coupled. However, elements of one or more individual paths need not be conductively coupled to elements of different paths. There may be situations where one element may be coupled to different elements such that the first plurality of shields and the second plurality of shields are externally coupled to the same conductor.
[0059]
Common elements have an energy flow consistent with conceptual energy indicators 600, 601, 602, 603 depicting dynamic energy transfer in a coplanar shielded bypass path as shown in FIGS. 1A-1C. You may. Embodiments may provide at least a plurality of screens in the development of a plurality of isolated low circuit impedances in a plurality of circuits.
[0060]
Still referring to FIG. 1A, the path may be occluded by a relative common path and may have a main path 80 with at least one path extension 812 “X”. The shield shown has a dominant shield path 81 with an extension of at least one path, denoted 99 "X" / 79 "X". Shielding is traditionally used with co-sintered electrical components such as Ag, Ag / Pd, Cu, Ni, Pt, Au, Pd or combined materials such as conductive or metal oxides and glass frit. The subject 799 may be sandwiched and include a conductive internal pathway formed from a conductive material of the noble or base metal genus. Capacitance and resistance may be achieved in one class of circuits as described above, such as by using ruthenium oxide as a resistive material and Ag / Pd as a conductive material. In addition, changes in path geometry result in different resistance and capacitance values. The change may be achieved by changing the material to which the pathway is made. For example, a conductive material, such as silver, may be selectively added to the metal oxide / glass frit material to reduce the resistance of the material.
[0061]
The multiple paths, 865-1 and 865-2, are shown co-planar and spaced apart at the same location of the material 801. Each of the coplanar paths 865-1 and 865-2 may be formed from conductive material 799, or may be formed from a hybrid of conductive materials and another material indicated herein as 799 "X". . Each of the coplanar paths 865-1 and 865-2 may also be formed as bypass paths, each path being a main path 80 and at least one path having a corresponding main edge and perimeter, respectively 803A and 803B. Have a continuous extension 812 “X”. Each of the coplanar paths 865-1 and 865-2 may have at least one continuous extension 812SSW and 811SSW of the path with a portion of the main edges 803A and 803B extending from the main edges 803A and 803B. Extension 812 “X” is a portion of the pathway material formed in association with the extending main pathway 80. The main path 80, 812 "X" may be viewed as an extension of the material 799 or 799 "X" extending beyond the allowed average peripheral edge 803 "X". Extensions 812 "X" and 79 "X" may be viewed as being respectively located as successive parts of the path formed. Each subject path may have edges 803A, 803B positioned at a distance 814F with respect to edge 917 of the embodiment. The edge 817 of the embodiment may have the substance 801. The edges 803 "X" of the main path of the common plane may be located at a distance 814J apart. The path extensions 812SSW and 811SSW may be conductively connected to external paths 890SSW and 891SSW, where the subject 80 of each path may be located at edge 817. The subject paths 80 arranged in the common plane may be positioned in a "sandwich" between the subject paths 81, which are areas of the registered range of the two layers of the common plane.
[0062]
Combining mutually opposing fields causes an erasing or minimizing effect. The closer the complementary and symmetrically oriented shield is, the better the mutually opposing erasing effects in the propagation of the opposing energy. As additional, symmetrically oriented shields are stacked, the results of suppressing parasitic and erasing effects are better.
[0063]
Still referring to FIG. 1A, the edges of the coplanar occlusion may be represented by dashed lines 805A and 805B. The main path 81 of each of the plurality of shields is larger than the main path 80 of any corresponding sandwich path to be sandwiched. This may create an inserted area 806 related to shielding positioning and path maintenance. The size of the bodies 80 and 81 may be substantially the same, and thus the positioning annulus of the insert may be minimal in certain embodiments. Increased parasitic suppression may be obtained by inserting a path having a subject 80 shielded by a large path subject 81. For example, insertion of the subject 80 of the path 865-1 insertion is provided by the thickness of the material 801 separating the path 865-1 and the adjacent central coplanar path 800-IM-1 as illustrated in FIG. 1B. May be separated by a distance of 1 to 20 times.
[0064]
The plurality of coplanar shielding edges 805A and 805B may be spaced apart by a distance 814K and may be a distance 814 with respect to edges 805A and 805B and edge 817. Other distances 814J for any of edges 803A and 803B may be provided. Further, distance 814F may exist between one 803 “X” and edge 817. Each co-planar shield may have a plurality of continuous path extensions, such as, for example, 79NNE, 79SSE, 99NNE and 99SSE sections extending from the plurality of co-planar shield edges 805A and 805B. The conceptual energy indicators 602 represent various dynamic energy transfers within the coplanar paths 865-1 and 865-2. Unwanted energy may be transferred to a coplanar shield that is consistent with the definition by providing the shield in a low impedance path, where the shield may be additionally electrically coupled to another path or conductive area.
[0065]
Referring now to FIGS. 1B and 1C, the sequence of layers comprises a first plurality of coplanar paths 865-1, 865-2, a second plurality of coplanar paths 855-1, 855-2, Coplanar paths 825-1-IM, 825-2-IM, 815-1, 815-2, 800-1-IM, 800-2-IM, 810-1, 810-2 and 820-1-IM, Illustrated in the third plurality of 820-2-IM. The first, second, and third plurality may be stacked to form embodiments 3199, 3200, 3201. A third plurality of co-planar paths may provide for shielding. 815-1, 815-2; 800-1-IM, 800-2-IM; 810-1, 810-2; and 820-1 The main body 81 of the -IM, 820-2-IM may be of substantially similar size and shape, and may be spaced apart at the co-planar location of different layers of the material 801. A first plurality of co-planar paths 865-1 and 865-2 may have at least corresponding, opposing, and complementary second plurality of co-planar paths 855-1 and 855-2. When oriented face-to-face, those first and second pluralities of coplanar paths are registered and aligned subject paths other than the various continuous path extensions 812 "X", 811 "X". 80. As shown in FIGS. 1B and 1C, the outer coplanar path 820-1-IM, 825-1-IM pair may serve as a path shield, thereby providing another conduction with the subject 81. To improve the shielding effect of a plurality of paths that are coupled together.
[0066]
As illustrated in the modified embodiments 3199, 3200, 3201, the extensions 79NNE, 79SSE and 825 of the shields 825-1-IM, 815-1, 800-1-IM, 810-1 and 820-1-IM. The position of the extension 99NNE, 99SSE of the -2-IM, 815-2, 800-2-IM, 810-2 and 820-2-IM may be changed. In FIG. 1B, for example, extensions 79NNE and 99NNE may be diagonally spaced apart from extensions 79SSE and 99SSE on the opposite side of shielding body 81. In FIG. 1C, for example, the extensions 79NNE and 99NNE may be spaced apart on the lines of the extensions 79SSE and 99SSE on the opposite side of the shielding subject 81. In FIG. 1B, extensions 812NNE and 811NNE extend toward the same edge 812 of the layer of material 801 and may be spaced apart, and extensions 812SSW and 811SSW are attached to opposite edges 812 of the layer of material 801. And may be spaced apart. In FIG. 1C, paths 865-1 and 865-2 may be mirror images as described above. Compared to FIG. 1B, extensions 812NNE and 811NNE extend toward opposing edges 817 of the layer of material 801 and may be spaced apart. Extensions 812SSW and 811SSW each extend toward the opposite edge of the layer of material 801 such that extensions 812NNE and 811SSW extend toward the opposite edge 812 "X" of the respective layer of material 801. , May be spaced apart.
[0067]
2A and 2B, FIG. 2A illustrates a plan view outlining the embodiment of FIG. 2B in accordance with aspects of the present invention. FIG. 2B depicts a route arrangement having a first, second, third, fourth, fifth, sixth, seventh, eighth, ninth, and tenth route layout, for example, at least a first The third and fourth paths are coplanar and are spaced apart from each other. FIG. 2B illustrates first and second paths located below the third and fourth paths, and illustrates fifth and sixth paths located above the third and fourth paths; 7 illustrates the seventh and eighth routes arranged on the fifth and sixth routes, and illustrates the ninth and tenth routes arranged on the seventh and eighth routes. The paths have various respective internal continuous path extensions 812 "X", 811 "X", 79 "X", and 99 "X", with individual components having the same minimum number of layers. It may be. Internal continuous path extensions 812 "X", 811 "X", 79 "X" and 99 "X" and conductively coupled external paths 890 "X", 891 "X", 802 "X "And 902" X "may be coupled to an interior path of a plurality of coplanar paths of subject paths 80 and 81.
[0068]
Referring to FIGS. 3A and 3B, in FIG. 3A, a schematic diagram of the embodiment of FIG. 3B is shown, wherein external paths may be selectively conductively coupled at at least two separate circuit portions. FIG. 3B depicts a path arrangement having a minimum layout of first, second, third, fourth, fifth, sixth, seventh, eighth, ninth, and tenth paths, for example, At least the third and fourth paths are coplanar and are spaced apart from each other. The device shown in FIG. 3B has first and second paths located below the third and fourth paths, and fifth and sixth paths located above the third and fourth paths. And has seventh and eighth paths arranged on the fifth and sixth paths, and has ninth and tenth paths arranged on the seventh and eighth paths. The paths have various respective internal continuous path extensions 812 "X", 811 "X", 79 "X", and 99 "X", with individual components having the same minimum number of layers. It may be.
[0069]
Referring now to FIG. 3C, a plan view of a shield according to aspects of the present invention is illustrated. The embodiment depicted in FIG. 3C has at least one additional path as compared to the device of FIG. 3B. Such additional path 1100-IM "X" may be one of at least a plurality of screens in a stack of paths, where the screen covers two circuit portions. Path 1100-IM “X” may be one of at least two external sandwich shields in the stack of paths. The shielding spans the two circuits by adding a centrally located 1100-IM "X" path that is electrically coupled to the outer 1100-IM "X" shielding. Path 1100-IM "X" may have at least one extension and is illustrated with two extensions 1099NNE and 1099SSE, which may cause the shield to be sandwiched in all paths in the present invention. The at least three shields may be coupled together and may have a centering shield that divides the energy load or energy source of the separated circuits or splits the two separated circuits.
[0070]
The shield 00GS may be electrically isolated from other shields and may be arranged to provide energy propagation for the isolated circuit. The separated circuits may be sandwiched by shielding. The shield may be electrically coupled to a conductive area separate from any other conductive areas, thereby providing energy propagation.
[0071]
4A-4I depict assembled components of various embodiments in accordance with aspects of the present invention. 4A-4I may have a minimum layout of the first, second, third, fourth, fifth, sixth, seventh, eighth, ninth, and tenth paths; For example, at least the third and fourth paths are coplanar and are spaced apart from each other. The first and second paths may be located below the third and fourth paths, the fifth and sixth paths may be located above the third and fourth paths, and the seventh and fourth paths may be located below the third and fourth paths. The eighth route may be located on the fifth and sixth routes, and the ninth and tenth routes may be located on the seventh and eighth routes. The paths have various respective internal continuous path extensions 812 "X", 811 "X", 79 "X", and 99 "X", for example, in the final discrete component assembled. May be.
[0072]
Referring to FIG. 5A, a stack of a plurality of non-shared circuits having groups of paths according to aspects of the present invention is shown. A marker 1000 indicating the continuation of the stacking of the arrangement to the next column of FIG. Conceptual energy indicators 600, 601, 602, 603 indicate the flow of energy. Material 799 may be deposited on material 801 for component 6900 shielding 815-1, 800-1, 810-1-IM, 815-2, 800-2-IM, and 810-2 shown. . Shields 810-A and 810-B are split shields of at least a portion of the isolated circuit system. Shields 815-A and 815-B are split shields of at least a portion of the isolated circuit system. Shields 820-A and 820-B are split shields of at least a portion of the isolated circuit system. Shields 825-A and 825-B are split shields of at least a portion of the isolated circuit system. Conductors 855-1 and 855-2 are separate and shielded paths in a bypass configuration. Conductors 865-1 and 865-2 are separate and shielded paths in a bypass configuration. In FIG. 5A, the path arrangement is depicted with paths of at least six orientations of the two types of paths, each orientation of the path of at least six orientations of the path being conductive since maintaining the orientation of the path. Provides isolation.
[0073]
Referring to FIG. 5B, a stacked shielding structure according to an aspect of the present invention is shown. FIG. 5B depicts an embodiment similar to FIG. 5A, in which two sets of 855 “X” and 865 “X” paths have been omitted for clarity, and the shielding of FIG. Flip-flops are oriented in each correlated set of "X" paths. The 79 "X" path extension may be rotated by 90 degrees with respect to the various path extensions 811 "x" and 812 "X". The dynamic result of this form, as exemplified by the conceptual energy indicator, is to override the extension of the two sets of 855 "X" and 865 "X" of two sets of two separate circuits. And may be further augmented by relative positioning of the shields of each separated circuit pair 855A and 865A of approximately 90 degrees that is ineffective in extending the various paths of 855B and 865B.
[0074]
Referring to FIG. 5B, a stacked shielding structure according to an aspect of the present invention is shown. FIG. 5B depicts an embodiment similar to FIG. 5A, where the two sets of 855 “X” and 865 “X” paths have been omitted for clarity, and the shielding of FIG. Flip-flops are oriented in each correlated set of "X" paths. The 79 "X" path extension may be rotated by 90 degrees with respect to the various path extensions 811 "x" and 812 "X". The dynamic result of this form, as exemplified by the conceptual energy indicator, is to override the extension of the two sets of 855 "X" and 865 "X" of two sets of two separate circuits. And may be further augmented by relatively positioning the shields of each separated circuit pair 865B and 865A of approximately 90 degrees ineffective in extending the various paths of 855B and 865B.
[0075]
As mentioned above, in embodiments of the present invention, a plurality of supplemental or paired occluded paths may have a first and second plurality of paths. Energy may utilize, for example, layers of various paired supply or bypass paths in a generally parallel and uniform manner. The elements of the pathway provide energy propagation and generally maintain a non-parallel or vertical relationship, and, in addition, maintain isolation, with adjacent circuitry, rather than isolation. , Conductive apertures and conductive through-vias. The paths may maintain internal balance and facilitate electrical resistance along opposing complementary pairs. Such a relationship in a complementary pair of pathways may occur, while pathways and energies experience opposing operational uses within an externally mounted shielding structure.
[0076]
Referring to FIG. 5C, a relative plan view of a stacked plurality of non-shared circuits having transit and including a group of paths is shown, in accordance with an aspect of the present invention. The device according to the aspect of the invention depicted in FIG. 5C has a hole-through energy conditioner. Hole-through energy conditioners have the use of multiple sets of shielding to possess energy conditioning and may be configured to retain many of the principles of energy propagation disclosed herein. Further, FIG. 5C depicts an invalid path set with path arrangement 6969. The route arrangement 6969 has 8879 “X”, 8811 “x” and 8812 “X” that function from different directions with respect to the subjects 80 and 81 without the route extensions 79 “X”, 811 “x” and 812 “X”; Similar to FIG. 5B, with the substitution of passing.
[0077]
Still referring to FIG. 5C, in the manufacturing process, conductive holes 912, through or conductive apertures may be used to interconnect 8806 with the integrated circuit, such as mechanical drilling, laser drilling, etching, punching. Alternatively, it may be formed by one or more path layers using another pore forming technique. Each particular interconnect 8806 may allow for various paths to be electrically connected or isolated. Each particular interconnect 8806 may extend through all layers of the routing arrangement 6969, or may be bordered by one or more layers above or below. The routing arrangement 6969 may include an organic substrate such as an epoxy material or a patterned conductive material. If an organic substrate is used, for example, FR-4 epoxy glass, polymer-glass, benzocyclobutene, Teflon, other epoxy resins, or similar standard printed Circuit board materials may be used in various embodiments. In an alternative embodiment, the channel arrangement may have an inorganic substrate, for example, a ceramic. In various embodiments, the level thickness may be approximately 10 to 1000 microns. Interconnects 8806 between the various conductive layers may be formed by selectively removing dielectric and conductive materials, such as with conductive paste 799A or electrolytic plating 799B. The conductive material of the lower conductive layer 904 is exposed by filling the holes as formed thereby.
[0078]
An interconnect 8806 may connect the conductive layer exposed on the relative side of the routing arrangement 6969. The interconnect 8806 may take the form of a pad or land to which an integrated circuit may be attached, for example. The interconnect 8806 may be formed using well-known techniques, such as by filling selectively removed portions of the dielectric with conductive paste, electrolytic plating, photolithography, or screen printing. The resulting routing arrangement 6969 has one or more layers of patterned conductive material 904 separated by a non-conductive layer and interconnected by interconnect 8806. Different techniques may be used to interconnect and separate the various layers of the patterned conductive material 799. For example, rather than forming and selectively removing portions of the various conductive 799 and non-conductive layers 801, the openings between the various layers selectively select desired portions of the conductive 799 and non-conductive layers 801. May be included. Removal techniques such as chemical and mechanical planarization have been used to physically abrade multiple layers of different types of conductive and non-conductive materials, resulting in the desired openings of various interconnects. Good.
[0079]
The path arrangement 6969 may be configured using a multi-aperture, multi-layered set of energy-adjusting paths, with a format of the substrate adapted for energy-adjusting conditions. Path arrangement 6969 is known as transit 8879 "X", 8811 "X" and 8812 "X" in combination with a multi-layer common conductive Faraday cage-like shielding technique with confined propagation paths. The propagated energy may be adjusted by utilizing the directed energy adjustment methodologies of the partially filled aperture. Interconnecting routing and ICs includes wire-bonded interconnects, flip-chip ball-grid array interconnects, micro-ball-grid interconnects, those listed above. Or any other standard industry permitted by the methodology. For example, like any other path on the chip, the flip-chip type of integrated circuit, which means stopping input / output, may occur at any point on the chip surface. After the IC chip is prepared for mounting in the routing arrangement 6969, the chip may be mounted on a matching pad on the surface of the routing arrangement 6969 by being flipped over by solder bumps or solder balls. Alternatively, the integrated circuit may be wire-bonded by connecting an input / output stop to the path arrangement 6969 using a wire connection to a pad on the surface of the path arrangement 6969.
[0080]
Circuitry within routing arrangement 6969 may act as a source to load routing arrangements that require capacitance, noise suppression, and / or voltage damping. This capacitance may be provided by the formation of a capacitance that is deployed and embedded in the path arrangement 6969. Such capacitance may be coupled to the load of the integrated circuit using paired paths and shielding, as described above. Additional capacitance may be provided on circuits that are electrically coupled to the integrated circuit to provide voltage dampening and noise suppression. Proximity of the off-chip energy source may provide capacitance along each of the low inductance paths to the load. The common shield path may be used as a reference node for a "0" voltage circuit both in the off-chip energy source and in the form of a common conductive interposer energy path.
[0081]
The routing arrangement 6969 may be connected to the integrated circuit by commonly accepted industrial connection methods having a bumpless build-up layer (BBUL) package and couplings 799A and 799B. This technology allows for low power consumption in high performance, thin and lightweight packaging. In a BBUL package, a silicon die or IC is embedded in the package with a routing arrangement operable as a first level interconnect. Thus, the BBUL package as a whole does not simply attach to one surface of the IC. For example, the electrical coupling between the die and one or more of the various shields and packages may be made of copper wire and does not necessarily require C4 solder bumps. These features combine to make the package thinner and lighter than other IC packages, while promoting high performance and reducing power consumption. The BBUL may enhance the manufacturing capability of coupling multiple silicon components to the routing arrangement 6969. The shielded paths 8811, 8812, and 8879 may be electrically coupled between the respective energy sources and the respective loads of the IC by a common industrial methodology, thereby providing for regulation of the transmitted energy. enable. Shield 8879 may be conductively coupled to the shield having 1055-2. The shield and other conductive portions of the shield having 8811 and 8812 may be electrically coupled to respective supplemental paths that do not have significant polar charge prior to hookup, thereby being understood by those skilled in the art. Thus, each layer 8811 and 8812 is prevented from changing its function in the direction of energy propagation, just as layers 8811 and 8812 are prevented from changing its input and output for input and output, respectively.
[0082]
In the stacked variant depicted in FIGS. 5A, 5B and 5C, three paths 1100-IM- "having one between 810-1 and 815-2, indicated as 1100-IM-" C ". Adding X "may bisect the balanced harmony of the total number of equally located paths on the opposite side of 1100-IM-" C ". The addition of 1100-IM-1 and 1100-IM-2 electrically coupled to 1100-IM-C creates a common or shielding structure (all not shown). The shielding of the shielding structure may or may not be of substantially the same size. The shield may or may not be physically separated from any other shield in any one or more embodiments of the present invention. Thus, a shield may or may not be electrically or conductively separated from any other shield in any one or more embodiments of the invention.
[0083]
Odd shields may be combined together, thereby allowing the formation of a common reference or node that takes advantage of all other shields. The number of shields 1100-IM- "X" is not limited to the use of extensions 1099NNE and 1099SSE, such as shield 00GS, as any number of extensions in most directions may be used to facilitate coupling. A relatively balanced, complementary and symmetric arrangement may be formed with respect to the central shield 8 "XX" or shield 800 / 800-IM as a fulcrum of the arrangement of the balanced conductive parts. The elimination of the flux field at least in part in the energy propagation along or between the complementary electrically opposing paths in pairs occurs in this balance, but not in the shifted embodiment. In addition, the physical and electrical shielding containment and Faraday effects of the complementary and charged suppression of the parasitic wandering energy may also occur. Such a result is achieved because the RF return paths are parallel and the magnetic flux energy adjacent to the corresponding path moves at least partially along the shield. Thus, magnetic flux energy is measured or observed with respect to return.
[0084]
The shifted path may be relatively balanced and complementary, and may be symmetrically positioned with respect to a central shield, such as shield 800 / 800- "X" -IM, and further, for example, such as 800 / 800-IM. May have a relatively shifted, balanced, complementary and symmetrical arrangement of predetermined shields and pathways that are additionally sandwiched about a shield located in the center of the center.
[0085]
The exemplary embodiments of FIGS. 1A, 1B, 1C through 4I may have, for example, their "shifted" embodiments. These shifted embodiments may have a variety of layers with shielding, paths, shielding, paths and shielding. Each of the diversity layers may be complementary, centered with respect to the central shielding 800 / 800- "X" -IM, such as in coplanar variations, and the overall diversity of the layers is the primary center. It may be central for shielding. For example, the individual occlusions may be shifted to create individual imbalances, such as between a given matched pair of paths, but the complementarity and equilibrium may be shifted with respect to central occlusion and primary central occlusion. May be maintained. Shifting may expose at least one portion of the path outside the perimeter of the superimposed shield, thereby enabling parasitics, thereby changing, for example, the nature of the impedance.
[0086]
For example, a given path may be shifted 5 points to the left. This shift may be accounted for in matched pairs with respect to the center occlusion, so that the paths of adjacent matched pairs of opposite polarities may shift by 5 points, or five adjacent paths of opposite polarities. May shift by one point each, thereby maintaining complementarity and balance. Further, the path may be held within the perimeter of the superimposed shield and may nevertheless be shifted below. Shifts under such shielding nevertheless form a desirable balance. However, not shown, one exemplary embodiment is that the path is drawn towards the center and kept under shielding, evidencing different electrical properties such as inductive behavior in unbalanced conditions Having a situation.
[0087]
Referring to FIG. 6, illustrated is embodiment 6900, a stacked plurality of circuits having conductive energy paths, separated energy sources, separated energy utilizing loads, and separated common conductive paths. It is. The conductive energy path may be conductively coupled to embodiment 6900 by a conductive coupling material, such as by soldering or an industrially equivalent technique. Passage 315, a continuous conductive path below the substrate surface, may be coupled to the conductive path and may have a conductive material that serves as a continuous conductive path for transmitting energy. Separate common conductive paths may not be directly coupled to separate energy sources or separate energy utilization loads. As mentioned above, embodiment 6900 may have four paths with electrodes and shielding, with a plurality of each electrically isolated. The shield may be conductively coupled. The conductively coupled shield may be externally coupled to a separate common conductive path that is not directly and conductively coupled to the electrode using a conductive coupling material. As shown in FIG. 6, electrodes 815-1, 800-1-IM and 810-1 may be conductively coupled to 802GA, 802GB. The shields 815-2, 800-2-IM and 810-2 may be conductively coupled to 902GA, 902GB. The couplings may not be conductively coupled to the first plurality of electrodes or the second plurality of electrodes. In this configuration, both of the separated circuits may utilize separate and separate voltage references and separate common impedance paths, such as REF1 and REF2 in FIG.
[0088]
Referring now to FIG. 7, an embodiment 3210, a conductive energy path, an isolated energy source, a load utilizing isolated energy, a stacked coplanar surface having an isolated common conductive path. Multiple circuits are shown. The conductive energy path may be conductively coupled to embodiment 3210 by a conductive coupling material. Passage 315, a continuous conductive path below the substrate surface, may be coupled to the conductive path and may have a conductive material that serves as a continuous conductive path for transmitting energy. Separate common conductive paths may not be directly coupled to separate energy sources or separate energy utilization loads. As described above, embodiment 3210 may have four paths with electrodes and shielding, with a plurality of each electrically isolated. A conductively coupled shield is electrically external to an isolated common energy path that is not directly and conductively coupled to the first or second plurality of electrodes in this coplanar arrangement. May be combined. A third plurality of electrodes, 815-1, 800-1-IM and 810-1, may be conductively coupled to 802GA, 802GB, 815-2 and 800-2-IM, and further comprising: It may be conductively coupled to 902 GB and not conductively coupled to the first or second plurality. In this embodiment, both of the separated circuits are individually separated and referenced to separate voltages and individually separated impedance paths and at least one separate and lower impedance path such as REF1 and REF2 in FIG. You may take advantage of
[0089]
Referring now to FIGS. 4A-7, the stop electrodes 890A, 890B and 891A, 891B, 802GA, 802GB and 902GA, 902GB may be single or multilayer. The stop electrodes 802GA, 802GB, 902GA, 902GB may be located on other respective portions of the sintered body. Each main electrode layer 81 or 80 and the associated electrode extension 99 / 79G "X" or 812 "X" extends to the associated stop electrode 802GA, 802GB, 902GA, 902GB and 890A, 890B and 891A, 891B. , And conductively coupled electrodes may be defined.
[0090]
The present invention may take advantage of a number of energy conditioning features that utilize elements of a commonly coupled shielding structure to emulate the center tap of a resistor / voltage divider network. The resistor / voltage divider network may be generally constructed using various integrated circuit resistor ratios. However, various integrated circuit resistors may utilize, for example, a particular conductive / resistive material 799A, or may naturally generate the resistive nature of the pathway material 799, or may have altered physical layout. It may be replaced by a device according to an aspect of the invention, which is a utilizing device. The ability to divide the voltage is represented as part of a common, shared path shielding structure that is utilized to determine a common voltage reference located on each side of the common path shielding structure. Good.
[0091]
In embodiments, a number of complementary pairs of paths, initially stacked vertically in the manufacturing process, or combined with pairs of coplanar planes as described above, are generally physically or electrically parallel. It may be diversified in a predetermined manner to generate a combination of multiple path elements of a characteristic.
[0092]
Further, although not shown, the devices of the present invention may be fabricated in silicon and incorporated directly into integrated circuit microprocessor circuitry or microprocessor chip packaging. Suitable methods for depositing electrically conductive materials may be used in plating, sputtering, vapor, electrical, screening, stencil, vacuum, and chemical, including chemical vapor deposition (CVD).
[0093]
Certain embodiments are located and described herein as “above” or “above” or “below” or “below” or any other positional or directional description, but these descriptions are merely relevant, It is understood that this is not intended to be limiting.
[0094]
The present invention may be implemented in a number of different embodiments having an energy conditioning embodiment as an energy conditioner for an electronic assembly, an energy conditioning substrate, an integrated circuit packaging, an electronic assembly or electronic system in the form of an energy conditioning system. And may be assembled using various techniques. Other embodiments will be readily apparent to those skilled in the art.
[Brief description of the drawings]
[0095]
FIG. 1 is an illustration of an operable relative position compass for determining the relative position of the various path extensions disclosed.
1A illustrates the relative positions of various path extensions disclosed in accordance with aspects of the present invention.
FIG. 1B illustrates the relative locations of various path extensions disclosed in accordance with aspects of the present invention.
FIG. 1C illustrates the relative positions of various path extensions disclosed in accordance with aspects of the present invention.
FIG. 2A is a schematic plan view of the circuit of the 2B embodiment according to aspects of the present invention.
FIG. 2B is a plan view of an embodiment according to aspects of the invention.
FIG. 3A is a schematic plan view of the circuit of embodiment 3B according to aspects of the invention.
FIG. 3B is a plan view of an embodiment according to aspects of the invention.
FIG. 3C is a plan view of a shield according to aspects of the invention.
FIG. 4A is a relative plan view of an embodiment according to aspects of the present invention.
FIG. 4B is a relative plan view of an embodiment according to aspects of the present invention.
FIG. 4C is a relative plan view of an embodiment according to aspects of the invention.
FIG. 4D is a relative plan view of an embodiment according to aspects of the present invention.
FIG. 4E is a relative plan view of an embodiment according to aspects of the invention.
FIG. 4F is a relative plan view of an embodiment according to aspects of the invention.
FIG. 4G is a relative plan view of an embodiment according to aspects of the present invention.
FIG. 4H is a relative plan view of an embodiment according to aspects of the present invention.
FIG. 4I is a relative plan view of an embodiment according to aspects of the present invention.
FIG. 5A illustrates a stacked plurality of circuit networks having groups of paths according to aspects of the present invention.
FIG. 5B illustrates a stacked shield according to aspects of the invention.
FIG. 5C is a relative plan view of a stacked plurality of non-shared circuit networks having passes including groups of paths according to aspects of the present invention.
FIG. 6 illustrates a relative plan view of a variation of a circuit arrangement according to aspects of the invention.
FIG. 7 illustrates a relative plan view of a variation of a circuit arrangement according to aspects of the invention.

Claims (36)

A device having at least a first and second plurality of paths,
The first plurality of paths includes at least two paths that are electrically separated from each other and oriented in a first complementary relationship;
At least a first number of the second plurality of paths is disposed electrically separated from a second number of the second plurality of paths,
A device wherein at least two of the second plurality of paths are electrically separated from the first plurality of paths. The first number of at least two paths of the second plurality of paths are electrically coupled to each other,
The device of claim 1, wherein the second number of at least two paths of the second plurality of paths are electrically coupled to each other. The first number of the second plurality of paths is an odd number of 1 or more;
The second number of the second plurality of paths is one or more odd numbers;
The first number of at least two paths of the second plurality of paths are electrically coupled to each other,
The device of claim 1, wherein the second number of at least two paths of the second plurality of paths are electrically coupled to each other. The device of claim 1, further comprising a spacing material that is at least spaced from the two paths of the circuit. The device of claim 4, wherein the spacing material comprises a dielectric. The first number of the second plurality of paths is a first alignment;
The device of claim 1, wherein the second number of the second plurality of paths is a second alignment. The first number of the second plurality of paths is a first superimposed alignment;
The device of claim 1, wherein the second number of the second plurality of paths is a second superimposed alignment. The device of claim 6, wherein the first alignment and the second alignment are superimposed alignments. The device of claim 7, wherein the first alignment and the second alignment are located on at least one on the other. The first number of the at least two paths of the paths are arranged electrically coupled to each other in the first alignment;
The second number of at least two paths of the paths are disposed in electrically coupled with each other in the second alignment;
The first number of the paths is one or more odd paths, the second number of the paths is one or more odd paths,
The device of claim 1, wherein a total number of the first plurality of paths is at least two or more even numbers. The first number of at least two paths of the second plurality of paths are arranged in a first alignment that is electrically coupled to each other;
The second number of at least two paths of the second plurality of paths are arranged in a second alignment electrically coupled to each other,
The device of claim 1, wherein a total number of the first plurality of paths is at least two or more even numbers. The device of claim 10, further comprising a spacing material that is at least spaced from the path of the circuit arrangement. The device of claim 11, wherein the four paths of the circuit arrangement are electrically isolated from each other. The first plurality of paths are a plurality of shielded paths;
The device of claim 1, wherein the second plurality of paths are a plurality of shielded paths. An electrical arrangement having at least a first and second plurality of paths,
The first plurality of paths includes at least one pair of paths that are electrically isolated from one another and arranged at complementary locations;
At least a first number of the second plurality of paths is disposed electrically separated from a second number of the second plurality of paths, and the second plurality of paths is the first number. Having at least two paths electrically separated from the plurality of paths;
A first number of at least two paths of the second plurality of paths are electrically coupled to each other;
An electrical arrangement, wherein a second number of at least two of the second plurality of paths are electrically coupled to each other. 16. The electrical arrangement of claim 15, further comprising a spacing material that is at least spaced from a path of the circuit arrangement. The electrical arrangement of claim 15, wherein at least four paths of the circuit arrangement are electrically isolated from each other. The electrical arrangement of claim 15, wherein at least six paths of the circuit arrangement are electrically isolated from one another. The second plurality of paths includes at least two paths co-planar with each other;
The electrical arrangement of claim 15, wherein at least four paths of the circuit arrangement are electrically isolated from each other. The second plurality of paths includes at least two paths co-planar with each other;
The electrical arrangement of claim 15, wherein at least four paths of the circuit arrangement are electrically isolated from each other. The first and second plurality of paths are stacked and arranged on a non-coplanar plane,
The electrical arrangement of claim 15, wherein at least four paths of the circuit arrangement are electrically isolated from each other. The first plurality of paths has a plurality of passes;
16. The electrical arrangement according to claim 15, wherein the second plurality of paths are a plurality of shielding paths. A device having at least four multiple paths,
Only the respective path of each of the plurality of paths is electrically coupled to each other;
The device, wherein at least two of the at least four plurality provide shielding for at least two other of at least four of the paths. A device having at least a first, a second, a third and a fourth plurality of paths,
Only the respective path of each of the plurality is electrically coupled to each other;
The first plurality shields the second plurality;
The device wherein the third plurality shields the fourth plurality. At least a first and second plurality of shielding paths;
A circuit arrangement having at least a first and a second plurality of shielded paths,
The shielding path and the shielding path are arranged alternately with the circuit arrangement,
Only the respective path of each of the plurality is electrically coupled to each other;
The circuit arrangement wherein the plurality of each of the circuit arrangements are electrically isolated from one another. An integrated circuit package having at least one integrated circuit;
A plurality of paths conductively coupled together;
A first plurality of shields conductively coupled together;
A second plurality of shields conductively coupled together and at least electrically isolated from said first plurality;
The shield and each of the paths are alternately arranged, the shield developing at least one low impedance path suitable for propagating energy away from the integrated circuit;
The system wherein the path develops a low inductance path suitable for energy propagation in the package of the integrated circuit, wherein the energy propagation is modulated by at least the plurality of shields. The system of claim 26, wherein the first and second plurality of shields are each substantially in a coplanar relationship. The system of claim 26, wherein the first and second plurality of shields are each substantially in a coplanar relationship. One of the first or second plurality of shields has one of the centers of the shield, and the first and second plurality of shields and the path are substantially with respect to one of the centers. 27. The system of claim 26, wherein the system is arranged in a balanced, complementary, symmetrical arrangement. One of the first or second plurality of shields has one of the centers of the shield, and the first and second plurality of shields and the path are substantially with respect to one of the centers. The system of claim 26, wherein the system is aligned. 27. The system of claim 26, wherein each of the first plurality and the second plurality of shields has an odd number of shields. Device according to any of the preceding claims, wherein the device is a first level interconnect arrangement for an integrated circuit. Device according to any of claims 1 to 8 or 10 to 12, wherein the device is arranged as a decoupling capacitor. Device according to any of claims 1 to 8 or 10 to 12, wherein the device is arranged as a bypass capacitor. The device according to any of claims 1 to 8 or 10 to 12, wherein the device is a first level interconnect arrangement coupled to an integrated circuit.
A device wherein at least a first plurality is electrically coupled to the integrated circuit. The device according to any of claims 1 to 8 or 10 to 12, wherein the device is a first level interconnect arrangement coupled to an integrated circuit.
The first plurality is electrically coupled to the integrated circuit;
The device wherein the second plurality is electrically isolated from the integrated circuit.

Images