TW201517730A - Multi-circuit-layer circuit board - Google Patents

Abstract

A multi-circuit layer circuit board includes: two circuit layers formed on a substrate, the same circuit layer including a plurality of signal lines and a plurality of ground reference planes. At least one of the signal lines is formed between any two adjacent ground reference planes. The ground reference planes of one circuit layer are electrically coupled to the ground reference planes of the other circuit layer via a plurality of vias. One of the signal lines of one circuit layer is not overlapped with one signal line of the other circuit layer. The signal lines have a toggle rate higher than 800MHz.

Description

Multi-circuit layer board

The present invention relates to a multilayer printed circuit board (PCB), and more particularly to a multilayer printed circuit board capable of reducing cross-talk.

High Speed Digital System Design focuses on high speed, high bulk density, low cost, and especially low cost. This causes the number of circuit layers in the system PCB to be reduced to reduce costs.

When designing the signal line on the PCB, consider the following factors: whether the reference plane of the signal line is complete, whether the crosstalk between the signals is serious, and whether the total width of the board can be reduced.

When the switching rate of the signal line is getting higher and higher, how to design a multi-circuit layer circuit board capable of operating at a high switching rate is one of the important efforts.

The present invention relates to a dual-circuit layer printed circuit board in which signal lines are disposed on two adjacent circuit layers, and the signal lines are arranged in a misaligned manner, thereby reducing the interval between signal lines on the same circuit layer to reduce Crosstalk, more power reduction The total width of the board.

The present invention relates to a dual circuit layer printed circuit board in which signal lines disposed on adjacent circuit layers do not vertically overlap each other to complete the reference plane of the signal line.

According to an embodiment of the present invention, a multi-circuit layer circuit board is provided, comprising: two circuit layers formed on a substrate, the same circuit layer comprising a plurality of signal lines and a plurality of ground reference planes, and any two adjacent ground reference planes are disposed between At least one signal line, the ground reference plane of one circuit layer and the ground reference planes of another circuit layer are electrically coupled to each other by a plurality of through holes. One of the signal lines of one of the circuit layers does not overlap another signal line of the other circuit layer, and the switching rate of the signal line transmission signals is higher than 800 MHz.

In order to better understand the above and other aspects of the present invention, the following specific embodiments, together with the drawings, are described in detail below:

100, 100A, 100B‧‧‧ printed circuit boards

110‧‧‧Substrate

L1~L2‧‧‧ circuit layer

TL1~TL4‧‧‧ signal line

VA‧‧‧through hole

G‧‧‧ Ground reference plane

D‧‧‧Media substrate

41‧‧‧Grounded metal surface

42‧‧‧Signal transmission conductor

43‧‧‧Media substrate

Figure 1 shows a perspective view of a dual circuit layer printed circuit board in accordance with an embodiment of the present invention.

Figure 2 shows a cross-sectional view of a dual circuit layer printed circuit board in accordance with an embodiment of the present invention.

Figure 3 shows a top view of a dual circuit layer printed circuit board in accordance with an embodiment of the present invention.

Figure 4 shows a schematic of a coplanar waveguide (CPWG).

Figure 5 is a cross-sectional view showing a dual circuit layer printed circuit board in accordance with another embodiment of the present invention.

Figure 6 is a cross-sectional view showing a dual circuit layer printed circuit board according to still another embodiment of the present invention.

The technical terms of the present specification refer to the idioms in the technical field, and some of the terms are explained or defined in the specification, and the explanation of the terms is based on the description or definition of the specification. In the following, the techniques or principles that are conventional in the field will not be described.

The embodiment of the present invention has one or more technical features, which does not mean that all technical features in any embodiment must be implemented at the same time, or only one or all of the technical features in different embodiments can be separately implemented. . In other words, some or all of the technical features of any of the embodiments may be selectively implemented, or the technical features of the embodiments may be arbitrarily combined.

Referring now to Figures 1 through 3, there are shown perspective, cross-sectional and top views of a multi-circuit layer printed circuit board 100 in accordance with an embodiment of the present invention. The multi-circuit layer printed circuit board 100 is, for example, a two-circuit layer printed circuit board. For convenience of explanation, FIGS. 1 to 3 show that each layer of the multi-circuit layer printed circuit board 100 includes two signal lines, but it is known that the present case is not limited thereto. Moreover, in practice, any of the circuit layers of the printed circuit board may include more signal lines, which are within the spirit of the present invention.

In FIG. 1, the printed circuit board 100 includes two circuit layers L1 to L2 formed on the substrate 110. The circuit layer L1 includes signal lines TL1 to TL2. Circuit layer L2 includes signal lines TL3 to TL4. The circuit layers L1 and L2 are electrically coupled to each other with a plurality of vias VA. In Figure 1, the symbol "G" represents the ground reference plane. As can be seen from Fig. 1, in the embodiment of the present invention, each of the circuit layers L1 and L2 has a signal line, which is one of the focuses of the embodiment of the present invention.

Referring now to Figure 2, there is shown a cross-sectional view of a circuit board 100 in accordance with an embodiment of the present invention. In Fig. 2, GV represents the width of the through hole VA, G1 represents the width of the ground reference plane G, S1 is a space between the signal line and the ground reference plane G, W1 represents the width of the signal line, and S2 represents the signal line. The gap to the via VA, D is the dielectric substrate between the circuit layers L1 and L2.

As can be seen from FIG. 1 and FIG. 2, the multi-circuit layer circuit board of the embodiment of the present invention includes two circuit layers L1 and L2 formed on the substrate 110. The same circuit layer includes a complex signal line and a plurality of ground reference planes. In the same circuit layer, at least one signal line is disposed between any two adjacent ground reference planes (for example, in the second diagram, on the circuit layer L1, the single signal line TL3 is disposed on two adjacent ground reference planes. between). A plurality of through holes are electrically coupled to each other between the ground reference planes of one circuit layer and the ground reference planes of another circuit layer (this can be seen from FIG. 2). One of the signal lines of one of the circuit layers does not overlap another signal line of the other circuit layer (in the second figure, the signal line TL3 of the circuit layer L2 does not overlap the signal of the circuit layer L1 at all TL1). In addition, in the embodiment of the present invention, the switching rate of the transmission signals of the signal lines (such as the signal lines TL1 TL TL4) is higher than 800 MHz.

The width G1 of the ground reference plane G affects whether the electromagnetic field of the signal line (such as the electromagnetic field E of the signal line TL3) has a good reference loop. In the embodiment, the width G1 of the ground reference plane G is sufficient for the electromagnetic field of the signal line (such as the electromagnetic field E of the signal line TL3) to have a good reference loop.

In addition, since the through hole VA has a lower limit of the size, in the embodiment of the present invention, the size GV of the through hole VA can be designed as a lower limit of the size in principle to reduce the total width of the circuit board. In addition, of course, with the advancement of technology in the future, the lower limit of the size of the through hole VA is also likely to shrink.

In addition, if all the signal lines are placed on the same circuit layer and the other circuit layers are not configured with signal lines (this embodiment does not use this method), since the crosstalk between the signal lines is considered, the total of the circuit boards The width cannot be effectively reduced. Further, in view of the fact that all signal lines are placed on the same circuit layer and the other circuit layers are not configured with signal lines, if one circuit layer has four signal lines, the two adjacent signal lines are required. The through hole is arranged, and a gap is also maintained between the signal line and the through holes on the left and right sides. In this case, the total width of the board is not small.

Conversely, in the embodiment of the present invention, as shown in FIG. 2, since the adjacent two circuit layers are all provided with signal lines, a portion of the horizontal gap between the signal lines of the upper circuit layer is vertically overlapped with the lower circuit. The horizontal gap between the signal lines of the layer can help reduce the overall width of the board. Compared with the following, if one circuit layer has signal lines and the other circuit layer has no signal lines at all, the complex horizontal gaps between the signal lines cannot vertically overlap each other, so this method is not easy to reduce the total width of the circuit board. .

Therefore, in the second figure, the total width TW required to configure the four signal lines to the adjacent two circuit layers is: TW = (GV + G1 + S1 + S1 + S2) * 2 + GV. Through experiments and comparisons, it can be known that the practice of the embodiment of the present invention can effectively reduce the total width of the circuit board.

In addition, in the embodiment of the present invention, the vertical gap GP between the respective signal lines of the adjacent two circuit layers is GP. 0. As seen from Fig. 2, the vertical gap GP between the side of the signal line TL4 of the circuit layer L2 and the side of the signal line TL2 of the circuit layer L1 0. That is to say, in the vertical aspect of FIG. 2, the signal lines of any of the circuit layers do not overlap the signal lines of the other circuit layer. In the embodiment of the present invention, in this way, the electromagnetic field of the signal line can be made to have a good reference loop. That is, if a circuit layer signal line (such as TL4) is vertically overlapped with a signal line of another circuit layer (such as TL2), the reference plane of the electromagnetic field of the signal line will be incomplete/discontinuous, which will make Impedance discontinuity and crosstalk become severe, causing the signal to be distorted during transmission, affecting the normal operation of the circuit, and may even make the circuit inoperable at high frequencies. Conversely, embodiments of the present invention can avoid such disadvantages.

Please refer to Figure 2 again. In the embodiment of the present invention, a ground reference plane is placed on one side of the signal line. For example, in the drawing aspect of FIG. 2, the ground reference plane and the through hole are placed on the left side of the signal line TL4. The horizontal gap between the two signals of the same circuit layer is increased to reduce the crosstalk between the two signal lines. As seen from Fig. 2, the horizontal gap between the signal lines TL4 and TL3 of the circuit layer L2 is S2+GV+G1+S1, and such horizontal gap helps to reduce crosstalk between the signal lines TL4 and TL3 because the signal line TL4 and TL3 is far apart.

Figure 3 shows a top view of a circuit board 100 in accordance with an embodiment of the present invention. As shown in Figure 3, it can be clearly seen that the upper circuit layer signal line and the lower circuit layer letter The lines are staggered. In detail, in the direction of the drawing of FIG. 3, from top to bottom, the signal line TL4 of the circuit layer L2, the signal line TL2 of the circuit layer L1, the signal line TL3 of the circuit layer L2, and the circuit layer L1 are respectively Signal line TL1. That is to say, the so-called interleaving means that, in the above view, the signal lines of one circuit layer are interleaved between the two signal lines of another circuit layer. This can be called "interval misplacement". Here, for convenience of explanation, although the two circuit layer signal lines are not located in the same horizontal plane, the case of FIG. 3 may be referred to as the two circuit layer signal lines being spaced apart from each other.

Figure 4 shows a schematic of a coplanar waveguide with lower ground plane (CPWG). As shown in Fig. 4, a signal transmission conductor (i.e., signal line) 42 and a grounded metal surface 41 on both sides are formed on the surface of the dielectric substrate 43. In the embodiment of the present invention, the two circuit layers L1 and L2 of FIG. 1 adopt the structure of the CPWG.

More specifically, reference is made to FIGS. 2 and 4 simultaneously. The signal line TL1 (which is equivalent to the signal transmission conductor 42 of FIG. 4) and the ground planes G on both sides (which are equivalent to the grounded metal surface 41 of FIG. 4) can be regarded as constituting the same plane waveguide. Although FIG. 2 does not depict a dielectric substrate, it is common knowledge in the art to understand that the dielectric substrate is located below circuit layer L1 and below circuit layer L2.

Referring now to Figure 5, there is shown a cross-sectional view of a multi-circuit layer printed circuit board 100A in accordance with another embodiment of the present invention. Comparing Fig. 2 and Fig. 5, it can be seen that in Fig. 5, two signal lines are arranged between any two adjacent ground reference planes on any of the circuit layers. In addition, similar to FIG. 1 and FIG. 2, one of the signal lines of one of the circuit layers does not overlap another signal line of another circuit layer; In the figure 5, the signal line TL4 of the circuit layer L2 does not overlap the signal TL1) of the circuit layer L1 at all. In addition, the switching rate of the transmission signals of the signal lines (such as the signal lines TL1 to TL4) is still higher than 800 MHz.

Referring now to Figure 6, there is shown a cross-sectional view of a multi-circuit layer printed circuit board 100B in accordance with yet another embodiment of the present invention. Comparing Fig. 2 and Fig. 6, it can be seen that in Fig. 6, a single signal line is disposed between any two adjacent ground reference planes on one of the circuit layers (taking circuit layer L2 as an example, a single signal line) TL3 is disposed between two adjacent ground reference planes, and on another circuit layer, two signal lines are disposed between any two adjacent ground reference planes (taking circuit layer L1 as an example, two signal lines TL1 and TL2 is placed between two adjacent ground reference planes). In addition, similar to FIG. 1 and FIG. 2, one of the signal lines of one of the circuit layers does not overlap another signal line of another circuit layer; as shown in FIG. 6, the circuit layer L2 The signal line TL4 does not overlap the signal TL1) of the circuit layer L1 at all. In addition, the switching rate of the transmission signals of the signal lines (such as the signal lines TL1 to TL4) is still higher than 800 MHz.

It can be seen from the above that in the embodiment of the present invention, the signal line of any circuit layer is not overlapped with the signal line of another circuit layer, so that the reference plane of the signal line is complete, so that the signal transmission process is not severely distorted.

In addition, in order to increase the gap between the signal lines, in the embodiment of the present invention, the signal lines are arranged in the adjacent two circuit layers, and the ground reference plane is disposed between the signal lines of the same circuit layer. Therefore, the horizontal gap between the signal lines of the same circuit layer is increased to effectively reduce crosstalk.

In addition, although the horizontal gap between the signal lines of the same circuit layer is increased, However, a portion of the horizontal gap between the signal lines of any of the circuit layers vertically overlaps the horizontal gap between the signal lines of the other circuit layer. Therefore, in the embodiment of the present invention, the total width of the circuit board can be made small.

In summary, although the present invention has been disclosed above by way of example, it is not intended to limit the present invention. Those who have ordinary knowledge in the technical field of the present invention can make various changes and refinements without departing from the spirit and scope of the present case. Therefore, the scope of protection of this case is subject to the definition of the scope of the patent application attached.

100‧‧‧Printed circuit board

L1~L2‧‧‧ circuit layer

TL1~TL4‧‧‧ signal line

VA‧‧‧through hole

D‧‧‧Media substrate

Claims (8)

A multi-circuit layer circuit board comprising: two circuit layers formed on a substrate, the same circuit layer comprising a plurality of signal lines and a plurality of ground reference planes, at least one signal line disposed between any two adjacent ground reference planes, a circuit The ground reference planes of the layer and the ground reference planes of the circuit layers of the other circuit layer are electrically coupled to each other by a plurality of through holes, wherein the signal lines of one of the circuit layers Another signal line that does not overlap at all to another circuit layer, and the switching rate of the signal line transmission signals is higher than 800 MHz. The multi-circuit layer circuit board of claim 1, wherein in the vertical direction, a gap between one side of the signal line of the circuit layer and one of the other signal lines of the other circuit layer is greater than Or equal to zero. The multi-circuit layer circuit board of claim 1, wherein in the vertical direction, the signal line of the circuit layer is staggered to two adjacent signal lines of another circuit layer. The multi-circuit layer circuit board of claim 1, wherein, in each circuit layer, the signal lines form a planar waveguide with the ground reference planes. The multi-circuit layer circuit board of claim 1, wherein a portion of the horizontal gap between the signal lines of the circuit layer is vertically overlapped with a horizontal gap between the signal lines of another circuit layer. . A multi-circuit layer circuit board as described in claim 1, wherein A single signal line is disposed between any two adjacent ground reference planes on each circuit layer. The multi-circuit layer circuit board of claim 1, wherein two signal lines are disposed between any two adjacent ground reference planes on each circuit layer. The multi-circuit layer circuit board of claim 1, wherein a single signal line is disposed between two adjacent ground reference planes on one of the circuit layers; and the circuit layers are On the other circuit layer, two signal lines are arranged between any two adjacent ground reference planes.