JP2004349605A - Semiconductor device and its manufacturing method - Google Patents

Semiconductor device and its manufacturing method Download PDF

Info

Publication number
JP2004349605A
JP2004349605A JP2003147400A JP2003147400A JP2004349605A JP 2004349605 A JP2004349605 A JP 2004349605A JP 2003147400 A JP2003147400 A JP 2003147400A JP 2003147400 A JP2003147400 A JP 2003147400A JP 2004349605 A JP2004349605 A JP 2004349605A
Authority
JP
Japan
Prior art keywords
semiconductor element
heat transfer
solder
transfer plate
contact
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2003147400A
Other languages
Japanese (ja)
Other versions
JP4023388B2 (en
Inventor
Masaaki Murakami
政明 村上
Goro Ideta
吾朗 出田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2003147400A priority Critical patent/JP4023388B2/en
Publication of JP2004349605A publication Critical patent/JP2004349605A/en
Application granted granted Critical
Publication of JP4023388B2 publication Critical patent/JP4023388B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device which prevents a hollow of a solder layer caused by a volume contraction in solder solidification from remaining in the outer edge part of a boundary surface between a semiconductor element and the solder layer, and is strong in thermal stress; and its manufacturing method. <P>SOLUTION: The method of manufacturing the semiconductor device provided with a heat conduction plate 2 and a semiconductor element 1 joined to this heat conduction plate via a solder layer 8, includes the steps of melting a solder intervening between the heat conduction plate 2 and the semiconductor element 1 and cooling a portion of the heat conduction plate 2 opposite to a center part of the semiconductor element 1 more gently than the other portion. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
本発明は、半導体装置及びその製造方法に係り、特に、半導体素子を伝熱板にはんだ層を介して接合する際に、溶融はんだの体積収縮に伴って発生する凹みの対策に関するものである。
【0002】
【従来の技術】
パワーモジュール等の電力半導体素子は、消費電力が大きいため、伝熱板に接触する面積を大きく確保する必要がある。また、伝熱板には、パワーモジュールの発熱に伴う温度上昇を小さくするため、銅板のような熱伝導率の大きな材料を用い、はんだ付けの熱拡張を良好にする方法がとられる。従来、このようなパワーモジュール等の電力半導体素子を伝熱板にはんだ付けする方法としては、ダイボンディング法が採用されている。この方法は、予め伝熱板の所定位置に施された銀メッキ等の上にはんだ材箔を介して半導体素子を載置し、前記はんだ材箔を加熱溶融することにより半導体素子を伝熱板に固定する方法である。このとき、はんだ層内にガスが混在してボイド(空隙)が発生してしまうと、伝熱板と半導体素子間の熱抵抗が高くなるため放熱効果が悪化する。また、半導体素子の使用時に、通電による発熱量が増大して伝熱板と半導体素子の熱膨張量の差が大になると、ボイドの部分から亀裂等が発生して接合状態が損なわれることとなる。
このため、ダイボンディング法によるはんだ付けに際しては、はんだ層との境界面にテーパ加工を施し、はんだが凝固する前に伝熱板に振動等を加え、はんだ層内にボイドが残存しないようして半導体装置を得る方法が用いられていた(例えば、特許文献1参照)。
【0003】
【特許文献1】
特開平9−82861号公報(第3頁右欄、図1、図3)
【0004】
【発明が解決しようとする課題】
従来の半導体装置は以上のように構成されていたので、はんだが凝固する前に、はんだ層内に混在したガスによって発生した比較的大きなボイドを除去することは可能である。ところが、このような方法でガスをはんだ層内から除去した後においても、素子の外縁部とはんだとの接合の境界面に切り欠き状の凹みが発生する。
【0005】
通常、半導体素子と伝熱板の間に備えられた溶融はんだを伝熱板の側から冷却によって凝固させた場合、伝熱板に接合する溶融はんだから凝固が起こり、この凝固に伴い形成されるはんだ結晶格子が、枝分かれしつつ溶融はんだ内を半導体素子方向に伸びてゆく。この現象は、冷却が早く進むはんだ部分より顕著に浸透してゆく。はんだ結晶格子が半導体素子と溶融はんだの境界面の一部に到達すると、この凝固した部分が半導体素子と伝熱板との柱の役目を果たすため、半導体素子と伝熱板の隙間が限定されることになる。その後に凝固するはんだ部分は、体積収縮を伴い、収縮力によって未凝固部分の一部を取り込みながら、伝熱板から半導体素子方向に向かって凝固が進んでゆく。これにより、はんだ層全体の凝固が完成したとき、半導体素子とはんだ層の境界面において、はんだの一部に切り欠き状の凹みができた様相になる。
【0006】
このような凹みが、特に半導体素子とはんだ層との境界面の外縁部に発生した場合において、例えばシリコン製の半導体素子を銅製の伝熱板の上にはんだを介して接合した場合、半導体素子と伝熱板との線膨張率が異なるために、温度が低くなると(はんだの凝固温度から常温に温度降下する場合も含む)伝熱板は大きく収縮する。この収縮状態において、お椀を伏せた形の伝熱板の上に平坦な半導体素子が載置することになり、半導体素子の外周部ほど強くはんだ層に引っ張られる応力が発生することになる。このとき、境界面の外縁部に凹みが形成されていると、凹みの周囲の応力集中が高くなり、はんだの許容応力を越えると亀裂が進展して、はんだ接続が維持できなくなる問題があった。
【0007】
この発明は、上記の問題に鑑みてなされたもので、はんだ凝固時の体積収縮に起因して発生するはんだ層の凹みが、半導体素子とはんだ層との境界面の外縁部に残存することを防止し、熱応力に強い半導体装置及びその製造方法を提供することを目的とするものである。
【0008】
【課題を解決するための手段】
この発明に係る半導体装置の製造方法は、伝熱板と半導体素子との間に介在するはんだを溶融するステップと、前記伝熱板のうち前記半導体素子の中央部に対向する部分を他の部分に比し緩やかに冷却するステップと、を設けたものである。
【0009】
この発明に係る半導体装置は、半導体素子とはんだ層の境界面の外縁部に凹みを含まないものである。
【0010】
【発明の実施の形態】
実施の形態1.
図1は、この発明に係る半導体装置の製造方法に用いる半導体製造装置の一実施の形態を説明する断面図であり、加熱炉(図示していない)内で半導体素子と伝熱板とがはんだ付けされる状態を示す。
図1において、半導体素子1は、伝熱板2の上に溶融はんだ3を介して載置されている。溶融はんだ3は、境界面4(外縁部4aを含む)において半導体素子1と接している。中央部に孔を有する冷却部材である冷却プレート5は、水冷乃至空冷等により低い温度に保たれており、接触面2aにおいて伝熱板2と接触している。接触面2aに対向する伝熱板2上の対向面2cは、溶融はんだ3と接している。冷却プレート5の中央部に設けられた孔は、伝熱板2のうち半導体素子1の中央部に対向する対向部2bに位置される。
図2は、この実施の形態1における溶融はんだ3の温度変化を示す特性図である。
図2において、温度曲線6は、冷却プレート5に接触する伝熱板2の接触面2aの温度変化を示し、温度曲線7は、半導体素子1の中央部に対向する対向部2bの温度変化を示す。時点A及び時点Bは、溶融はんだ3が凝固温度183℃に到達する時点を示す。
【0011】
次に、この発明の実施の形態1における半導体装置の製造方法について説明する。
この製造方法の一例として、厚さ1mmのセラミック製の半導体素子、厚さ4mmの銅材を用いた伝熱板、及び厚さ0.2mmの共晶はんだ(錫60〜63%)を備えた半導体装置を製造する。
【0012】
伝熱板2と半導体素子1とがはんだ付けされる前の半導体装置を加熱炉にて250℃まで加熱する。このとき、凝固温度183℃を超えると、伝熱板2と半導体素子1との間に介在する共晶はんだは、溶融した状態になる。
【0013】
次に、共晶はんだが溶融した状態において、図1に示すように40℃の冷熱源として作用する冷却プレート5を伝熱板2に接触させ、伝熱板2の接触面2aを冷却する。これにより、接触面2aの温度は、図2の温度曲線6に示すように250℃から次第に下がってゆく。接触面2aに対向する対向面2cに接する部分の溶融はんだ3は、直接冷却される接触面2aからの熱伝導により、同様に温度が下がっていく。一方、冷却プレート5によって半導体素子1の中央部に対向する対向部2bは直接冷却されないため、対向部2bに接する部分の溶融はんだ3は、接触面2aからの熱伝導により、図2の温度曲線7に示すような時間的遅れを伴って250℃から温度が下がってゆく。
【0014】
伝熱板の接触面2aの温度が低下してゆき、時点Aにおいて凝固温度183℃に達すると、伝熱板2の対向面2cに接する部分の溶融はんだ3が凝固し始める。このとき、対向部2bに接する溶融はんだ3の温度は凝固温度183℃に達していないため、対向部2bに接する溶融はんだ3は凝固していない。これにより、対向面2cに接する部分の溶融はんだ3から凝固が始まり、凝固過程における体積収縮を補うために必要なはんだ塊を半導体素子1の中央部にある溶融はんだ3から引き寄せつつ、凝固が進んでゆく。このとき、半導体素子1との境界面4における溶融はんだ3の凝固は外縁部4aに接する部分より発生し、外縁部4aにて体積収縮が起こる。
【0015】
さらに、伝熱板の接触面2aの温度が低下してゆき、対向部2bが時点Bにて凝固温度183℃まで温度が下がると、対向部2bに接する部分の溶融はんだ3は凝固する。これにより、半導体素子1と溶融はんだ3の境界面4の中央部に接する部分の溶融はんだ3が凝固すると、はんだ層全体の凝固が完了する。この実施の形態における時点Aと時点Bの時間差は1秒であった。
【0016】
このとき、半導体素子1との境界面4における溶融はんだ3の凝固は、外縁部4aの溶融はんだ3から半導体素子1の中心部に向かって進んでゆく。このため、境界面の外縁部4aでは、溶融はんだ3の凝固により発生する体積収縮を、半導体1の中央部にある溶融はんだ3を引き寄せることによって充填されるため、凝固後のはんだ層8内に発生する凹み9は、半導体素子1とはんだ層8との境界面の外縁部4aに形成されない。
【0017】
上記においては、孔のある冷却プレート5を伝熱板2に接触させることにより、溶融はんだ7を冷却する構成について説明したが、伝熱板2のうち半導体素子1の中央部に対向する部分を他の部分に比し緩やかに冷却できる手段であれば、凹み9が半導体素子1とはんだ層8の境界面の外縁部4aに形成するのを防止できるため、例えば冷却ファンや冷気噴射孔を用い、半導体素子1の中心部に対向する部分以外の伝熱板を冷却する構成であっても利用できることは言うまでもない。
【0018】
次に、この製造方法により製造された半導体装置について説明する。
図3は、この発明により製造された半導体装置の一実施の形態を説明する平面図である。
図3において、半導体素子1は、伝熱板2の上に凝固したはんだ層8を介して接合されている。
図4は、この発明の実施の形態を示す半導体装置の図3における a− a線上の断面図である。
図4において、半導体素子1とはんだ層8との境界面4には凹み9が形成されている。
【0019】
このように構成された半導体装置においては、はんだ層8は半導体素子1との境界面の外縁部4aに凹み9を含まないため、半導体素子1とはんだ層8との境界面フィレットは一様で応力に強い自然収縮の形状とすることができ、はんだ亀裂の原因となる半導体素子1の境界面の外縁部4aでの応力集中の発生が防止されるため、熱応力に強い半導体装置を得ることができる。
【0020】
実施の形態2.
図5は、この発明の実施の形態2における半導体装置の製造方法に用いる半導体製造装置の一実施の形態を説明する断面図であり、加熱炉(図示していない)内で半導体素子と伝熱板とがはんだ付けされる状態を示す。
図5において、図1の実施の形態に加えて、温度制御された部材であるヒータブロック10が、冷却プレート5の中央部に設けられた孔を介して半導体素子1の中央部に対向する伝熱板2上の対向部2bに接触するよう設けられ、このヒータブロック10は、温度制御装置11と接続している。
【0021】
次に、この発明の実施の形態2における半導体装置の製造方法について説明する。
この図5の実施の形態2によれば、共晶はんだが溶融した状態において、冷却プレート5を伝熱板2の接触面2aに接触させて溶融はんだ3の冷却を行い、同時にヒータブロック10を半導体素子1の中心部に対向する対向部2bに接触させて、対向部2bに接する部分の溶融はんだ3を加熱する。このとき、接触面2aに対向する伝熱板2上の対向面2cに接する部分の溶融はんだ3は、直接冷却される接触面2aからの熱伝導により、上述の温度曲線6に示すように250℃から次第に温度が下がってゆく。一方、対向部2bに接する部分の溶融はんだ3は、温度制御可能なヒータブロック10によって対向部2bが加熱されるため、温度の降下は異なる。
【0022】
伝熱板の接触面2aの温度が低下してゆき、時点Aにおいて凝固温度183℃に達すると、対向面2cに接する部分の溶融はんだ3が凝固し始める。このとき、対向部2bに接する部分の溶融はんだ3は、ヒータブロック10により加熱されるため、伝熱板2aから対向部2b方向への熱伝導が遮断され、ヒータブロック10により対向部2bを加熱し続ければ、対向部2bに接する部分の溶融はんだ3の温度は凝固温度まで下がらず、凝固しない。
これにより、対向面2cに接する部分の溶融はんだ3から凝固が始まり、凝固過程における体積収縮に必要なはんだ塊を半導体素子1の中央部にある溶融はんだ3から引き寄せつつ、凝固が進んでゆく。このとき、半導体素子1との境界面4における溶融はんだ3の凝固は外縁部4aに接する部分より発生し、外縁部4aにて体積収縮が起こる。
【0023】
次に、ヒータブロック10の温度設定を温度制御装置11により変更して、対向部2bを冷却するようにした場合、対向部2bに接する部分の溶融はんだ3の温度が凝固温度183℃まで下がると、該部の溶融はんだ3は凝固する。これにより、半導体素子1の中央部に接する溶融はんだ3が凝固すると、はんだ層全体の凝固が完了する。
【0024】
このように構成された半導体装置の製造方法においては、半導体素子1の中心部に対向する伝熱板2上の対向部2bを加熱することにより、半導体素子1の中心部に接する溶融はんだ3の凝固開始時点を自由に変更することができ、半導体素子1の外縁部4aの溶融はんだ3を先に冷却し、確実に凝固した後に半導体素子1の中心部の溶融はんだ3の凝固が行われる。このため、凝固後に半導体素子1とはんだ層8の境界面の外縁部4aに凹み9が形成されるのをより確実に防止することができる。特に、伝熱板の接触面2aの冷却のみによっては、境界面4における外縁部4aに接する溶融はんだ3の凝固と、中央部に接する溶融はんだ3の凝固との熱伝導による時間差を十分確保できない場合において、凹み9が半導体素子1とはんだ層8の境界面の外縁部4aに形成するのを防ぐことが可能である。
【0025】
上記においては、温度制御可能なヒータブロック10を半導体素子1の中央部に対向する対向部2bに備える構成について説明したが、対向部2bを加熱できるものであればよく、例えば、高温ガスを対向部2bに吹付ける構成であっても利用できることは言うまでもない。
【0026】
【発明の効果】
以上説明したように、この発明の製造方法によれば、伝熱板と半導体素子との間に介在するはんだを溶融するステップと、伝熱板のうち半導体素子の中央部に対向する部分を他の部分に比し緩やかに冷却するステップとを備えることにより、はんだ層8内に発生する凹み9が、半導体素子1とはんだ層8との境界面の外縁部4aに発生することを防止できる。
【0027】
また、この発明によれば、はんだ亀裂の原因となる半導体素子1とはんだ層8との境界面における応力集中の発生が防止できるため、熱応力に強い半導体装置を得ることができる。
【図面の簡単な説明】
【図1】この発明に係る半導体装置の製造方法に用いる半導体製造装置の一実施の形態を説明する断面図である。
【図2】この実施の形態における溶融はんだの温度変化を示す特性図である。
【図3】この発明により製造された半導体装置の一実施の形態を説明する平面図である。
【図4】この発明の実施の形態による半導体装置を示し、図3における a− a線上の断面図である。
【図5】この発明の実施の形態2における半導体装置の製造方法に用いる半導体製造装置の一実施の形態を説明する断面図である。
【符号の説明】
1 半導体素子、2 伝熱板、2a 接触面、2b 対向部、2c 対向面、3 溶融はんだ、4 境界面、4a 外縁部、5 冷却プレート、8 はんだ層、9 凹み、10 ヒータブロック、11 温度制御装置。
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, to a measure against a dent generated due to volume shrinkage of molten solder when a semiconductor element is joined to a heat transfer plate via a solder layer.
[0002]
[Prior art]
Since power semiconductor elements such as power modules consume large power, it is necessary to secure a large area in contact with the heat transfer plate. Further, in order to reduce the temperature rise due to the heat generated by the power module, a material having a high thermal conductivity such as a copper plate is used for the heat transfer plate, and a method of improving the thermal expansion of soldering is adopted. Conventionally, a die bonding method has been employed as a method for soldering such a power semiconductor element such as a power module to a heat transfer plate. In this method, a semiconductor element is placed via a solder material foil on silver plating or the like that has been applied to a predetermined position of a heat transfer plate in advance, and the semiconductor element is heated and melted by heating and melting the solder material foil. It is a method of fixing to. At this time, if a gas is mixed in the solder layer to generate voids (voids), the heat resistance between the heat transfer plate and the semiconductor element increases, so that the heat radiation effect deteriorates. Also, when a semiconductor element is used, if the amount of heat generated by energization increases and the difference in the amount of thermal expansion between the heat transfer plate and the semiconductor element increases, cracks and the like are generated from the voids and the bonding state is impaired. Become.
For this reason, when soldering by the die bonding method, taper processing is performed on the interface with the solder layer, and vibration is applied to the heat transfer plate before the solder solidifies, so that voids do not remain in the solder layer. A method for obtaining a semiconductor device has been used (for example, see Patent Document 1).
[0003]
[Patent Document 1]
JP-A-9-82861 (page 3, right column, FIGS. 1 and 3)
[0004]
[Problems to be solved by the invention]
Since the conventional semiconductor device is configured as described above, it is possible to remove a relatively large void generated by the gas mixed in the solder layer before the solder solidifies. However, even after the gas is removed from the inside of the solder layer by such a method, a notch-shaped dent is generated at the boundary surface between the outer edge of the element and the solder.
[0005]
Usually, when the molten solder provided between the semiconductor element and the heat transfer plate is solidified by cooling from the heat transfer plate side, solidification occurs from the molten solder bonded to the heat transfer plate, and the solder crystal formed along with the solidification The lattice extends in the direction of the semiconductor element in the molten solder while branching. This phenomenon penetrates more remarkably than the solder portion where cooling proceeds rapidly. When the solder crystal lattice reaches a part of the boundary surface between the semiconductor element and the molten solder, the solidified part serves as a column between the semiconductor element and the heat transfer plate, so that the gap between the semiconductor element and the heat transfer plate is limited. Will be. The solder portion that subsequently solidifies is accompanied by volume shrinkage, and solidification proceeds from the heat transfer plate toward the semiconductor element while taking in a part of the unsolidified portion by the shrinkage force. Thus, when the solidification of the entire solder layer is completed, a notch-like recess is formed in a part of the solder at the boundary surface between the semiconductor element and the solder layer.
[0006]
When such a dent is generated particularly at the outer edge of the boundary surface between the semiconductor element and the solder layer, for example, when a silicon semiconductor element is bonded to a copper heat transfer plate via solder, the semiconductor element Because the coefficient of linear expansion of the heat transfer plate differs from that of the heat transfer plate, the heat transfer plate shrinks significantly at low temperatures (including when the temperature drops from the solidification temperature of the solder to room temperature). In this contracted state, a flat semiconductor element is placed on the heat transfer plate with the bowl turned down, and a stress is more strongly pulled by the solder layer toward the outer peripheral portion of the semiconductor element. At this time, if a dent is formed at the outer edge of the boundary surface, stress concentration around the dent increases, and when the allowable stress of the solder is exceeded, a crack develops, and there is a problem that solder connection cannot be maintained. .
[0007]
The present invention has been made in view of the above-described problems, and has been made in such a manner that a dent of a solder layer generated due to volume shrinkage at the time of solidification of solder remains at an outer edge of a boundary surface between a semiconductor element and a solder layer. It is an object of the present invention to provide a semiconductor device capable of preventing heat stress and having high thermal stress and a method of manufacturing the same.
[0008]
[Means for Solving the Problems]
The method of manufacturing a semiconductor device according to the present invention includes a step of melting solder interposed between the heat transfer plate and the semiconductor element; and a step of setting a portion of the heat transfer plate facing the center of the semiconductor element to another portion. And a step of cooling gently as compared with the above.
[0009]
The semiconductor device according to the present invention does not include a recess at the outer edge of the interface between the semiconductor element and the solder layer.
[0010]
BEST MODE FOR CARRYING OUT THE INVENTION
Embodiment 1 FIG.
FIG. 1 is a cross-sectional view illustrating an embodiment of a semiconductor manufacturing apparatus used in a method of manufacturing a semiconductor device according to the present invention, in which a semiconductor element and a heat transfer plate are soldered in a heating furnace (not shown). Indicates the state of attachment.
In FIG. 1, a semiconductor element 1 is mounted on a heat transfer plate 2 via a molten solder 3. The molten solder 3 is in contact with the semiconductor element 1 at the boundary surface 4 (including the outer edge 4a). The cooling plate 5, which is a cooling member having a hole at the center, is maintained at a low temperature by water cooling or air cooling, and is in contact with the heat transfer plate 2 at the contact surface 2a. A facing surface 2 c on the heat transfer plate 2 facing the contact surface 2 a is in contact with the molten solder 3. The hole provided in the center of cooling plate 5 is located in facing portion 2 b of heat transfer plate 2 facing the center of semiconductor element 1.
FIG. 2 is a characteristic diagram showing a temperature change of molten solder 3 in the first embodiment.
In FIG. 2, a temperature curve 6 indicates a temperature change of the contact surface 2 a of the heat transfer plate 2 in contact with the cooling plate 5, and a temperature curve 7 indicates a temperature change of the facing portion 2 b facing the center of the semiconductor element 1. Show. Time point A and time point B indicate the time point at which the molten solder 3 reaches the solidification temperature of 183 ° C.
[0011]
Next, a method for manufacturing a semiconductor device according to the first embodiment of the present invention will be described.
As an example of this manufacturing method, a ceramic semiconductor element having a thickness of 1 mm, a heat transfer plate using a copper material having a thickness of 4 mm, and a eutectic solder having a thickness of 0.2 mm (60 to 63% tin) were provided. A semiconductor device is manufactured.
[0012]
The semiconductor device before the heat transfer plate 2 and the semiconductor element 1 are soldered is heated to 250 ° C. in a heating furnace. At this time, if the solidification temperature exceeds 183 ° C., the eutectic solder interposed between the heat transfer plate 2 and the semiconductor element 1 is in a molten state.
[0013]
Next, in a state where the eutectic solder is melted, as shown in FIG. 1, a cooling plate 5 acting as a cold heat source of 40 ° C. is brought into contact with the heat transfer plate 2 to cool the contact surface 2 a of the heat transfer plate 2. As a result, the temperature of the contact surface 2a gradually decreases from 250 ° C. as shown by the temperature curve 6 in FIG. The temperature of the portion of the molten solder 3 in contact with the facing surface 2c facing the contact surface 2a similarly decreases due to heat conduction from the directly cooled contact surface 2a. On the other hand, since the opposed portion 2b facing the central portion of the semiconductor element 1 is not directly cooled by the cooling plate 5, the molten solder 3 in the portion in contact with the opposed portion 2b is not heated by the heat conduction from the contact surface 2a. The temperature decreases from 250 ° C. with a time delay as shown in FIG.
[0014]
When the temperature of the contact surface 2a of the heat transfer plate decreases, and reaches a solidification temperature of 183 ° C. at the time point A, the molten solder 3 in a portion in contact with the facing surface 2c of the heat transfer plate 2 starts to solidify. At this time, since the temperature of the molten solder 3 in contact with the facing portion 2b has not reached the solidification temperature of 183 ° C., the molten solder 3 in contact with the facing portion 2b is not solidified. As a result, solidification starts from the molten solder 3 in the portion in contact with the opposing surface 2c, and solidification proceeds while drawing a solder lump necessary for compensating for volume shrinkage in the solidification process from the molten solder 3 in the central portion of the semiconductor element 1. Go out. At this time, solidification of the molten solder 3 at the boundary surface 4 with the semiconductor element 1 occurs from a portion in contact with the outer edge 4a, and volume contraction occurs at the outer edge 4a.
[0015]
Further, when the temperature of the contact surface 2a of the heat transfer plate decreases, and the temperature of the opposing portion 2b decreases to the solidification temperature of 183 ° C. at the time point B, the molten solder 3 in the portion in contact with the opposing portion 2b solidifies. As a result, when the molten solder 3 at the portion in contact with the center of the boundary surface 4 between the semiconductor element 1 and the molten solder 3 solidifies, the solidification of the entire solder layer is completed. The time difference between the time point A and the time point B in this embodiment was 1 second.
[0016]
At this time, solidification of the molten solder 3 at the boundary surface 4 with the semiconductor element 1 proceeds from the molten solder 3 on the outer edge 4 a toward the center of the semiconductor element 1. Therefore, at the outer edge 4a of the boundary surface, the volume shrinkage caused by the solidification of the molten solder 3 is filled by drawing the molten solder 3 at the center of the semiconductor 1, so that the solidified solder layer 8 is filled in the solder layer 8 after solidification. The generated dent 9 is not formed on the outer edge 4a of the boundary surface between the semiconductor element 1 and the solder layer 8.
[0017]
In the above description, the configuration in which the molten solder 7 is cooled by bringing the cooling plate 5 having the hole into contact with the heat transfer plate 2 has been described. However, the portion of the heat transfer plate 2 facing the central portion of the semiconductor element 1 has been described. If the cooling means can be cooled more slowly than other parts, it is possible to prevent the recess 9 from being formed on the outer edge 4a of the boundary surface between the semiconductor element 1 and the solder layer 8, so that, for example, a cooling fan or a cool air injection hole is used. Needless to say, a configuration in which the heat transfer plate other than the portion facing the center of the semiconductor element 1 is cooled can also be used.
[0018]
Next, a semiconductor device manufactured by this manufacturing method will be described.
FIG. 3 is a plan view illustrating one embodiment of a semiconductor device manufactured according to the present invention.
In FIG. 3, the semiconductor element 1 is joined onto the heat transfer plate 2 via a solidified solder layer 8.
FIG. 4 is a cross-sectional view of the semiconductor device according to the embodiment of the present invention, taken along line aa in FIG.
In FIG. 4, a recess 9 is formed in a boundary surface 4 between the semiconductor element 1 and the solder layer 8.
[0019]
In the semiconductor device thus configured, since the solder layer 8 does not include the recess 9 at the outer edge 4a of the boundary surface with the semiconductor element 1, the fillet at the boundary surface between the semiconductor element 1 and the solder layer 8 is uniform. It is possible to obtain a semiconductor device that is resistant to thermal stress because it can be formed into a shape of natural contraction resistant to stress, and the occurrence of stress concentration at the outer edge portion 4a of the boundary surface of the semiconductor element 1 that causes solder cracks. Can be.
[0020]
Embodiment 2 FIG.
FIG. 5 is a cross-sectional view illustrating an embodiment of a semiconductor manufacturing apparatus used in a method of manufacturing a semiconductor device according to a second embodiment of the present invention, in which a semiconductor element and a heat transfer element are connected in a heating furnace (not shown). The state where a board is soldered is shown.
In FIG. 5, in addition to the embodiment of FIG. 1, a heater block 10 which is a temperature-controlled member has a transmission plate facing the central portion of semiconductor element 1 through a hole provided in the central portion of cooling plate 5. The heater block 10 is provided so as to be in contact with the facing portion 2 b on the hot plate 2, and is connected to the temperature control device 11.
[0021]
Next, a method for manufacturing a semiconductor device according to the second embodiment of the present invention will be described.
According to the second embodiment of FIG. 5, in a state where the eutectic solder is molten, cooling plate 5 is brought into contact with contact surface 2a of heat transfer plate 2 to cool molten solder 3 and, at the same time, heater block 10 is turned off. The molten solder 3 in the portion in contact with the opposing portion 2b is heated by bringing it into contact with the opposing portion 2b opposing the central portion of the semiconductor element 1. At this time, the portion of the molten solder 3 in contact with the opposing surface 2c on the heat transfer plate 2 opposing the contact surface 2a is dissipated by heat conduction from the directly cooled contact surface 2a, as shown by the above-mentioned temperature curve 6. The temperature gradually decreases from ℃. On the other hand, the temperature of the portion of the molten solder 3 that is in contact with the facing portion 2b is heated by the heater block 10 whose temperature can be controlled, so that the temperature drop differs.
[0022]
When the temperature of the contact surface 2a of the heat transfer plate lowers and reaches a solidification temperature of 183 ° C. at a time point A, the molten solder 3 in a portion in contact with the facing surface 2c starts to solidify. At this time, the portion of the molten solder 3 in contact with the facing portion 2b is heated by the heater block 10, so that heat conduction from the heat transfer plate 2a to the facing portion 2b is cut off, and the facing portion 2b is heated by the heater block 10. If this is continued, the temperature of the molten solder 3 in the portion in contact with the facing portion 2b does not drop to the solidification temperature and does not solidify.
As a result, solidification starts from the molten solder 3 in the portion in contact with the facing surface 2c, and solidification proceeds while drawing a solder mass necessary for volume shrinkage in the solidification process from the molten solder 3 in the center of the semiconductor element 1. At this time, solidification of the molten solder 3 at the boundary surface 4 with the semiconductor element 1 occurs from a portion in contact with the outer edge 4a, and volume contraction occurs at the outer edge 4a.
[0023]
Next, when the temperature setting of the heater block 10 is changed by the temperature control device 11 to cool the facing portion 2b, if the temperature of the molten solder 3 in the portion in contact with the facing portion 2b drops to the solidification temperature of 183 ° C. Then, the molten solder 3 in the portion solidifies. Thus, when the molten solder 3 in contact with the central portion of the semiconductor element 1 solidifies, the solidification of the entire solder layer is completed.
[0024]
In the method of manufacturing a semiconductor device configured as described above, by heating the facing portion 2 b on the heat transfer plate 2 facing the center of the semiconductor element 1, the molten solder 3 in contact with the center of the semiconductor element 1 is heated. The start time of solidification can be freely changed, and the molten solder 3 at the outer edge 4a of the semiconductor element 1 is cooled first, and after solidification, the molten solder 3 at the center of the semiconductor element 1 is solidified. Therefore, it is possible to more reliably prevent the depression 9 from being formed in the outer edge portion 4a of the boundary surface between the semiconductor element 1 and the solder layer 8 after solidification. In particular, only by cooling the contact surface 2a of the heat transfer plate, a sufficient time difference due to heat conduction between the solidification of the molten solder 3 contacting the outer edge 4a of the boundary surface 4 and the solidification of the molten solder 3 contacting the center cannot be ensured. In this case, it is possible to prevent the depression 9 from being formed at the outer edge 4a of the boundary surface between the semiconductor element 1 and the solder layer 8.
[0025]
In the above description, the configuration in which the heater block 10 capable of controlling the temperature is provided in the facing portion 2b facing the central portion of the semiconductor element 1 has been described. However, any structure capable of heating the facing portion 2b may be used. It goes without saying that a configuration in which the spray is applied to the portion 2b can be used.
[0026]
【The invention's effect】
As described above, according to the manufacturing method of the present invention, the step of melting the solder interposed between the heat transfer plate and the semiconductor element, and the step of adding the portion of the heat transfer plate facing the central portion of the semiconductor element to another And a step of cooling more slowly than the portion described above, it is possible to prevent the depression 9 generated in the solder layer 8 from being generated in the outer edge portion 4a of the boundary surface between the semiconductor element 1 and the solder layer 8.
[0027]
Further, according to the present invention, since the occurrence of stress concentration at the interface between the semiconductor element 1 and the solder layer 8, which causes solder cracks, can be prevented, a semiconductor device resistant to thermal stress can be obtained.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view illustrating an embodiment of a semiconductor manufacturing apparatus used in a method of manufacturing a semiconductor device according to the present invention.
FIG. 2 is a characteristic diagram showing a temperature change of molten solder in this embodiment.
FIG. 3 is a plan view illustrating one embodiment of a semiconductor device manufactured according to the present invention.
FIG. 4 is a cross-sectional view of the semiconductor device according to the embodiment of the present invention, taken along line aa in FIG. 3;
FIG. 5 is a sectional view illustrating an embodiment of a semiconductor manufacturing apparatus used in a method of manufacturing a semiconductor device according to a second embodiment of the present invention.
[Explanation of symbols]
REFERENCE SIGNS LIST 1 semiconductor element, 2 heat transfer plate, 2 a contact surface, 2 b opposing portion, 2 c opposing surface, 3 molten solder, 4 boundary surface, 4 a outer edge, 5 cooling plate, 8 solder layer, 9 dent, 10 heater block, 11 temperature Control device.

Claims (4)

伝熱板と半導体素子との間に介在するはんだを溶融するステップと、前記伝熱板のうち前記半導体素子の中央部に対向する部分を他の部分に比し緩やかに冷却するステップとを備えた半導体装置の製造方法。A step of melting solder interposed between the heat transfer plate and the semiconductor element, and a step of gently cooling a portion of the heat transfer plate facing the central portion of the semiconductor element as compared to other portions. Semiconductor device manufacturing method. 緩やかに冷却するステップは、中央部に孔を有する冷却部材を前記伝熱板に接触させることにより行うことを特徴とする請求項1に記載の半導体装置の製造方法。2. The method according to claim 1, wherein the step of gently cooling is performed by bringing a cooling member having a hole in a central portion into contact with the heat transfer plate. 緩やかに冷却するステップは、中央部に孔を有する冷却部材を前記伝熱板に接触させると共に、前記孔を介して温度制御された部材を前記伝熱板に接触させることにより行うことを特徴とする請求項1に記載の半導体装置の製造方法The step of gently cooling is performed by bringing a cooling member having a hole in a central portion into contact with the heat transfer plate, and by bringing a temperature-controlled member into contact with the heat transfer plate through the hole. 2. The method of manufacturing a semiconductor device according to claim 1, 伝熱板と、この伝熱板にはんだ層を介して接合される半導体素子を備えた半導体装置において、前記はんだ層は前記半導体素子との境界面の外縁部に凹みを含まないことを特徴とする半導体装置。In a semiconductor device including a heat transfer plate and a semiconductor element bonded to the heat transfer plate via a solder layer, the solder layer does not include a recess at an outer edge of a boundary surface with the semiconductor element. Semiconductor device.
JP2003147400A 2003-05-26 2003-05-26 Manufacturing method of semiconductor device Expired - Fee Related JP4023388B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2003147400A JP4023388B2 (en) 2003-05-26 2003-05-26 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003147400A JP4023388B2 (en) 2003-05-26 2003-05-26 Manufacturing method of semiconductor device

Publications (2)

Publication Number Publication Date
JP2004349605A true JP2004349605A (en) 2004-12-09
JP4023388B2 JP4023388B2 (en) 2007-12-19

Family

ID=33533938

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003147400A Expired - Fee Related JP4023388B2 (en) 2003-05-26 2003-05-26 Manufacturing method of semiconductor device

Country Status (1)

Country Link
JP (1) JP4023388B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009076595A (en) * 2007-09-19 2009-04-09 Canon Machinery Inc Mounting device for electronic component
JP5751258B2 (en) * 2011-01-07 2015-07-22 富士電機株式会社 Manufacturing method of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009076595A (en) * 2007-09-19 2009-04-09 Canon Machinery Inc Mounting device for electronic component
JP5751258B2 (en) * 2011-01-07 2015-07-22 富士電機株式会社 Manufacturing method of semiconductor device

Also Published As

Publication number Publication date
JP4023388B2 (en) 2007-12-19

Similar Documents

Publication Publication Date Title
US8791564B2 (en) Method of Manufacturing a semiconductor module and device for the same
CN108367994A (en) Copper ceramic substrate, the copper semi-finished product for preparing copper ceramic substrate and the method for preparing copper ceramic substrate
CN106856180B (en) A method of welding IGBT module
JP2008311294A (en) Method of manufacturing substrate for power module
US8274164B2 (en) Less expensive high power plastic surface mount package
JP2008235672A (en) Semiconductor device and its manufacturing method
JP4757880B2 (en) Method for manufacturing electronic component, method for manufacturing heat conductive member, and method for mounting heat conductive member for electronic component
JP5751258B2 (en) Manufacturing method of semiconductor device
JP4023388B2 (en) Manufacturing method of semiconductor device
JP2748870B2 (en) Board connection method
JP6710155B2 (en) Power semiconductor module and method of manufacturing power semiconductor module
JP2004327711A (en) Semiconductor module
JP4013423B2 (en) Bonded body of ceramic layer and metal conductor layer
JPH08236918A (en) Method for mounting electronic parts
KR102039791B1 (en) Mounting method of semiconductor chip and semiconductor chip package
JP2003258172A (en) Method for assembling multi-chip module
JP2015088683A (en) Thermal interface sheet and processor
JP2005252136A (en) Aluminum-ceramic junction substrate, and manufacturing method thereof
JP2010283169A (en) Method of manufacturing semiconductor device
JP2007214241A (en) Method and device for mounting semiconductor chip
JP2003046211A (en) Electronic component mounting structure
JP7561969B2 (en) Semiconductor device and method for manufacturing the same
JP3885745B2 (en) Radiator, power module substrate using this radiator, power module, and method of manufacturing radiator
JP2008027935A (en) Power semiconductor device
JPH02244731A (en) Fixing method for electronic component

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20051102

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20070704

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20070710

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070816

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20070911

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20070924

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20101012

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20111012

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20121012

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20131012

Year of fee payment: 6

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees