JP2008235672A - Semiconductor device and its manufacturing method - Google Patents

Semiconductor device and its manufacturing method Download PDF

Info

Publication number
JP2008235672A
JP2008235672A JP2007074760A JP2007074760A JP2008235672A JP 2008235672 A JP2008235672 A JP 2008235672A JP 2007074760 A JP2007074760 A JP 2007074760A JP 2007074760 A JP2007074760 A JP 2007074760A JP 2008235672 A JP2008235672 A JP 2008235672A
Authority
JP
Japan
Prior art keywords
circuit board
bonding
metal plate
heat dissipation
bonded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2007074760A
Other languages
Japanese (ja)
Inventor
Akiko Kumano
明子 熊野
Yuri Otobe
優里 音部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toyota Industries Corp
Original Assignee
Toyota Industries Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toyota Industries Corp filed Critical Toyota Industries Corp
Priority to JP2007074760A priority Critical patent/JP2008235672A/en
Publication of JP2008235672A publication Critical patent/JP2008235672A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]

Landscapes

  • Cooling Or The Like Of Electrical Apparatus (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To prevent the generation of a warp or a crack by thermal stress while a structure of a circuit board is simplified, and to provide a superior radiation property. <P>SOLUTION: At the time of brazing a circuit board and a heat sink 13, a release agent 19 is arranged in a bonding interface of a back metal plate 16. A wax material 17 is melted and flocculated so as to perform brazing in a state that the circuit board, the heat sink 13 and the wax material 17 are laminated. A non-bonding region which is not bonded to the back metal plate 16 and the heat sink 13 is formed by the release agent 19. Thermal stress can be alleviated by the non-bonding region. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、回路基板に放熱装置を接合した半導体装置、及びその半導体装置の製造方法に関する。   The present invention relates to a semiconductor device in which a heat dissipation device is bonded to a circuit board, and a method for manufacturing the semiconductor device.

従来、窒化アルミニウムなどのセラミックス基板(絶縁基板)の表裏両面に純アルミニウムなどの金属板を接合した回路基板に放熱装置(ヒートシンク)を接合してモジュール化した半導体モジュールが知られている。この種の半導体モジュールでは、回路基板の表面金属板に半田付けなどにより接合した半導体素子の発する熱を、裏面金属板に接合した放熱装置から放熱するようになっている。ところで、半導体モジュールでは、放熱装置の放熱性能が長期間にわたって維持されることが要求されているが、従来の構成によれば、使用条件によってはセラミックス基板、金属板及び放熱装置との線熱膨張係数の相違に起因して発生する熱応力によって接合部にクラックや反りが生じ、放熱性能が低下する虞がある。   2. Description of the Related Art Conventionally, a semiconductor module is known in which a heat dissipation device (heat sink) is bonded to a circuit board in which a metal plate such as pure aluminum is bonded to both front and back surfaces of a ceramic substrate (insulating substrate) such as aluminum nitride. In this type of semiconductor module, the heat generated by the semiconductor element bonded to the front surface metal plate of the circuit board by soldering or the like is radiated from the heat dissipation device bonded to the back surface metal plate. By the way, in the semiconductor module, it is required that the heat dissipation performance of the heat dissipation device is maintained over a long period of time. However, according to the conventional configuration, the linear thermal expansion between the ceramic substrate, the metal plate, and the heat dissipation device depends on the use conditions. There is a possibility that the thermal stress generated due to the difference in the coefficients may cause cracks and warpage in the joint, resulting in deterioration of the heat dissipation performance.

そこで、従来、このような問題を解決するために、特許文献1に記載の半導体モジュールが提案されている。特許文献1に記載の半導体モジュールは、裏面側の金属板に所定深さの段差、溝、凹陥部で形成した熱応力緩和部を設け、熱応力を緩和させている。そして、特許文献1に記載の半導体モジュールでは、表面側の金属板に対する裏面側の金属板の体積比が0.6以下となるように熱応力緩和部を設けている。
特開2003−17627号公報
Therefore, conventionally, in order to solve such a problem, a semiconductor module described in Patent Document 1 has been proposed. The semiconductor module described in Patent Document 1 is provided with a thermal stress relaxation portion formed of a step, a groove, and a concave portion having a predetermined depth on a metal plate on the back surface side to relax thermal stress. In the semiconductor module described in Patent Document 1, the thermal stress relaxation portion is provided so that the volume ratio of the metal plate on the back surface side to the metal plate on the front surface side is 0.6 or less.
JP 2003-17627 A

ところで、特許文献1では、裏面側の金属板に対して熱応力緩和部を直接形成しているので、回路基板の構造が複雑化し、製造し難い。また、通常、回路基板と放熱装置は、回路基板と放熱装置との間にろう材の一種である半田などの金属接合材を配置し、溶融凝固させることによって接合している。特許文献1では、製造時に、溶融した半田が金属板に形成した熱応力緩和部としての段差や溝などに流れ込んで凝固すると、熱応力緩和部の形成部位においても回路基板と放熱装置とが接合されることになり、熱応力緩和部として機能しなくなるおそれがある。   By the way, in patent document 1, since the thermal stress relaxation part is directly formed with respect to the metal plate of the back side, the structure of a circuit board becomes complicated and it is difficult to manufacture it. In general, the circuit board and the heat radiating device are bonded together by disposing a metal bonding material such as solder, which is a kind of brazing material, between the circuit board and the heat radiating device, and melting and solidifying the metal bonding material. In Patent Document 1, when the molten solder flows into a step or a groove as a thermal stress relaxation portion formed on a metal plate and solidifies during manufacture, the circuit board and the heat dissipation device are bonded to each other even at the portion where the thermal stress relaxation portion is formed. As a result, there is a possibility that it will not function as a thermal stress relaxation part.

この発明は、このような従来の技術に存在する問題点に着目してなされたものであり、その目的は、回路基板の構造を簡素化しつつ、熱応力による反りやクラックの発生を防止するとともに、優れた放熱性能を得ることができる半導体装置、及びその半導体装置の製造方法を提供することにある。   The present invention has been made paying attention to such problems existing in the prior art, and its purpose is to simplify the structure of the circuit board and prevent warpage and cracking due to thermal stress. An object of the present invention is to provide a semiconductor device capable of obtaining excellent heat dissipation performance and a method for manufacturing the semiconductor device.

上記問題点を解決するために、請求項1に記載の発明は、半導体素子の搭載面を有する回路基板と放熱装置を金属接合材で接合した半導体装置において、前記回路基板の接合界面及び前記放熱装置の接合界面の少なくともいずれか一方の接合界面に、前記回路基板と前記放熱装置とが接合されない非接合領域を形成する接合防止材を設けたことを要旨とする。   In order to solve the above problems, the invention according to claim 1 is a semiconductor device in which a circuit board having a mounting surface of a semiconductor element and a heat dissipation device are bonded with a metal bonding material, and a bonding interface between the circuit board and the heat dissipation. The gist is that a bonding preventing material for forming a non-bonded region where the circuit board and the heat dissipation device are not bonded is provided at least one of the bonding interfaces of the device.

請求項4に記載の発明は、半導体素子の搭載面を有する回路基板と放熱装置を金属接合材で接合した半導体装置の製造方法において、前記回路基板の接合界面及び前記放熱装置の接合界面の少なくともいずれか一方の接合界面に、前記回路基板と前記放熱装置とが接合されない非接合領域を形成する接合防止材を設けるとともに前記回路基板と前記放熱装置の間に前記金属接合材を配置し、前記金属接合材を溶融温度以上の温度まで加熱して溶融した後に前記金属接合材を前記溶融温度未満の温度まで下げて凝固させることにより、前記回路基板と前記放熱装置を接合することを要旨とする。   According to a fourth aspect of the present invention, there is provided a semiconductor device manufacturing method in which a circuit board having a semiconductor element mounting surface and a heat radiating device are bonded with a metal bonding material, at least of a bonding interface of the circuit board and a bonding interface of the heat radiating device. A bonding preventing material for forming a non-bonded region where the circuit board and the heat dissipation device are not bonded to each other is provided at the bonding interface, and the metal bonding material is disposed between the circuit board and the heat dissipation device, The gist is to bond the circuit board and the heat dissipation device by heating the metal bonding material to a temperature equal to or higher than the melting temperature and then solidifying the metal bonding material by lowering the metal bonding material to a temperature lower than the melting temperature. .

請求項1及び請求項4に記載の発明によれば、接合界面に設けた接合防止材により、回路基板と放熱装置とが接合されない非接合領域が形成される。このため、回路基板、及び放熱装置との線熱膨張係数の相違に起因して熱応力が発生した場合でも接合領域の熱応力が分散され、その結果、応力が緩和される。このため、反りやクラックの発生が防止され、放熱性能が維持される。また、接合界面に接合防止材を設ける構成を採用したので、回路基板に直接、熱応力を緩和させる構成を設ける必要がなく、回路基板の構造を簡素化できる。   According to the first and fourth aspects of the invention, the non-bonding region where the circuit board and the heat dissipation device are not bonded is formed by the bonding preventing material provided at the bonding interface. For this reason, even when a thermal stress occurs due to a difference in coefficient of linear thermal expansion between the circuit board and the heat dissipation device, the thermal stress in the bonding region is dispersed, and as a result, the stress is relaxed. For this reason, generation | occurrence | production of a curvature and a crack is prevented and heat dissipation performance is maintained. Moreover, since the structure which provides a joining prevention material in a joining interface was employ | adopted, it is not necessary to provide the structure which relieves a thermal stress directly in a circuit board, and can simplify the structure of a circuit board.

請求項2に記載の発明は、請求項1に記載の半導体装置において、前記接合防止材は、離型剤又は酸化皮膜からなることを要旨とする。
これによれば、半導体装置の製造時に、回路基板に配置した離型剤又は酸化皮膜の作用によって金属接合材を濡れない領域が作られ、この濡れない領域が非接合領域として形成されることになる。したがって、非接合領域を回路基板自体に加工を施すことなく、容易に作り出すことができる。
The invention according to claim 2 is the semiconductor device according to claim 1, wherein the bonding preventing material is made of a release agent or an oxide film.
According to this, at the time of manufacturing the semiconductor device, a region that does not wet the metal bonding material is created by the action of the release agent or oxide film disposed on the circuit board, and this non-wetting region is formed as a non-bonding region. Become. Therefore, the non-bonded region can be easily created without processing the circuit board itself.

請求項3に記載の発明は、請求項1又は請求項2に記載の半導体装置において、前記回路基板と前記放熱装置の金属接合層には、当該金属接合層の厚みを規定する厚み規定部材が配置されていることを要旨とする。   According to a third aspect of the present invention, in the semiconductor device according to the first or second aspect, a thickness defining member that defines a thickness of the metal bonding layer is provided on the metal bonding layer of the circuit board and the heat dissipation device. The gist is that it is arranged.

これによれば、回路基板と放熱装置は、所定の厚みを有する接合層を介して接合されることになる。したがって、接合層の厚みを熱応力緩和に必要な面積と高さに維持することができ、熱応力による反りやクラックの発生を防止しつつ、優れた放熱性能を得ることができる。   According to this, the circuit board and the heat radiating device are bonded via the bonding layer having a predetermined thickness. Therefore, the thickness of the bonding layer can be maintained at the area and height necessary for thermal stress relaxation, and excellent heat dissipation performance can be obtained while preventing warpage and cracks due to thermal stress.

請求項5に記載の発明は、請求項4に記載の半導体装置の製造方法において、前記回路基板と前記放熱装置の間には、前記金属接合材として複数の孔を形成したろう材を配置し、前記孔に対応する位置に前記接合防止材を設けることを要旨とする。これによれば、回路基板と放熱装置との非接合領域をより確実に作り出すことができる。   According to a fifth aspect of the present invention, in the method of manufacturing a semiconductor device according to the fourth aspect, a brazing material in which a plurality of holes are formed as the metal bonding material is disposed between the circuit board and the heat dissipation device. The gist is to provide the bonding preventing material at a position corresponding to the hole. According to this, the non-joining area | region of a circuit board and a thermal radiation apparatus can be produced more reliably.

本発明によれば、回路基板の構造を簡素化しつつ、熱応力による反りやクラックの発生を防止する一方で、優れた放熱性能を得ることができる。   According to the present invention, while simplifying the structure of a circuit board, it is possible to obtain excellent heat dissipation performance while preventing warpage and cracking due to thermal stress.

以下、本発明を具体化した一実施形態を図1〜図3にしたがって説明する。
図1及び図2に示すように、半導体装置としての半導体モジュール10は、回路基板11と、回路基板11上に半田付けにより接合された電子部品としての複数の半導体素子12と、放熱装置としてのヒートシンク13とから構成されている。回路基板11は、セラミックス基板(絶縁基板)14の表裏両面に表金属板(金属回路板)15と裏金属板16を接合して構成されている。セラミックス基板14は、図2において上側が半導体素子12の搭載面となる表面側とされており、半導体素子12の搭載面には配線層として機能する表金属板15が接合されている。そして、半導体素子12は、半田層H1を介して表金属板15に接合されている。半導体素子12としては、例えばIGBT(Insulated Gate Bipolar Transistor )やダイオードが用いられている。
Hereinafter, an embodiment embodying the present invention will be described with reference to FIGS.
As shown in FIGS. 1 and 2, a semiconductor module 10 as a semiconductor device includes a circuit board 11, a plurality of semiconductor elements 12 as electronic components joined to the circuit board 11 by soldering, and a heat dissipation device. And a heat sink 13. The circuit board 11 is configured by bonding a front metal plate (metal circuit board) 15 and a back metal plate 16 to both front and back surfaces of a ceramic substrate (insulating substrate) 14. The upper side of the ceramic substrate 14 in FIG. 2 is the surface side on which the semiconductor element 12 is mounted, and a surface metal plate 15 that functions as a wiring layer is bonded to the mounting surface of the semiconductor element 12. The semiconductor element 12 is bonded to the front metal plate 15 via the solder layer H1. As the semiconductor element 12, for example, an IGBT (Insulated Gate Bipolar Transistor) or a diode is used.

一方、セラミックス基板14には、図2において下側となる裏面側にセラミックス基板14とヒートシンク13とを接合(金属接合)する接合層として機能する裏金属板16が接合されている。そして、裏金属板16は、ヒートシンク13に対して金属接合材としてのろう材17により直接、ろう付けされている。図2の符号「H2」は、金属接合層としてのろう付け層を示している。   On the other hand, a back metal plate 16 that functions as a bonding layer for bonding (metal bonding) the ceramic substrate 14 and the heat sink 13 is bonded to the ceramic substrate 14 on the lower surface side in FIG. The back metal plate 16 is directly brazed to the heat sink 13 by a brazing material 17 as a metal bonding material. Reference numeral “H2” in FIG. 2 indicates a brazing layer as a metal bonding layer.

セラミックス基板14は、窒化アルミニウム、アルミナ、窒化ケイ素などにより形成されている。表金属板15及び裏金属板16は、純アルミニウム(例えば、工業用純アルミニウムである1000系アルミニウム)や銅により形成されている。そして、本実施形態の回路基板11では、セラミックス基板14に接合する表金属板15及び裏金属板16の厚みを同一に設定している。また、ヒートシンク13は、表金属板15及び裏金属板16と同じ種類の材質で形成されている。また、半田には、鉛半田や鉛フリー半田などが用いられる。また、ろう材17には、Al−Si系合金(4000系など)などからなるアルミニウムろう材などが用いられる。   The ceramic substrate 14 is made of aluminum nitride, alumina, silicon nitride, or the like. The front metal plate 15 and the back metal plate 16 are made of pure aluminum (for example, 1000 series aluminum which is industrial pure aluminum) or copper. And in the circuit board 11 of this embodiment, the thickness of the front metal plate 15 and the back metal plate 16 joined to the ceramic substrate 14 is set to be the same. The heat sink 13 is formed of the same type of material as the front metal plate 15 and the back metal plate 16. Moreover, lead solder, lead-free solder, etc. are used for solder. As the brazing material 17, an aluminum brazing material made of an Al—Si based alloy (such as 4000 series) is used.

このように構成した半導体モジュール10は、例えば電動モータを駆動源の一部とするハイブリッドカーなどの車両に適用されることにより、車両の運転状況に応じて電動モータに供給する電力を制御する。そして、半導体素子12から発せられた熱は、回路基板11を介してヒートシンク13に伝えられ、ヒートシンク13の冷媒流路13aを流れる冷却媒体に放熱される。   The semiconductor module 10 configured as described above is applied to a vehicle such as a hybrid car having an electric motor as a part of a drive source, for example, thereby controlling electric power supplied to the electric motor according to the driving situation of the vehicle. The heat generated from the semiconductor element 12 is transmitted to the heat sink 13 via the circuit board 11 and is radiated to the cooling medium flowing through the refrigerant flow path 13a of the heat sink 13.

半導体素子12から発せられた熱がヒートシンク13に伝わった際には、回路基板11及びヒートシンク13は高温となり、熱膨張する。一方、半導体素子12からの発熱が停止すると、回路基板11及びヒートシンク13の温度は常温まで低下し、熱収縮する。そして、熱膨張及び熱収縮の際には、各部材(ヒートシンク13、セラミックス基板14、表金属板15、裏金属板16)の線熱膨張係数の相違に起因し、熱応力が発生する。このため、本実施形態の半導体モジュール10は、熱応力を緩和させるための熱応力緩和構造を採用することにより、クラックの発生や反りなどの発生を防止し、放熱性能を長期間にわたって維持させる構成となっている。   When the heat generated from the semiconductor element 12 is transmitted to the heat sink 13, the circuit board 11 and the heat sink 13 become high temperature and thermally expand. On the other hand, when the heat generation from the semiconductor element 12 is stopped, the temperatures of the circuit board 11 and the heat sink 13 are lowered to room temperature and thermally contracted. In thermal expansion and thermal contraction, thermal stress is generated due to the difference in the linear thermal expansion coefficient of each member (heat sink 13, ceramic substrate 14, front metal plate 15, back metal plate 16). For this reason, the semiconductor module 10 of the present embodiment employs a thermal stress relaxation structure for relaxing thermal stress, thereby preventing the occurrence of cracks and warping and maintaining the heat dissipation performance over a long period of time. It has become.

以下、本実施形態の熱応力緩和構造について具体的に説明する。
本実施形態の半導体モジュール10では、熱応力を緩和させるために、ヒートシンク13と裏金属板16の接合面積(接合率)を、ヒートシンク13と裏金属板16の接合面全体の面積に対して65%〜85%の範囲としている。換言すれば、本実施形態の半導体モジュール10では、ヒートシンク13と裏金属板16とが接合されない非接合領域が形成されている。なお、接合面はヒートシンク13と裏金属板16を接合する際にろう付けを行う面であり、接合面積はろう付けによって金属接合させる面積である。例えば、裏金属板16のろう付けを行う面を27mm×27mmの正方形とした場合、接合面全体の面積は27mm×27mm=729mmとなる。そして、この面積(729mm)に対する接合面積65%〜85%の範囲とは、473.85mm〜619.65mmの範囲となる。
Hereinafter, the thermal stress relaxation structure of this embodiment will be specifically described.
In the semiconductor module 10 of this embodiment, in order to reduce thermal stress, the bonding area (bonding rate) between the heat sink 13 and the back metal plate 16 is set to 65 with respect to the entire area of the bonding surface between the heat sink 13 and the back metal plate 16. % To 85%. In other words, in the semiconductor module 10 of the present embodiment, a non-joined region where the heat sink 13 and the back metal plate 16 are not joined is formed. The joining surface is a surface to be brazed when joining the heat sink 13 and the back metal plate 16, and the joining area is an area to be metal joined by brazing. For example, when the surface on which the back metal plate 16 is brazed is a square of 27 mm × 27 mm, the area of the entire bonding surface is 27 mm × 27 mm = 729 mm 2 . And the range of the joining area of 65% to 85% with respect to this area (729 mm 2 ) is the range of 473.85 mm 2 to 619.65 mm 2 .

接合面積(接合率)の範囲(65%〜85%)は、放熱性能と熱応力の緩和の点から好ましいと考えられる範囲を設定している。なお、熱抵抗値と接合率は、接合率を下げると熱抵抗値が上昇して伝熱特性が低下し、接合率を上げると熱抵抗値が下降して伝熱特性が向上する関係を有している。そして、半導体モジュール10では、放熱性能を向上させる必要があるが、その一方で、熱応力を緩和させる必要もある。このため放熱性能を優先させるためには、接合率を100%に近づけることが最良となるが、この場合には熱応力を緩和することができなくなる。一方で、熱応力の緩和を優先させるためには、接合率を下げること(すなわち、非接合領域を多く作ること)が最良となるが、この場合には熱抵抗値が上昇して放熱性能が低下することになる。したがって、接合率は、放熱性能と熱応力の緩和の双方のバランスを考えて設定することが好ましい。   The range (65% to 85%) of the bonding area (bonding rate) is set to be a preferable range in terms of heat dissipation performance and thermal stress relaxation. It should be noted that the thermal resistance value and the bonding rate have a relationship that when the bonding rate is lowered, the thermal resistance value increases and the heat transfer characteristics are lowered, and when the bonding rate is raised, the thermal resistance value is lowered and the heat transfer characteristics are improved. is doing. And in the semiconductor module 10, although it is necessary to improve heat dissipation performance, on the other hand, it is also necessary to relieve a thermal stress. For this reason, in order to prioritize the heat dissipation performance, it is best to make the joining rate close to 100%, but in this case, the thermal stress cannot be relaxed. On the other hand, in order to prioritize the relaxation of thermal stress, it is best to lower the bonding rate (that is, to create more non-bonded regions), but in this case the thermal resistance value increases and the heat dissipation performance is reduced. Will be reduced. Therefore, it is preferable to set the bonding rate in consideration of the balance between both heat radiation performance and thermal stress relaxation.

そして、本実施形態では、ヒートシンク13と裏金属板16の非接合領域を形成するために、図3(b)に示すように裏金属板16の接合界面に接合防止材となる離型剤19を配置している。離型剤19には、例えば、アルミダイカスト用途の離型剤などが用いられる。離型剤19を配置した場合には、離型剤19によって溶融したろう材17が弾かれることでろう材17が濡れず、その濡れない部分(不濡れの部分)が非接合領域となる。すなわち、本実施形態の熱応力緩和構造では、ろう付けの際にろう材17が濡れない部分を意図的に作り出し、ろう付け層H2を熱応力緩和部として機能させるようになっている。   And in this embodiment, in order to form the non-joining area | region of the heat sink 13 and the back metal plate 16, the mold release agent 19 used as a joining prevention material in the joining interface of the back metal plate 16 as shown in FIG.3 (b). Is arranged. As the release agent 19, for example, a release agent for aluminum die casting is used. When the release agent 19 is disposed, the brazing material 17 melted by the release agent 19 is repelled so that the brazing material 17 does not get wet, and the non-wetting portion (non-wetting portion) becomes a non-bonding region. That is, in the thermal stress relaxation structure of the present embodiment, a portion where the brazing material 17 does not get wet during brazing is intentionally created so that the brazing layer H2 functions as a thermal stress relaxation portion.

本実施形態においてろう材17は、図3(a),(b)に示すようにシート状(板状)に形成されており、ろう材17の厚み方向に貫通する平面視円形をなす複数個(本実施形態では36個)の貫通孔18が形成されている。貫通孔18は、ろう材17の周縁部位を中心に配列されている。そして、図3(b)に示すように、ろう付けを行う際には、裏金属板16においてろう材17の貫通孔18に対応する部位に離型剤19を配置することにより、貫通孔18に対応する部位が非接合領域(ろう材17が濡れないところ)となる。図3(a)に示す二点鎖線の領域は、ヒートシンク13と裏金属板16が接合される接合領域を示し、二点鎖線を付していない領域が離型剤19の配置により非接合領域として形成される領域である。   In the present embodiment, the brazing material 17 is formed in a sheet shape (plate shape) as shown in FIGS. 3A and 3B, and a plurality of brazing materials 17 having a circular shape in plan view that penetrates in the thickness direction of the brazing material 17. Through holes 18 are formed (36 in the present embodiment). The through holes 18 are arranged around the peripheral portion of the brazing material 17. Then, as shown in FIG. 3B, when performing brazing, the mold release agent 19 is disposed on the back metal plate 16 at a portion corresponding to the through hole 18 of the brazing material 17, thereby allowing the through hole 18. A part corresponding to the above becomes a non-joining region (a place where the brazing material 17 does not get wet). The region indicated by the alternate long and two short dashes line in FIG. 3A indicates a joining region where the heat sink 13 and the back metal plate 16 are joined. Is a region formed as

そして、貫通孔18は、裏金属板16の接合面全体の面積から各貫通孔18の開口面積の合算値を減算した場合に、ヒートシンク13と裏金属板16の接合面積が前述した65%〜85%の範囲となるように形成されている。また、貫通孔18は、ろう材17を図3(a)に示すように平面域において複数領域(図3(a)では4分割)に等分割したとき、各分割領域a,b,c,dにおける接合面積がほぼ等しくなるように配置されている。このように貫通孔18を形成して離型剤19を配置した場合には、非接合領域が均等に形成されることになるので、好適に熱応力を緩和させることが可能となる。   And when the through hole 18 subtracts the total value of the opening area of each through hole 18 from the area of the entire joining surface of the back metal plate 16, the joining area of the heat sink 13 and the back metal plate 16 is 65% to It is formed to be in the range of 85%. Further, the through-hole 18 is divided into a plurality of divided regions a, b, c, when the brazing material 17 is equally divided into a plurality of regions (four divisions in FIG. 3A) in the plane region as shown in FIG. It arrange | positions so that the junction area in d may become substantially equal. Thus, when the through-hole 18 is formed and the mold release agent 19 is arrange | positioned, since a non-joining area | region is formed uniformly, it becomes possible to relieve | moderate a thermal stress suitably.

次に、本実施形態の半導体モジュール10の製造方法の一工程であるろう付け工程において、ヒートシンク13と裏金属板16(回路基板11)のろう付けを行う方法について説明する。   Next, a method for brazing the heat sink 13 and the back metal plate 16 (circuit board 11) in a brazing step, which is one step of the method for manufacturing the semiconductor module 10 of the present embodiment, will be described.

まず、貫通孔18を形成したろう材17を用意するとともに、回路基板11の裏金属板16に離型剤19を配置する。なお、離型剤19は、ろう材17をヒートシンク13と裏金属板16の間に介在させた時に貫通孔18と対応する部位に配置する。この離型剤19の配置により、裏金属板16の接合面に対し、ろう材17が濡れないように表面処理を施す。そして、ろう材17がヒートシンク13と裏金属板16の間に介在されるように、ヒートシンク13と、回路基板11(裏金属板16)と、ろう材17を積層状に配置し、加熱する。ろう付けは、不活性ガス雰囲気又は還元ガス雰囲気に雰囲気調整された加熱装置内で行われる。なお、加熱装置としては、リフロー炉などが用いられる。   First, the brazing material 17 having the through holes 18 is prepared, and the release agent 19 is disposed on the back metal plate 16 of the circuit board 11. The mold release agent 19 is disposed at a position corresponding to the through hole 18 when the brazing material 17 is interposed between the heat sink 13 and the back metal plate 16. By disposing the release agent 19, surface treatment is performed on the joint surface of the back metal plate 16 so that the brazing material 17 does not get wet. Then, the heat sink 13, the circuit board 11 (back metal plate 16), and the brazing material 17 are arranged in a stacked manner and heated so that the brazing material 17 is interposed between the heat sink 13 and the back metal plate 16. The brazing is performed in a heating apparatus adjusted to an inert gas atmosphere or a reducing gas atmosphere. In addition, a reflow furnace etc. are used as a heating apparatus.

ろう付けは、ろう材17の溶融温度以上の温度に加熱してろう材17を溶融し、その後に溶融したろう材17を溶融温度未満に冷却して凝固させることにより行われる。そして、溶融したろう材17は、離型剤19を配置していない部位において濡れ、離型剤19を配置した部位において濡れない。このため、ろう材17の溶融凝固時、ヒートシンク13と裏金属板16は、ろう材17が濡れた部位で接合される一方で、ろう材17が濡れなかった部位で接合されない。すなわち、ろう材17の溶融凝固時には、離型剤19の有無により、ヒートシンク13と裏金属板16が接合された接合領域と、ヒートシンク13と裏金属板16が接合されない非接合領域とが形成される。   The brazing is performed by heating to a temperature equal to or higher than the melting temperature of the brazing material 17 to melt the brazing material 17, and then cooling the molten brazing material 17 to below the melting temperature to solidify. Then, the molten brazing material 17 is wetted at the site where the release agent 19 is not disposed, and is not wetted at the site where the mold release agent 19 is disposed. For this reason, when the brazing material 17 is melted and solidified, the heat sink 13 and the back metal plate 16 are joined at a portion where the brazing material 17 is wet, but are not joined at a portion where the brazing material 17 is not wet. That is, when the brazing material 17 is melted and solidified, a joining region where the heat sink 13 and the back metal plate 16 are joined and a non-joining region where the heat sink 13 and the back metal plate 16 are not joined are formed depending on the presence or absence of the release agent 19. The

なお、ろう材17は、加熱による溶融前においては貫通孔18が形成されているが、ろう材17の溶融により形状は維持されなくなる。しかし、貫通孔18は、ヒートシンク13と裏金属板16の非接合領域を形成するためにろう材17に形成したものであり、ろう付け時において離型剤19とともに非接合領域の形成に寄与する。そして、貫通孔18は、ろう材17の溶融により形状は維持できないが、離型剤19を配置していることにより貫通孔18の形成部位は濡れることなく、この部位においてヒートシンク13と裏金属板16は接合されない。   The brazing material 17 has through holes 18 before melting by heating, but the shape is not maintained by the melting of the brazing material 17. However, the through hole 18 is formed in the brazing material 17 in order to form a non-bonded region between the heat sink 13 and the back metal plate 16, and contributes to the formation of the non-bonded region together with the release agent 19 during brazing. . The shape of the through hole 18 cannot be maintained due to the melting of the brazing material 17, but the part where the through hole 18 is formed is not wetted by disposing the mold release agent 19. 16 is not joined.

したがって、本実施形態によれば、以下に示す効果を得ることができる。
(1)裏金属板16(回路基板11)の接合界面に離型剤19を配置し、ろう付けを行う。これによれば、ろう付け時には、離型剤19を配置した部位にろう材17が濡れず、裏金属板16(回路基板11)とヒートシンク13とが接合されていない非接合領域が形成されることになる。このため、回路基板11(セラミックス基板14、表金属板15、裏金属板16)及びヒートシンク13との線熱膨張係数の相違に起因して熱応力が発生した場合でも接合領域の熱応力が分散され、その結果、応力が緩和される。このため、反りやクラックの発生が防止され、放熱性能が維持される。また、接合界面に離型剤19を配置する構成を採用したので、回路基板11に直接、熱応力を緩和させる構成を設ける必要がなく、回路基板11の構造を簡素化できる。
Therefore, according to the present embodiment, the following effects can be obtained.
(1) A release agent 19 is disposed on the bonding interface of the back metal plate 16 (circuit board 11), and brazing is performed. According to this, at the time of brazing, the brazing material 17 does not get wet at the part where the release agent 19 is disposed, and a non-joined region in which the back metal plate 16 (circuit board 11) and the heat sink 13 are not joined is formed. It will be. For this reason, even when the thermal stress is generated due to the difference in the linear thermal expansion coefficient between the circuit board 11 (ceramics substrate 14, front metal plate 15, back metal plate 16) and the heat sink 13, the thermal stress in the bonding region is dispersed. As a result, the stress is relieved. For this reason, generation | occurrence | production of a curvature and a crack is prevented and heat dissipation performance is maintained. Moreover, since the structure which arrange | positions the mold release agent 19 in the joining interface was employ | adopted, it is not necessary to provide the structure which relieves a thermal stress directly in the circuit board 11, and the structure of the circuit board 11 can be simplified.

(2)ろう材17に貫通孔18を形成し、そのろう材17をヒートシンク13と裏金属板16の間に介在させてろう付けを行う。したがって、裏金属板16(回路基板11)とヒートシンク13との非接合領域をより確実に作り出すことができる。   (2) The through hole 18 is formed in the brazing material 17, and the brazing material 17 is interposed between the heat sink 13 and the back metal plate 16 to perform brazing. Therefore, the non-joining area | region of the back metal plate 16 (circuit board 11) and the heat sink 13 can be produced more reliably.

(3)回路基板11は、表金属板15と裏金属板16の厚みが異なる場合、製造時に反りが発生し易い。しかし、本実施形態では、ろう付け層H2を熱応力緩和部として機能させているので、従来のように回路基板11に対して熱応力緩和部材を設ける加工などが不要であり、また表金属板15と裏金属板16を同一の厚みに設定することができる。したがって、製造時の歩留まり向上に寄与できる。   (3) When the thickness of the front metal plate 15 and the back metal plate 16 is different, the circuit board 11 is likely to warp during manufacture. However, in the present embodiment, since the brazing layer H2 functions as a thermal stress relaxation portion, it is not necessary to perform a process of providing a thermal stress relaxation member on the circuit board 11 as in the prior art. 15 and the back metal plate 16 can be set to the same thickness. Therefore, it can contribute to the yield improvement at the time of manufacture.

なお、上記実施形態は以下のように変更してもよい。
○ 実施形態では、裏金属板16の接合界面に離型剤19を配置しているが、図4に示すように、離型剤19をヒートシンク13の接合界面に配置し、ろう付けを行っても良い。このように構成した場合でも、実施形態と同様にヒートシンク13と裏金属板16が接合されない非接合領域が形成される。
In addition, you may change the said embodiment as follows.
In the embodiment, the release agent 19 is disposed at the bonding interface of the back metal plate 16. However, as illustrated in FIG. 4, the release agent 19 is disposed at the bonding interface of the heat sink 13 and brazing is performed. Also good. Even in such a configuration, a non-joining region where the heat sink 13 and the back metal plate 16 are not joined is formed as in the embodiment.

○ 実施形態では、裏金属板16の接合界面に離型剤19を配置しているが、図5に示すように、離型剤19をヒートシンク13の接合界面と裏金属板16の接合界面のそれぞれに配置し、ろう付けを行っても良い。このように構成した場合でも、実施形態と同様にヒートシンク13と裏金属板16が接合されない非接合領域が形成される。   In the embodiment, the release agent 19 is disposed at the bonding interface of the back metal plate 16. However, as shown in FIG. 5, the release agent 19 is disposed between the bonding interface of the heat sink 13 and the bonding interface of the back metal plate 16. They may be placed on each and brazed. Even in such a configuration, a non-joining region where the heat sink 13 and the back metal plate 16 are not joined is formed as in the embodiment.

○ 実施形態において、図6(a),(b)に示すように、ろう材17に厚み規定部材としての球状部材20や柱状部材21を配置し、ろう付けを行っても良い。このように球状部材20や柱状部材21を配置すれば、ろう付け後のろう付け層H2の厚みを規定することができる。したがって、ろう付け層H2の厚みを熱応力緩和に必要な面積と高さに維持することができ、熱応力による反りやクラックの発生を防止しつつ、優れた放熱性能を得ることができる。球状部材20や柱状部材21は、ろう材17よりも融点が高い材料で構成され、金属材料又は非金属材料の何れでも良い。また、球状部材20や柱状部材21は、ろう付け時に配置しても良いし、ろう材17を製造する際に混入させても良い。特に、柱状部材21がセラミックスなどの低膨張な材質であれば、ヒートシンク13と裏金属板16が接合しない非接合領域を形成する接合防止材として作用し、かつ熱応力を分散させるように作用する。このように柱状部材21を低膨張な材質で形成する場合には、離型剤19(及び以下に記載する酸化被膜)を設けなくても良い。   In the embodiment, as shown in FIGS. 6A and 6B, a brazing member 17 may be provided with a spherical member 20 or a columnar member 21 as a thickness regulating member, and brazing may be performed. By arranging the spherical member 20 and the columnar member 21 in this way, the thickness of the brazing layer H2 after brazing can be defined. Therefore, the thickness of the brazing layer H2 can be maintained at the area and height necessary for thermal stress relaxation, and excellent heat dissipation performance can be obtained while preventing warpage and cracking due to thermal stress. The spherical member 20 and the columnar member 21 are made of a material having a melting point higher than that of the brazing material 17 and may be either a metal material or a non-metal material. Further, the spherical member 20 and the columnar member 21 may be disposed at the time of brazing, or may be mixed when the brazing material 17 is manufactured. In particular, if the columnar member 21 is a low-expansion material such as ceramics, it acts as a bonding preventing material that forms a non-bonded region where the heat sink 13 and the back metal plate 16 are not bonded, and acts to disperse thermal stress. . Thus, when the columnar member 21 is formed of a low expansion material, the release agent 19 (and the oxide film described below) may not be provided.

○ 実施形態において、離型剤19に代えて、ヒートシンク13と裏金属板16が接合しない非接合領域を形成する部位にアルマイト処理などを施して酸化皮膜を形成しても良い。この場合、酸化皮膜が接合防止材として作用する。   In the embodiment, instead of the release agent 19, an oxide film may be formed by performing alumite treatment or the like on a portion that forms a non-bonded region where the heat sink 13 and the back metal plate 16 are not bonded. In this case, the oxide film acts as a bonding preventing material.

○ 実施形態において、ろう材17に貫通孔18を形成せずに、ろう材17を単なるシート状(板状)の部材としても良い。
○ 実施形態において、ろう材17に形成する貫通孔18の配置を変更しても良い。例えば、貫通孔18をろう材17の全体に亘って形成しても良いし、円周上に配置しても良いし、また千鳥状に配置しても良い。なお、非接合領域は、半導体素子12の直下に形成されない方が伝熱効率を向上させるためには好ましいので、半導体素子12の直下を避けて貫通孔18と離型剤19を配置しても良い。
In the embodiment, the brazing material 17 may be a simple sheet (plate) member without forming the through hole 18 in the brazing material 17.
In the embodiment, the arrangement of the through holes 18 formed in the brazing material 17 may be changed. For example, the through holes 18 may be formed over the entire brazing material 17, arranged on the circumference, or arranged in a staggered manner. In order to improve the heat transfer efficiency, it is preferable that the non-bonded region is not formed immediately below the semiconductor element 12, and therefore the through hole 18 and the release agent 19 may be disposed avoiding the position immediately below the semiconductor element 12. .

○ 実施形態において、ろう材17に形成する貫通孔18の形状を変更しても良い。例えば、平面視した形状が三角形や六角形などでも良く、また長孔でも良い。
○ 実施形態において、表金属板15と裏金属板16は純アルミニウム以外のアルミニウム合金としても良い。例えば、Si:0.2〜0.8質量%、Mg:0.3〜1質量%、Fe:0.5質量%以下、Cu:0.5質量%以下を含有し、さらにTi:0.1質量%以下又はB:0.1質量%以下の少なくとも1種を含有し、残部Al及び不可避不純物からなるAl−Mg−Si系合金を用いても良く、必要な伝熱特性を確保できるのであれば3000系アルミニウム合金などを用いても良い。
In the embodiment, the shape of the through hole 18 formed in the brazing material 17 may be changed. For example, the shape in plan view may be a triangle or a hexagon, or may be a long hole.
In the embodiment, the front metal plate 15 and the back metal plate 16 may be an aluminum alloy other than pure aluminum. For example, Si: 0.2 to 0.8% by mass, Mg: 0.3 to 1% by mass, Fe: 0.5% by mass or less, Cu: 0.5% by mass or less, and Ti: 0.0% by mass. An Al-Mg-Si alloy containing at least one of 1% by mass or less or B: 0.1% by mass or less, the balance being Al and inevitable impurities may be used, and necessary heat transfer characteristics can be secured. If necessary, a 3000 series aluminum alloy may be used.

半導体モジュールの平面図。The top view of a semiconductor module. 図1のA−A線断面図。AA sectional view taken on the line AA of FIG. (a)はろう材を示す平面図、(b)は離型剤の配置を示す断面図。(A) is a top view which shows a brazing material, (b) is sectional drawing which shows arrangement | positioning of a mold release agent. 別例における離型剤の配置を示す断面図。Sectional drawing which shows arrangement | positioning of the mold release agent in another example. 別例における離型剤の配置を示す断面図。Sectional drawing which shows arrangement | positioning of the mold release agent in another example. (a),(b)は別例においてろう材に厚み規定部材を配置した状態を示す断面図。(A), (b) is sectional drawing which shows the state which has arrange | positioned the thickness regulation member in the brazing material in another example.

符号の説明Explanation of symbols

10…半導体モジュール、11…回路基板、12…半導体素子、13…ヒートシンク、14…セラミックス基板、15…表金属板、16…裏金属板、17…ろう材、19…離型剤、20…球状部材、21…柱状部材。   DESCRIPTION OF SYMBOLS 10 ... Semiconductor module, 11 ... Circuit board, 12 ... Semiconductor element, 13 ... Heat sink, 14 ... Ceramic substrate, 15 ... Front metal plate, 16 ... Back metal plate, 17 ... Brazing material, 19 ... Release agent, 20 ... Spherical Member, 21 ... Columnar member.

Claims (5)

半導体素子の搭載面を有する回路基板と放熱装置を金属接合材で接合した半導体装置において、
前記回路基板の接合界面及び前記放熱装置の接合界面の少なくともいずれか一方の接合界面に、前記回路基板と前記放熱装置とが接合されない非接合領域を形成する接合防止材を設けたことを特徴とする半導体装置。
In a semiconductor device in which a circuit board having a mounting surface of a semiconductor element and a heat dissipation device are bonded with a metal bonding material,
A bonding preventing material that forms a non-bonding region where the circuit board and the heat dissipation device are not bonded is provided at least one of the bonding interface of the circuit board and the bonding interface of the heat dissipation device. Semiconductor device.
前記接合防止材は、離型剤又は酸化皮膜からなることを特徴とする請求項1に記載の半導体装置。   The semiconductor device according to claim 1, wherein the bonding preventing material is made of a release agent or an oxide film. 前記回路基板と前記放熱装置の金属接合層には、当該金属接合層の厚みを規定する厚み規定部材が配置されていることを特徴とする請求項1又は請求項2に記載の半導体装置。   The semiconductor device according to claim 1, wherein a thickness defining member that defines a thickness of the metal bonding layer is disposed on the metal bonding layer of the circuit board and the heat dissipation device. 半導体素子の搭載面を有する回路基板と放熱装置を金属接合材で接合した半導体装置の製造方法において、
前記回路基板の接合界面及び前記放熱装置の接合界面の少なくともいずれか一方の接合界面に、前記回路基板と前記放熱装置とが接合されない非接合領域を形成する接合防止材を設けるとともに前記回路基板と前記放熱装置の間に前記金属接合材を配置し、前記金属接合材を溶融温度以上の温度まで加熱して溶融した後に前記金属接合材を前記溶融温度未満の温度まで下げて凝固させることにより、前記回路基板と前記放熱装置を接合することを特徴とする半導体装置の製造方法。
In a manufacturing method of a semiconductor device in which a circuit board having a mounting surface of a semiconductor element and a heat dissipation device are bonded with a metal bonding material,
At least one of the bonding interface of the circuit board and the bonding interface of the heat dissipation device is provided with a bonding preventing material that forms a non-bonded region where the circuit board and the heat dissipation device are not bonded, and the circuit board By placing the metal bonding material between the heat dissipation devices, heating the metal bonding material to a temperature equal to or higher than the melting temperature, and then melting the metal bonding material to a temperature lower than the melting temperature to solidify, A method of manufacturing a semiconductor device, comprising bonding the circuit board and the heat dissipation device.
前記回路基板と前記放熱装置の間には、前記金属接合材として複数の孔を形成したろう材を配置し、前記孔に対応する位置に前記接合防止材を設けることを特徴とする請求項4に記載の半導体装置の製造方法。   The brazing material in which a plurality of holes are formed as the metal bonding material is disposed between the circuit board and the heat dissipation device, and the bonding preventing material is provided at a position corresponding to the hole. The manufacturing method of the semiconductor device as described in any one of Claims 1-3.
JP2007074760A 2007-03-22 2007-03-22 Semiconductor device and its manufacturing method Pending JP2008235672A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007074760A JP2008235672A (en) 2007-03-22 2007-03-22 Semiconductor device and its manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007074760A JP2008235672A (en) 2007-03-22 2007-03-22 Semiconductor device and its manufacturing method

Publications (1)

Publication Number Publication Date
JP2008235672A true JP2008235672A (en) 2008-10-02

Family

ID=39908100

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007074760A Pending JP2008235672A (en) 2007-03-22 2007-03-22 Semiconductor device and its manufacturing method

Country Status (1)

Country Link
JP (1) JP2008235672A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012227358A (en) * 2011-04-20 2012-11-15 Toyota Central R&D Labs Inc Semiconductor module
JP2012235082A (en) * 2011-04-18 2012-11-29 Toyota Industries Corp Heat dissipator and manufacturing method therefor
JP2012244147A (en) * 2011-12-22 2012-12-10 Showa Denko Kk Brazing material foil for heat radiator
KR101305543B1 (en) 2011-12-20 2013-09-06 주식회사 포스코엘이디 Optical semiconductor based lighting apparatus and its manufacturing method
JP2013201289A (en) * 2012-03-26 2013-10-03 Mitsubishi Electric Corp Semiconductor device
JP2013222930A (en) * 2012-04-19 2013-10-28 Toyota Industries Corp Heat radiator and method of manufacturing heat radiator
JP2016082088A (en) * 2014-10-17 2016-05-16 株式会社Uacj Heat sink with circuit board, and method of manufacturing the same

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012235082A (en) * 2011-04-18 2012-11-29 Toyota Industries Corp Heat dissipator and manufacturing method therefor
KR101380077B1 (en) * 2011-04-18 2014-04-01 쇼와 덴코 가부시키가이샤 Heat radiator and manufacturing method thereof
US8995129B2 (en) 2011-04-18 2015-03-31 Kabushiki Kaisha Toyota Jidoshokki Heat radiator and manufacturing method thereof
DE102012206047B4 (en) * 2011-04-18 2016-05-12 Showa Denko K.K. Semiconductor device and manufacturing method therefor
JP2012227358A (en) * 2011-04-20 2012-11-15 Toyota Central R&D Labs Inc Semiconductor module
KR101305543B1 (en) 2011-12-20 2013-09-06 주식회사 포스코엘이디 Optical semiconductor based lighting apparatus and its manufacturing method
JP2012244147A (en) * 2011-12-22 2012-12-10 Showa Denko Kk Brazing material foil for heat radiator
JP2013201289A (en) * 2012-03-26 2013-10-03 Mitsubishi Electric Corp Semiconductor device
JP2013222930A (en) * 2012-04-19 2013-10-28 Toyota Industries Corp Heat radiator and method of manufacturing heat radiator
JP2016082088A (en) * 2014-10-17 2016-05-16 株式会社Uacj Heat sink with circuit board, and method of manufacturing the same

Similar Documents

Publication Publication Date Title
KR102027615B1 (en) Power module substrate with heat sink, power module substrate with cooler, and power module
JP4617209B2 (en) Heat dissipation device
CN103733329B (en) Power module substrate, carry the manufacture method of the power module substrate of radiator, power model and power module substrate
JP5125241B2 (en) Power module substrate manufacturing method
JP2008235672A (en) Semiconductor device and its manufacturing method
JP5613452B2 (en) Brazing method for insulating laminates
JP2004115337A (en) Aluminum-ceramic bonded body
JP5349572B2 (en) Radiator and method of manufacturing radiator
JP6877600B1 (en) Semiconductor device
JP2008294282A (en) Semiconductor device and method of manufacturing semiconductor device
JP2008294281A (en) Semiconductor device and manufacturing method therefor
JP2008124187A (en) Base for power module
JP5011088B2 (en) Heat dissipation device and power module
JP5515251B2 (en) Semiconductor device and manufacturing method thereof
JP2008124187A6 (en) Power module base
WO2022102253A1 (en) Semiconductor apparatus and method for manufacturing semiconductor apparatus
JP2004327711A (en) Semiconductor module
JP5061740B2 (en) Power module substrate
JP2008021716A (en) Power module substrate and method of manufacturing the same, and power module
JP6320347B2 (en) Semiconductor device
JP6673635B2 (en) Method of manufacturing bonded body, method of manufacturing power module substrate with heat sink, method of manufacturing heat sink, and bonded body, power module substrate with heat sink, and heat sink
JP5707278B2 (en) Insulated circuit board manufacturing method
JP6102271B2 (en) Manufacturing method of power module substrate with heat sink
JP2013211288A (en) Manufacturing method of substrate for power module with heat sink
JP2008226908A (en) Heat dissipation component and heat dissipation structure