JP2004207523A - Package for housing semiconductor element and semiconductor device using it - Google Patents

Package for housing semiconductor element and semiconductor device using it Download PDF

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Publication number
JP2004207523A
JP2004207523A JP2002375525A JP2002375525A JP2004207523A JP 2004207523 A JP2004207523 A JP 2004207523A JP 2002375525 A JP2002375525 A JP 2002375525A JP 2002375525 A JP2002375525 A JP 2002375525A JP 2004207523 A JP2004207523 A JP 2004207523A
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Prior art keywords
wiring conductor
mass
terms
component
semiconductor element
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Japanese (ja)
Inventor
Manabu Yonekura
学 米倉
Yoshinobu Sawa
義信 澤
Tetsuo Hirakawa
哲生 平川
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Kyocera Corp
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Kyocera Corp
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Priority to JP2002375525A priority Critical patent/JP2004207523A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

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  • Compositions Of Oxide Ceramics (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that an electric signal having a high frequency cannot be transmitted to a wiring conductor at a high speed. <P>SOLUTION: A semiconductor device is composed of a base body 1 on which a semiconductor element 6 transmitting and receiving the electric signal having the high frequency is loaded, the ground wiring conductors 2b and the first wiring conductors 2a formed to the base body 1, pads 3b for a ground and pads 3a for an input and an output electrically connected to the wiring conductors 2b and the wiring conductors 2a, the second wiring conductor 4 formed to the base body 1, and a connector 5 electrically connected to the wiring conductor 4. The base body 1 is formed of a sintered body in which an Si component is contained in 25 to 80 mass % in terms of SiO<SB>2</SB>, a Ba component in 15 to 70 mass % in terms of BaO, a B component in 1.5 to 5 mass % in terms of B<SB>2</SB>O<SB>3</SB>, an Al component in 1 to 30 mass % in terms of Al<SB>2</SB>O<SB>3</SB>, and a Ca component at a value from O mass % to 30 mass % in terms of CaO. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

【０００１】
【発明の属する技術分野】
本発明は高周波の電気信号を送受信する半導体素子を収納する半導体素子収納用パッケージ、およびその半導体素子収納用パッケージを用いて成る半導体装置に関するものである。
【０００２】
【従来の技術】
従来、電気信号を送受信する半導体素子を収容するための半導体素子収納用パッケージは、一般に、酸化アルミニウム質焼結体等の電気絶縁材料から成り、上面に半導体素子の搭載部が形成された基体と、タングステン、モリブデン、マンガン、銅、銀等の金属材料から成り、基体の半導体素子搭載部から下面にかけて被着導出された複数の電気信号の入出力用およびグランド用の配線導体と、この配線導体と電気的に接続するようにして基体の下面に形成された複数個のグランド用パッドおよび入出力用パッドと、基体の搭載部より上面もしくは側面にかけて導出されている出入力用の配線導体と、この出入力用配線導体に一端が接続されるとともに他端が外部に導出されているコネクターとにより構成されている。
【０００３】
かかる半導体素子収納用パッケージは、その搭載部に電気信号を送受信する半導体素子がＡｕ−Ｓｎろう材あるいは半田等の接合材を介して搭載固定されるとともに、半導体素子の電極が入出力用配線導体（第１配線導体）、グランド用の配線導体および出入力用配線導体（第２配線導体）にボンディングワイヤや接続用リボン、半田等の導電性接続材を介して接続され、その後、必要に応じて蓋体等で半導体素子を封止することによって半導体装置となる。
【０００４】
また前記半導体装置は基体の下面に形成されているグランド用パッドおよび入出力用パッドを外部電気回路基板の回路導体に半田バンプ等を介し接続させることによって内部に収容する半導体素子が外部電気回路に接続され、同時にコネクターに同軸ケーブル等を介し外部の通信装置等の外部機器を接続させることによって半導体素子と外部機器とが接続するようになっている。
【０００５】
なお、前記半導体装置に使用されている半導体素子は複数の電気信号を合成して一つの電気信号に変換する、或いは一つの電気信号を分離して複数の電気信号に変換する機能を有しており、第１配線導体を介して入力される複数の周波数帯域が低い電気信号は半導体素子で合成されて一つの周波数帯域が高い電気信号となり、この周波数帯域の高い電気信号は第２配線導体を介してコネクターに伝送されるとともにコネクターより外部の通信装置等の外部機器に伝送され、またコネクターを介して外部機器より伝送された周波数帯域の高い電気信号は半導体素子で複数の周波数帯域が低い電気信号に変換され、各々の周波数帯域の低い電気信号は第１配線導体を介して外部電気回路に伝送されることとなる。
【０００６】
【特許文献１】
特開２００２−１６４４６６号公報
【０００７】
【発明が解決しようとする課題】
しかしながら、近年、光通信や無線通信等の機器は電気信号が高周波領域に達するとともに、高速で伝送させることが要求されるようになってきており、従来の配線基板は基体を形成する酸化アルミニウム質焼結体の比誘電率が約１０（室温、１ＭＨｚ）と高いことから、基体に設けた第１配線導体、第２配線導体を伝わる電気信号の伝送速度が遅く、高周波の電気信号を高速で伝送させるという要求を満足させることができなかった。
【０００８】
本発明は上記欠点に鑑み案出されたもので、その目的は配線導体に電気信号を高速で伝送させることを可能とするとともに内部に収容する半導体素子を外部電気回路に確実に接続することができる半導体素子収納用パッケージおよびそれを用いた半導体装置を提供することにある。
【０００９】
【課題を解決するための手段】
本発明の半導体素子収納用パッケージは、４０ＧＨｚ〜８０ＧＨｚの電気信号を送受信する半導体素子が搭載される搭載部を有する基体と、該基体の前記搭載部より下面にかけて導出されている複数個のグランド配線導体および第１配線導体と、前記基体の下面に形成され、前記グランド配線導体および第１配線導体に電気的に接続している複数個のグランド用パッドおよび入出力用パッドと、前記基体の搭載部より上面もしくは側面にかけて導出されている第２配線導体と、前記基体に取着され、前記第２配線導体に電気的に接続されているコネクターとから成り、前記基体がＳｉ成分がＳｉＯ2に換算して２５乃至８０質量％、Ｂａ成分がＢａＯに換算して１５乃至７０質量％、Ｂ成分がＢ2Ｏ3に換算して１．５乃至５質量％、Ａｌ成分がＡｌ2Ｏ3に換算して１乃至３０質量％、Ｃａ成分がＣａＯに換算して０質量％を超えて３０質量％以下含まれる焼結体で形成されていることを特徴とするものである。
【００１０】
また本発明の半導体装置は、上記構成の半導体素子収納用パッケージと、４０ＧＨｚ〜８０ＧＨｚの電気信号を送受信する半導体素子とから成り、前記パッケージの搭載部に半導体素子を搭載固定するとともに該半導体素子の各電極を第１配線導体および第２配線導体に電気的に接続したことを特徴とするものである。
【００１１】
本発明の半導体素子収納用パッケージおよび半導体装置によれば、パッケージの基体を、Ｓｉ成分がＳｉＯ2に換算して２５乃至８０質量％、Ｂａ成分がＢａＯに換算して１５乃至７０質量％、Ｂ成分がＢ2Ｏ3に換算して１．５乃至５質量％、Ａｌ成分がＡｌ2Ｏ3に換算して１乃至３０質量％、Ｃａ成分がＣａＯに換算して０質量％を超えて３０質量％以下含まれる焼結体で形成し、かかる焼結体の比誘電率が約６（室温、１ＭＨｚ）と低いことから、基体に形成される第１配線導体、第２配線導体を伝わる電気信号の伝送速度を極めて速いものとなすことができる。
【００１２】
【発明の実施の形態】
次に、本発明を添付図面に基づき詳細に説明する。
【００１３】
図１は本発明の半導体素子収納用パッケージの一実施例を示し、１は基体、２ａは第１配線導体、２ｂはグランド配線導体、３ａは入出力用パッド、３ｂはグランド用パッド、４は第２配線導体、５はコネクターである。これら基体１、第１配線導体２ａ、グランド配線導体２ｂ、入出力用パッド３ａ、グランド用パッド３ｂ、第２配線導体４およびコネクター５により半導体素子６を収納するための半導体素子収納用パッケージ７が基本的に構成される。
【００１４】
前記基体１は、Ｓｉ成分がＳｉＯ2に換算して２５乃至８０質量％、Ｂａ成分がＢａＯに換算して１５乃至７０質量％、Ｂ成分がＢ2Ｏ3に換算して１．５乃至５質量％、Ａｌ成分がＡｌ2Ｏ3に換算して１乃至３０質量％、Ｃａ成分がＣａＯに換算して０質量％を超えて３０質量％以下含まれる焼結体で形成されており、その上面に半導体素子６を搭載するための搭載部１ａを有し、該搭載部１aに半導体素子６がガラス、樹脂、ロウ材等の接着剤を介して接着固定される。
【００１５】
前記基体１は、例えば、ＳｉＯ2、ＢａＯ、Ｂ2Ｏ3、Ａｌ2Ｏ3、ＣａＯ等の原料粉末に有機バインダーを添加混合して原料粉末を調整するとともに、これをドクターブレード法や圧延法、プレス金型法により所定形状に成形して成形体を得、しかる後、前記成形体を８００℃〜１０００℃の温度で焼成することによって製作される。
【００１６】
また前記基体１は、半導体素子の搭載部１ａから下面にかけて複数個の第１配線導体２ａおよびグランド配線導体２ｂが形成されており、該各配線導体２ａ、２ｂは半導体素子６の電気信号入出力用、接地用の各電極を、入出力用パッド３ａやグランド用パッド３ｂに接続するための導電路として作用し、搭載部１ａ側の一端には半導体素子６の電気信号入出力用、接地用の各電極が導電性接続材を介して電気的に接続される。
【００１７】
前記第１配線導体２ａおよびグランド配線導体２ｂ、入出力用パッド３ａおよびグランド用パッド３ｂは、銅、銀、金、パラジウム等の金属材料から成り、例えば銅から成る場合であれば、銅粉末に有機溶剤等を添加して成る金属ペーストを基体１となるセラミックグリーンシートの表面に所定パターンに印刷しておくことによって形成される。
【００１８】
この第１配線導体２ａおよびグランド配線導体２ｂの基体１下面側の一端は、それぞれ対応する入出力用パッド３ａおよびグランド用パッド３ｂと電気的に接続しており、これらの入出力用パッド３ａ、グランド用パッド３ｂを外部電気回路の所定の信号用や接地用等の回路導体に接続することにより、半導体素子６の電気信号入出力用、接地用の各電極が外部電気回路と電気的に接続される。
【００１９】
また前記基体１は、半導体素子の搭載部１ａから上面や側面等にかけて第２配線導体４が形成されており、該第２配線導体４は半導体素子６の電極をコネクター５に接続するための導電路として作用し、搭載部１ａ側の一端には半導体素子６の電極が導電性接続材８を介して電気的に接続される。
【００２０】
前記第２配線導体４は、上述の第１配線導体２ａ等と同様に、銅、銀、金、パラジウム等の金属材料から成り、例えば銅から成る場合であれば、銅粉末に有機溶剤等を添加して成る金属ペーストを基体１となるセラミックグリーンシートの表面に所定パターンに印刷しておくことにより形成される。
【００２１】
この第２配線導体４の基体１外表面側の一端はコネクター５と電気的に接続しており、このコネクター５を同軸ケーブル等を介して通信装置等の外部機器に接続することにより半導体素子６と外部機器との間で高周波信号の送受信が行われる。
【００２２】
前記コネクター５は、半導体素子収納用パッケージ７の第２配線導体４を同軸ケーブル等を介して外部機器に接続するための接続体として作用し、例えば、鉄−ニッケル−コバルト等の金属の線材の周囲を、ホウ珪酸系ガラス等の絶縁体で取り囲んだ構造である。
【００２３】
かくして上述の半導体素子収納用パッケージによれば、基体１の搭載部１ａに半導体素子６を搭載するとともに、ガラス、樹脂、ロウ材等の接着剤を介して固定し、しかる後、半導体素子６の各電極を第１配線導体２ａおよびグランド配線導体２ｂに例えばボンディングワイヤ８を介して接続し、最後に蓋体１０を基体１上面に封止材を介して接合させ、半導体素子６を気密に封止することによって半導体装置１１となる。
【００２４】
この半導体装置１１は、基体１下面の入出力用パッド３ａおよびグランド用パッド３ｂが外部電気回路基板の所定の信号用や接地用等の回路導体に半田バンプ等の外部端子を介して接続され、これによって半導体素子６の信号用、接地用の各電極は外部電気回路と電気的に接続される。
【００２５】
また、この半導体装置１１に取着されているコネクター５に同軸ケーブル等の外部接続用の導線を接続することにより、半導体素子６の電極が通信装置等の外部機器に接続される。
【００２６】
そしてかかる半導体装置１１は、外部電気回路から供給される複数の周波数帯域が低い（５〜１０ＧＨｚ）電気信号を第１配線導体２ａを介して半導体素子６に入力させ、半導体素子６でこれら入力された電気信号を合成して、一つの周波数帯域が高い（４０〜８０ＧＨｚ）電気信号とするとともにこれを第２配線導体４を介してコネクター５に出力し、該コネクター５を介して外部の通信装置等の外部機器に伝送する、或いは、外部の通信装置等の外部機器から伝送された一つの周波数帯域が高い（４０〜８０ＧＨｚ）電気信号をコネクター５及び第２配線導体４を介して半導体素子６に入力し、半導体素子６で入力された周波数帯域が高い（４０〜８０ＧＨｚ）電気信号を複数の周波数帯域が低い（５〜１０ＧＨｚ）電気信号に変換するとともに、これらの個々の周波数帯域が低い電気信号を第１配線導体２ａを介して外部電気回路に供給することとなる。
【００２７】
本発明の半導体素子収納用パッケージおよびこれを用いた半導体装置においては、基体１をＳｉ成分がＳｉＯ2に換算して２５乃至８０質量％、Ｂａ成分がＢａＯに換算して１５乃至７０質量％、Ｂ成分がＢ2Ｏ3に換算して１．５乃至５質量％、Ａｌ成分がＡｌ2Ｏ3に換算して１乃至３０質量％、Ｃａ成分がＣａＯに換算して０質量％を超えて３０質量％以下含まれる焼結体で形成しておくことが重要である。
【００２８】
前記基体１を、Ｓｉ成分がＳｉＯ2に換算して２５乃至８０質量％、Ｂａ成分がＢａＯに換算して１５乃至７０質量％、Ｂ成分がＢ2Ｏ3に換算して１．５乃至５質量％、Ａｌ成分がＡｌ2Ｏ3に換算して１乃至３０質量％、Ｃａ成分がＣａＯに換算して０質量％を超えて３０質量％以下含まれる焼結体で形成すると、かかる焼結体の比誘電率が約６（室温、１ＭＨｚ）と低いことから基体１に形成される第１配線導体２ａ、第２配線導体４を伝わる電気信号の伝送速度を極めて速いものとなすことができる。
【００２９】
また上述の焼結体はその焼成温度が８００℃〜１０００℃と低いことから、基体１と同時焼成により形成される第１配線導体２ａ等を比抵抗が２．５Ω・ｃｍ（２０℃）以下と低い銅や銀、金で形成することができ、その結果、第１配線導体２ａ等に高周波の電気信号を伝送させた場合、電気信号に大きな減衰が生じることはなく、電気信号を正確かつ確実に伝送させることも可能となる。
【００３０】
なお、前記基体１を構成するＳｉ成分がＳｉＯ2に換算して２５乃至８０質量％、Ｂａ成分がＢａＯに換算して１５乃至７０質量％、Ｂ成分がＢ2Ｏ3に換算して１．５乃至５質量％、Ａｌ成分がＡｌ2Ｏ3に換算して１乃至３０質量％、Ｃａ成分がＣａＯに換算して０質量％を超えて３０質量％以下含まれる焼結体は、ＳｉＯ2の量が２５質量％未満であると誘電損失が大きくなって第１配線導体２ａや第２配線導体４を伝送する電気信号に減衰や遅延を招来してしまい、また８０質量％を超えると基体１の機械的強度が大きく低下してしまうと同時に焼成温度が高いものとなって銅等の金属材料から成る第１配線導体２ａ等と同時焼成するのが困難となる。したがって、ＳｉＯ2の量は２５乃至８０質量％の範囲に特定される。
【００３１】
また、ＢａＯが１５質量％未満であると焼成温度が高いものとなって銅等の金属材料から成る第１配線導体２ａ等と同時焼成するのが困難となる。また７０質量％を超えると誘電損失が大きくなって第１配線導体２ａや第２配線導体４を伝送する電気信号に減衰や遅延を招来してしまう。したがって、ＢａＯの量は１５乃至７０質量％の範囲に特定される。
【００３２】
更に、Ｂ2Ｏ3が１．５質量％未満となると焼成温度が高いものとなって銅等の金属材料から成る第１配線導体２ａ等と同時焼成するのが困難となり、また５質量％を超えると基体１の機械的強度が大きく低下してしまう。したがって、Ｂ2Ｏ3の量は１．５乃至５質量％の範囲に特定される。
【００３３】
また更に、Ａｌ2Ｏ3が１質量％未満となると焼成温度が高いものとなって銅等の金属材料から成る第１配線導体２ａ等と同時焼成するのが困難となり、また３０質量％を超えると誘電損失が大きくなって第１配線導体２ａや第２配線導体４を伝送する電気信号に減衰や遅延を招来してしまう。したがって、Ａｌ2Ｏ3の量は１乃至３０質量％の範囲に特定される。
【００３４】
更にまたＣａＯが３０質量％を超えると焼成温度が高いものとなって銅等の金属材料から成る第１配線導体２ａ等と同時焼成するのが困難となる。したがって、ＣａＯの量は０質量％を超えて３０質量％以下の範囲に特定される。
【００３５】
前記焼結体から成る基体１は、例えば、ＳｉＯ2、ＢａＯ、Ｂ2Ｏ3、Ａｌ2Ｏ3、ＣａＯ等の原料粉末にアクリル樹脂を主成分とするバインダー及び分散剤、可塑剤、有機溶媒を加えて泥漿物を作るとともに該泥漿物をドクターブレード法やカレンダーロール法を採用することによってグリーンシートとなし、しかる後、前記グリーンシートに適当な打ち抜き加工を施すとともにこれを複数枚積層し、約８００℃〜１０００℃の温度で焼成することによって製作される。
【００３６】
なお、本発明は上述の実施例に限定されるものではなく、本発明の要旨を逸脱しない範囲であれば種々の変更は可能である。
【００３７】
【発明の効果】
本発明の半導体素子収納用パッケージおよび半導体装置によれば、パッケージの基体を、Ｓｉ成分がＳｉＯ2に換算して２５乃至８０質量％、Ｂａ成分がＢａＯに換算して１５乃至７０質量％、Ｂ成分がＢ2Ｏ3に換算して１．５乃至５質量％、Ａｌ成分がＡｌ2Ｏ3に換算して１乃至３０質量％、Ｃａ成分がＣａＯに換算して０質量％を超えて３０質量％以下含まれる焼結体で形成し、かかる焼結体の比誘電率が約６（室温、１ＭＨｚ）と低いことから、基体に形成される第１配線導体、第２配線導体を伝わる電気信号の伝送速度を極めて速いものとなすことができる。
【図面の簡単な説明】
【図１】本発明の半導体素子収納用パッケージおよびこの半導体素子収納用パッケージを用いた半導体装置の一実施例を示す断面図である。
【符号の説明】
１・・・・・基体
１ａ・・・・搭載部
２ａ・・・・第１配線導体
２ｂ・・・・グランド配線導体
３ａ・・・・入出力用パッド
３ｂ・・・・グランド用パッド
４・・・・・第２配線導体
５・・・・・コネクター
６・・・・・半導体素子
７・・・・・半導体素子収納用パッケージ
８・・・・・ボンディングワイヤ
１０・・・・蓋体
１１・・・・半導体装置[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor element housing package for housing a semiconductor element for transmitting and receiving high-frequency electrical signals, and a semiconductor device using the semiconductor element housing package.
[0002]
[Prior art]
Conventionally, a semiconductor element housing package for housing a semiconductor element for transmitting and receiving an electric signal is generally made of an electrically insulating material such as an aluminum oxide sintered body, and has a base on which a semiconductor element mounting portion is formed on an upper surface. And a wiring conductor for input / output of a plurality of electric signals and a ground, which are made of a metal material such as tungsten, molybdenum, manganese, copper, silver, etc., and are attached and derived from the semiconductor element mounting portion of the base to the lower surface. A plurality of ground pads and input / output pads formed on the lower surface of the base so as to be electrically connected to, and input / output wiring conductors led out from the mounting portion of the base to the upper surface or side surfaces, One end is connected to the input / output wiring conductor, and the other end is connected to the outside.
[0003]
In such a package for accommodating a semiconductor element, a semiconductor element for transmitting and receiving an electric signal is mounted and fixed to a mounting portion thereof via a bonding material such as an Au-Sn brazing material or a solder, and electrodes of the semiconductor element are connected to input / output wiring conductors. (A first wiring conductor), a grounding wiring conductor and an input / output wiring conductor (a second wiring conductor) are connected via a conductive connecting material such as a bonding wire, a connection ribbon, or solder, and then, if necessary. A semiconductor device is obtained by sealing the semiconductor element with a lid or the like.
[0004]
Further, the semiconductor device accommodated inside the semiconductor device by connecting the ground pad and the input / output pad formed on the lower surface of the base to the circuit conductor of the external electric circuit board via a solder bump or the like, so that the semiconductor element accommodated therein is connected to the external electric circuit. The semiconductor device and the external device are connected by connecting the external device such as an external communication device to the connector via a coaxial cable or the like at the same time.
[0005]
The semiconductor element used in the semiconductor device has a function of synthesizing a plurality of electric signals and converting it into one electric signal, or separating one electric signal and converting it into a plurality of electric signals. An electric signal having a plurality of low frequency bands input through the first wiring conductor is synthesized by the semiconductor element to become an electric signal having one frequency band, and the electric signal having a high frequency band is transmitted through the second wiring conductor. The high frequency band electric signal transmitted to the external device such as a communication device outside from the connector through the connector through the connector, and transmitted from the external device through the connector is a semiconductor device having a plurality of low frequency band electric signals. The electric signal converted into a signal and having a low frequency band is transmitted to an external electric circuit via the first wiring conductor.
[0006]
[Patent Document 1]
JP 2002-164466 A
[Problems to be solved by the invention]
However, in recent years, devices such as optical communication and wireless communication have been required to transmit electric signals at a high frequency as well as reaching a high-frequency region, and the conventional wiring board is made of aluminum oxide which forms a base. Since the relative permittivity of the sintered body is as high as about 10 (room temperature, 1 MHz), the transmission speed of the electric signal transmitted through the first wiring conductor and the second wiring conductor provided on the base is low, and the high-frequency electric signal is transmitted at high speed. The request for transmission could not be satisfied.
[0008]
The present invention has been devised in view of the above-mentioned drawbacks, and has as its object to enable a wiring conductor to transmit an electric signal at high speed and to reliably connect a semiconductor element housed therein to an external electric circuit. An object of the present invention is to provide a package for housing a semiconductor element and a semiconductor device using the same.
[0009]
[Means for Solving the Problems]
The package for housing a semiconductor element of the present invention includes a base having a mounting portion on which a semiconductor element for transmitting and receiving an electric signal of 40 GHz to 80 GHz is mounted, and a plurality of ground wirings extending from the mounting portion of the base to a lower surface. A conductor and a first wiring conductor, a plurality of ground pads and input / output pads formed on the lower surface of the base and electrically connected to the ground wiring conductor and the first wiring conductor; and mounting the base. And a connector attached to the base and electrically connected to the second wiring conductor, wherein the Si component is formed of SiO 2 . 25 to 80% by mass, Ba component is 15 to 70% by mass when converted to BaO, B component is 1.5 to 5% by mass when converted to B 2 O 3 , Al component Is a sintered body containing 1 to 30% by mass in terms of Al 2 O 3 and a Ca component exceeding 0% by mass and not more than 30% by mass in terms of CaO. is there.
[0010]
Further, a semiconductor device of the present invention comprises a semiconductor element storage package having the above configuration, and a semiconductor element for transmitting and receiving an electric signal of 40 GHz to 80 GHz. The semiconductor element is mounted and fixed on a mounting portion of the package, and Each electrode is electrically connected to a first wiring conductor and a second wiring conductor.
[0011]
According to the package for storing a semiconductor element and the semiconductor device of the present invention, the base of the package is composed of 25 to 80% by mass of Si component converted to SiO 2 , 15 to 70% by mass of Ba component converted to BaO, and B The component is 1.5 to 5% by mass in terms of B 2 O 3 , the Al component is 1 to 30% by mass in terms of Al 2 O 3 , and the Ca component is 30% in excess of 0% by mass in terms of CaO. It is formed of a sintered body containing less than 5% by mass, and since the relative dielectric constant of the sintered body is as low as about 6 (room temperature, 1 MHz), electricity transmitted through the first wiring conductor and the second wiring conductor formed on the base body. The signal transmission speed can be extremely high.
[0012]
BEST MODE FOR CARRYING OUT THE INVENTION
Next, the present invention will be described in detail with reference to the accompanying drawings.
[0013]
FIG. 1 shows an embodiment of a package for housing a semiconductor element according to the present invention, wherein 1 is a base, 2a is a first wiring conductor, 2b is a ground wiring conductor, 3a is an input / output pad, 3b is a ground pad, and 4 is The second wiring conductor 5 is a connector. A semiconductor element housing package 7 for housing the semiconductor element 6 by the base 1, the first wiring conductor 2a, the ground wiring conductor 2b, the input / output pad 3a, the ground pad 3b, the second wiring conductor 4 and the connector 5 is provided. Basically configured.
[0014]
In the substrate 1, the Si component is 25 to 80% by mass in terms of SiO 2 , the Ba component is 15 to 70% by mass in terms of BaO, and the B component is 1.5 to 5% in terms of B 2 O 3. It is formed of a sintered body containing 1% to 30% by mass in terms of Al component, 1 to 30% by mass in terms of Al 2 O 3 , and Ca component in excess of 0% to 30% by mass in terms of CaO. A mounting portion 1a for mounting the semiconductor element 6 is provided on the upper surface, and the semiconductor element 6 is bonded and fixed to the mounting portion 1a via an adhesive such as glass, resin, or brazing material.
[0015]
The substrate 1 is prepared, for example, by adding and mixing an organic binder to a raw material powder such as SiO 2 , BaO, B 2 O 3 , Al 2 O 3 , CaO, etc. It is manufactured by molding into a predetermined shape by a press die method, and then firing the molded body at a temperature of 800 ° C. to 1000 ° C.
[0016]
The base 1 has a plurality of first wiring conductors 2a and ground wiring conductors 2b formed from the mounting portion 1a of the semiconductor element to the lower surface. Of the semiconductor element 6 at one end on the side of the mounting portion 1a. Are electrically connected via a conductive connecting material.
[0017]
The first wiring conductor 2a and the ground wiring conductor 2b, the input / output pads 3a and the ground pads 3b are made of a metal material such as copper, silver, gold, palladium, etc. It is formed by printing a metal paste obtained by adding an organic solvent or the like in a predetermined pattern on the surface of the ceramic green sheet serving as the base 1.
[0018]
One ends of the first wiring conductor 2a and the ground wiring conductor 2b on the lower surface side of the base 1 are electrically connected to corresponding input / output pads 3a and ground pads 3b, respectively. By connecting the ground pad 3b to a predetermined signal conductor or a circuit conductor for grounding of the external electric circuit, the electric signal input / output and ground electrodes of the semiconductor element 6 are electrically connected to the external electric circuit. Is done.
[0019]
The base 1 has a second wiring conductor 4 formed from the mounting portion 1a of the semiconductor element to the upper surface, the side surface, and the like. The second wiring conductor 4 is a conductive material for connecting the electrode of the semiconductor element 6 to the connector 5. An electrode of the semiconductor element 6 is electrically connected to one end of the mounting portion 1a via the conductive connecting material 8 at one end on the mounting portion 1a side.
[0020]
The second wiring conductor 4 is made of a metal material such as copper, silver, gold, and palladium similarly to the above-described first wiring conductor 2a and the like. For example, when the second wiring conductor 4 is made of copper, an organic solvent or the like is added to copper powder. It is formed by printing the added metal paste in a predetermined pattern on the surface of the ceramic green sheet serving as the base 1.
[0021]
One end of the second wiring conductor 4 on the outer surface side of the base 1 is electrically connected to a connector 5, and the connector 5 is connected to an external device such as a communication device via a coaxial cable or the like. A high-frequency signal is transmitted and received between the device and an external device.
[0022]
The connector 5 functions as a connector for connecting the second wiring conductor 4 of the semiconductor element housing package 7 to an external device via a coaxial cable or the like. For example, the connector 5 is made of a metal wire such as iron-nickel-cobalt. It has a structure in which the periphery is surrounded by an insulator such as borosilicate glass.
[0023]
Thus, according to the above-described semiconductor element housing package, the semiconductor element 6 is mounted on the mounting portion 1a of the base 1 and fixed via an adhesive such as glass, resin, brazing material, and the like. Each electrode is connected to the first wiring conductor 2a and the ground wiring conductor 2b via, for example, a bonding wire 8, and finally, the lid 10 is joined to the upper surface of the base 1 via a sealing material to hermetically seal the semiconductor element 6. By stopping, the semiconductor device 11 is obtained.
[0024]
In the semiconductor device 11, the input / output pads 3a and the ground pads 3b on the lower surface of the base 1 are connected to predetermined signal and ground circuit conductors of an external electric circuit board via external terminals such as solder bumps. As a result, the signal and ground electrodes of the semiconductor element 6 are electrically connected to an external electric circuit.
[0025]
Further, by connecting a conductor for external connection such as a coaxial cable to the connector 5 attached to the semiconductor device 11, the electrode of the semiconductor element 6 is connected to an external device such as a communication device.
[0026]
The semiconductor device 11 causes a plurality of low-frequency band (5 to 10 GHz) electric signals supplied from an external electric circuit to be input to the semiconductor element 6 via the first wiring conductor 2a, and the semiconductor element 6 inputs these electric signals. The electric signal is synthesized into an electric signal having a high frequency band (40 to 80 GHz) and is output to the connector 5 via the second wiring conductor 4. The external communication device is connected via the connector 5. One high frequency band (40 to 80 GHz) electric signal transmitted from an external device such as an external communication device or the like to an external device such as an external communication device is transmitted through the connector 5 and the second wiring conductor 4 to the semiconductor element 6. And converts the electric signal having a high frequency band (40 to 80 GHz) inputted by the semiconductor element 6 into an electric signal having a plurality of low frequency bands (5 to 10 GHz). Both, so that these individual frequency band is supplied to an external electrical circuit through the first wiring conductor 2a low electrical signal.
[0027]
In the semiconductor element storage package and the semiconductor device using the same according to the present invention, the base 1 has a Si component of 25 to 80% by mass in terms of SiO 2 , a Ba component in a range of 15 to 70% by mass in terms of BaO, B component is 1.5 to 5% by mass in terms of B 2 O 3 , Al component is 1 to 30% by mass in terms of Al 2 O 3 , and Ca component is more than 0% by mass in terms of CaO. It is important to form a sintered body containing 30% by mass or less.
[0028]
In the substrate 1, the Si component is 25 to 80% by mass in terms of SiO 2 , the Ba component is 15 to 70% by mass in terms of BaO, and the B component is 1.5 to 5% in terms of B 2 O 3. When formed by a sintered body containing 1% to 30% by mass in terms of Al component and 1 to 30% by mass in terms of Al 2 O 3 and Ca component in excess of 0% to 30% by mass in terms of CaO, such sintering is performed. Since the relative dielectric constant of the body is as low as about 6 (room temperature, 1 MHz), the transmission speed of an electric signal transmitted through the first wiring conductor 2a and the second wiring conductor 4 formed on the base 1 can be extremely high. .
[0029]
Further, since the sintering temperature of the above-described sintered body is as low as 800 ° C. to 1000 ° C., the specific resistance of the first wiring conductor 2a and the like formed by simultaneous sintering with the base 1 is 2.5Ω · cm (20 ° C.) or less. As a result, when a high-frequency electric signal is transmitted to the first wiring conductor 2a or the like, a large attenuation does not occur in the electric signal, and the electric signal is accurately and accurately formed. It is also possible to transmit data reliably.
[0030]
The Si component constituting the substrate 1 is 25 to 80% by mass in terms of SiO 2 , the Ba component is 15 to 70% by mass in terms of BaO, and the B component is 1.70 in terms of B 2 O 3 . A sintered body containing 5 to 5% by mass, an Al component of 1 to 30% by mass in terms of Al 2 O 3 , and a Ca component of more than 0 to 30% by mass in terms of CaO is SiO 2 If the amount is less than 25% by mass, the dielectric loss increases, causing an attenuation or delay in the electric signal transmitted through the first wiring conductor 2a or the second wiring conductor 4. At the same time, the firing temperature becomes high at the same time as the mechanical strength of the first wiring conductor 1a is greatly reduced, and it becomes difficult to simultaneously fire the first wiring conductor 2a and the like made of a metal material such as copper. Therefore, the amount of SiO 2 is specified in the range of 25 to 80% by mass.
[0031]
If the content of BaO is less than 15% by mass, the firing temperature will be high, and it will be difficult to fire simultaneously with the first wiring conductor 2a made of a metal material such as copper. On the other hand, if it exceeds 70% by mass, the dielectric loss increases, causing an attenuation or delay in the electric signal transmitted through the first wiring conductor 2a or the second wiring conductor 4. Therefore, the amount of BaO is specified in the range of 15 to 70% by mass.
[0032]
Further, if B 2 O 3 is less than 1.5% by mass, the sintering temperature becomes high, and it becomes difficult to simultaneously sinter with the first wiring conductor 2a or the like made of a metal material such as copper. If it exceeds, the mechanical strength of the substrate 1 is greatly reduced. Therefore, the amount of B 2 O 3 is specified in the range of 1.5 to 5% by mass.
[0033]
Further, when the content of Al 2 O 3 is less than 1% by mass, the sintering temperature becomes high, and it becomes difficult to sinter simultaneously with the first wiring conductor 2a made of a metal material such as copper, and more than 30% by mass. As a result, the dielectric loss increases, and an electric signal transmitted through the first wiring conductor 2a or the second wiring conductor 4 is attenuated or delayed. Therefore, the amount of Al 2 O 3 is specified in the range of 1 to 30% by mass.
[0034]
Furthermore, if CaO exceeds 30% by mass, the firing temperature will be high, and it will be difficult to fire simultaneously with the first wiring conductor 2a and the like made of a metal material such as copper. Therefore, the amount of CaO is specified in a range of more than 0% by mass and 30% by mass or less.
[0035]
The base 1 made of the sintered body is made of, for example, a raw material powder such as SiO 2 , BaO, B 2 O 3 , Al 2 O 3 , CaO, etc. To make a slurry by adding a doctor sheet method and a calendar roll method to form a green sheet, and thereafter, a suitable punching process is performed on the green sheet, and a plurality of the green sheets are laminated. It is manufactured by firing at a temperature of about 800C to 1000C.
[0036]
The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the present invention.
[0037]
【The invention's effect】
According to the package for storing a semiconductor element and the semiconductor device of the present invention, the base of the package is composed of 25 to 80% by mass of Si component converted to SiO 2 , 15 to 70% by mass of Ba component converted to BaO, and B The component is 1.5 to 5% by mass in terms of B 2 O 3 , the Al component is 1 to 30% by mass in terms of Al 2 O 3 , and the Ca component is 30% in excess of 0% by mass in terms of CaO. It is formed of a sintered body containing less than 5% by mass, and since the relative dielectric constant of the sintered body is as low as about 6 (room temperature, 1 MHz), electricity transmitted through the first wiring conductor and the second wiring conductor formed on the base body. The signal transmission speed can be extremely high.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing one embodiment of a package for housing a semiconductor element of the present invention and a semiconductor device using the package for housing a semiconductor element.
[Explanation of symbols]
1 Base 1a Mounting part 2a First wiring conductor 2b Ground wiring conductor 3a Input / output pad 3b Ground pad 4 ··················································································································································································································································· lid · .... Semiconductor devices

Claims (2)

４０ＧＨｚ〜８０ＧＨｚの電気信号を送受信する半導体素子が搭載される搭載部を有する基体と、該基体の前記搭載部より下面にかけて導出されている複数個のグランド配線導体および第１配線導体と、前記基体の下面に形成され、前記グランド配線導体および第１配線導体に電気的に接続している複数個のグランド用パッドおよび入出力用パッドと、前記基体の搭載部より上面もしくは側面にかけて導出されている第２配線導体と、前記基体に取着され、前記第２配線導体に電気的に接続されているコネクターとから成り、前記基体が、Ｓｉ成分がＳｉＯ2に換算して２５乃至８０質量％、Ｂａ成分がＢａＯに換算して１５乃至７０質量％、Ｂ成分がＢ2Ｏ3に換算して１．５乃至５質量％、Ａｌ成分がＡｌ2Ｏ3に換算して１乃至３０質量％、Ｃａ成分がＣａＯに換算して０質量％を超えて３０質量％以下含まれる焼結体で形成されていることを特徴とする半導体素子収納用パッケージ。A base having a mounting portion on which a semiconductor element for transmitting and receiving electric signals of 40 GHz to 80 GHz is mounted, a plurality of ground wiring conductors and first wiring conductors extending from the mounting portion of the base to a lower surface; And a plurality of ground pads and input / output pads electrically connected to the ground wiring conductor and the first wiring conductor, and are led out from the mounting portion of the base to the upper surface or the side surface. A second wiring conductor and a connector attached to the base and electrically connected to the second wiring conductor, wherein the base has a Si content of 25 to 80% by mass in terms of SiO 2 ; Ba component in terms of BaO 15 to 70 wt%, 1.5 to 5 wt% B component in terms of B 2 O 3, 1 to 30 weight Al component in terms of Al 2 O 3 The semiconductor device package for housing, characterized in that it is formed of a sintered body Ca component is contained in terms of 30% by mass more than 0% by weight or less to CaO. 請求項１に記載の半導体素子収納用パッケージと、４０ＧＨｚ〜８０ＧＨｚの電気信号を送受信する半導体素子とから成り、前記パッケージの搭載部に半導体素子を搭載固定するとともに該半導体素子の各電極を第１配線導体および第２配線導体に電気的に接続したことを特徴とする半導体装置。2. A package for accommodating a semiconductor element according to claim 1, comprising: a semiconductor element for transmitting and receiving an electric signal of 40 GHz to 80 GHz. A semiconductor device electrically connected to a wiring conductor and a second wiring conductor.
JP2002375525A 2002-12-25 2002-12-25 Package for housing semiconductor element and semiconductor device using it Pending JP2004207523A (en)

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