JP4077769B2 - Semiconductor device - Google Patents

Semiconductor device Download PDF

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Publication number
JP4077769B2
JP4077769B2 JP2003178155A JP2003178155A JP4077769B2 JP 4077769 B2 JP4077769 B2 JP 4077769B2 JP 2003178155 A JP2003178155 A JP 2003178155A JP 2003178155 A JP2003178155 A JP 2003178155A JP 4077769 B2 JP4077769 B2 JP 4077769B2
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wiring conductor
semiconductor element
ground
bonding wire
mounting portion
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JP2005019449A (en
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幸喜 川畑
義信 澤
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Kyocera Corp
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Kyocera Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

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  • Wire Bonding (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device in which a high frequency electric signal of 40-80 GHz can be transmitted well between a semiconductor element and a connector without causing reflection, or the like. <P>SOLUTION: In the semiconductor device, a semiconductor element 6 receiving a high frequency electric signal is fixed to a package 7 comprising a substrate 1, a ground wiring conductor 2b, a first wiring conductor 2a, a ground pad 3b, an I/O pad 3a, a second wiring conductor 4, and a connector 5. The ground electrode and the I/O electrode of the semiconductor element 6 are connected electrically with the ground wiring conductor 2b, the first wiring conductor 2a and the second wiring conductor 4 through bonding wires 8a and 8b. In the semiconductor, a ground layer 9 is formed on the surface of a mounting part 1a and an extending part 9a for making the distance to the bonding wire 8b not longer than 0.2 mm is formed in a region of the ground layer 9 facing the second wiring conductor 4. <P>COPYRIGHT: (C)2005,JPO&amp;NCIPI

Description

【０００１】
【発明の属する技術分野】
本発明は高周波の電気信号を送受信する半導体素子を半導体素子収納用パッケージ内に気密に収容して成る半導体装置に関するものである。
【０００２】
【従来の技術】
近年、光通信や無線通信等の機器には多数の半導体装置が使用されており、かかる半導体装置は一般に、高周波の電気信号を送受信する半導体素子を半導体素子収納用パッケージ内に気密に収容することによって形成されている。
【０００３】
前記半導体素子収納用パッケージは、通常、図３に示すように、酸化アルミニウム質焼結体、ムライト質焼結体、窒化アルミニウム質焼結体、ガラスセラミックス等の電気絶縁材料から成り、上面に半導体素子の搭載部２１ａが形成された基体２１と、タングステン、モリブデン、マンガン、銅、銀等の金属材料から成り、基体２１の半導体素子搭載部２１ａから下面にかけて被着導出された複数の入出力用配線導体（第１配線導体）２２ａおよびグランド配線導体２２ｂと、この配線導体２２ａ、２２ｂと電気的に接続するようにして基体２１の下面に形成された複数個のグランド用パッド２３ｂおよび入出力用パッド２３ａと、基体２１の搭載部２１ａより上面もしくは側面にかけて導出されている出入力用配線導体（第２配線導体）２４と、この出入力用配線導体（第２配線導体）２４に一端が接続されるとともに他端が外部に導出されているコネクター２５とにより構成されている。
【０００４】
そして、かかる半導体素子収納用パッケージ２７には、その搭載部２１ａに電気信号を送受信する半導体素子２６がＡｕ−Ｓｎろう材あるいは半田等の接合材を介して接着固定されるとともに、半導体素子２６の入出力電極および接地電極が入出力用配線導体（第１配線導体）２２ａ、グランド配線導体２２ｂおよび出入力用配線導体（第２配線導体）２４にボンディングワイヤ２８を介して接続され、その後、必要に応じて蓋体３０等で半導体素子２６を封止することによって半導体装置となる。
【０００５】
また前記半導体装置は基体２１の下面に形成されているグランド用パッド２３ｂおよび入出力用パッド２３ａを外部電気回路基板の回路導体（図示せず）に半田バンプ等を介し接続させることによって内部に収容する半導体素子２６が外部電気回路に接続され、同時にコネクター２５に同軸ケーブル等を介し外部の通信装置等の外部機器（図示せず）を接続させることによって半導体素子２６と外部機器とが接続するようになっている。
【０００６】
なお、前記半導体装置に使用されている半導体素子２６は複数の電気信号を合成して一つの電気信号に変換する、或いは一つの電気信号を分離して複数の電気信号に変換する機能を有しており、外部電気回路から第１配線導体２２ａを介して入力される複数の周波数帯域が低い電気信号は半導体素子２６で合成されて一つの周波数帯域が高い電気信号となり、この周波数帯域の高い電気信号は第２配線導体２４を介してコネクター２５に伝送されるとともにコネクター２５より外部の通信装置等の外部機器に伝送され、またコネクター２５を介して外部機器より伝送された周波数帯域の高い電気信号は半導体素子２６で複数の周波数帯域が低い電気信号に変換され、各々の周波数帯域の低い電気信号は第１配線導体２２ａを介して外部電気回路に伝送されることとなる。
【０００７】
この場合、周波数帯域の高い電気信号が伝送される第２配線導体２４や、第２配線導体２４と接続したボンディングワイヤ２８等は、基体２１内部から搭載部２１ａ表面にかけて形成され前記グランド配線導体２２ｂと接続する広面積のグランド層２９や、グランド配線導体２２ｂと接続したボンディングワイヤ２８との間で一定の静電容量成分が生じるため、この静電容量成分の大きさに応じてインピーダンスが減少している。
【０００８】
また前記半導体装置において、半導体素子２６の入出力電極および接地電極と入出力用配線導体（第１配線導体）２２ａや出入力用配線導体（第２配線導体）２４等とを接続するボンディングワイヤ２８は一般に直径が１８μｍ〜５０μｍ、純度が９９．９％以上、破断強度が０．０５〜０．７８（Ｎ）程度の金線（Ａｕワイヤ）が使用されている。
【０００９】
【特許文献１】
特開２００２−１６４４６６号公報
【００１０】
【発明が解決しようとする課題】
しかしながら、この従来の半導体装置においては、半導体素子の電極と第２配線導体とを接続しているボンディングワイヤの破断強度が０．０５〜０．７８（Ｎ）程度であり、弱いことから外力印加によって接続領域近傍で切れるのを防止するため長さを１ｍｍ以上として余裕をもたせていること、ボンディングワイヤが一定の高さのループ形状を有しているため、ボンディングワイヤとグランド層との間の距離をあまり近づけることができず、グランド層によるインピーダンスの低減効果が第２配線導体に比べて低く、ボンディングワイヤのインピーダンスが第２配線導体のインピーダンスよりも高くなっていること等から、半導体素子とコネクターを結ぶ線路中にインピーダンスが他よりも高い領域が１ｍｍ以上の長さにわたって形成されていることとなる。そのため、この第２配線導体とボンディングワイヤとを介してコネクターと半導体素子との間に４０ＧＨｚ〜８０ＧＨｚの高周波の電気信号を伝送させた場合、インピーダンスが高いボンディングワイヤで信号に反射等を起こし、伝送特性が大きく劣化するという欠点を有していた。
【００１１】
本発明は上記欠点に鑑み案出されたもので、その目的は半導体素子とコネクターとの間に４０ＧＨｚ〜８０ＧＨｚの高周波の電気信号を反射等を起こすことなく良好に伝送させることができる半導体装置を提供することにある。
【００１２】
【課題を解決するための手段】
本発明は、半導体素子が搭載される搭載部を有する基体と、該基体の前記搭載部近傍より下面にかけて導出されている複数個のグランド配線導体および第１配線導体と、前記基体の下面に形成され、前記グランド配線導体および第１配線導体に電気的に接続している複数個のグランド用パッドおよび入出力用パッドと、前記基体の搭載部より上面もしくは側面にかけて導出されている第２配線導体と、前記第２配線導体に電気的に接続されているコネクターとを具備する半導体素子収納用パッケージと、４０ＧＨｚ乃至８０ＧＨｚの電気信号を送受信する半導体素子とで構成され、前記半導体素子収納用パッケージの搭載部に半導体素子を搭載固定するとともに該半導体素子の接地電極および入出力電極をグランド配線導体、第１配線導体、第２配線導体の端部にボンディングワイヤを介し電気的に接続して成る半導体装置であって、前記搭載部の表面にグランド層が形成されており、該グランド層のうち前記第２配線導体と対向する領域の一部に、前記ボンディングワイヤとの距離を０．２ｍｍ以下とする延出部が形成されており、前記コネクターは、前記基体における前記第２配線導体が形成された面と側面との間の切り欠きに、上側が開放されるように取着されていることを特徴とするものである。
【００１３】
本発明の半導体装置によれば、搭載部の表面にグランド層が形成されており、該グランド層のうち前記第２配線導体と対向する領域の一部に、前記ボンディングワイヤとの距離を０．２ｍｍ以下とする延出部が形成されていることから、延出部においてグランド層とボンディングワイヤとの間の距離を極めて近いものとすることができ、これに応じてボンディングワイヤのインピーダンスを効果的に低くすることができ、ボンディングワイヤのインピーダンスを第２配線導体のインピーダンスに近似させることができる。その結果、第２配線導体とボンディングワイヤとを介してコネクターと半導体素子との間に４０ＧＨｚ〜８０ＧＨｚの高周波の電気信号を伝送させた場合、第２配線導体と半導体素子とを接続するボンディングワイヤの長さが１ｍｍ以上であったとしても、信号に大きな反射等を起こすことはほとんどなく、伝送特性を優れたものとなすことができる。
【００１４】
【発明の実施の形態】
次に、本発明を添付図面に基づき詳細に説明する。
【００１５】
図１は本発明の半導体装置の一実施例を示し、半導体素子収納用パッケージ７内に半導体素子６を収容して構成されている。
【００１６】
前記半導体素子収納用パッケージ７は、基体１、第１配線導体２ａ、グランド配線導体２ｂ、入出力用パッド３ａ、グランド用パッド３ｂ、第２配線導体４およびコネクター５により形成されている。
【００１７】
前記基体１は酸化アルミニウム質焼結体、ムライト質焼結体、ガラスセラミックス、窒化アルミニウム質焼結体等の電気絶縁材料から成り、例えば、酸化アルミニウム質焼結体から成る場合、酸化アルミニウム、酸化ケイ素、酸化マグネシウム、酸化カルシウム等の原料粉末に適当な有機溶剤、溶媒、可塑剤、分散剤を添加混合して泥漿物を作り、この泥漿物を従来周知のドクターブレード法やカレンダーロール法等のシート形成法を採用しシート状に形成してセラミックグリーンシート（セラミック生シート）を得、しかる後、それらセラミックグリーンシートに適当な打ち抜き加工を施すとともにこれを必要に応じて複数枚積層し、約１６００℃の高温で焼成することによって製作される。
【００１８】
また前記基体１は、半導体素子の搭載部１ａから下面にかけて複数個の第１配線導体２ａおよびグランド配線導体２ｂが形成されており、該各配線導体２ａ、２ｂは半導体素子６の入出力電極および接地電極を入出力用パッド３ａやグランド用パッド３ｂに接続するための導電路として作用し、搭載部１ａ側の一端には半導体素子６の入出力電極および接地電極がボンディングワイヤ８ａを介して電気的に接続される。
【００１９】
なお、前記グランド配線導体２ｂの一部は、基体１の内部から搭載部１ａ表面にかけて形成された広面積のグランド層９と接続しており、これにより半導体素子６が搭載される搭載部１ａ表面が接地されている。
【００２０】
前記第１配線導体２ａおよびグランド配線導体２ｂ、入出力用パッド３ａ、グランド用パッド３ｂおよびグランド層９は、銅、銀、金、パラジウム、タングステン、モリブデン、マンガン等の金属材料から成り、例えば銅から成る場合であれば、銅粉末に有機溶剤を添加して成る金属ペーストを基体１となるセラミックグリーンシートの表面にスクリーン印刷等により所定パターンに印刷しておくことによって形成される。
【００２１】
この第１配線導体２ａおよびグランド配線導体２ｂの基体１下面側の一端は、それぞれ対応する入出力用パッド３ａおよびグランド用パッド３ｂと電気的に接続しており、これらの入出力用パッド３ａ、グランド用パッド３ｂを外部電気回路の所定の信号用や接地用等の回路導体に接続することにより、半導体素子６の入出力電極および接地電極が外部電気回路と電気的に接続される。
【００２２】
また前記基体１は、半導体素子の搭載部１ａから上面や側面等にかけて第２配線導体４が形成されており、該第２配線導体４は半導体素子６の入出力電極をコネクター５の線材５ａに接続するための導電路として作用し、搭載部１ａ側の一端には半導体素子６の入出力電極がボンディングワイヤ８ｂを介して電気的に接続される。
【００２３】
前記第２配線導体４は、上述の第１配線導体２ａ等と同様に、銅、銀、金、パラジウム、タングステン、モリブデン、マンガン等の金属材料から成り、例えば銅から成る場合であれば、銅粉末に有機溶剤等を添加して成る金属ペーストを基体１となるセラミックグリーンシートの表面にスクリーン印刷等により所定パターンに印刷しておくことによって形成される。
【００２４】
この第２配線導体４の基体１外表面側の一端はコネクター５の線材５ａと電気的に接続しており、このコネクター５を同軸ケーブル等を介して通信装置等の外部機器に接続することにより半導体素子６と外部機器との間で高周波信号の送受信が行われる。
【００２５】
前記コネクター５は、半導体素子収納用パッケージ７の第２配線導体４を同軸ケーブル等を介して外部機器に接続するための接続体として作用し、例えば、鉄−ニッケル−コバルト合金等の金属の線材５ａの周囲を、ホウ珪酸系ガラス等の絶縁性の外囲体５ｂで取り囲んだ構造である。
【００２６】
前記線材５ａと外囲体５ｂとから成るコネクター５は、例えば、鉄−ニッケル−コバルト合金から成る線材５ａを、鉄−ニッケル−コバルト合金等の金属から成る円筒状の容器の中央にセットし、容器内にホウ珪酸ガラス等のガラス粉末を充填した後、ガラス粉末を加熱溶融させて線材５ａの周囲に被着させることによって製作される。
【００２７】
かくして上述の半導体素子収納用パッケージによれば、基体１の搭載部１ａに半導体素子６を搭載するとともにガラス、樹脂、ロウ材等の接着材を介して固定し、しかる後、半導体素子６の入出力電極および接地電極を第１配線導体２ａ、グランド配線導体２ｂおよび第２配線導体４に、ボンディングワイヤ８ａ、８ｂを介して接続し、最後に蓋体１０を基体１の上面に封止材を介して接合させ、半導体素子６を気密に封入することによって半導体装置１１となる。
【００２８】
この半導体装置１１は基体１下面の入出力用パッド３ａおよびグランド用パッド３ｂが外部電気回路基板の所定の信号用や接地用等の回路導体に半田バンプ等の外部端子を介して接続され、これによって半導体素子６の入出力電極および接地電極は外部電気回路と電気的に接続される。
【００２９】
また、この半導体装置１１に取着されているコネクター５の線材５ａに同軸ケーブル等の外部接続用の導線を接続することにより、半導体素子６の電極が通信装置等の外部機器に接続される。
【００３０】
そしてかかる半導体装置１１は、外部電気回路から供給される複数の周波数帯域が低い（５〜１０ＧＨｚ）電気信号を第１配線導体２ａを介して半導体素子６に入力させ、半導体素子６でこれら入力された電気信号を合成して、一つの周波数帯域が高い（４０〜８０ＧＨｚ）電気信号とするとともにこれを第２配線導体４を介してコネクター５に出力し、該コネクター５の線材５ａを介して外部の通信装置等の外部機器に伝送する、或いは、外部の通信装置等の外部機器から伝送された一つの周波数帯域が高い（４０〜８０ＧＨｚ）電気信号をコネクター５の線材５ａ及び第２配線導体４を介して半導体素子６に入力し、半導体素子６で入力された周波数帯域が高い（４０〜８０ＧＨｚ）電気信号を複数の周波数帯域が低い（５〜１０ＧＨｚ）電気信号に変換するとともにこれらの個々の周波数帯域が低い電気信号を第１配線導体２ａを介して外部電気回路に供給することとなる。
【００３１】
本発明の半導体装置１１においては、図２に示すように、搭載部表面のグランド層９のうち、第２配線導体４と対向する領域の一部に、第２配線導体４と半導体素子６の入出力電極とを接続するボンディングワイヤ８ｂとの距離を０．２ｍｍ以下とする延出部９ａを形成しておくことが重要である。
【００３２】
前記グランド層９の一部に、前記ボンディングワイヤ８ｂとの距離を０．２ｍｍ以下とする延出部９ａを形成しておくと、この延出部９ａにおいてグランド層９と第２配線導体４との間の距離を０．２ｍｍ以下と極めて近いものとすることができ、これに応じて第２配線導体４と半導体素子６の入出力電極とを接続するボンディングワイヤ８ｂのインピーダンスを効果的に低くすることができ、ボンディングワイヤ８ｂのインピーダンスを第２配線導体４のインピーダンスに近似させることができる。その結果、第２配線導体４とボンディングワイヤ８ｂとを介してコネクター５と半導体素子６との間に４０ＧＨｚ〜８０ＧＨｚの高周波の電気信号を伝送させた場合、第２配線導体４と半導体素子６とを接続するボンディングワイヤ８ｂの長さが１ｍｍ以上であったとしても、信号に大きな反射等を起こすことはほとんどなく、伝送特性を優れたものとなすことができる。
【００３３】
このような延出部９ａは、例えば、基体１の搭載部１ａを取り囲む枠状の部位の内側面のうち、第２配線導体４と対向する部位に、グランド層９と同様の金属材料（銅、銀、金、パラジウム、タングステン、モリブデン、マンガン等）を四角形状等の形状で被着させておくことにより形成される。
【００３４】
延出部９ａは、通常はグランド層９を形成する金属材料と同じ金属材料により形成され、例えば、銅から成る場合であれば、銅粉末に有機溶剤等を添加して成る金属ペーストを基体１となるセラミックグリーンシートのうち、搭載部１ａを取り囲む部位の側壁面の所定位置にスクリーン印刷等により所定パターンに印刷しておくことによって形成される。
【００３５】
この場合、延出部９ａは、少なくとも第２配線導体４と同程度の幅で形成しておくことが好ましい。このような幅で形成しておくことにより、ボンディングワイヤ８ｂの下側近くに十分な幅でグランドを位置させることができるため、より一層確実にボンディングワイヤ８ｂのインピーダンスを第２配線導体４と近似する程度に低くすることができる。
【００３６】
また、前記グランド層９の延出部９ａを、搭載部１ａを取り囲む基体１の枠状の部位の内側面に形成する場合、その内側面は、少なくとも延出部９ａが形成されている部位において、上端から下端にかけて、搭載部１ａの内側に傾斜するような傾斜面としておいてもよい。この場合、ボンディングワイヤ８ｂのうちグランド層９の延出部９ａと対向する長さがより長くなるので、より一層効果的にボンディングワイヤ８ｂのインピーダンスを低減することができ、より一層確実に４０〜８０ＧＨｚの周波数帯域の高い電気信号の伝送特性に優れた半導体装置を形成することができる。
【００３７】
なお、延出部９ａは、四角形状のパターンの場合、長方形状に限らず、ボンディングワイヤ８ｂに近い部分ほどその幅が広くなるような台形状であったり、角部を円弧状に成形して角部から剥がれる危険性を低減したような形状であったりしてもよい。また、四角形状に限らず、円弧状、楕円円弧状等でもよい。
【００３８】
また、ボンディングワイヤ８ｂおよび第２配線導体４は、断面積を同一としておくことが好ましい。両者の断面積を同一としておくことにより、より一層確実に両者のインピーダンスを整合させることができ、４０〜８０ＧＨｚの高周波の電気信号の伝送特性をより一層優れたものとすることができる。
【００３９】
また、前記第２配線導体４と半導体素子６の入出力電極とを接続するボンディングワイヤ８ｂは、そのループ高さを極力低くしておくことが好ましい。ループ高さを低くしておくと、ボンディングワイヤ８ｂと延出部９ａとの間の距離を０．２ｍｍ以下とすることが、より一層容易かつ確実なものとなり、４０〜８０ＧＨｚの高周波の電気信号の伝送特性に優れた半導体装置の形成がより一層容易かつ確実なものとなる。
【００４０】
なお、前記第２配線導体４と半導体素子６の入出力電極とのボンディングワイヤ８ｂを介しての接続は、例えば、ウエッジボンド法、具体的には、ボンディングワイヤ８ｂをボンディング装置のワイヤ用キャピラリを通して第２配線導体４や半導体素子６の入出力電極に当接させるとともに、キャピラリ先端の楔状の部分でボンディングワイヤ８ｂを接続部位に押し付け、超音波振動、接合することによって、第２配線導体４と半導体素子６の入出力電極に接続される。この場合、ボンディングワイヤは、例えばボールボンド法によるように第２配線導体４等に接合させるために先端部分を溶融させて金属ボールを形成させるような必要がなく、キャピラリの移動角度によりループ高さを低く調整することができるため、ボンディングワイヤ８ｂのループの高さが必要以上に高くなることを効果的に防止することができる。
【００４１】
また、本発明は上述の実施例に限定されるものではなく、本発明の要旨を逸脱しない範囲であれば種々の変更は可能である。
【００４２】
【発明の効果】
本発明の半導体装置によれば、搭載部の表面にグランド層が形成されており、該グランド層のうち前記第２配線導体と対向する領域の一部に、前記ボンディングワイヤとの距離を０．２ｍｍ以下とする延出部が形成されていることから、延出部においてグランド層とボンディングワイヤとの間の距離を極めて近いものとすることができ、これに応じてボンディングワイヤのインピーダンスを効果的に低くすることができ、ボンディングワイヤのインピーダンスを第２配線導体のインピーダンスに近似させることができる。その結果、第２配線導体とボンディングワイヤとを介してコネクターと半導体素子との間に４０ＧＨｚ〜８０ＧＨｚの高周波の電気信号を伝送させた場合、第２配線導体と半導体素子とを接続するボンディングワイヤの長さが１ｍｍ以上であったとしても、信号に大きな反射等を起こすことはほとんどなく、伝送特性を優れたものとなすことができる。
【図面の簡単な説明】
【図１】本発明の半導体装置の一実施例を示す断面図である。
【図２】図１に示す半導体装置の要部拡大断面図である。
【図３】従来の半導体装置の断面図である。
【符号の説明】
１・・・・・・基体
１ａ・・・・・搭載部
２ａ・・・・・第１配線導体
２ｂ・・・・・グランド配線導体
３ａ・・・・・入出力用パッド
３ｂ・・・・・グランド用パッド
４・・・・・・第２配線導体
５・・・・・・コネクター
５ａ・・・・・線材
５ｂ・・・・・外囲体
６・・・・・・半導体素子
７・・・・・・半導体素子収納用パッケージ
８ａ、８ｂ・・ボンディングワイヤ
９・・・・・・グランド層
９ａ・・・・・延出部
１０・・・・・蓋体
１１・・・・・半導体装置[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device in which a semiconductor element that transmits and receives high-frequency electrical signals is hermetically accommodated in a package for housing a semiconductor element.
[0002]
[Prior art]
In recent years, a large number of semiconductor devices are used in devices such as optical communication and wireless communication, and such semiconductor devices generally contain a semiconductor element that transmits and receives high-frequency electrical signals in a package for housing a semiconductor element. Is formed by.
[0003]
As shown in FIG. 3, the package for housing a semiconductor element is usually made of an electrically insulating material such as an aluminum oxide sintered body, a mullite sintered body, an aluminum nitride sintered body, or a glass ceramic. A base 21 on which an element mounting portion 21a is formed, and a plurality of input / output inputs made of a metal material such as tungsten, molybdenum, manganese, copper, silver, and the like, which are deposited from the semiconductor element mounting portion 21a of the base 21 to the lower surface. A wiring conductor (first wiring conductor) 22a and a ground wiring conductor 22b, a plurality of ground pads 23b formed on the lower surface of the base 21 so as to be electrically connected to the wiring conductors 22a and 22b, and input / output The pad 23a and the input / output wiring conductor (second wiring conductor) 2 led out from the mounting portion 21a of the base body 21 to the upper surface or the side surface. When it is constituted by a connector 25 to which the other end with one end connected to the input and output wiring conductor (second wiring conductor) 24 is led to the outside.
[0004]
In the semiconductor element storage package 27, a semiconductor element 26 that transmits and receives electrical signals to the mounting portion 21a is bonded and fixed via a bonding material such as an Au—Sn brazing material or solder. The input / output electrodes and the ground electrode are connected to the input / output wiring conductor (first wiring conductor) 22a, the ground wiring conductor 22b, and the input / output wiring conductor (second wiring conductor) 24 through the bonding wires 28, and then required. Accordingly, the semiconductor element 26 is sealed with the lid 30 or the like, so that a semiconductor device is obtained.
[0005]
The semiconductor device is housed inside by connecting a ground pad 23b and an input / output pad 23a formed on the lower surface of the base 21 to a circuit conductor (not shown) of an external electric circuit board via a solder bump or the like. The semiconductor element 26 is connected to an external electric circuit, and at the same time, an external device (not shown) such as an external communication device is connected to the connector 25 via a coaxial cable or the like so that the semiconductor element 26 and the external device are connected. It has become.
[0006]
The semiconductor element 26 used in the semiconductor device has a function of synthesizing and converting a plurality of electric signals into one electric signal, or separating one electric signal and converting it into a plurality of electric signals. A plurality of low frequency band electric signals input from the external electric circuit via the first wiring conductor 22a are combined by the semiconductor element 26 to become one high frequency electric signal. The signal is transmitted to the connector 25 through the second wiring conductor 24 and is transmitted from the connector 25 to an external device such as an external communication device. The electrical signal having a high frequency band is transmitted from the external device through the connector 25. Are converted into electric signals having a plurality of low frequency bands by the semiconductor element 26, and the electric signals having a low frequency band are converted to external electric circuits via the first wiring conductors 22a. The be transmitted to.
[0007]
In this case, the second wiring conductor 24 through which an electric signal having a high frequency band is transmitted, the bonding wire 28 connected to the second wiring conductor 24, and the like are formed from the inside of the base 21 to the surface of the mounting portion 21a, and the ground wiring conductor 22b. Since a certain electrostatic capacitance component is generated between the large-area ground layer 29 connected to the bonding wire 28 and the bonding wire 28 connected to the ground wiring conductor 22b, the impedance decreases according to the magnitude of the electrostatic capacitance component. ing.
[0008]
In the semiconductor device, the bonding wires 28 for connecting the input / output electrodes and ground electrodes of the semiconductor element 26 to the input / output wiring conductor (first wiring conductor) 22a, the input / output wiring conductor (second wiring conductor) 24, and the like. In general, a gold wire (Au wire) having a diameter of 18 μm to 50 μm, a purity of 99.9% or more, and a breaking strength of about 0.05 to 0.78 (N) is used.
[0009]
[Patent Document 1]
Japanese Patent Laid-Open No. 2002-164466
[Problems to be solved by the invention]
However, in this conventional semiconductor device, since the breaking strength of the bonding wire connecting the electrode of the semiconductor element and the second wiring conductor is about 0.05 to 0.78 (N) and is weak, external force is applied. In order to prevent cutting near the connection region, the length is set to 1 mm or more, and the bonding wire has a loop shape with a certain height, so that the gap between the bonding wire and the ground layer is Since the distance cannot be made too close, the impedance reduction effect by the ground layer is lower than that of the second wiring conductor, the impedance of the bonding wire is higher than the impedance of the second wiring conductor, etc. A region with a higher impedance than the others in the line connecting the connectors is formed over a length of 1 mm or more. And thus it is. Therefore, when a high frequency electrical signal of 40 GHz to 80 GHz is transmitted between the connector and the semiconductor element via the second wiring conductor and the bonding wire, the signal is reflected and transmitted by the bonding wire having a high impedance. It had the disadvantage that the characteristics deteriorated greatly.
[0011]
The present invention has been devised in view of the above-mentioned drawbacks, and its purpose is to provide a semiconductor device that can transmit a high-frequency electric signal of 40 GHz to 80 GHz between a semiconductor element and a connector without causing reflection or the like. It is to provide.
[0012]
[Means for Solving the Problems]
The present invention includes a base having a mounting portion on which a semiconductor element is mounted, a plurality of ground wiring conductors and first wiring conductors led from the vicinity of the mounting portion to the lower surface of the base, and formed on the lower surface of the base A plurality of ground pads and input / output pads electrically connected to the ground wiring conductor and the first wiring conductor, and a second wiring conductor led out from the mounting portion of the base to the upper surface or the side surface. And a semiconductor element storage package comprising: a connector electrically connected to the second wiring conductor; and a semiconductor element that transmits and receives an electrical signal of 40 GHz to 80 GHz, and the semiconductor element storage package includes: The semiconductor element is mounted and fixed on the mounting portion, and the ground electrode and the input / output electrode of the semiconductor element are connected to the ground wiring conductor, the first wiring conductor, A semiconductor device in which two wiring conductors are electrically connected to each other through a bonding wire, wherein a ground layer is formed on a surface of the mounting portion, and the second wiring conductor of the ground layer is opposed to the second wiring conductor. An extension portion having a distance of 0.2 mm or less with respect to the bonding wire is formed in a part of the region to be connected, and the connector is formed between the surface of the base body on which the second wiring conductor is formed and the side surface. It is characterized by being attached so that the upper side is opened in the notch between them.
[0013]
According to the semiconductor device of the present invention, the ground layer is formed on the surface of the mounting portion, and the distance from the bonding wire to the portion of the ground layer facing the second wiring conductor is set to 0. Since the extension part of 2 mm or less is formed, the distance between the ground layer and the bonding wire can be made extremely short in the extension part, and the impedance of the bonding wire is effectively reduced accordingly. The impedance of the bonding wire can be approximated to the impedance of the second wiring conductor. As a result, when a high-frequency electrical signal of 40 GHz to 80 GHz is transmitted between the connector and the semiconductor element via the second wiring conductor and the bonding wire, the bonding wire for connecting the second wiring conductor and the semiconductor element is obtained. Even if the length is 1 mm or more, the signal hardly undergoes a large reflection or the like, and the transmission characteristics can be improved.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
Next, the present invention will be described in detail with reference to the accompanying drawings.
[0015]
FIG. 1 shows an embodiment of a semiconductor device of the present invention, in which a semiconductor element 6 is accommodated in a semiconductor element accommodation package 7.
[0016]
The semiconductor element housing package 7 is formed of a base 1, a first wiring conductor 2a, a ground wiring conductor 2b, an input / output pad 3a, a ground pad 3b, a second wiring conductor 4 and a connector 5.
[0017]
The substrate 1 is made of an electrically insulating material such as an aluminum oxide sintered body, a mullite sintered body, a glass ceramic, an aluminum nitride sintered body. For example, when the substrate 1 is made of an aluminum oxide sintered body, An appropriate organic solvent, solvent, plasticizer, and dispersing agent are added to and mixed with raw material powders such as silicon, magnesium oxide, and calcium oxide to make a mud, and this mud is made by a conventionally known doctor blade method, calender roll method, etc. A ceramic green sheet (ceramic green sheet) is obtained by forming a sheet by using a sheet forming method, and then appropriately punching the ceramic green sheet and laminating a plurality of sheets as necessary. It is manufactured by firing at a high temperature of 1600 ° C.
[0018]
The base 1 is formed with a plurality of first wiring conductors 2a and ground wiring conductors 2b from the semiconductor element mounting portion 1a to the lower surface, and the wiring conductors 2a and 2b are connected to input / output electrodes of the semiconductor element 6 and It acts as a conductive path for connecting the ground electrode to the input / output pad 3a and the ground pad 3b, and the input / output electrode and the ground electrode of the semiconductor element 6 are electrically connected to one end of the mounting portion 1a via the bonding wire 8a. Connected.
[0019]
Note that a part of the ground wiring conductor 2b is connected to a large-area ground layer 9 formed from the inside of the base 1 to the surface of the mounting portion 1a, whereby the surface of the mounting portion 1a on which the semiconductor element 6 is mounted. Is grounded.
[0020]
The first wiring conductor 2a, the ground wiring conductor 2b, the input / output pad 3a, the ground pad 3b, and the ground layer 9 are made of a metal material such as copper, silver, gold, palladium, tungsten, molybdenum, manganese, for example, copper. In the case of comprising, a metal paste obtained by adding an organic solvent to copper powder is printed on the surface of the ceramic green sheet serving as the substrate 1 in a predetermined pattern by screen printing or the like.
[0021]
One end of the first wiring conductor 2a and the ground wiring conductor 2b on the lower surface side of the base 1 is electrically connected to the corresponding input / output pad 3a and ground pad 3b, respectively. By connecting the ground pad 3b to a predetermined signal conductor or ground circuit conductor of the external electric circuit, the input / output electrodes and the ground electrode of the semiconductor element 6 are electrically connected to the external electric circuit.
[0022]
The base 1 has a second wiring conductor 4 formed from the semiconductor element mounting portion 1a to the upper surface, side surface, and the like. The second wiring conductor 4 uses the input / output electrodes of the semiconductor element 6 as the wire 5a of the connector 5. It acts as a conductive path for connection, and an input / output electrode of the semiconductor element 6 is electrically connected to one end on the mounting portion 1a side via a bonding wire 8b.
[0023]
The second wiring conductor 4 is made of a metal material such as copper, silver, gold, palladium, tungsten, molybdenum, manganese, etc., like the first wiring conductor 2a described above. It is formed by printing a metal paste formed by adding an organic solvent or the like to the powder on the surface of the ceramic green sheet serving as the substrate 1 in a predetermined pattern by screen printing or the like.
[0024]
One end of the second wiring conductor 4 on the outer surface side of the base 1 is electrically connected to the wire 5a of the connector 5, and the connector 5 is connected to an external device such as a communication device via a coaxial cable or the like. High frequency signals are transmitted and received between the semiconductor element 6 and the external device.
[0025]
The connector 5 acts as a connection body for connecting the second wiring conductor 4 of the package 7 for housing a semiconductor element to an external device via a coaxial cable or the like. For example, a metal wire such as iron-nickel-cobalt alloy This is a structure in which the periphery of 5a is surrounded by an insulating envelope 5b such as borosilicate glass.
[0026]
The connector 5 consisting of the wire 5a and the enclosure 5b is set, for example, by setting the wire 5a made of iron-nickel-cobalt alloy in the center of a cylindrical container made of metal such as iron-nickel-cobalt alloy, After the container is filled with glass powder such as borosilicate glass, the glass powder is heated and melted and deposited around the wire 5a.
[0027]
Thus, according to the package for housing a semiconductor element described above, the semiconductor element 6 is mounted on the mounting portion 1a of the base 1 and fixed through an adhesive such as glass, resin, brazing material, and then the semiconductor element 6 is inserted. The output electrode and the ground electrode are connected to the first wiring conductor 2a, the ground wiring conductor 2b, and the second wiring conductor 4 via bonding wires 8a and 8b, and finally the lid 10 is sealed on the upper surface of the base body 1. The semiconductor device 11 is formed by sealing the semiconductor element 6 in an airtight manner.
[0028]
In this semiconductor device 11, input / output pads 3a and ground pads 3b on the lower surface of the substrate 1 are connected to predetermined signal or ground circuit conductors of an external electric circuit board via external terminals such as solder bumps. Thus, the input / output electrode and the ground electrode of the semiconductor element 6 are electrically connected to the external electric circuit.
[0029]
Further, by connecting an external connection conductor such as a coaxial cable to the wire 5a of the connector 5 attached to the semiconductor device 11, the electrode of the semiconductor element 6 is connected to an external device such as a communication device.
[0030]
The semiconductor device 11 inputs a plurality of low frequency band (5 to 10 GHz) electric signals supplied from an external electric circuit to the semiconductor element 6 through the first wiring conductor 2a, and these are input by the semiconductor element 6. The electric signal is synthesized to produce an electric signal having a high frequency band (40 to 80 GHz) and output to the connector 5 through the second wiring conductor 4, and externally through the wire 5a of the connector 5. An electrical signal transmitted from an external device such as an external communication device or from one external device such as an external communication device (40 to 80 GHz) is transmitted as an electric signal having a high frequency band (40 to 80 GHz). Are input to the semiconductor element 6 through the semiconductor element 6, and an electric signal having a high frequency band (40 to 80 GHz) input by the semiconductor element 6 is transmitted to a plurality of low frequency bands (5 to 10 GHz The supplying to the external electrical circuit through the first wiring conductor 2a of these individual frequency band lower electrical signals and converts into an electrical signal.
[0031]
In the semiconductor device 11 of the present invention, as shown in FIG. 2, the second wiring conductor 4 and the semiconductor element 6 are formed in a part of a region facing the second wiring conductor 4 in the ground layer 9 on the surface of the mounting portion. It is important to form an extension portion 9a having a distance of 0.2 mm or less from the bonding wire 8b connecting the input / output electrodes.
[0032]
If an extension portion 9a having a distance of 0.2 mm or less from the bonding wire 8b is formed in a part of the ground layer 9, the ground layer 9 and the second wiring conductor 4 are connected to the extension portion 9a. The distance between the second wiring conductor 4 and the input / output electrode of the semiconductor element 6 can be effectively reduced accordingly. The impedance of the bonding wire 8b can be approximated to the impedance of the second wiring conductor 4. As a result, when a high frequency electrical signal of 40 GHz to 80 GHz is transmitted between the connector 5 and the semiconductor element 6 via the second wiring conductor 4 and the bonding wire 8b, the second wiring conductor 4 and the semiconductor element 6 Even if the length of the bonding wire 8b for connecting is 1 mm or more, the signal hardly undergoes a large reflection or the like, and the transmission characteristics can be improved.
[0033]
Such an extended portion 9a is formed, for example, on the inner surface of the frame-shaped portion surrounding the mounting portion 1a of the base 1 at the portion facing the second wiring conductor 4 by using the same metal material (copper as the ground layer 9). , Silver, gold, palladium, tungsten, molybdenum, manganese, etc.) in a rectangular shape or the like.
[0034]
The extending portion 9a is usually formed of the same metal material as that for forming the ground layer 9. For example, in the case of copper, a metal paste obtained by adding an organic solvent or the like to copper powder is used as the base 1. The ceramic green sheet is formed by printing a predetermined pattern on a side wall surface of a portion surrounding the mounting portion 1a by screen printing or the like.
[0035]
In this case, it is preferable that the extending portion 9a is formed with a width at least equal to that of the second wiring conductor 4. By forming with such a width, the ground can be positioned with a sufficient width near the lower side of the bonding wire 8b, so that the impedance of the bonding wire 8b can be more closely approximated to the second wiring conductor 4. It can be made low enough.
[0036]
Further, when the extending portion 9a of the ground layer 9 is formed on the inner surface of the frame-shaped portion of the base body 1 surrounding the mounting portion 1a, the inner surface is at least at the portion where the extending portion 9a is formed. Further, an inclined surface may be provided so as to be inclined inward of the mounting portion 1a from the upper end to the lower end. In this case, since the length of the bonding wire 8b facing the extending portion 9a of the ground layer 9 becomes longer, the impedance of the bonding wire 8b can be more effectively reduced, and the more reliable A semiconductor device having excellent electric signal transmission characteristics in a high frequency band of 80 GHz can be formed.
[0037]
In addition, in the case of a square pattern, the extending portion 9a is not limited to a rectangular shape, but has a trapezoidal shape in which the width becomes wider near the bonding wire 8b, or a corner portion is formed in an arc shape. The shape may reduce the risk of peeling from the corner. Further, the shape is not limited to a rectangular shape, and may be an arc shape, an elliptical arc shape, or the like.
[0038]
The bonding wire 8b and the second wiring conductor 4 preferably have the same cross-sectional area. By making both the cross-sectional areas the same, both impedances can be more reliably matched, and the transmission characteristics of high-frequency electric signals of 40 to 80 GHz can be further improved.
[0039]
The bonding wire 8b that connects the second wiring conductor 4 and the input / output electrodes of the semiconductor element 6 preferably has a loop height as low as possible. If the loop height is kept low, the distance between the bonding wire 8b and the extending portion 9a can be set to 0.2 mm or less more easily and reliably, and a high-frequency electric signal of 40 to 80 GHz. Therefore, the formation of a semiconductor device having excellent transmission characteristics can be made easier and more reliable.
[0040]
The connection between the second wiring conductor 4 and the input / output electrode of the semiconductor element 6 through the bonding wire 8b is, for example, a wedge bonding method, specifically, the bonding wire 8b is passed through a wire capillary of a bonding apparatus. The second wiring conductor 4 and the input / output electrodes of the semiconductor element 6 are brought into contact with each other, and the bonding wire 8b is pressed against the connection portion at the wedge-shaped portion at the tip of the capillary, and is ultrasonically vibrated and bonded. It is connected to the input / output electrodes of the semiconductor element 6. In this case, the bonding wire does not need to have a metal ball formed by melting the tip portion to be bonded to the second wiring conductor 4 or the like, for example, by the ball bond method, and the loop height depends on the moving angle of the capillary. Since the height of the loop of the bonding wire 8b can be effectively prevented from being increased more than necessary.
[0041]
The present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the gist of the present invention.
[0042]
【The invention's effect】
According to the semiconductor device of the present invention, the ground layer is formed on the surface of the mounting portion, and the distance from the bonding wire to the portion of the ground layer facing the second wiring conductor is set to 0. Since the extension part of 2 mm or less is formed, the distance between the ground layer and the bonding wire can be made extremely short in the extension part, and the impedance of the bonding wire is effectively reduced accordingly. The impedance of the bonding wire can be approximated to the impedance of the second wiring conductor. As a result, when a high-frequency electrical signal of 40 GHz to 80 GHz is transmitted between the connector and the semiconductor element via the second wiring conductor and the bonding wire, the bonding wire for connecting the second wiring conductor and the semiconductor element is obtained. Even if the length is 1 mm or more, the signal hardly undergoes a large reflection or the like, and the transmission characteristics can be improved.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing an embodiment of a semiconductor device of the present invention.
2 is an enlarged cross-sectional view of a main part of the semiconductor device shown in FIG.
FIG. 3 is a cross-sectional view of a conventional semiconductor device.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Base 1a ... Mounting part 2a ... 1st wiring conductor 2b ... Ground wiring conductor 3a ... Input / output pad 3b ...・ Ground pad 4 ・ ・ ・ ・ ・ ・ Second wiring conductor 5 ・ ・ ・ ・ ・ ・ Connector 5 a ..Wire material 5 b. ...... Semiconductor element storage packages 8a, 8b... Bonding wire 9... Ground layer 9a. apparatus

Claims (1)

半導体素子が搭載される搭載部を有する基体と、該基体の前記搭載部近傍より下面にかけて導出されている複数個のグランド配線導体および第１配線導体と、前記基体の下面に形成され、前記グランド配線導体および第１配線導体に電気的に接続している複数個のグランド用パッドおよび入出力用パッドと、前記基体の搭載部より上面もしくは側面にかけて導出されている第２配線導体と、前記第２配線導体に電気的に接続されているコネクターとを具備する半導体素子収納用パッケージと、
４０ＧＨｚ乃至８０ＧＨｚの電気信号を送受信する半導体素子とで構成され、
前記半導体素子収納用パッケージの搭載部に半導体素子を搭載固定するとともに該半導体素子の接地電極および入出力電極をグランド配線導体、第１配線導体、第２配線導体の端部にボンディングワイヤを介し電気的に接続して成る半導体装置であって、
前記搭載部の表面にグランド層が形成されており、該グランド層のうち前記第２配線導体と対向する領域の一部に、前記ボンディングワイヤとの距離を０．２ｍｍ以下とする延出部が形成されており、
前記コネクターは、前記基体における前記第２配線導体が形成された面と側面との間の切り欠きに、上側が開放されるように取着されていることを特徴とする半導体装置。A base having a mounting portion on which a semiconductor element is mounted; a plurality of ground wiring conductors and first wiring conductors extending from the vicinity of the mounting portion to the lower surface of the base; and the lower surface of the base. A plurality of ground pads and input / output pads electrically connected to the wiring conductor and the first wiring conductor; a second wiring conductor led out from the mounting portion of the base to the upper surface or side surface; A semiconductor element storage package comprising a connector electrically connected to the two wiring conductors;
It is composed of semiconductor elements that transmit and receive electrical signals of 40 GHz to 80 GHz,
The semiconductor element is mounted and fixed on the mounting portion of the package for housing the semiconductor element, and the ground electrode and the input / output electrode of the semiconductor element are electrically connected to the ends of the ground wiring conductor, the first wiring conductor, and the second wiring conductor via bonding wires. A semiconductor device formed by connecting to each other,
A ground layer is formed on the surface of the mounting portion, and an extended portion having a distance of 0.2 mm or less from the bonding wire is formed in a part of the ground layer facing the second wiring conductor. Formed ,
The semiconductor device according to claim 1, wherein the connector is attached to a notch between the surface on which the second wiring conductor is formed in the base so that the upper side is opened .
JP2003178155A 2003-06-23 2003-06-23 Semiconductor device Expired - Fee Related JP4077769B2 (en)

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JP5383512B2 (en) * 2008-01-30 2014-01-08 京セラ株式会社 Connection terminal, package using the same, and electronic device

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