JPH02198158A - Semiconductor device - Google Patents

Abstract

PURPOSE:To improve the reliability of a high speed semiconductor device by a method wherein a plurality of wiring conductors, or plurality of other wiring conductors formed in a substrate so as to surround the former wiring conductors, a semiconductor chip, wires, metal films and a metal cap for sealing conductors are provided. CONSTITUTION:Outer constant potential wirings 7, inner constant potential wirings 5 and a metal film 2 are connected to each other with connection wirings 11 in a substrate 100. The top ends of the inner constant potential wirings 6 are connected to a cap 8 through metal films 9 on the surface of the substrate 100. The predetermined one of the inner constant potential wirings 6 is connected to a bonding pad on a semiconductor chip 1 for supplying a constant potential through a bonding wire 3. If the respective distances between a signal wiring 5 and the outer constant potential wirings 7, the inner constant potential wirings 6 and the metal film 2 are adjusted, various values of the impedance of the signal wiring 5 can be predelermined. With this constitution, a wiring structure suitable for microwave transmission can be obtained and the reliability of a high speed semiconductor device can be improved.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is applicable to high-speed semiconductor devices, particularly in the microwave band (several Gigabytes).
The present invention relates to a semiconductor package for transmitting a high frequency signal (Hz or higher), and relates to a technology that enables impedance matching in accordance with the load in wiring within the package.

[Prior art]

A semiconductor chip is mounted in a cavity of a package, and connected via bonding wires to a signal conductor that is part of wiring (transmission line) for high-frequency transmission in the substrate (base) of the package. This amount of signal! #! extends inside the package in a direction parallel to the main surface of the semiconductor chip and is connected to the actuator lead. In conventional semiconductor devices, when a semiconductor chip in a package operates in a microwave band, the signal wiring is configured as a microstrip line or a strip line.

Then, the high-speed signal is absorbed by a terminating resistor connected to the end of the transmission line (ie, between the signals, on the opposite side of the line).

Further, the mounting surface of the semiconductor chip has a structure recessed from the surface on which the signal wiring is provided so that the heights of the bonding pads of the semiconductor chip and the signal wiring are approximately equal. The semiconductor chip is then covered and sealed with a cap, which is made of metal and grounded in order to improve the isolation characteristics between the signal wiring and bonding wires. Ru.

Furthermore, for high frequency transmission of several tens of GHz, it is necessary to match the impedance of the transmission line to the impedance of the load.

Normally, the load impedance of this further high frequency transmission is often set to 500, and the terminating resistor is also formed to 50Ω. Therefore, the impedance of wiring inside the package is often composed of a 50Ω microstrip line or stripline. A microstrip line generally consists of a dielectric (absolutely tilted body), a strip conductor on its surface (placement line conductor), and a conductor below the dielectric (ground plane).
It is made up of. A strip line has a strip conductor embedded in a dielectric material.

The impedance of the above transmission line is uniquely determined by the width and thickness of the strip conductor and the thickness of the insulator (dielectric).
Due to variations in the manufacturing process (material dimensions, etc.),
The variation in impedance is large (approximately ±15%), and it is impossible to correct the impedance of the completed transmission line, and in order to change the impedance, it is necessary to change the dimensions of the transmission line. .

Semiconductor element (chip) housed in a semiconductor package
Since the impedance of the transmission layer of each terminal is not necessarily equal to 50Ω, it is necessary to adjust and match the impedance of the transmission line according to the individual impedance in the microwave band. An example of package wiring in a microwave package is the chip electrode (terminal).
and the lead frame using Au wire or A! Some are connected using connector wires such as wires.

In this case, it is difficult to match the impedance as described above, especially in the connector wire portion.

In other words, if the impedances are not matched, signal reflection and loss occur in the non-matching portions, leading to malfunction of the semiconductor element.

Examples of literature describing such microwave transmission packages include McGraw-Hill;
Inc. 1966 Copyright rFOUNDATIO
NS FORMICROWAVE ENGINEE
RINGJ p 372-373, Nikkei Electronics J April 20, 1987 issue 9, published by Nikkei McGloch Hill.
90-91. [Nikkei Microdevice J June 1986 issue, pages 47-49.

[Problem to be solved by the invention]

The inventor of the present invention discovered the first problem as a result of studying the signal wiring configured in the strip line and microstrip line.

First, the signal wiring has a flat plate shape and is very thin, with a thickness of about 20 to 25 μm. For this reason, it is difficult to improve the propagation speed of the signal wiring by making the signal wiring hole as thick as 0.21mm (even if it is, the cross-sectional area is small, so the inductance, wiring resistance, and wiring capacitance are large). In order to reduce the inductance, wiring resistance, and wiring capacitance of these signal wirings, the wiring length of the signal wirings must be shortened, but as mentioned above,
This is because the signal wiring extends inside the package in a direction parallel to the main surface of the semiconductor chip, that is, in the lateral direction.

It was very important to shorten the wiring length.

In addition, as mentioned above, a strip line or microstrip line ground conductor is provided at the step between the recessed part of the package where the semiconductor chip is mounted and the surface where the signal wiring is provided. Because they are not connected to each other, high-frequency signals leak from here, causing interaction (crosstalk) between signal wires.

Furthermore, in the case of a semiconductor chip that operates in a high frequency band (approximately several tens of GHz), a wire portion connecting an external terminal (ponding pad) and a lead is involved in impedance mismatch.

On the other hand, since the cap is a flat plate and its thickness is thin, the inductance and resistance of the cap itself are large.
When the frequency is around 10 GHz, the bonding wire becomes an antenna, causing self-resonance and deteriorating the high frequency transmission characteristics of the semiconductor device. In order to reduce the inductance and resistance of the cap, it is possible to increase the thickness of the cap, but this poses a problem of increasing the height of the package. In addition, if the cap is flat as described above, the distance to the bonding wire is long, making it difficult to shield the electric lines of force coming out from the bonding wire, and the isolation between the bonding wires is insufficient. This causes the electric lines of force to connect with each other, causing malfunctions.

For these reasons, there was a problem that the signal distribution and glands interfered with each other.

An object of the present invention is to provide a technique that can improve reliability in a high-speed semiconductor device.

Another object of the present invention is to provide a semiconductor device that can prevent interaction between signal lines when transmitting high frequency signals of several GHz to several tens of GHz.

Another object of the present invention is to enable impedance matching in individual transmission lines depending on the load, compensate for mismatch in the connector wire section, enable proper microwave signal transmission, and malfunction of elements. The goal is to provide technology to prevent this.

Another object of the present invention is to provide a package in which the impedance of a terminating resistor (load: Zt) placed in contact with a substrate and the impedance of a transmission line can be matched.

Another object of the invention is to provide a distribution structure suitable for microwave transmission.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means to solve the problem]

A brief overview of typical inventions disclosed in this application is as follows.

That is, a transmission line is used to match impedance between the chip, the package, and the circuit that mounts the package.

First of all, in a semiconductor device having signal wiring in a substrate of a package in which a semiconductor chip is sealed, a plurality of constant potential wirings are arranged around the signal distribution in the form of a coaxial cable in the same direction as the signal wiring. has been established.

Further, the signal wiring and constant potential wiring are provided so as to extend in a direction perpendicular to the main surface of the semiconductor chip.

Furthermore, the center part of the cap for sealing the package is made thicker than the peripheral part.

Next, in a chip that operates in a higher frequency band (several tens of GHz), a Tievishiev-type low-pass filter (lead tip) is distributed to each transmission line, and a bonding wire is attached to the filter.

[Effect]

According to the above-mentioned means, the constant potential wiring provided around the signal wiring shields the signal wiring to the same extent as a coaxial cable, so that the isolation characteristics can be improved.

Further, by adjusting the interval between the signal wiring and the constant potential wiring, the impedance of the signal wiring can be set to a desired value (for example, 50Ω).

Furthermore, in semiconductor chips that operate in high frequency bands, the low-pass filter is formed in the Tievisiev shape, and bonding wires are added to make the frequency and impedance of the filter characteristics variable, and the impedance of individual transmission lines can be adjusted according to the load. can be matched.

〔Example〕

Hereinafter, the semiconductor device of the present invention will be explained using the drawings.

[Example work]

First, the general configuration of the entire semiconductor device will be explained.

In FIGS. 1 to 3, reference numeral 100 denotes a substrate of the package, which is made of ceramic (Al1Os), for example. At the bottom of the cavity (recess) 101 of this substrate 1oo, there is an A
A semiconductor chip 1 is mounted with a metal film 2 interposed therebetween. External terminals (bonding pads) 13 formed on the semiconductor chip l are connected to the substrate 100 via bonding wires 3.
It is connected to a conductor 4 formed in the.

Reference numeral 5 denotes wiring conductors of the semiconductor device, that is, signal wirings, and a plurality of them are provided in a cylindrical shape in a portion of the substrate 100 outside the cavity 101. An internal potential wiring 1, which is a kind of wiring conductor, is provided between each signal wiring 5 and the signal wiring 50.
fs6 is provided in a cylindrical shape. Further, an external potential wiring 7 is provided on the outer side surface of the substrate 100, and the external constant potential wiring 7, the internal constant potential wiring 6, and the metal film 2 are formed so as to shield the signal wiring 5. ing.

Here, signal wiring 5. The constant potential wirings 6 and 7 are mainly made of tungsten (W) containing, for example, molybdenum (Mo). A cap 8 made of metal is provided on the substrate 100 with a metal film 9 in between, and the cap 8 shields the bonding wires 3 and the semiconductor chip 1 from external electric fields.

The metal film 2 is provided over almost the entire wall surface from the bottom surface of the cavity 101. Particularly on the wall surface of the cavity 101,
By providing the conductor close to the conductor 40, leakage of electric lines of force coming out from the signal wiring 5 is minimized. The signal wiring 5 is provided extending inside the substrate 100 in the height direction, that is, in a direction perpendicular to the main surface of the semiconductor chip 1.
A conductor 4 is connected to its upper end. This conductor 4 is
It is insulated from the metal film 2 inside the cavity 101. The lower end of the signal wiring 5 is connected to a predetermined outer I of the plurality of actor leads 10 provided on the bottom surface of the substrate 100.
Connected to J-do lO. Note that power wiring, that is, a wiring for feeding the power supply potential vcc and a wiring for feeding the ground potential Va11, is provided in the substrate 100, but this power wiring also extends in the height direction of the substrate 100, similar to the signal intervening section 5. It is located extending to. The internal constant potential wiring 6 between the signal wirings 5 is provided so as to extend in parallel with the signal wirings 5 and in the same direction. The respective signal wirings 5 and internal constant potential wirings 6 are arranged substantially linearly. Note that between the wiring that supplies the power supply potential and the signal wiring 5, between the wiring that supplies the power supply potential and the wiring that supplies the ground potential,
An internal constant potential wiring 6 is also provided between the wiring for feeding the ground potential and the signal wiring 50. These signal wiring 5 and internal constant potential wiring 6.

It is made of a cylindrical conductor with a diameter of, for example, 0.20.

The external constant potential wiring 7 is formed into a plate shape, and is connected to the substrate 1.
It is provided at a position corresponding to the signal wiring 5 on the side surface of 00. Further, the external constant potential wiring 7 is longer than the signal wiring 5 and is provided from near the bottom surface of the substrate 100 to near the top end. However, the external constant potential wiring 7 is insulated from the outer lead 10 to which the signal wiring 5 is connected. The external constant potential wiring 7, the internal constant potential wiring 6, and the metal film 2 are arranged in the form of a coaxial cable with respect to the item wiring 5, as shown in FIG.

Here, in Figure 3, the dimension between the wires is approximately X-0
, 635 mm, Y = 0.7 mm, Z = 0.3 mm.

Furthermore, the metal film 2 and the internal constant potential recorder &! 6. FIG. 4 shows the connection relationship between the external constant potential distribution green 7, the outer lead 10, and the cap 8.

FIG. 4 shows the metal film 2 and the internal constant potential #! 6. External constant potential distribution #! 7, an outer lead 10, and a cap 8. FIG.

The external constant potential wiring 7. Internal definition as positional name 6. The seven wires of gold gN2 are connected by the connection wire 11 in the substrate 100, and the upper end of each internal constant potential wire 6 is
It is connected to the cap 8 via the metal film 9 on the upper surface of the substrate 100. Further, for example, some of the internal constant potential wirings 6 are connected to a constant potential of the actor lead lO, for example, the ground potential V.
It is connected to the outer lead 10 for supplying power to the SS. Further, a predetermined one of the internal constant potential wirings 5 is
It is connected via a bonding wire 3 to a bonding pad for supplying a constant potential on the cow conductor chig 1, for example, to a bonding pad for supplying a ground potential vsa. From the said Hakugo distribution 5 to the external constant potential distribution 7. The respective distances A to the internal fixed position arrangement 6 and the metal film 2
By adjusting the impedance of the number wiring 5, it is possible to set the impedance to various values.

The cap 8 has a center portion on its lower surface or a cavity 10.
The center part is thicker than the periphery part so that it extends toward the part 1. The thickness of the peripheral portion of the cap 80 is, for example, approximately 150 μm, and the thickness of the central portion is approximately 500 μm.

Said @ acid film 2. The metal film 9 on the upper surface of the external constant potential distribution 7 and the substrate 100 is made of nickel (nickel) on tungsten/(W)M.
It is made of a material plated with Ni) and further plated with gold (Au). Substrate 100 and signal wiring 5. The internal constant potential wiring 6 and the connection wiring 11 are formed by laminating green sheets and subjecting them to heat treatment. The conductor 4 is made of tungsten (W) 16, and the portion exposed from the substrate 100 is plated with nickel (Ni), and further plated with gold (Au). Outer lead 1
00 and the cap 8 are made of, for example, 42 alloy (Ni:42
%, Cu: 58%).

Note that the semiconductor device of the present invention can also be configured as shown in FIGS. 5 and 6.

5 is a diagram for explaining the configuration of a semiconductor device according to another embodiment of the present invention, which is different from the semiconductor device according to the embodiment shown in FIG. 1, and FIG. FIG. 2 is an enlarged plan view of a portion of the semiconductor device in which signal wiring 5 is provided.

As shown in FIG. 5, an external constant potential wire #7 is provided in the substrate 100, and as shown in FIG. 6, an internal constant potential wire 6. External constant potential wiring7. A metal film 2 is provided around each signal line #3I5 in the form of a coaxial cable to shield the signal line 5.

The following effects can be obtained from the configuration of the semiconductor device of this embodiment described above.

In a semiconductor device including a signal wiring 5 in a substrate 100 of a package in which a semiconductor chip 1 is sealed, a plurality of constant potential wirings in the form of a coaxial cable are arranged around the signal wiring 5 in the same axial direction as the signal wiring 445. (consisting of internal constant potential wiring 6, external constant potential register, Makoto 7 and metal, 2), this constant potential wiring provides shielding between the signal wiring 5 to the same extent as a coaxial cable. Because it is done,
Isolation characteristics between the signal lines 5 can be improved. Furthermore, by adjusting the distance between the signal wiring 5 and the constant potential wiring (internal constant potential wiring 6, external constant potential wiring 7, metal film 2), the impedance of the signal wiring 5 can be adjusted to a desired value ( For example, it can be set to 50Ω).

Furthermore, since most of the signal wiring W$5 is shielded by the metal film 2, the internal constant potential wiring 6, and the external constant potential wiring 7, leakage lines of electric force from the signal wiring 5 can be extremely reduced. Can be done.

In addition, since the signal wiring a5 is provided in the height direction from the bottom surface to the top surface of the board 100, its length can be made very short, so that each of the inductance L, wiring resistance R2, and wiring capacitance C can be reduced.

Furthermore, since the signal wiring 5 is made of a cylindrical conductor, the cross-sectional area is larger than that of a microstrip line with the same wiring width, so the inductance L per unit length (for example, 1llII) is approximately 1/3. The gutter resistance R can be reduced to about 1/8.

In addition, by making the central part of the cap 8 thick, the central part becomes close to the bonding wire 3, and the electric lines of force 12 coming out from the bonding wire 3 can be shielded. Ein lathe coverage characteristics can be improved.

Next, the fact that the resonant frequency of the cap 8 itself can be increased by thickening the center of the cap 8 will be explained using FIG. 7 and FIG.

FIG. 7 is a diagram for explaining the distribution state of inductance L and resistance R distributed in cap 8 having a flat plate shape.

FIG. 8 is a diagram for explaining the state of the inductance L and resistance R of the cap 8 whose center portion is thicker than its peripheral portion.

As shown in FIG. 7, when the cap 8 has a flat plate shape, the inductance Ll and resistance R1 at the periphery, the inductance L2 and resistance R2 at the center, and the inductance L3 and resistance at the periphery opposite to the above-mentioned periphery. However, the size of the resistor R3 is the same regardless of whether it is at the periphery or the center of the cap 8.

As shown in Figure 8, the center part is thicker, so
Inductance La 1 and resistance Ra 2 in the center
is smaller than the inductance L2 and resistance R2 of the central portion of the flat cap 8 (L2)La
2. R2) Ra2). This allows cap 8
The resonance frequency of signal arrangement fM5 and bonding wire 3
can be higher than the frequency of the signal current flowing through it.

For these reasons, in the semiconductor device of this embodiment, the inductance L of the entire semiconductor device is reduced to about 1/2 to 1/3, and the inter-wiring capacitance is reduced to about 1/10, compared to the conventional one. The wiring resistance can be reduced to about 1/20 to 1/30.

In the embodiment, since the constant potential wiring provides shielding between the signal wirings to the same degree as a coaxial cable, it is possible to improve the in-resistance characteristics between the signal wirings. In addition, the signal wiring and constant potential wiring (internal constant potential wiring,
By adjusting the distance between the external constant potential wiring and the gold a film, the impedance of the signal wiring can be set to a desired value (for example, 50Ω).
) can be made.

[Example ■]

Next, another embodiment of the present invention will be described using FIGS. 9 to 12.

First, an outline of impedance matching will be explained.

According to the analytical theory of transmission lines, the impedance of the load 21 of the semiconductor chip (
ZL) and the impedance of the transmission line 22 (Zo*Zr)
There is the following relationship between them.

zr=7 stone seal 1T・・・・・・・・・・・・(1) In addition, FIG. 12 shows the wiring inside the package in the conventional example of microwave transmission, where 21 is the load, 22 is a transmission line, and the transmission line 22 is, for example, W (Mengesten).
An example is shown that includes a conductor 23 made of metal and a connector wire 24. Further, 25 indicates an external terminal (ponding pad) of the semiconductor chip.

In the wiring inside the package of this conventional structure, the impedance at the connection part by the connector wire 24 is Z? ' is indicated. That is, as shown in FIG. 11, in order to match the impedance ZO of the transmission circuit 22 with the load impedance ZL, ZT may be brought into a state such that ZT=Z, -ZL.

However, the impedance Z of the connector wire 24 portion
Originally, tj cannot be adjusted to v4, and Zo cannot be matched to load impedance ZL.

On the other hand, from the above relational expression zT=z, -zL, it can be seen that ZT may be changed according to the load impedance ZL. Here, the length range of impedance zT is 1/4 of the signal wavelength (λ).

FIG. K9 and FIG. 10 show Example 2 of the present invention.

FIG. 9 shows Example 2 applied to the conductor 4 shown in FIG. That is, at the tip of the conductor 23 connected to the upper end of the signal wiring 5, a Tievishev-type low-pass filter 26 for fixing the band was installed. A bonding wire 27 is attached to this filter 26 to perform finer adjustment of impedance matching and adjustment of band change.

The low-pass filter 26 has an inductance (L
1 to L,) and capacitances (C1 to C4). The impedance in this low-pass filter 26 is designed to have a value close to zT. Adjustment of impedance is by inductance (L8 to L4)
Alternatively, this can be done by changing the dimensions (width, length) of the capacitance (C1 to Ca), but in order to adjust the impedance of zT according to the load ZL, L in the relational expression shown in the actual example is By changing the reactance component (mainly inductance: L) of the bonding, the above-mentioned relationship of Z T = f[ko]n was satisfied, Zo and zL were matched, and precise adjustment was made possible. That is, by adding the bonding wire 27, the frequency band and impedance of the low-pass filter characteristics can be changed as appropriate, and the impedance of ZT can be adjusted according to the load ZL.

This embodiment (2) shows an example in which three bonding wires 27 are added.
The inductance L can be adjusted by changing the number or length of the wires.

In this embodiment (2), a low-pass filter 26 is connected to the edge of the conductor 23, and the distance between C1 and C1 of the filter 26 is 1.
Connected by real bonding wire 27, C8 to C4
Two bonding wires 27 and 27 are connected between L4 of the filter 26 and the external terminal 25 of the chip 1.
An example is shown in which wire bonding is performed using a connector wire 24, but a bonding wire 27 may be added between the inductances (for example, between L and 1),
It may be added between capacitance (examples C1-C4) and inductance (examples L1-L4).

According to this embodiment H, the impedance is adjusted.

Since the low-pass filter 26 attached to the conductor 23 is used as a transmission path, the individual load 2 of the transmission line in the package is
1.

Furthermore, when the frequency becomes higher (several tens of H), the loss due to the resonance of the conductor plate becomes even larger, but minute impedance and band fluctuations are caused by the capacitance C8~C4゜inductance L□~ of the low-pass filter 26 of this embodiment H. L4
The distance can be adjusted by appropriately connecting the bonding wires 27.

Furthermore, the external terminal 25 and the conductor 23 of the step 1 are
It is possible to compensate for impedance mismatch in the pond/choir 24 portion that connects between the two.

Furthermore, appropriate microwave (especially high frequency waves of several tens of GHz) transmission becomes possible.

In the above tttn, the explanation has been mainly given to the internal wiring in the package using conductor wiring made of W metal or the like in a ceramic package, but it is also applicable to the internal wiring in the package using a lead frame.

〔Effect of the invention〕

A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows.

According to the present invention, a wiring structure suitable for microwave transmission can be provided, and a very meaningful invention can be provided.

Further, since the constant potential distribution shields the signal lines to the same extent as a coaxial cable, it is possible to improve isolation characteristics between the signal lines. Furthermore, by adjusting the spacing between the signal wiring and the constant potential register at (internal constant potential wiring, external constant potential wiring, metal M), the impedance of the signal distribution can be set to a desired value (for example, 50Ω). .

These results have made it possible to improve the reliability of high-speed semiconductor devices.

[Brief explanation of the drawing]

1 is a cross-sectional view of a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a plan view of the semiconductor device shown in FIG. 1 taken along the It-n cutting line. FIG. 3 is an enlarged plan view of the part (2) surrounded by the broken line of the semiconductor device shown in FIG. FIG. 3 is a schematic cross-sectional view of a semiconductor device for explaining the connection relationship with a cap. FIG. 5 is a sectional view illustrating the configuration of a semiconductor device according to another example of the present invention, and FIG. 6 is an enlarged plan view of a portion of the semiconductor device shown in FIG. 5 where signal wiring is provided. FIG. 7 is a diagram for explaining the inductance L and resistance R of a flat cap, and FIG. 8 is a diagram for explaining the inductance L and resistance R of a cap whose central part is thicker than the peripheral part. FIG. 9 is an enlarged plan view of a portion of a semiconductor device according to the embodiment (2) of the present invention in which signal wiring is provided, and FIG.
Figure 9 is an enlarged schematic view of the lead, and Figure 11 is a yarn bundle showing the relationship between load impedance (ZL) and transmission line impedance (ZOs ZT). . 1...Semiconductor chip, 2,9...Metal film, 3.27
...Bonding wire, 4,23...Conductor, 5...
Signal wiring, 6... Constant potential wiring, 7... External constant potential wiring, 8... Cap, lO... Actor lead, 1
1... Connection wiring, 12... Electric force lines, 13.25.
...External terminal, 21...Load, 22...Transmission line,
24... Connector wire, 26... Low pass filter, 100... Board, 101... Cavity (recessed part). Figure 2 Figure Figure Figure 9 Figure Figure Figure Figure Figure

Claims (11)

[Claims] 1. A semiconductor chip having a circuit and external terminals formed on its main surface, a substrate having a metal film formed in an area on which the semiconductor chip is mounted, and a plurality of conductors formed on the external terminals and the substrate electrically connected to each other. a plurality of wires located within the substrate for connecting;
Extending in a direction perpendicular to the main surface of the semiconductor chip,
A plurality of wiring conductors whose upper ends are connected to the conductor, another plurality of wiring conductors formed in the substrate so as to surround the wiring conductors, and sealing the semiconductor chip, wire, metal film, and conductor. A semiconductor device comprising a metal cap for stopping the device. 2. Claim 1, wherein the metal cap is formed thicker at a central portion than at a peripheral portion thereof.
1. Semiconductor device described in Section 1. 3. 2. The semiconductor device according to claim 1, wherein the metal film is formed by plating nickel (Ni) and gold (Au) on a tungsten (W) film. 4. 2. The semiconductor device according to claim 1, wherein the plurality of conductors are made of a tungsten (W) film. 5. 2. The semiconductor device according to claim 1, wherein the wiring conductor is mainly made of tungsten (W). 6. 2. The semiconductor device according to claim 1, wherein at least one of the wiring conductors is formed outside the substrate. 7. 2. The semiconductor device according to claim 1, wherein the wiring conductor has a cylindrical shape. 8. Claim 1, wherein the wiring conductor, a plurality of other wiring conductors formed to surround the wiring conductor, and a part of the metal film extend substantially parallel to each other. Semiconductor equipment. 9. 2. The semiconductor device according to claim 1, wherein a Chebyshev filter is attached to the conductor. 10. 10. The semiconductor device according to claim 9, further comprising a wire attached on the Chebyshev filter. 11. 10. The semiconductor device according to claim 9, wherein the Chebyshev filter is a tungsten film.