JP2004193319A - Wiring circuit board with built-in toroidal coil and its manufacturing method - Google Patents

Wiring circuit board with built-in toroidal coil and its manufacturing method Download PDF

Info

Publication number
JP2004193319A
JP2004193319A JP2002359139A JP2002359139A JP2004193319A JP 2004193319 A JP2004193319 A JP 2004193319A JP 2002359139 A JP2002359139 A JP 2002359139A JP 2002359139 A JP2002359139 A JP 2002359139A JP 2004193319 A JP2004193319 A JP 2004193319A
Authority
JP
Japan
Prior art keywords
circuit board
layer
wiring
forming
coil
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002359139A
Other languages
Japanese (ja)
Inventor
Akiko Saeki
明子 佐伯
Tsunero Oki
恒郎 大木
Shingo Akao
慎吾 赤尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toppan Inc
Original Assignee
Toppan Printing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toppan Printing Co Ltd filed Critical Toppan Printing Co Ltd
Priority to JP2002359139A priority Critical patent/JP2004193319A/en
Publication of JP2004193319A publication Critical patent/JP2004193319A/en
Pending legal-status Critical Current

Links

Images

Abstract

<P>PROBLEM TO BE SOLVED: To provide a high-density wiring circuit board with a built-in EMI preventive inductor by forming a toroidal inductor by a build-up method. <P>SOLUTION: After a circuit board 20 in which first wiring layers 21a and 21b are respectively formed on both surfaces of an insulating substrate 11 is manufactured, a circuit board 40 is manufactured by forming a lower coil pattern 22a for a toroidal coil and a second wiring layer 22b on one surface of the insulating substrate 11 through an insulating layer 41 and lands 22c on the other surface of the substrate 11. Then a five-layered wiring circuit board 100 with a built-in toroidal coil 50 which is constituted by forming a magnetic layer 51 and an upper-layer coil pattern 24a on the lower coil pattern 22a for the toroidal coil on one side of the circuit board 40 and electrically connecting the lower-layer coil pattern 22a to the upper-layer coil pattern 24a through a filled via hole 25 is obtained. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

【０００１】
【発明の属する技術分野】
本発明は、半導体パッケージ用配線回路板に関し、特に、ビルドアップ工法にて形成されたトロイダルコイル内蔵の配線回路板に関する。
【０００２】
【従来の技術】
電子機器の小型化、高密度化、高性能化が進んでいる中で、そこに用いられる配線回路板も小型化、高密度化、高速化の要求が高まっており、それらの要求を満たした配線回路板が求められている。
配線回路板は、回路基板（内層基板）とプリプレグシートを積層して、配線パターン、スルーホールを形成して多層プリント配線板を形成していく方式から、回路基板上に絶縁層、配線層を交互に積み上げていくビルドアップ方式の配線回路板へと移行しつつある。
【０００３】
さらに、配線回路板には半導体チップ、抵抗素子、キャパシタ、インダクタ等の部品を表面実装し、配線回路板の小型化、高密度化対応を図っている。
しかしながら、表面実装だけでは限界があり、更なる部品実装密度の向上が求められ、抵抗素子、キャパシタ、インダクタ等の部品を内蔵した部品内蔵配線回路板の開発が進められている。
【０００４】
配線回路板にインダクタを形成する場合、コイルの形状としてはスパイラル型、磁性体層を挟むように長方形の導線パターンを形成するソレノイド型、ロの字型にコイルを形成したトロイダル型が提案されている（例えば、特許文献１参照）。
しかしながら、従来のスパイラル型やソレノイド型のインダクタを用いた場合、これらのインダクタにより生成される磁力線の磁路は開磁路となり、大きなインダクタンス値のインダクタを得ることが困難であった。
さらに、漏れ磁場が大きくなることにより周辺の素子に与えるＥＭＩ（Ｅｌｅｃｔｒｏ Ｍａｇｎｅｔｉｃ ｉｎｔｅｒｆｅｒｅｎｃｅ）が問題であった。これを解決する方法としてトロイダル型が考えられるが、従来の製法はコイルを形成した印刷配線基板と、インダクタ部品を貼り合わせるもので、形状がコンパクトにならず、実装密度の向上に制限があった。
【０００５】
【特許文献１】
特開２０００−４０６２０号公報
【０００６】
【発明が解決しようとする課題】
本発明は上記の問題点に鑑み考案されたものであり、トロイダル型のインダクタをビルドアップ法にてコンパクトに形成することにより、ＥＭＩ対応のインダクタ内蔵の高密度配線回路板を提供することを目的とする。
【０００７】
【課題を解決するための手段】
本発明に於いて上記課題を達成するために、まず請求項１においては、ビルドアップ工法にて絶縁層及び配線層が所定層数形成されたインダクタ内蔵の配線回路板であって、前記インダクタが磁性体層の両面に形成された上下のコイルパターンをビア接続して形成されたトロイダルコイルからなることを特徴とするトロイダルコイル内蔵配線回路板としたものである。
【０００８】
また、請求項２においては、少なくとも以下の工程を備えていることを特徴とするトロイダルコイル内蔵配線回路板の製造方法としたものである。
（ａ）絶縁基材１１の両面に第１配線層２１ａ及び第１配線層２１ｂが形成された回路基板２０を作製する工程。
（ｂ）回路基板２０の両面に絶縁層４１を形成し、絶縁層４１の所定位置にビア用孔４２を形成する工程。
（ｃ）絶縁層４１上に導体層２２を、ビア用孔４２にフィルドビア２３を形成する工程。
（ｄ）導体層２２をパターニング処理して、回路基板２０の一方の面に絶縁層４１を介してトロイダルコイル用の下層コイルパターン２２ａ及び第２配線層２２ｂを、他方の面に絶縁層４１を介してランド２２ｃが形成された回路基板４０を作製する工程。
（ｅ）回路基板４０の一方の面のトロイダルコイル用の下層コイルパターン２２ａ上に磁性体層５１を形成する工程。
（ｆ）磁性体層５１の所定位置にビア用孔５２を形成する工程。
（ｇ）磁性体層５１上に導体層２４を、ビア用孔５２にフィルドビア２５を形成する工程。
（ｈ）導体層２４をパターニング処理して、トロイダルコイル用の上層コイルパターン２４ａ及び端子電極２４ｂを形成し、下層コイルパターン２２ａと上層コイルパターン２４ａがフィルドビア２５にて電気的に接続されたトロイダルコイル５０を形成する工程。
【０００９】
【発明の実施の形態】
以下本発明の実施の形態につき説明する。
図１（ａ）に、本発明のトロイダルコイル内蔵配線回路板の一例を示す斜視図を、図１（ｂ）に、図１（ａ）の斜視図をＡ−Ａ’線で切断した模式構成断面図をそれぞれ示す。
本発明のトロイダルコイル内蔵配線回路板は、図１（ａ）及び（ｂ）に示すように、絶縁基材１１上にビルドアップ法により絶縁層を介して配線層が、磁性体層を介してトロイダルコイルが形成されたインダクタ内蔵の配線回路基板であって、ＥＭＩ対応のインダクタ内蔵の高密度配線回路板を実現したもので、高密度半導体パッケージ対応のトロイダルコイル内蔵配線回路板を提供するものである。
【００１０】
本発明のトロイダルコイル内蔵配線回路板の作製法について説明する。
図２（ａ）〜（ｆ）及び図３（ｇ）〜（ｋ）に本発明のトロイダルコイル内蔵配線回路板の製造方法における製造工程の一例を示す。
まず、絶縁基材１１の両面に銅箔からなる導体層２１が形成された両面銅貼り積層板（図２（ａ）参照）の導体層２１上にドライフィルムを貼り合わせる等の方法で感光層（レジスト）を形成し、パターン露光、現像等の一連のパターニング処理を行ってレジストパターン３１及びレジストパターン３２を形成する（図２（ｂ）参照）。
【００１１】
次に、レジストパターン３１及びレジストパターン３２をマスクにして、導体層２１をエッチング処理し、レジストパターン３１及びレジストパターン３２を専用の剥離液で除去して、絶縁基材１１の両面に第１配線層２１ａ及び第１配線層２１ｂが形成された回路基板２０を作製する（図２（ｃ）参照）。
ここで、回路基板２０は、両面に配線層が形成された両面配線板の事例について説明したが、配線層数には特に限定されるものではなく、任意の層数の回路基板が適用できる。
【００１２】
次に、回路基板２０の両面に樹脂フィルム等を貼付するか、樹脂溶液をスクリーン印刷するかの方法で、絶縁層４１を形成し、絶縁層４１の所定位置にレーザー加工等によりビア用孔４２を形成する（図２（ｄ）参照）。
【００１３】
次に、絶縁層４１上及びビア用孔４２内を粗化処理、触媒核付与及び活性化処理した後、無電解銅めっき等により絶縁層４１上及びビア用孔４２内にめっき下地層（特に、図示せず）を形成し、めっき下地層をカソードにして電解銅めっきを行い、絶縁層４１上に所定厚の導体層２２を、ビア用孔４２内にフィルドビア２３を形成する（図２（ｅ）参照）。
【００１４】
次に、絶縁基材１１の両面の導体層２２上にドライフィルムを貼り合わせる等の方法で感光層（レジスト）を形成し、パターン露光、現像等の一連のパターニング処理を行ってレジストパターン３３及びレジストパターン３４を形成する（図２（ｆ）参照）。
【００１５】
次に、レジストパターン３３及びレジストパターン３４をマスクにして、導体層２２をエッチング処理し、レジストパターン３３及びレジストパターン３４を専用の剥離液で除去して、絶縁基材１１の一方の面にトロイダイルコイル用の下部コイルパターン２２ａ及び第２配線層２２ｂを、絶縁基材１１の他方の面にランド２２ｃを形成して、回路基板４０を作製する（図３（ｇ）参照）。
ここで、トロイダイルコイル用の下部コイルパターン２２ａ及び第２配線層２２ｂはフィルドビア２３にて第１配線層２１ａと、ランド２２ｃはフィルドビア２３にて第１配線層２１ｂと電気的に接続される。
【００１６】
次に、回路基板４０の一方の面のトロイダイルコイル用の下部コイルパターン２２ａ上に磁性体層５１を形成する（図３（ｈ）参照）。
ここで、磁性体層５１は、高抵抗の絶縁性基材を用いることにより、絶縁層兼用の磁性体層とすることができ、磁性体層上に配線層、磁性体層内にフィルドビアを形成することができる。
ここでは、全面に磁性体層を形成した事例で説明しているが、磁性体層はリング状、角状等の部分的に形成する方法でも良く、特に限定されるものではない。
要は、コイル部内に磁性体層が充填された状態であればよい
【００１７】
また、磁性体層５１の形成方法としては、Ｎｉ−Ｚｎフェライト、Ｍｇ−Ｚｎフェライト、Ｍｎ−Ｍｇ−Ｚｎフェライト、希土類系超微粒子及び平板状金属磁性粉体等からなる磁性粉体を樹脂溶液に混合して磁性体ペーストを作製し、スクリーン印刷等の方法で全面もしくは所定の形状に磁性体塗膜を形成し、乾燥硬化して磁性体層とする方法、または、磁性体薄板（パーマロイ、センダストなど）を絶縁フィルムで挟み込んだ磁性体を所定形状に加工して、加熱、圧着等で貼付して磁性体層とする方法がある。
【００１８】
次に、磁性体層５１の所定位置にレーザー加工等によりビア用孔５２を形成する（図３（ｉ）参照）。
次に、磁性体層５１上及びビア用孔５２内を粗化処理、触媒核付与及び活性化処理した後、無電解銅めっき等により磁性体層５１上及びビア用孔５２内にめっき下地層（特に、図示せず）を形成し、めっき下地層をカソードにして電解銅めっきを行い、磁性体層５１上に所定厚の導体層２４を、ビア用孔５２内にフィルドビア２５を形成する（図３（ｊ）参照）。
【００１９】
次に、導体層２４をパターニング処理して、絶縁基材１１の一方の面の磁性体層５１上にトロイダイルコイル用の上層コイルパターン２４ａ及び端子電極２４ｂを形成し、トロイダイルコイル用の下層コイルパターン２２ａと上層コイルパターン２４ａが磁性体層５１を介してフィルドビア２５にて電気的に接続されたトロイダルコイル５０を有する５層のトロイダルコイル内蔵配線回路板１００を得る。
【００２０】
さらに、必要に応じて絶縁層、配線層を所定層数形成することにより、多層のトロイダルコイル内蔵配線回路板を得ることができる。
【００２１】
【発明の効果】
上記したように、ビルドアップ工法によりインダクタを配線回路板に内蔵することにより、実装密度を向上させたＥＭＩ対応のトロイダルコイル内蔵配線回路板及び半導体パッケージを提供できる。
また、ビルドアップ工法により配線層、部品を形成していくため、部品の配置の自由度が向上し、効率的な配線回路板作製が可能になる。
さらに、高抵抗の絶縁性磁性材を用いて絶縁層兼用の磁性体層を形成することにより、高密度のトロイダルコイル内蔵配線回路板を容易に作製できる。
【図面の簡単な説明】
【図１】（ａ）は、本発明のトロイダルコイル内蔵配線回路板の一例を示す斜視図である。
（ｂ）は、（ａ）の斜視図をＡ−Ａ’線で切断した模式構成断面図である。
【図２】（ａ）〜（ｆ）は、本発明のトロイダルコイル内蔵配線回路板の製造方法における製造工程の一部を示す模式構成断面図である。
【図３】（ｇ）〜（ｋ）は、本発明のトロイダルコイル内蔵配線回路板の製造方法における製造工程の一部を示す模式構成断面図である。
【符号の説明】
１１……絶縁基材
２０、４０……回路基板
２１……導体層
２１ａ、２１ｂ……第１配線層
２２、２４……導体層
２２ａ……トロイダルコイル用の下層コイルパターン
２２ｂ……第２配線層
２２ｃ……ランド
２３、２５……フィルドビア
２４ａ……トロイダルコイル用の上層コイルパターン
２４ｂ……端子電極
３１、３２……レジストパターン
４１……絶縁層
４２、５２……ビア用孔
５０……トロイダルコイル
５１……磁性体層
１００……トロイダルコイル内蔵配線回路板[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a wiring circuit board for a semiconductor package, and more particularly, to a wiring circuit board with a built-in toroidal coil formed by a build-up method.
[0002]
[Prior art]
As the miniaturization, high density, and high performance of electronic devices are progressing, the requirements for miniaturization, high density, and high speed of the wiring circuit boards used therein are increasing, and these requirements have been met. There is a need for a printed circuit board.
The wiring circuit board is composed of a circuit board (inner layer board) and a prepreg sheet laminated to form a wiring pattern and through holes to form a multilayer printed wiring board. It is shifting to a build-up type wiring circuit board that is stacked alternately.
[0003]
Furthermore, components such as a semiconductor chip, a resistor, a capacitor, and an inductor are surface-mounted on the printed circuit board to reduce the size and increase the density of the printed circuit board.
However, there is a limit to surface mounting alone, and further improvement in component mounting density is required, and the development of a component built-in wiring circuit board in which components such as a resistance element, a capacitor, and an inductor are built is being promoted.
[0004]
When an inductor is formed on a printed circuit board, a spiral type, a solenoid type that forms a rectangular conductive pattern so as to sandwich a magnetic layer, and a toroidal type that forms a coil in a square shape have been proposed as a coil shape. (For example, see Patent Document 1).
However, when the conventional spiral type or solenoid type inductors are used, the magnetic path of the lines of magnetic force generated by these inductors is an open magnetic path, and it has been difficult to obtain an inductor having a large inductance value.
Further, EMI (Electro Magnetic Interference) given to peripheral elements due to an increase in the leakage magnetic field is a problem. To solve this problem, a toroidal type is conceivable. However, the conventional manufacturing method involves bonding a printed wiring board on which a coil is formed and an inductor component to each other, so that the shape is not compact and the improvement in mounting density is limited. .
[0005]
[Patent Document 1]
JP 2000-40620 A
[Problems to be solved by the invention]
The present invention has been devised in view of the above problems, and has as its object to provide a high-density wiring circuit board with a built-in EMI-compatible inductor by forming a toroidal-type inductor compactly by a build-up method. And
[0007]
[Means for Solving the Problems]
In order to achieve the above object in the present invention, first, in claim 1 is a wiring circuit board with a built-in inductor in which a predetermined number of insulating layers and wiring layers are formed by a build-up method, wherein the inductor is A wiring circuit board with a built-in toroidal coil, comprising a toroidal coil formed by connecting upper and lower coil patterns formed on both surfaces of a magnetic layer with vias.
[0008]
According to a second aspect of the present invention, there is provided a method for manufacturing a wiring circuit board with a built-in toroidal coil, comprising at least the following steps.
(A) A step of manufacturing a circuit board 20 having a first wiring layer 21a and a first wiring layer 21b formed on both surfaces of an insulating base material 11.
(B) forming an insulating layer 41 on both sides of the circuit board 20 and forming a via hole 42 at a predetermined position of the insulating layer 41;
(C) a step of forming the conductor layer 22 on the insulating layer 41 and forming the filled via 23 in the via hole 42;
(D) The conductor layer 22 is patterned to form a lower coil pattern 22a for a toroidal coil and a second wiring layer 22b on one surface of the circuit board 20 via an insulating layer 41, and an insulating layer 41 on the other surface. Manufacturing the circuit board 40 on which the lands 22c are formed.
(E) forming a magnetic layer 51 on the lower coil pattern 22a for the toroidal coil on one surface of the circuit board 40;
(F) forming a via hole 52 at a predetermined position of the magnetic layer 51;
(G) a step of forming the conductor layer 24 on the magnetic layer 51 and forming the filled via 25 in the via hole 52;
(H) The conductor layer 24 is patterned to form the upper coil pattern 24a and the terminal electrode 24b for the toroidal coil, and the lower coil pattern 22a and the upper coil pattern 24a are electrically connected by the filled via 25 to the toroidal coil. Forming 50.
[0009]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described.
FIG. 1A is a perspective view showing an example of a wiring circuit board with a built-in toroidal coil of the present invention, and FIG. 1B is a schematic configuration in which the perspective view of FIG. 1A is cut along line AA ′. The sectional views are respectively shown.
As shown in FIGS. 1A and 1B, the wiring circuit board with a built-in toroidal coil of the present invention has a wiring layer formed on an insulating base material 11 via an insulating layer by a build-up method, and a wiring layer provided on a insulating material layer via a magnetic layer. This is a printed circuit board with a built-in inductor with a toroidal coil formed therein, which realizes a high-density printed circuit board with a built-in inductor for EMI. is there.
[0010]
A method for manufacturing the wiring circuit board with a built-in toroidal coil of the present invention will be described.
2 (a) to 2 (f) and 3 (g) to 3 (k) show an example of the manufacturing process in the method for manufacturing a wiring circuit board with a built-in toroidal coil according to the present invention.
First, a photosensitive layer is formed by, for example, laminating a dry film on the conductor layer 21 of a double-sided copper-clad laminate in which a conductor layer 21 made of copper foil is formed on both surfaces of the insulating base material 11 (see FIG. 2A). A (resist) is formed, and a series of patterning processes such as pattern exposure and development are performed to form a resist pattern 31 and a resist pattern 32 (see FIG. 2B).
[0011]
Next, using the resist pattern 31 and the resist pattern 32 as a mask, the conductor layer 21 is subjected to an etching treatment, the resist pattern 31 and the resist pattern 32 are removed with a dedicated stripper, and the first wiring is formed on both surfaces of the insulating base material 11. The circuit board 20 on which the layer 21a and the first wiring layer 21b are formed is manufactured (see FIG. 2C).
Here, the circuit board 20 has been described as an example of a double-sided wiring board having wiring layers formed on both sides, but the number of wiring layers is not particularly limited, and any number of circuit boards can be applied.
[0012]
Next, an insulating layer 41 is formed by attaching a resin film or the like to both sides of the circuit board 20 or by screen printing a resin solution, and a via hole 42 is formed at a predetermined position of the insulating layer 41 by laser processing or the like. Is formed (see FIG. 2D).
[0013]
Next, after a roughening treatment, a catalyst nucleus providing and an activation treatment on the insulating layer 41 and the inside of the via hole 42, a plating base layer (particularly, on the insulating layer 41 and the inside of the via hole 42) is formed by electroless copper plating or the like. , Not shown), electrolytic copper plating is performed using the plating base layer as a cathode, a conductor layer 22 having a predetermined thickness is formed on the insulating layer 41, and a filled via 23 is formed in the via hole 42 (FIG. 2 ( e)).
[0014]
Next, a photosensitive layer (resist) is formed by a method such as laminating a dry film on the conductor layers 22 on both surfaces of the insulating base material 11, and a series of patterning processes such as pattern exposure and development are performed to form a resist pattern 33 and a resist pattern. A resist pattern 34 is formed (see FIG. 2F).
[0015]
Next, using the resist pattern 33 and the resist pattern 34 as a mask, the conductor layer 22 is subjected to an etching treatment, the resist pattern 33 and the resist pattern 34 are removed with a dedicated stripper, and one side of the insulating base material 11 is The lower coil pattern 22a and the second wiring layer 22b for the coil are formed on the other surface of the insulating base material 11 to form the land 22c, thereby manufacturing the circuit board 40 (see FIG. 3G).
Here, the lower coil pattern 22a and the second wiring layer 22b for the toroidal coil are electrically connected to the first wiring layer 21a by the filled via 23, and the lands 22c are electrically connected to the first wiring layer 21b by the filled via 23.
[0016]
Next, a magnetic layer 51 is formed on the lower coil pattern 22a for the toroidal coil on one surface of the circuit board 40 (see FIG. 3H).
Here, the magnetic layer 51 can be a magnetic layer also serving as an insulating layer by using a high-resistance insulating base material. A wiring layer is formed on the magnetic layer, and a filled via is formed in the magnetic layer. can do.
Here, the case where the magnetic material layer is formed on the entire surface is described, but the magnetic material layer may be partially formed in a ring shape, a square shape, or the like, and is not particularly limited.
The point is that the coil portion may be filled with the magnetic layer.
In addition, as a method for forming the magnetic layer 51, a magnetic powder composed of Ni-Zn ferrite, Mg-Zn ferrite, Mn-Mg-Zn ferrite, rare earth-based ultrafine particles, a flat metal magnetic powder, or the like is converted into a resin solution. A magnetic paste is prepared by mixing, and a magnetic coating film is formed on the entire surface or in a predetermined shape by a method such as screen printing, and then dried and cured to form a magnetic layer, or a magnetic thin plate (Permalloy, Sendust) And the like are formed into a magnetic material layer by processing a magnetic material sandwiched between insulating films into a predetermined shape and attaching the magnetic material by heating, pressure bonding, or the like.
[0018]
Next, via holes 52 are formed at predetermined positions of the magnetic layer 51 by laser processing or the like (see FIG. 3I).
Next, after a roughening treatment, a catalyst nucleus provision and an activation treatment on the magnetic material layer 51 and the inside of the via hole 52, a plating base layer is formed on the magnetic material layer 51 and the inside of the via hole 52 by electroless copper plating or the like. (Particularly not shown) is formed, electrolytic copper plating is performed using the plating base layer as a cathode, the conductor layer 24 having a predetermined thickness is formed on the magnetic layer 51, and the filled via 25 is formed in the via hole 52 ( FIG. 3 (j)).
[0019]
Next, the conductor layer 24 is patterned to form an upper layer coil pattern 24a for a toroidal coil and a terminal electrode 24b on the magnetic layer 51 on one surface of the insulating base material 11, and a lower layer for the toroidal coil. A five-layer toroidal coil built-in wiring circuit board 100 having a toroidal coil 50 in which the coil pattern 22a and the upper coil pattern 24a are electrically connected via the magnetic layer 51 via the filled via 25 is obtained.
[0020]
Further, by forming a predetermined number of insulating layers and wiring layers as needed, a multilayer wiring circuit board with a built-in toroidal coil can be obtained.
[0021]
【The invention's effect】
As described above, by incorporating the inductor in the wiring circuit board by the build-up method, it is possible to provide a wiring circuit board with a built-in toroidal coil for EMI and a semiconductor package with an improved mounting density.
In addition, since the wiring layers and components are formed by the build-up method, the degree of freedom in arranging the components is improved, and an efficient wiring circuit board can be manufactured.
Further, by forming a magnetic layer also serving as an insulating layer using a high-resistance insulating magnetic material, a high-density wiring circuit board with a built-in toroidal coil can be easily manufactured.
[Brief description of the drawings]
FIG. 1A is a perspective view showing an example of a wiring circuit board with a built-in toroidal coil of the present invention.
(B) is a schematic cross-sectional view of the perspective view of (a) taken along the line AA '.
FIGS. 2A to 2F are schematic sectional views showing a part of a manufacturing process in a method of manufacturing a wiring circuit board with a built-in toroidal coil according to the present invention.
3 (g) to 3 (k) are schematic sectional views showing a part of the manufacturing process in the method for manufacturing a wiring circuit board with a built-in toroidal coil of the present invention.
[Explanation of symbols]
11 Insulating base material 20, 40 Circuit board 21 Conductive layers 21a, 21b First wiring layers 22, 24 Conductive layer 22a Lower coil pattern 22b for toroidal coil Second wiring Layer 22c Land 23, 25 Filled via 24a Upper coil pattern 24b for toroidal coil Terminal electrode 31, 32 Resist pattern 41 Insulating layer 42, 52 Via hole 50 Toroidal Coil 51 Magnetic layer 100 Wiring circuit board with built-in toroidal coil

Claims (2)

ビルドアップ工法にて絶縁層及び配線層が所定層数形成されたインダクタ内蔵の配線回路板であって、前記インダクタが磁性体層の両面に形成された上下層のコイルパターンをビア接続して形成されたトロイダルコイルからなることを特徴とするトロイダルコイル内蔵配線回路板。A wiring circuit board with a built-in inductor in which a predetermined number of insulating layers and wiring layers are formed by a build-up method, wherein the inductor is formed by via-connecting coil patterns of upper and lower layers formed on both surfaces of a magnetic layer. A wiring circuit board with a built-in toroidal coil, comprising a toroidal coil. 少なくとも以下の工程を備えていることを特徴とするトロイダルコイル内蔵配線回路板の製造方法。
（ａ）絶縁基材（１１）の両面に第１配線層（２１ａ）及び第１配線層（２１ｂ）が形成された回路基板（２０）を作製する工程。
（ｂ）回路基板（２０）の両面に絶縁層（４１）を形成し、絶縁層（４１）の所定位置にビア用孔（４２）を形成する工程。
（ｃ）絶縁層（４１）上に導体層（２２）を、ビア用孔（４２）にフィルドビア（２３）を形成する工程。
（ｄ）導体層（２２）をパターニング処理して、回路基板（２０）の一方の面に絶縁層（４１）を介してトロイダルコイル用の下層コイルパターン（２２ａ）及び第２配線層（２２ｂ）を、他方の面に絶縁層（４１）を介してランド（２２ｃ）が形成された回路基板（４０）を作製する工程。
（ｅ）回路基板（４０）の一方の面のトロイダルコイル用の下層コイルパターン（２２ａ）上に磁性体層（５１）を形成する工程。
（ｆ）磁性体層（５１）の所定位置にビア用孔（５２）を形成する工程。
（ｇ）磁性体層（５１）上に導体層（２４）を、ビア用孔（５２）にフィルドビア（２５）を形成する工程。
（ｈ）導体層（２４）をパターニング処理して、トロイダルコイル用の上層コイルパターン（２４ａ）及び端子電極（２４ｂ）を形成し、下層コイルパターン（２２ａ）と上層コイルパターン（２４ａ）がフィルドビア（２５）にて電気的に接続されたトロイダルコイル（５０）を形成する工程。A method for manufacturing a wiring circuit board with a built-in toroidal coil, comprising at least the following steps.
(A) a step of producing a circuit board (20) having a first wiring layer (21a) and a first wiring layer (21b) formed on both surfaces of an insulating base material (11);
(B) forming an insulating layer (41) on both sides of the circuit board (20) and forming a via hole (42) at a predetermined position of the insulating layer (41);
(C) forming a conductor layer (22) on the insulating layer (41) and forming a filled via (23) in the via hole (42);
(D) patterning the conductor layer (22) to form a lower coil pattern (22a) for a toroidal coil and a second wiring layer (22b) on one surface of the circuit board (20) via an insulating layer (41); Forming a circuit board (40) having a land (22c) formed on the other surface via an insulating layer (41).
(E) forming a magnetic layer (51) on the lower coil pattern (22a) for the toroidal coil on one surface of the circuit board (40);
(F) forming a via hole (52) at a predetermined position of the magnetic layer (51);
(G) forming a conductor layer (24) on the magnetic layer (51) and a filled via (25) in the via hole (52);
(H) patterning the conductor layer (24) to form an upper coil pattern (24a) and a terminal electrode (24b) for the toroidal coil, and the lower coil pattern (22a) and the upper coil pattern (24a) are filled vias ( Forming a toroidal coil (50) electrically connected in 25).
JP2002359139A 2002-12-11 2002-12-11 Wiring circuit board with built-in toroidal coil and its manufacturing method Pending JP2004193319A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002359139A JP2004193319A (en) 2002-12-11 2002-12-11 Wiring circuit board with built-in toroidal coil and its manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002359139A JP2004193319A (en) 2002-12-11 2002-12-11 Wiring circuit board with built-in toroidal coil and its manufacturing method

Publications (1)

Publication Number Publication Date
JP2004193319A true JP2004193319A (en) 2004-07-08

Family

ID=32758621

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002359139A Pending JP2004193319A (en) 2002-12-11 2002-12-11 Wiring circuit board with built-in toroidal coil and its manufacturing method

Country Status (1)

Country Link
JP (1) JP2004193319A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007040064A1 (en) * 2005-09-30 2007-04-12 Matsushita Electric Industrial Co., Ltd. Sheet-like composite electronic component and method for manufacturing same
US10158293B2 (en) 2014-11-12 2018-12-18 Murata Manufacturing Co., Ltd. Power supply module and mounting structure therefor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007040064A1 (en) * 2005-09-30 2007-04-12 Matsushita Electric Industrial Co., Ltd. Sheet-like composite electronic component and method for manufacturing same
US8058951B2 (en) 2005-09-30 2011-11-15 Panasonic Corporation Sheet-like composite electronic component and method for manufacturing same
US10158293B2 (en) 2014-11-12 2018-12-18 Murata Manufacturing Co., Ltd. Power supply module and mounting structure therefor

Similar Documents

Publication Publication Date Title
US6542379B1 (en) Circuitry with integrated passive components and method for producing
US9514876B2 (en) Inductor device, method for manufacturing the same and printed wiring board
US7170384B2 (en) Printed circuit board having three-dimensional spiral inductor and method of fabricating same
US7338892B2 (en) Circuit carrier and manufacturing process thereof
JP2006060187A (en) Printed circuit board with built-in capacitor and its manufacturing method
WO2003034494A1 (en) Module component
JP6504565B2 (en) Coil built-in integrated circuit board and method of manufacturing the same
KR20160111153A (en) Inductor and method of maufacturing the same
JP2014022551A (en) Printed wiring board and manufacturing method for printed wiring board
JP2003092460A (en) Wiring board and method for manufacturing the same provided with passive device
JP2004343054A (en) Electronic component and its manufacturing method
JP3436525B2 (en) Multilayer substrate, electronic component, and method of manufacturing multilayer substrate
JP2004064052A (en) Noise shielding type laminated substrate and its manufacturing method
JP2005079402A (en) Circuit board and its manufacturing method
JP2013106034A (en) Manufacturing method of printed circuit board
JP4363947B2 (en) Multilayer wiring circuit board and method for manufacturing the same
JP2010062464A (en) Method of manufacturing inductor-incorporated printed wiring board, and inductor-incorporated printed wiring board
JP2004193319A (en) Wiring circuit board with built-in toroidal coil and its manufacturing method
KR100733279B1 (en) Method of fabricating printed circuit board with embedded inductor
WO2003023903A1 (en) Printed wiring board with high density inner layer structure
CN113539650A (en) Method for processing inductance device in printed circuit board and printed circuit board
JP4515477B2 (en) Method for manufacturing wiring board with passive element
TWM579427U (en) Multi-layered circuit board structure having both through holes and blind holes
WO2003100852A1 (en) Shielding wire in multilayer board, semiconductor chip, electronic circuit element, and method for producing the same
JP4577479B2 (en) Sheet forming method having different material parts and sheet having different material parts used for multilayer wiring board formation

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20050916

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20080708

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080908

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20090224

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20090423

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20090818