JP3436525B2 - Multilayer substrate, electronic component, and method of manufacturing multilayer substrate - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer substrate made of a resin for electronic equipment or a composite material obtained by mixing a resin with a functional powder, an electronic component using the multilayer substrate, and a method for manufacturing the multilayer substrate.

[0002]

2. Description of the Related Art In conventional resin or composite material substrates, it is almost impossible to form a high-capacity capacitor because the resin has a low dielectric constant. An example of a multilayer substrate with a built-in ceramic capacitor is disclosed in Japanese Patent Application Laid-Open No. 8-32197 as means for forming a high-capacity capacitor. The one described in the publication incorporates a high-dielectric-constant ceramic chip in the hole portion of a prepreg having a hole,
Copper foil is attached to both surfaces, hot pressed, and patterned by etching to form a core substrate. Then, the prepreg is integrated with the core substrate to form a multilayer substrate.

[0003]

The conventional multilayer substrate made of resin or composite material with a built-in ceramic capacitor is
Since the ceramic dielectric and the copper foil cannot be sufficiently adhered to each other, there is a problem that an air gap is formed between them and the electrical connection is poor, the capacitance is not stable, and the quality is largely varied. Also, when soldering to the board by reflow,
There is a risk that peeling or rupture may occur due to the expansion of the air in the gap, resulting in a decrease in reliability.

In view of the above problems, the present invention provides a method in which a ceramic chip and a copper foil are in close contact with each other so that air remains between them and variations in quality associated therewith and peeling of the copper foil during reflow,
It is an object of the present invention to provide a highly reliable multilayer substrate that is free from the risk of bursting, an electronic component using the multilayer substrate, and a method for manufacturing a multilayer substrate.

[0005]

A multi-layer substrate according to claim 1 is
Embed a ceramic chip in the prepreg with holes,
Position of the ceramic chip above and below the ceramic chip
The core substrate in which copper foils with several holes are punched in the portion corresponding to and are integrated by hot pressing and the copper foil is patterned, and the layer in which the prepregs stacked above and below the core substrate are integrated by hot pressing are formed. It is characterized by having one or more layers above and below.

According to a second aspect of the present invention, there is provided a multilayer substrate in which a ceramic chip having electrodes on upper and lower surfaces is embedded in a prepreg having holes, and the ceramic chip is provided above and below the ceramic chip.
The copper foil with several holes drilled in the part corresponding to the position is integrated by hot pressing, and plating is performed on the copper foil and the exposed portion of the hole of the electrode, and the copper foil and the plated film are formed. Layers in which a patterned core substrate and prepregs laminated on both surfaces of the core substrate are integrated by hot pressing are respectively provided on the upper and lower sides.

The multilayer substrate according to claim 3 is the same as claim 1 or 2
In the multi-layer substrate, part or all of the ceramic chip made of a high dielectric constant ceramic, characterized in that a built-in multilayer capacitor electrode to the high dielectric constant canceller <br/> Mick.

A multilayer substrate according to claim 4 is the multilayer substrate according to claim 1 or 2.
In the multi-layer substrate, the ceramic chip is partially or entirely made of a magnetic ceramic, and an inductor is built in the magnetic ceramic.

A multilayer substrate according to a fifth aspect is the multilayer substrate according to any one of the first to fourth aspects, characterized in that the capacitor and the inductor are built in the ceramic chip.

A multilayer substrate according to a sixth aspect is the multilayer substrate according to any one of the first to fifth aspects, wherein a thick film resistor is formed on a surface of the ceramic chip.

According to a seventh aspect of the present invention, in the multi-layer substrate according to any one of the first to sixth aspects, the multi-layer substrate is embedded in a hole continuously formed by several prepregs in addition to the ceramic chip. Has a magnetic ceramic core,
It is characterized in that it has an inductor wiring formed in a helical shape or a spiral shape around the core.

An electronic component according to an eighth aspect is characterized by including the multilayer substrate according to any one of the first to sixth aspects.

According to a ninth aspect of the present invention, there is provided a method of manufacturing a multilayer substrate, wherein a ceramic chip is embedded in a prepreg having a hole, and the ceramic chip is provided above and below the ceramic chip at positions of the ceramic chip.
Steps of stacking copper foils having holes at several positions on the corresponding portions and integrating them by hot pressing, patterning the copper foils to produce a core substrate, and integrating prepregs on both surfaces of the core substrate by hot pressing Is repeated once or more.

[0014] a method for manufacturing a multilayer substrate according to claim 10, embedding the ceramic chip subjected to electrodes on the upper and lower surfaces in the prepreg with a hole, on and below the ceramic chip, 該Se
Laminated copper foil with several holes perforated in a portion corresponding to the position of the lamic chip and integrated by hot pressing, and plating on the copper foil and the exposed portion of the hole of the electrode,
In addition, the step of patterning the copper foil and the plating film to produce a core substrate, placing prepregs on both surfaces of the core substrate, and integrating them by hot pressing is repeated one or more times.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1A is a sectional view showing an embodiment of a multi-layer substrate or electronic component of the present invention.
(B) is a perspective view showing the layer structure. 1a is a prepreg serving as a core substrate. The prepreg 1a has a hole 3 in which a ceramic chip 2 is embedded. The ceramic chip 2 of the present embodiment is a high dielectric constant ceramic,
A capacitor is constructed with the copper foils 4 adhered on both sides. The copper foil 4 has a plurality of holes 4a. 1b-1
e is a prepreg which is sequentially stacked on the upper and lower surfaces of the prepreg 1a. Reference numeral 5 is a through hole that is provided so as to penetrate through the one that is overlapped and integrated, and is used to connect a conductor pattern made of copper foil between conductors inside or between front and back surfaces inside.

As the prepregs 1a to 1e, resins generally used for printed wiring boards such as epoxy resin, polyimide resin, vinylbenzyl resin, bismaleimide lyazine resin, polyphenylene ether resin, aramid epoxy resin can be used. . In addition, these resins are
It is possible to use a glass cloth with or without a glass cloth. Further, it is possible to use a resin in which a dielectric powder or a magnetic powder is contained to increase the dielectric constant or magnetic permeability. Moreover, as these powders,
A metal particle having a dielectric coating or a magnetic coating formed on the surface thereof can be used.

Further, the ceramic chip of the present embodiment includes titanium dioxide type, barium titanate type, lead titanate type, strontium titanate type, calcium titanate type, bismuth titanate type, magnesium titanate type,
Examples include lead zirconate-based ceramics and other ceramics. In addition, metal particles having a surface coated with a dielectric coating can be used.

This multilayer substrate or electronic component is manufactured as follows. First, a hole 3 is made in a part of the prepreg 1a, and the ceramic chip 2 is put therein. Next, the copper foil 4 having one or a plurality of holes 4a formed on the upper and lower portions corresponding to the positions of the ceramic chips 2 is superposed, and these are hot-pressed to bring the copper foil into close contact with the prepreg 1a and at the same time the prepreg 1a. Is cured to form a core substrate.

After that, the copper foil 4 is patterned by etching or the like to form the electrode portion 6 of the ceramic chip 2 and the lead-out portion 7 pulled out from the periphery thereof. The lead-out portion 7 is connected to another element in the same layer, connected to an element in another layer through a through hole, or connected to a wiring pattern on the front surface or the back surface or a terminal electrode.

Next, the prepregs 1b and 1c are arranged on the upper and lower sides of the core substrate having the ceramic chip 2 built in such a structure, and further hot pressed to cure the prepreg and to adhere it to the core substrate. By this second heat pressing, the prepregs 1b and 1c and the ceramic chip 2 are brought into close contact with each other through the holes 4a formed in the copper foil 4. By doing so, the adhesion between the copper foil 4 and the ceramic chip 2 can be enhanced. In this case, copper foil is also placed on the prepregs 1b and 1c,
After curing, patterning may be performed by etching.

Thereafter, the prepregs 1d and 1e are further arranged on the upper and lower sides, and if necessary, a copper foil is arranged, and hot pressing and patterning are performed. Change the number of prepregs as needed.

Except for the portion where the ceramic chip 2 is inserted, it can be handled in the same manner as an ordinary multi-layer substrate. After the through hole 5 is opened by a drill or laser, plating is performed.
The circuit is constructed as a whole.

This multi-layer substrate is generally formed by taking a large number of chips, and a resin substrate in which the ceramic chips 2 are arranged vertically and horizontally is cut into individual chips.

As described above, by constructing a multilayer substrate made of a laminate made of a resin or a composite material in which a resin and a functional powder (dielectric powder or magnetic powder) are mixed, it is small and flexible, Although a multi-layer substrate having good workability is realized, by incorporating the ceramic chip 2 in the core substrate 1a, it is possible to incorporate a capacitor using ceramics having a dielectric constant much higher than that of the substrate material. In this case, since the prepregs 1b and 1c are brought into close contact with the ceramic chip 4 through the holes 4a, residual air can be prevented, and there is no risk of copper foil peeling or rupture during reflow, and a highly reliable multilayer substrate can be obtained. Can be provided.

FIG. 2 (A) shows another embodiment of the present invention. As the ceramic chip 2, as shown in FIG. 2 (B), one having electrodes 8 attached to the upper and lower surfaces thereof is used, and A metal plating film 9 is deposited on the copper foil 4 and the portions of the electrodes 8 exposed by the holes 4a. Metal plating film 9
Shows the exposed portion of the electrode 8 along the shape of the hole 4a.
It is formed in a concave shape.

As shown in FIG. 2C, in this multilayer substrate, a ceramic chip 2 having electrodes 8 provided on the upper and lower surfaces is fitted to a prepreg 1 having holes 3 as in the embodiment shown in FIG. , The copper foil 4 is vertically stacked and hot-pressed so that the hole 4a is located on the electrode 8 to adhere the copper foil 4 to the prepreg 1a and cure the prepreg 1a to produce a core substrate. To do. Next, by plating the upper and lower surfaces, the copper film 4 and the exposed portion of the electrode 8 due to the hole 4a of the copper foil 4 are electrically connected by the plating film 9, so that the electrical connection is more reliable. Done. Then, the plating film 9 and the copper foil 4 are patterned by etching in the same manner as described above. After that, the prepregs 1b to 1e are integrated by the same steps as those in the above embodiment. Through hole 5
Formation and plating.

In this way, the electrodes 8 are attached to the ceramic chip 2.
Is provided and the plating film 9 is formed in series on the copper foil 4 and the electrode 8 in the portion of the hole 4a, so that a reliable electrical connection is made. Further, the plating film 9 also serves to fix the copper foil 4 to the surface of the electrode 8, and it is possible to stably obtain a high capacity.

FIG. 2D is a sectional view showing another embodiment of FIG. 2A. Instead of the ceramic chip 2, the capacitor electrodes 10 and 11 are arranged in a laminated manner inside the ceramic chip 2A, and these are connected by via holes 12 and 13, respectively, and connected to the upper surface electrode 8A or the lower surface electrode 8B. It was done. The other structure and manufacturing method are the same as those shown in FIG.

By thus forming the capacitor electrodes 10 and 11 as a ceramic chip in a laminated form,
A larger capacity can be obtained.

FIG. 3A is a sectional view showing another embodiment of the present invention, in which a capacitor 14 and an inductor 15 are formed inside a ceramic chip 2B. In this case, a high dielectric constant material is used for the capacitor 14, and Mn-Z is used for the ceramic forming the inductor 15.
A magnetic material such as n-type ferrite or Ni-Zn-type ferrite is used, and is formed by integral firing with the internal conductor. Internal capacitor electrodes and inductor conductors are connected by via holes 16 and 17, and are also connected to electrodes 8A and 8B on the front and back surfaces. Other configurations are the same as in the case of FIG.

With such a structure, the high capacity capacitor 14 and the high inductance inductor 15 can be built in the ceramic chip 2B.

FIG. 3B is a sectional view showing another embodiment of the present invention, in which a capacitor 14 and an inductor 1 are provided inside.
5 has a laminated structure, a wiring pattern 8C is formed on the surface of the built-in ceramic chip 2C, and a thick film resistor 19 is provided between the wiring patterns 8C. In this case, the surface conductor for connecting the ceramic chip is separately formed on the surface (lower surface) opposite to the surface on which the thick film resistor 19 is formed. That is, electrodes 8D and 8E are formed on the lower surface, and wiring patterns made of copper foils 4 and 4 are connected to these, respectively. The internal capacitor electrode and the upper wiring or the lower electrode 8D are connected to the via hole 2
They are connected by 0 and 21. This constitutes a ceramic-based LCR circuit.

FIG. 4A is a sectional view showing another embodiment of the present invention, and FIG. 4B is an equivalent circuit diagram thereof.
It constitutes a low-pass filter. That is, the inductors L1 and L2 connected in series are provided between the input terminal 22 and the output terminal 23, and the inductors L1 and L2 are connected to each other.
Connect capacitors C2 and C4 in parallel to 2 and input terminal 2
2. The capacitors C1 and C5 are provided between the output terminal 23 and the ground, and the capacitor C3 is provided between the connection point of the inductors L1 and L2 and the ground.

The capacitors C2 and C4 constitute a capacitor having a relatively high capacity, and the ceramic chip 2A having a built-in capacitor having the structure shown in FIG. 2D is adopted. The capacitors C1, C3, C5 constitute a capacitor having a relatively low capacity, and are constituted by electrodes 25, 26 sandwiching a dielectric layer made of prepreg.

Further, since the inductors L1 and L2 require a high inductance value, as shown in FIG. 4C, the inductors L1 and L2 are respectively connected to the plurality of prepregs 1f to 1i.
Adjacent to body (this conductor may be formed in a spiral)
The layers of the layers to be connected are connected by the via holes 30.
As a result, a coil 28 is formed in a helical shape, a hole 27 is formed in a portion surrounded by the coil 28, and a magnetic core 29 is put in the hole 27, which is then placed on a laminated body containing the capacitors C1 to C5. Overlap and then prepreg 1 on top
j are overlapped and integrated by hot pressing.

With such a structure, a high-capacity capacitor and an inductance value and a Q value are provided in the substrate by using a resin or a composite material using a resin which is smaller and more flexible and has good workability. A high inductor can be built in. In addition, a high-performance low-pass filter can be configured by configuring the low-pass filter together with the capacitor that configures the electrodes with the prepreg,
In addition, the degree of freedom in selecting filter characteristics is expanded.

FIG. 5A is a sectional view showing another embodiment of the present invention, in which a prepreg 1m serving as a core substrate is a prepreg containing glass cloth, and a ceramic chip 2A having a built-in capacitor is provided in the prepreg. A plurality of prepregs 1n to 1r having no glass cloth on the top and bottom of a core substrate obtained by embedding and curing the copper foil 4 and the plating 9 as described above are built up with a conductor pattern 31 made of copper foil. It is composed by.

With such a structure, it is possible to form a thin and high-density multilayer substrate.

FIG. 5B is a sectional view showing another embodiment of the present invention, and FIG. 5C is an equivalent circuit diagram thereof. In this embodiment, a voltage controlled oscillator is configured as an electronic component. In this embodiment, among the capacitors C1 to C9 forming the voltage controlled oscillator, a ceramic chip 2E or 2C in which a high-capacity capacitor is embedded in the core substrate 1a.
Other components such as the built-in conductor F, the other capacitors are formed by the built-in electrodes 32, and the built-in conductor 33 and the like serving as the stripline L forming the resonator are as described above.
The electronic components 34 such as the variable capacitance diode D and the transistors Q1 and Q2 are mounted on the surface of the laminated body.

With this structure, a capacitor having a high capacity, which cannot be built in the conventional multi-layer substrate, can be built in, so that a smaller voltage controlled oscillator can be obtained.

According to the present invention, as shown in FIG. 5D, the ceramic chip built in the multi-layer substrate has a coil 36 built in a magnetic ceramic 35 such as ferrite in a laminated sintered structure, and both ends of the coil 36 are laminated. It is also applicable to the case where the inductor is connected to the electrode 37. Further, the prepreg for incorporating a ceramic chip into a core substrate may be a prepreg in which a plurality of prepregs are stacked and punched.

[0042]

According to the first and ninth aspects of the present invention, a ceramic chip is provided as an inner layer in a multi-layer substrate made of a resin which is small and flexible and has good workability, or a composite material in which a functional powder is mixed with a resin. , The copper foil connected to the ceramic chip can be adhered to the ceramic chip, which prevents air from remaining between the two, and there is no risk of copper foil peeling or rupturing during reflow, and reliability is improved. It is possible to provide a multi-layer substrate having high efficiency.

According to claims 2 and 10, electrodes are provided on the ceramic chip, and a plating film is formed in series on the copper foil and the electrodes in the holes, so that a reliable electrical connection is achieved. In addition, since this plating film also serves to fix the copper foil to the electrode surface, the same effects as those of claims 1 and 9 can be obtained.

According to the third aspect, a part or all of the ceramic chip is made of a high-dielectric ceramic, and the high-dielectric-constant ceramic has a built-in multilayer capacitor electrode.
It is possible to provide a highly reliable multilayer substrate with a built-in capacitor of higher capacity.

According to claim 4, the ceramic chip is
Since a part or the whole is made of magnetic ceramic and the inductor is built in the magnetic ceramic, it is possible to provide a highly reliable multilayer substrate in which the inductor having a high Q value and a high inductance is built.

According to claim 5, the ceramic chip is
Since the capacitor and the inductor are built in, it is possible to provide a highly reliable multilayer substrate in which the high capacity capacitor and the high inductance inductor are built in the ceramic chip.

According to the sixth aspect of the present invention, since the thick film resistor is formed on the surface of the ceramic chip, a highly reliable multilayer substrate including a resistor and a high capacity capacitor or / and a high inductance inductor is provided. can do.

According to a seventh aspect, in addition to the ceramic chip, a magnetic ceramic core embedded in a hole continuously formed for several prepregs is provided, and a prepreg around the core is provided.
Connect adjacent conductors formed on several prepregs.
Carp formed by connecting via holes
Because it has a le, it can be built in inductance of the high inductance value and a high Q value in the multilayer substrate.

Since the multilayer substrate according to claim 8 constitutes an electronic component using the multilayer substrate according to any one of claims 1 to 7,
The effects described in each claim can be obtained.

[Brief description of drawings]

FIG. 1A is a sectional view showing an embodiment of a multilayer substrate or an electronic component of the present invention, and FIG. 1B is a perspective view showing the layer structure thereof.

2A is a cross-sectional view showing another embodiment of the present invention, FIG. 2B is a perspective view showing a built-in ceramic chip thereof, FIG.
(C) is a figure explaining the lamination process, (D) is sectional drawing which shows other embodiment of this invention.

3A and 3B are cross-sectional views showing another embodiment of the present invention.

4A is a sectional view showing another embodiment of the present invention, FIG. 4B is an equivalent circuit diagram thereof, and FIG. 4C is a perspective view showing the structure of the built-in inductor.

5A is a sectional view showing another embodiment of the present invention, FIG. 5B is a sectional view showing another embodiment of the present invention, FIG.
(C) is an equivalent circuit diagram thereof, and (D) is a sectional view showing another example of the ceramic chip incorporated in the present invention.

[Explanation of symbols]

1a to 1r: prepreg, 2, 2A to 2F: ceramic chip, 3: hole, 4: copper foil, 4a: hole, 5: through hole, 6: electrode portion, 7: lead portion, 8, 8A, 8B,
8D, 8E: electrode, 8C: wiring pattern, 9: plating film, 10 and 11: capacitor electrode, 12 and 13: via hole, 14: capacitor, 15: inductor, 16 and 1
7: via hole, 19: thick film resistor, 20, 21: via hole, 22: input terminal, 23: output terminal, 25, 26:
Electrode, 27: hole, 28: coil, 29: core, 30: through hole, 31: conductor pattern, 32: built-in electrode, 3
3: Built-in conductor, 34: Electronic component, 35: Magnetic ceramic, 36: Coil, 37: Electrode, C1 to C9: Capacitor, D: Variable capacitance diode, L1, L2: Inductor, Q1, Q2: Transistor

─────────────────────────────────────────────────── ─── Continuation of the front page (56) Reference JP-A-8-32197 (JP, A) JP-A-2000-299241 (JP, A) JP-A-11-354924 (JP, A) JP-A-11-55058 (JP, A) JP 5-21930 (JP, A) JP 8-88455 (JP, A) Actual development 5-48379 (JP, U) (58) Fields investigated (Int.Cl. ⁷⁾ , DB name) H05K 3/46 H01F 17/00 H01G 4/30 H01G 4/40

Claims (10)

(57) [Claims] 1. A buried ceramic chip in the prepreg with a hole, the upper and lower of the ceramic chip, the ceramic
A core board in which copper foils with several holes are placed in the part corresponding to the position of the chip and integrated by heat pressing and the copper foil is patterned, and the prepregs that are stacked above and below the core board are integrated by heat pressing. A multilayer substrate having one or more layers above and below. 2. A prepreg having holes formed therein is embedded with ceramic chips having upper and lower surfaces provided with electrodes, and is provided above and below the ceramic chips at portions corresponding to the positions of the ceramic chips.
A copper substrate having several holes perforated is integrated by hot pressing, and plating is performed on the copper foil and an exposed portion of the electrode due to the holes, and a core substrate in which a copper foil and a plating film are patterned, and A multi-layer substrate having one or more layers each of which has a prepreg laminated on both sides of a core substrate and is integrated by hot pressing. 3. A multi-layer substrate according to claim 1 or 2, that some or all of the ceramic chip made of a high dielectric constant Sera <br/> Mick, with built-in multi-layer capacitor electrode to the high dielectric constant ceramic Multilayer substrate characterized by. 4. The multilayer substrate according to claim 1, wherein a part or all of the ceramic chip is made of magnetic ceramic, and an inductor is built in the magnetic ceramic. 5. The multilayer board according to any one of claims 1 to 4, wherein a capacitor and an inductor are built in the ceramic chip. 6. The multilayer board according to claim 1, wherein a thick film resistor is formed on a surface of the ceramic chip. 7. The multilayer substrate according to claim 1, wherein the multilayer substrate has, in addition to the ceramic chip, a magnetic ceramic core embedded in a hole continuously formed for several prepregs. , Several prepregs around the core
A multilayer substrate having a coil formed by connecting the formed conductors with via holes . 8. An electronic component comprising the multilayer substrate according to claim 1. 9. A ceramic chip is embedded in a prepreg having a hole, and the ceramic chip is provided above and below the ceramic chip.
Copper foil with several holes drilled in the part corresponding to the position is integrated by hot pressing, the copper foil is patterned to produce a core substrate, and prepregs are integrated on both sides of the core substrate by hot pressing. A method of manufacturing a multilayer substrate, wherein the step of repeating is repeated one or more times. 10. A prepreg having holes formed therein is embedded with ceramic chips having upper and lower surfaces provided with electrodes, and the ceramic chips are provided above and below the ceramic chips.
Copper foil with several holes drilled in the part corresponding to the position is integrated by hot pressing, plating is performed on the copper foil and the exposed part of the hole of the electrode, and the copper foil and the plating film are patterned. The method for producing a multi-layer substrate is characterized in that the step of producing a core substrate, arranging prepregs on both surfaces of the core substrate and integrating them by hot pressing is repeated one or more times.