JP2004153179A - Semiconductor device and electronic device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve high frequency characteristics by reducing transmission loss of high frequency, by transmitting a high frequency signal via a transmission line part connected to a surface layer wiring of a wiring board. <P>SOLUTION: The high frequency signal from a tape-shaped line part 40 comprising a surface signal lead 40g and surface GND leads 40h arranged on both sides thereof is inputted directly to a semiconductor chip via surface wiring for signal of a package substrate and further transmitted through a solder bump electrode, or on the contrary the high frequency signal from the semiconductor chip is outputted to the external part via the tape-shaped line part 40. By transmitting the high frequency signal only with all micro strip lines of the surface layer of a package board in this way, the high frequency signal is transmitted only with the micro strip line of the surface layer not through a via, etc. Consequently the high frequency signal is transmitted without loss of frequency characteristics, and the high frequency signal of high quality is transmitted with less loss in high frequency transmission. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor device and an electronic device, and more particularly, to a technology that is effective when applied to transmission of a high-frequency signal.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, there is a structure in which a coaxial cable is employed as high-speed signal transmission means. In a PGA (Pin Grid Array) type semiconductor package (semiconductor device), signal transmission in a thickness direction between a component mounting surface and a back surface of a multilayer wiring board is performed. A coaxial cable is used as a path (for example, see Patent Document 1).
[0003]
Some optical communication devices use a coaxial cable (for example, see Non-Patent Document 1).
[0004]
[Patent Document 1]
JP-A-5-167258 (FIG. 1)
[0005]
[Non-patent document 1]
Shoichi Hanatani, Katsuyoshi Karasawa, Kiichi Yamashita, Minoru Maeda, "Characteristics of 565 Mb / s Optical Transmitter Using DFB-LD" National Conference on Communication, Optical and Radio Waves, Announced on September 3, 1986 -170 pages, Fig. 2)
[0006]
[Problems to be solved by the invention]
Conventionally, input / output of signals to / from a semiconductor package is performed via “wiring”. However, as the semiconductor chip mounted on the semiconductor package operates in the high-frequency region, if the wiring structure is not properly designed, the signal propagation efficiency decreases, and the high-frequency characteristics deteriorate. ing.
[0007]
In a PGA type semiconductor package employing a coaxial cable, the core wire of the coaxial cable and the surface wiring of the multilayer wiring board are joined in a state where they are applied at right angles to each other. Since the difference between the cross-sectional areas in the perpendicular direction is large, the signal is reflected at a portion where the area of the joint between the core wire and the surface wiring changes.
[0008]
As a result, there is a problem that the high frequency characteristics are deteriorated.
[0009]
Further, the present inventor has proposed a structure for realizing a high-frequency semiconductor device to which a coaxial cable is connected, by connecting an inner lead as an external connection terminal to a package substrate on which a high-frequency semiconductor chip is mounted, The structure in which the outer leads connected to the outer side protrude outward from the package substrate along the plane direction of the package substrate was examined.
[0010]
However, in a structure in which the outer leads protrude toward the outside of the substrate along the planar direction of the package substrate, there is a problem that the size cannot be reduced.
[0011]
An object of the present invention is to provide a semiconductor device and an electronic device that improve the quality of high-frequency characteristics.
[0012]
It is another object of the present invention to provide a semiconductor device and an electronic device that are reduced in size.
[0013]
Still another object of the present invention is to provide a semiconductor device and an electronic device that are reduced in thickness.
[0014]
It is another object of the present invention to provide a semiconductor device and an electronic device that can be reduced in cost.
[0015]
The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.
[0016]
[Means for Solving the Problems]
The following is a brief description of an outline of typical inventions disclosed in the present application.
[0017]
That is, the present invention provides a wiring board on which a surface wiring is formed, a semiconductor chip electrically connected to and mounted on the wiring board, and any one of a main surface of the wiring substrate and a back surface opposite to the main surface. A plurality of external connection terminals provided therein, and a transmission line portion electrically connected to the surface wiring of the wiring board, and at least one of signal input and output to the semiconductor chip. One is performed via the transmission line section.
[0018]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[0019]
In the following embodiments, when necessary for the sake of convenience, the description will be made by dividing into a plurality of sections or embodiments, but unless otherwise specified, they are not unrelated to each other and one is the other. Some or all modifications, details, supplementary explanations, etc.
[0020]
Further, in the following embodiments, when referring to the number of elements (including the number, numerical value, amount, range, etc.), a case where it is particularly specified and a case where it is clearly limited to a specific number in principle, etc. Except, the number is not limited to the specific number, and may be more than or less than the specific number.
[0021]
Furthermore, in the following embodiments, the components (including element steps, etc.) are not necessarily essential, unless otherwise specified or considered to be essential in principle. Needless to say.
[0022]
Similarly, in the following embodiments, when referring to the shapes, positional relationships, and the like of the components, the shapes are substantially the same, unless otherwise specified, and in cases where it is considered in principle not to be so. And the like. The same applies to the above numerical values and ranges.
[0023]
In all the drawings for describing the embodiments, members having the same functions are denoted by the same reference numerals, and the repeated description thereof will be omitted.
[0024]
(Embodiment 1)
FIG. 1 is a sectional view showing an example of the structure of the high-frequency package according to the first embodiment of the present invention, FIG. 2 is an external perspective view showing an example of the structure of an optical module into which the high-frequency package shown in FIG. 1 is incorporated, and FIG. 2 is a cross-sectional view showing the structure of the optical module shown in FIG. 2, FIG. 4 is a plan view showing an example of the arrangement of components incorporated in the optical module shown in FIG. 2, and FIG. 5 is an arrangement of components incorporated in the optical module shown in FIG. FIG. 6 is a cross-sectional view illustrating an example of a structure of a high-frequency package according to a modification, FIG. 7 is a partial plan view illustrating an example of a structure of a microstrip line in a wiring board of the high-frequency package illustrated in FIG. 1, and FIG. FIG. 9 is a partial cross-sectional view showing the structure of the microstrip line shown in FIG. 7, and FIG. 9 is a partial plan view showing the structure of a microstrip line of a modification of the wiring board of the high-frequency package shown in FIG. 10 is a partial sectional view showing the structure of the microstrip line of the modification shown in FIG. 9, FIG. 11 is a perspective view and a sectional view showing the structure of the high-frequency package of the modification, and FIG. 12 is a cap of the high-frequency package shown in FIG. 13 is a cross-sectional view showing an example of the mounting structure, FIG. 13 is a plan view of the cap mounting structure shown in FIG. 12, FIG. 14 is a cross-sectional view taken along line AA of FIG. 13, and FIG. 16 is a plan view showing an example of the positional relationship between the surface wiring and the cap in the cap mounting structure shown in FIG. 12, FIG. 17 is a bottom view showing the structure of the cap as viewed from the direction of arrow C in FIG. 18 is a side view showing the structure of the cap shown in FIG. 17, FIG. 19 is a sectional view showing the structure of the cap shown in FIG. 17 and an enlarged partial sectional view of a corner, and FIG. 20 is taken along line AA in FIG. Section cut FIG. 21 is an enlarged partial cross-sectional view taken along line BB of FIG. 13. FIG. 22 is an enlarged partial plan view showing an example of the positional relationship between the surface wiring and the opening of the cap in the cap mounting structure shown in FIG. FIG. 23 is a sectional view showing a structure of a high-frequency package according to a modification, FIG. 24 is an enlarged partial sectional view showing an example of a structure in which a heat dissipation member is attached to the cap shown in FIG. 12, and FIGS. FIG. 28 is a cross-sectional view showing the structure of the high-frequency package according to the modification, FIG. 28 is a plan view showing the structure of the high-frequency package according to the modification of the first embodiment, and FIG. 29 is a cross-sectional view of the high-frequency package shown in FIG. 31 and 32 are plan views showing the structure of a high-frequency package according to a modification of the first embodiment of the present invention, respectively. FIG. 33 is a plan view showing the structure of a high-frequency package according to a modification of the first embodiment. 4 is a cross-sectional view of the high-frequency package shown in FIG. 33, FIG. 35 is a plan view showing the structure of a high-frequency package according to a modification of the first embodiment, FIG. 36 is a cross-sectional view of the high-frequency package shown in FIG. FIG. 38 is a plan view showing the structure of a high-frequency package according to a modification of the first embodiment. FIG. 38 is a cross-sectional view of the high-frequency package shown in FIG.
[0025]
The semiconductor device according to the first embodiment shown in FIG. 1 is a semiconductor package on which an optical communication IC (Integrated Circuit) is mounted, and is, for example, a high-frequency package 1 capable of high-speed transmission of 40 Gbps. The high-frequency package 1 is mounted on an optical module (electronic device such as a semiconductor module device) 14 shown in FIGS. 2 and 3 and has a coaxial cable 7 for signal transmission on the high-frequency side.
[0026]
Here, the coaxial cable 7 of the first embodiment is an example of a transmission line. The transmission line is a wiring path for transmitting high-frequency power, such as a coaxial cable 7, a microstrip line, or a feeder cable. General wiring is a line for transmitting power irrespective of high frequency and low frequency, and the input part and the output part are electrically connected, but the characteristics when power is transmitted are taken into consideration. Not necessarily. Therefore, there is a case where low-frequency power is transmitted but high-frequency power is not transmitted (the output is zero).
[0027]
On the other hand, the transmission line is configured such that the power is attenuated on the way, reflected, and propagates efficiently without a significant decrease in output so that the wiring shape and the surrounding conductor shape and arrangement including the wiring, This is a line designed with insulation layer material, insulation layer thickness and structure.
[0028]
The configuration of the high-frequency package 1 according to the first embodiment includes a signal surface wiring (surface wiring) 4c and a GND layer (ground conductor layer) 4f formed inside via the signal surface wiring 4c and the insulating layer 4e. And a package substrate (wiring substrate) 4 which is a chip carrier having a microstrip line 4g comprising: a chip carrier; and a plurality of solder bump electrodes 5 electrically connected to the main surface 4a of the package substrate 4 by flip-chip connection. The high-frequency semiconductor chip 2, the coaxial cable 7 in which the core wire 7 a is electrically connected to the signal surface wiring 4 c, and the main surface 2 a of the semiconductor chip 2 and the main surface 4 a of the package substrate 4. Underfill resin 6 for protecting the flip-chip connection portion, and a plurality of external connection terminals arranged in a back surface 4b opposite to the main surface 4a of the package substrate 4. Consisting of a ball electrode 3.
[0029]
That is, the high-frequency package 1 transmits a high-frequency (for example, 40 Gbps) signal from the coaxial cable 7 to the semiconductor chip 2 directly through the solder bump electrode 5 via the signal surface wiring 4 c of the package substrate 4. And a structure capable of transmitting a high-frequency signal only on all microstrip lines on the surface layer of the package substrate 4.
[0030]
Therefore, by transmitting the high-frequency signal only through the microstrip line on the surface layer of the package substrate 4 without passing through wiring by a via or the like, the high-frequency signal can be transmitted without loss of the frequency characteristics.
[0031]
That is, the via (including the through hole) is not a transmission line but a wiring. In the transmission line, in order to realize efficient propagation of electric power, design is performed using parameters such as a wiring width, an interlayer insulating film thickness, a space between adjacent patterns, material properties, and the like so that a characteristic impedance becomes a desired value. Do. However, in the via portion, since the conductor between the via pattern and the interlayer is perpendicular and it is difficult to form a coaxial structure, it is difficult to design to obtain a desired characteristic impedance. Therefore, power loss is likely to occur in the via portion.
[0032]
From these facts, in the technology described in Japanese Patent Application Laid-Open No. 5-167258, in which the vicinity of the connection between the core wire of the coaxial cable and the bump pad is connected as the via shape, mismatching of the characteristic impedance occurs at the connection. In order to further embed a coaxial cable in the thickness direction of the substrate, a hole is formed in the substrate with a drill or the like, the coaxial cable is inserted into this hole, positioning is performed, and the connection between the bump pad and the core wire is performed. It seems that a manufacturing process that fills the holes afterwards is necessary. This structure increases the number of processes as compared to a general wiring board manufacturing process, and involves difficult techniques such as cable connection and embedding, leading to an increase in cost.
[0033]
On the other hand, in the first embodiment, since the wiring board can be manufactured by the existing technology, the cost does not increase.
[0034]
Note that the surface wiring such as the signal surface wiring 4c and the GND surface wiring 4h of the first embodiment is formed of, for example, copper or the like, and is formed of the uppermost layer on the main surface 4a side of the package substrate 4. That is, it may be exposed on the surface of the main surface 4a, or may be coated with a non-conductive thin film or the like.
[0035]
When high-speed transmission such as 40 Gbps is performed, it is preferable to make the signal surface wiring 4c of the microstrip line 4g as short as possible. Therefore, of the plurality of solder bump electrodes 5 connected to the semiconductor chip 2 of the package substrate 4, the solder bump electrode 5 disposed closer to the coaxial cable 7 (coaxial connector 11) from the center of the semiconductor chip 2 is the signal surface wiring 4c. Is connected to
[0036]
Preferably, of the plurality of solder bump electrodes 5, one of the outermost solder bump electrodes 5 is connected to the signal surface wiring 4c.
[0037]
Accordingly, high-speed signal transmission with a loss of high-frequency characteristics minimized can be realized, and noise on the microstrip line 4g can be reduced, so that a decrease in high-frequency characteristics can be suppressed.
[0038]
In the high-frequency package 1, a plurality of ball electrodes (bump electrodes) 3 provided as terminals for external connection are arranged in an array on the back surface 4b of the package substrate 4. Therefore, the high-frequency package 1 has a ball grid array. Semiconductor package.
[0039]
This makes it possible to reduce the size of the package as compared with an outer lead protruding type high-frequency package in which the outer leads protrude outward from the package substrate 4.
[0040]
The microstrip line 4g transmits a high-frequency signal as an electromagnetic wave in the insulating layer 4e between the signal surface wiring 4c and the internal GND layer 4f. As shown, the microstrip line 4g is also formed with the GND surface layer wiring (ground surface layer wiring) 4h arranged on both sides of the signal surface layer wiring 4c via the insulating portion.
[0041]
In the high-frequency package 1, a frame member 8 is attached to the package substrate 4 along the outer peripheral portion thereof, and a coaxial connector (relay member) 11 fitted to the coaxial cable 7 is attached to the frame member 8 together with the glass beads 12. Is provided. Then, the coaxial cable 7 is fitted into the coaxial connector 11, the core wire 7 a of the coaxial cable 7 is connected to the core wire 12 a of the glass beads 12, and the core wire 12 a is soldered to the signal surface wiring 4 c of the package substrate 4. (May be connected by a conductive resin or the like).
[0042]
The diameter of the coaxial connector 11 is, for example, about 10 mm.
[0043]
The package substrate 4 is a substrate formed of, for example, glass-containing ceramic or the like, and has a thickness of, for example, about 1 mm. An internal signal wiring 4d, which is a signal line connecting the bump electrode 5 and the corresponding ball electrode 3 as an external connection terminal, is formed.
[0044]
The high-frequency package 1 having such a structure is incorporated in an optical module (semiconductor module device) 14 as shown in FIG. 2 and mounted on the module substrate (relay member) 13.
[0045]
Here, the structure of the optical module 14 will be described.
[0046]
The optical module 14 shown in FIGS. 2 to 5 is a module for high-speed optical communication, and is a module product mounted on a communication system device of a communication network base station, for example.
[0047]
The optical module 14 of the first embodiment has a size of, for example, L (100 to 200 mm) × M (60 to 150 mm) as shown in FIG. Although (T) is 10 to 25 mm, the size and height of the optical module 14 are not limited to these numerical values.
[0048]
The high-frequency package 1 according to the first embodiment is mounted on a module substrate 13 of an optical module 14 and is covered with a module case 15 together with the module substrate 13. A plurality of fins 16 are formed side by side on the surface of the module case 15, and the fins 16 receive the wind 18, so that the heat radiation of the optical module 14 can be improved.
[0049]
The external terminal of the optical module 14 is a module connector 17 attached to the module substrate 13, and a part of the external terminal is exposed on the back side of the module case 15.
[0050]
As shown in FIGS. 4 and 5, in the optical module 14, a high-frequency optical signal input from an input is converted into an electric signal by a photoelectric converter 20, and the electric signal is further converted to an input signal via an amplifier element 19. After entering the high frequency semiconductor chip 2 through the microstrip line 4g of the package substrate 4, the internal signal wiring 4d of the package substrate 4 shown in FIG. The light is sent to the outside of the optical module 14 via the module connector 17.
[0051]
On the other hand, a signal input from the module connector 17 is transmitted as an output through a reverse path.
[0052]
Although FIG. 4 shows a case where two high-frequency semiconductor chips 2 are provided on the input side and the output side, the input side and the output side may be incorporated in one semiconductor chip 2. It is possible.
[0053]
In FIG. 4, arrows shown by solid lines in the arrows indicating the flow of input and output signals indicate transmission of an optical signal by an optical fiber, and arrows shown by dotted lines indicate the coaxial cable 7 or the microstrip line. 4g shows transmission of an electric signal by 4g.
[0054]
Next, FIG. 6 shows a modification of the high-frequency package 1, in which a core wire 7a of a coaxial cable 7 is directly connected to a signal surface wiring 4c of a package substrate 4 by soldering or the like.
[0055]
That is, the coaxial cable 7 is directly attached to the package substrate 4 by solder or the like without using the coaxial connector 11.
[0056]
In this case, a step 4k for arranging the coaxial cable 7 is provided at the end of the package substrate 4, and a surface wiring 4h for GND is provided on the surface of the step 4k. A shield (GND) 7b that covers the core wire 7a of the cable 7 and a GND surface wiring 4h having a step 4k are electrically connected by soldering or the like.
[0057]
Since the coaxial cable 7 is directly attached to the package substrate 4 as described above, the coaxial connector 11 which is expensive and has a relatively large diameter is not used. Cost can be reduced.
[0058]
Next, a preferred shape of the inner GND layer 4f in the package substrate 4 will be described with reference to FIGS.
[0059]
First, FIG. 7 and FIG. 8 show a case where the GND layer 4f inside the substrate extends to the end of the package substrate 4 in the microstrip line structure 21 using the microstrip line 4g. This is a case where the structure 22 and the microstrip line structure 21 are connected.
[0060]
In this case, the input / output high-speed signal to / from the outside of the package passes through the path of the coaxial cable 7, the signal surface wiring 4 c of the package substrate 4, and the semiconductor chip 2. At this time, the core wire 7a of the coaxial cable 7 is connected to the signal surface wiring 4c of the package substrate 4, and the shield 7b, which is the GND of the coaxial cable 7, is connected to the GND surface wiring 4h of the package substrate 4. I have.
[0061]
In some cases, a frame member 8 for supporting the coaxial cable 7 is fixed on the package substrate 4, and the frame member 8 and the shield 7 b of the coaxial cable 7 or the GND surface wiring 4 h of the package substrate 4 are connected to each other. May be connected. As shown in FIG. 8, the GND surface wiring 4h and the inner GND layer 4f are connected by via wiring 4i.
[0062]
Therefore, in order to make the signal surface wiring 4c on the package substrate 4 into the microstrip line structure 21 in all regions so as to reduce the L (inductance) of GND, the GND layer 4f is exposed at the end of the substrate. A via wire 4i for connecting to the shield 7b of the coaxial cable 7 or the GND of the frame member 8 or connecting the GND surface wiring 4h and the inner GND layer 4f is formed at the end of the board, and the via wiring is formed when the board is cut. 4i must be cut and exposed and connected to the coaxial cable 7 and the GND of the frame member 8.
[0063]
However, these techniques require high precision in positioning the surface layer / inner layer wiring of the package substrate 4 and, when using a sticky material such as Cu for the wiring, leads to a cause of wiring sagging, There is a concern that production will be difficult.
[0064]
On the other hand, the structure shown in FIGS. 9 and 10 has a signal surface wiring 4c and a GND surface wiring 4h in a region between the outermost via wiring 4i and the coaxial cable 7 among the plurality of via wirings 4i. Are formed on the same plane (main surface 4a), and the coaxial cable 7 and the microstrip line 4g of the package substrate 4 are connected via the coplanar line 23a.
[0065]
That is, a region outside the outermost via wiring 4i near the end of the package substrate 4 is defined as the coplanar structure 23, and the coaxial structure 22, the coplanar structure 23, and the microstrip line structure 21 are connected. .
[0066]
Thereby, the inductance of GND can be reduced.
[0067]
Further, for the characteristic impedance matching in the region of the coplanar structure 23, the distance between the signal surface wiring 4c and the GND surface wiring 4h is reduced as shown in FIG. Note that the positional deviation accuracy between the via wiring 4i and the inner GND layer 4f is the same as that of the related art (for example, about 50 μm), and no new technology is required, so that an increase in cost can be prevented.
[0068]
Therefore, by connecting the coaxial structure 22, the coplanar structure 23, and the microstrip line structure 21, the loss of the high-frequency signal can be reduced and the characteristic impedance of the high-speed signal path can be made closer to the target value.
[0069]
Furthermore, the characteristic impedance can be made even closer to the target value by shortening the distance between the surface layer wiring for signal 4c and the surface layer wiring for GND 4h.
[0070]
As a result, deterioration of the high-speed signal characteristics can be suppressed, and the electrical characteristics of the high-frequency package 1 can be improved without increasing the cost.
[0071]
Next, a high-frequency package 1 according to a modification shown in FIG. 11 will be described.
[0072]
The high-frequency package 1 shown in FIG. 11 uses a thin coaxial connector 24, which is a plate-like member, as a relay member between the coaxial cable 7 and the microstrip line 4g of the package substrate 4.
[0073]
The thin coaxial connector 24 has a microstrip line 24c composed of a signal surface wiring (surface wiring) 24a and a GND line (ground wiring) 24b formed on both sides of the signal wiring via an insulating portion. In the high-frequency package 1, the signal surface wiring 24 a of the microstrip line 4 g of the package substrate 4 and the core wire 7 a of the coaxial cable 7 are electrically connected via the signal surface wiring 24 a of the microstrip line 24 c of the thin coaxial connector 24. Have been.
[0074]
That is, a signal surface wiring 24a is provided on the upper surface of a thin ceramic plate or the like having a step 24d, and GND lines 24b are provided on both sides thereof. Only the GND lines 24b are provided in the lower stage, and the upper and lower GND lines are provided. 24b are connected by a surface or an inner layer via.
[0075]
Then, the coaxial cable 7 is mounted in the lower stage, the core wire 7a at the tip is placed on the upper signal surface wiring 24a, and the shield 7b of the coaxial cable 7 and the upper and lower GND lines 24b of the ceramic plate are connected by soldering or the like, Further, the core wire 7a of the coaxial cable 7 and the upper signal surface wiring 24a are similarly connected by soldering or the like.
[0076]
After that, the surface wiring of the ceramic plate and the surface wiring of the package substrate 4 are opposed to each other, and the mutual wiring is connected by solder or conductive resin. Alternatively, gold (Au) -gold (Au) pressure connection may be performed, or the ceramic plate and the package substrate 4 may be tightly fixed.
[0077]
As described above, by using the thin coaxial connector 24 which is a plate-shaped member as the relay member, the high-frequency package 1 can be made thinner.
[0078]
Further, handling of the coaxial cable 7 becomes easy, and connector repair becomes possible. Further, the thin coaxial connector 24 may be attached to both ends of the coaxial cable 7, or one end may be the thin coaxial connector 24 and the other end may be the coaxial connector 11 as shown in FIG. 1. 7, it is possible to attach a connector having a different shape. Alternatively, one end may be the thin coaxial connector 24 and the other end may expose the cable end.
[0079]
The coaxial cable 7 to which the thin coaxial connector 24 is attached can be supplied only by the coaxial cable 7, and can be supplied as the high-frequency package 1 to which the thin coaxial connector 24 is attached as shown in FIG. Good.
[0080]
Next, a high-frequency package 1 according to a modification shown in FIG. 12 will be described.
[0081]
First, in the high-frequency package 1 shown in FIG. 12, among the ball electrodes 3 of the plurality of external connection terminals, the support balls 3a are provided at the four outermost corners as shown in FIG.
[0082]
This is because the heavy weight of the coaxial connector 11 causes the ball electrodes 3 to be crushed when the high-frequency package 1 is mounted on a mounting board such as the module board 13, causing an electrical short between the adjacent ball electrodes 3. Since the support balls 3a are provided at the four outermost corners, the support balls 3a at the corners support the package substrate 4 and crush the ball electrodes 3 when the ball electrodes 3 are melted. Can prevent the occurrence of an electrical short circuit.
[0083]
The support balls 3a are formed of, for example, high melting point solder, resin, ceramic, or the like.
[0084]
In the high-frequency package 1 shown in FIG. 12, a cap 9 as a heat radiating member is attached to a back surface 2b of the semiconductor chip 2 opposite to the main surface 2a via a heat conductive adhesive 10.
[0085]
That is, since the high-frequency semiconductor chip 2 may generate a large amount of heat when driven, the heat dissipation of the semiconductor chip 2 is reduced by attaching a heat dissipation cap 9 or a heat diffusion plate or a heat dissipation fin to the rear surface 2b. As well as improving the heat dissipation of the high-frequency package 1, deterioration of the electrical characteristics can be prevented.
[0086]
Here, the arrangement position of the cap 9 with respect to the package substrate 4 will be described. As shown in FIGS. 12 to 14, the cap 9 is attached to the back surface 2 b of the semiconductor chip 2 via a heat conductive adhesive 10 or the like so as to cover the semiconductor chip 2. As shown in (1), it is more preferable to be arranged also on the surface wiring (microstrip line 4g) such as the signal surface wiring 4c and the GND surface wiring 4h.
[0087]
That is, it is preferable that the cap 9 covers the microstrip line 4g in order to prevent noise due to an external electromagnetic wave or the like from being applied to the surface microstrip line 4g.
[0088]
Therefore, it is preferable that the semiconductor chip 2 and the surface wiring are covered to some extent so as to prevent the entry of electromagnetic waves from the outside. However, the cap 9 and the surface wiring such as the signal surface wiring 4c and the GND surface wiring 4h must be insulated.
[0089]
Accordingly, in the package substrate 4 of the first embodiment, as shown in FIG. 17, an opening (a flesh relief) 9a is formed in the leg 9b on the surface wiring of the cap 9, and the leg of the cap 9 is formed. 9b and a cap shape so that the surface wiring does not contact.
[0090]
20 and 22 show the details of the positional relationship between the opening 9a of the leg 9b of the cap 9 and the signal surface wiring 4c and the GND surface wiring 4h of the package substrate 4. That is, the leg 9b of the cap 9 is opened as an opening 9a to a position outside both sides of the GND surface wiring 4h so as not to contact the signal surface wiring 4c and the GND surface wiring 4h.
[0091]
Further, the portion other than the connection region of the signal surface wiring 4c, which is the surface wiring of the package substrate 4, with the coaxial cable 7, is an insulating thin film (non-conductive thin film) made of resin or the like as shown in FIG. It is covered with a certain solder resist 4j (the same applies to the surface wiring for GND 4h). The solder resist 4j has a function of preventing solder flow for the solder connection 31 of the coaxial cable 7 as well as an insulation function.
[0092]
Therefore, since the opening 9a, which is a relief for the cap 9, and the solder resist 4j, which is an insulating thin film, are formed on the surface wiring, the contact between the surface wiring and the cap 9 can be prevented.
[0093]
As shown in FIGS. 17 and 18, the cap 9 is formed with cutouts 9c at the corners and side portions, etc., which are recesses that do not come into contact with the surface wiring.
[0094]
Further, since the cap 9 also needs a shielding effect, as shown in FIG. 19, the entire surface of the base material 9d made of a copper alloy or the like is covered with a chromium-based conductive film 9e, and only the outer surface thereof is covered. Are covered with a non-conductive film 9f so as to prevent electrical short-circuit with other components.
[0095]
As shown in FIGS. 21 and 22, such a cap 9 is attached to the same layer as the signal surface wiring 4c and the GND surface wiring 4h formed on the main surface 4a of the package substrate 4. In addition, the layer of the base electrode of the solder bump electrode 5 is the same layer.
[0096]
In addition, as shown in FIG. 21, in order to enhance the shielding effect, the leg 9b is connected to the inside of the package substrate 4 via the conductive material 25 so that the opening 9a of the leg 9b of the cap 9 is not formed. The cap 9 is electrically connected to the power supply (or the GND layer 4f) via the via wiring 4i, and the cap 9 itself is electrically connected to the power supply layer (or the GND layer 4f and the GND surface wiring 4h) inside the package substrate 4. I have.
[0097]
Thus, the periphery of the high-frequency signal solder bump electrode 5 is surrounded by the GND potential, and the shielding effect of the cap 9 can be enhanced.
[0098]
As shown in FIG. 22, the solder bump electrodes 5 for high-frequency signals, that is, the solder bump electrodes 5 connected to the signal surface wiring 4c, are arranged almost at the center of the sides of the outermost solder bump electrode 5 rows. The solder bump electrode 5 is preferably used, and the coaxial connector 11 connected to the solder bump electrode 5 via the signal surface wiring 4c is also preferably arranged substantially at the center of the side.
[0099]
As a result, the microstrip line 4g can be made the shortest, high-speed signal transmission with a loss of high-frequency characteristics minimized can be realized, and noise on the microstrip line 4g can be reduced.
[0100]
Next, the high-frequency package 1 of the modification shown in FIG. 23 has a structure in which the cap 9 is attached to the high-frequency package 1 using the thin coaxial connector 24 shown in FIG. If this is the case, both the thinning of the high-frequency package 1 and the heat dissipation can be improved.
[0101]
In the high-frequency package 1 of the modified example shown in FIG. 24, a heat dissipation block (heat dissipation member) 26 is further attached to the surface of the cap 9 attached to the back surface 2b of the semiconductor chip 2 via the heat conductive adhesive 10. The heat radiation of the high-frequency package 1 can be further improved.
[0102]
The high-frequency package 1 of the modification shown in FIG. 25 has a structure in which a second semiconductor chip 27 is mounted on the package substrate 4 in addition to the semiconductor chip 2, and a cap 9 covering both chips is provided. Installed.
[0103]
Here, a signal is input from the semiconductor chip 2 connected to the coaxial cable 7 via the surface microstrip line 4g to the second semiconductor chip 27 via the internal signal wiring 4d of the package substrate 4, and furthermore, Then, a signal is transmitted from the solder bump electrode 5 of the second semiconductor chip 27 to the ball electrode 3 serving as an external connection terminal via the internal signal wiring 4d.
[0104]
The high-frequency package 1 according to the modified example shown in FIGS. 26 and 27 has a structure in which a balancer 28 is attached to the frame member 8. The balancer 28 functions to adjust the center of gravity of the high-frequency package 1 so that the high-frequency package 1 does not tilt when the high-frequency package 1 is mounted on a substrate.
[0105]
FIG. 26 shows a structure in which the balancer 28 is fixed to the frame member 8 via the screw member 29. FIG. 27 shows a case in which a groove is formed in the balancer 28, Is attached to the frame member 8.
[0106]
Therefore, in the high-frequency package 1 of FIGS. 26 and 27, the package center of gravity is adjusted by the balancer 28 so that the high-frequency package 1 does not tilt when mounted on the board.
[0107]
Next, the arrangement positions of the package substrate 4 and the semiconductor chip 2 will be described.
[0108]
In the high-frequency package 1, the semiconductor chip 2 is preferably arranged on the package substrate 4 in a region as close to the coaxial cable 7 as possible.
[0109]
That is, when transmitting a high-frequency signal from the coaxial cable 7 to the semiconductor chip 2 via the microstrip line 4g on the surface layer of the package substrate 4, if the path of the microstrip line 4g is long, noise occurs and the high-frequency characteristics deteriorate. In order to prevent this, it is preferable to arrange the semiconductor chip 2 so as to be shifted toward the coaxial cable 7 from the center of the package substrate 4, and to arrange the semiconductor chip 2 as close to the coaxial cable 7 as possible.
[0110]
As a result, the length of the microstrip line 4g can be shortened, and it is possible to prevent noise from deteriorating high-frequency characteristics.
[0111]
The high-frequency package 1 shown in FIG. 13 is a case where one semiconductor chip 2 is mounted on a package substrate 4. The semiconductor chip 2 is arranged closer to the coaxial connector 11 than the center of the package substrate 4. By fitting the coaxial cable 7 to the connector 11, the semiconductor chip 2 is arranged closer to the coaxial cable 7 from the center.
[0112]
FIGS. 28 and 29 show the case where the high-frequency semiconductor chip 2 and the low-frequency second semiconductor chip 27 are mounted on the package substrate 4, and the high-frequency semiconductor chip 2 is coaxial from the center of the package substrate 4. It is arranged closer to the connector 11 and closer to the coaxial connector 11 than the second semiconductor chip 27 of low frequency. Further, two coaxial connectors 11 are attached to one semiconductor chip 2 in a corresponding manner. It is what is being done.
[0113]
FIG. 30 is a modification of the structure of FIG. 28, in which the arrangement of the two coaxial connectors 11 is changed.
[0114]
31 and 32 show the case where one semiconductor chip 2 is mounted on the package substrate 4, respectively, and FIG. 31 shows the case where two coaxial connectors 11 are provided on the same side. Are arranged closer to the coaxial connector 11 than the center.
[0115]
In FIG. 32 as well, the semiconductor chip 2 is arranged closer to the coaxial connector 11 than the center portion, but the two coaxial connectors 11 are symmetrically arranged so as to face two opposing sides.
[0116]
In the high-frequency package 1 shown in FIGS. 33 and 34, one semiconductor chip 2 is arranged closer to the coaxial connector 11 than the center, and the coaxial connector 11 is provided on the closest side corresponding to this. Further, a plurality of chip capacitors 30 are mounted around the semiconductor chip 2 on the main surface 4a of the package substrate 4.
[0117]
That is, since the semiconductor chip 2 is disposed closer to the coaxial connector 11 than the center, a plurality of chip capacitors 30 and the like can be mounted in an empty space on the side opposite to the side of the semiconductor chip 2.
[0118]
On the other hand, in the high-frequency package 1 shown in FIGS. 35 and 36, one semiconductor chip 2 is disposed closer to the coaxial connector 11 than the center portion, and a plurality of The high-frequency package 1 shown in FIGS. 37 and 38 has a semiconductor chip 2 disposed closer to the coaxial connector 11 than the center portion, and the package substrate 4 A plurality of chip capacitors 30 are mounted in concave portions 41, which are cavities formed in the chip-corresponding region on the back surface 4b.
[0119]
Any of the high-frequency packages 1 shown in FIGS. 28 to 38 can be reduced in size, thickness, and cost.
[0120]
(Embodiment 2)
FIG. 39 is a cross-sectional view showing the structure of a semiconductor device (high-frequency package) according to the second embodiment of the present invention. FIGS. 40 and 41 are cross-sectional views each showing the structure of a high-frequency package according to a modification of the second embodiment of the present invention. 42 is a cross-sectional view showing an example of a cap-mounted state in assembling the high-frequency package shown in FIG. 41. FIG. 43 is a partial cross-sectional view showing an example of a connection state between the auxiliary board and the coaxial cable in assembling the high-frequency package shown in FIG. 44 is a partial sectional view showing an example of a testing state in assembling the high-frequency package shown in FIG. 41, and FIG. 45 is a partial sectional view showing an example of a structure after the assembly of the high-frequency package shown in FIG. 41 is completed.
[0121]
The semiconductor device shown in FIG. 39 of the second embodiment is a high-frequency semiconductor package for optical communication having a coaxial cable 7 as in the high-frequency package 1 of the first embodiment. The coaxial cable 7 is not attached via the coaxial connector 11 or the coaxial cable 7 is directly attached to the package substrate 4 which is a chip carrier, but the coaxial cable 7 is attached to the optical module 14 shown in FIG. It is connected to the module substrate 13 of the (semiconductor module device), and the module substrate 13 is connected to the package substrate 4 via the protruding electrodes.
[0122]
Therefore, the module substrate 13 is used as a relay member when transmitting a high-frequency signal from the coaxial cable 7 to the package substrate 4, and the module substrate 13 also has a signal surface wiring on the surface layer of the main surface 13a. A microstrip line 13g composed of a (surface wiring) 13c and a GND layer (ground conductor layer) 13f formed inside via the signal surface wiring 13c and the insulating layer 13e is formed.
[0123]
Therefore, the signal surface wiring 4c of the microstrip line 4g of the package substrate 4 and the core wire 7a of the coaxial cable 7 are connected via the signal surface wiring 13c of the microstrip line 13g of the module substrate 13.
[0124]
That is, since the thin ball electrode 34 serving as an external connection terminal is formed on the main surface 4a on the flip chip connection side of the package substrate 4, the main surface 4a of the package substrate 4 and the main surface 13a of the module substrate 13 face each other. By arranging them, the signal surface wiring 4c of the package substrate 4 and the signal surface wiring 13c of the module substrate 13 can be connected via the thin ball electrode 34 made of solder or the like. The microstrip line 4g of the package substrate 4 and the microstrip line 13g of the module substrate 13 are connected via the thin ball electrode 34.
[0125]
Therefore, the high-frequency package 1 of the second embodiment also transmits a high-frequency (for example, 40 Gbps) signal from the coaxial cable 7 directly to the semiconductor chip 2 via the signal surface wiring 13 c of the module substrate 13 and via the thin ball electrode 34. , And high-frequency signals can be transmitted via the module substrate 13 only by the microstrip lines on the entire surface layer of the package substrate 4.
[0126]
As a result, similarly to the high-frequency package 1 of the first embodiment, the high-frequency signal is transmitted only by the microstrip lines on the surface layers of the module substrate 13 and the package substrate 4 without passing through vias or the like, thereby improving the frequency characteristics. High frequency signals can be transmitted without loss.
[0127]
The signal on the low frequency side is transmitted to the outside through the internal signal wiring 4d of the package substrate 4 and the internal signal wiring 13d of the module substrate 13 via the thin ball electrode 34.
[0128]
The semiconductor chip 2 is arranged in the opening 13 h of the module substrate 13 in a state of being flip-chip connected to the package substrate 4, and is further provided on the back surface 2 b of the semiconductor chip 2 via a heat conductive adhesive 10. A (heat dissipating member) 26 is attached, and therefore, a heat dissipating block 26 is arranged on the back surface 13 b side of the module substrate 13.
[0129]
The high-frequency package 1 according to the second embodiment has a structure in which the module substrate 13 is interposed between the coaxial cable 7 and the package substrate 4 without directly attaching the coaxial cable 7 to the package substrate 4. A structure in which the semiconductor chip 2 is flip-chip connected to the package substrate 4 can be handled as a product.
[0130]
In this case, the coaxial cable 7 is connected to the module substrate 13 on the user side, and the package substrate 4 and the module substrate 13 are connected on the user side via the thin ball electrodes 34 to assemble the high-frequency package 1. .
[0131]
Thus, in the high-frequency package 1 using the module substrate 13 as a relay member, the package substrate 4 on which the semiconductor chip 2 is mounted and the module substrate 13 to which the coaxial cable 7 is connected are separately assembled and then connected. , The yield can be separated.
[0132]
That is, the yield risk can be divided into the assembly of the semiconductor chip 2 and the assembly of the coaxial cable 7, and the yield of the structure after connecting both assemblies can be improved.
[0133]
Further, in the high-frequency package 1 using the module substrate 13, since the expensive coaxial connector 11 is not used, the cost of the high-frequency package 1 can be reduced, and the thickness can be reduced.
[0134]
Further, since all the external connection terminals are provided on the main surface 4a on the flip chip connection side of the package substrate 4, the selection test can be easily performed when the high frequency semiconductor chip 2 of 40 Gbps is selected. .
[0135]
That is, since all of the high-frequency and low-frequency external connection terminals are provided on one surface (the main surface 4a) of the package substrate 4, the probe needle can be easily brought into contact during the screening test, which is complicated. The test can be performed without using a jig having a complicated shape.
[0136]
As a result, the test time can be reduced.
[0137]
In the modification of the high-frequency package 1 shown in FIG. 40, the cap 9 is first attached to the back surface 2b of the semiconductor chip 2 via the heat conductive adhesive 10, and the heat conductive adhesive The heat radiation block 26 is attached via the agent 10.
[0138]
In this case, the cap 9 is formed with an opening (a relief portion) 9a that insulates the cap 9 from a surface wiring such as the signal surface wiring 4c.
[0139]
Further, in the high-frequency package 1 shown in FIG. 40, since the heat radiation block 26 is provided not only in the cap 9 but also in the cap 9, the heat radiation of the high-frequency package 1 can be further improved, and deterioration of the high-frequency characteristics is prevented. be able to.
[0140]
Next, the high-frequency package 1 of the modification shown in FIG. 41 is a case where the relay member connecting the coaxial cable 7 and the signal surface wiring 4c of the package substrate 4 is the auxiliary substrate 32 which is the second package substrate. The auxiliary substrate 32 has a signal surface wiring (surface wiring) 32c on its main surface 32a and a GND layer (ground conductor layer) formed therein via the signal surface wiring 32c and the insulating layer 32e. ) 32f to form a microstrip line 32g.
[0141]
Therefore, the signal surface wiring 4c of the microstrip line 4g of the package substrate 4 and the core wire 7a of the coaxial cable 7 are connected via the signal surface wiring 32c of the microstrip line 32g of the auxiliary substrate 32.
[0142]
That is, the thin ball electrode 34 which is a terminal for external connection is formed on the main surface 4a on the flip chip connection side of the package substrate 4, and the main surface 4a of the package substrate 4 and the main surface 32a of the auxiliary substrate 32 are opposed to each other. With this arrangement, the signal surface wiring 4c of the package substrate 4 and the signal surface wiring 32c of the auxiliary substrate 32 can be connected via the thin ball electrode 34 made of solder or the like. The microstrip line 4g of the package substrate 4 and the microstrip line 32g of the auxiliary substrate 32 are connected via the ball electrode 34.
[0143]
Therefore, the high-frequency package 1 of the modification shown in FIG. 41 also transmits a high-frequency (for example, 40 Gbps) signal from the coaxial cable 7 directly to the semiconductor via the signal surface wiring 32 c of the auxiliary substrate 32 and the thin ball electrode 34. The high-frequency signal can be transmitted to the chip 2 and can be transmitted only through the microstrip line on the surface layer of the package substrate 4 via the auxiliary substrate 32.
[0144]
Thus, similarly to the high-frequency package 1 of the first embodiment, a high-frequency signal is transmitted only by the microstrip line on the surface layer of the auxiliary substrate 32 and the package substrate 4 without passing through wiring by a via or the like. High frequency signals can be transmitted without loss.
[0145]
The signal on the low frequency side passes through the internal signal wiring 4d of the package substrate 4, passes through the internal signal wiring 32d of the auxiliary substrate 32 through the thin ball electrode 34, and passes through the pin member (connection terminal) 33. And transmitted to the module substrate 13 and the like.
[0146]
The semiconductor chip 2 is arranged in the opening 32h of the auxiliary substrate 32 in a state where the semiconductor chip 2 is flip-chip connected to the package substrate 4, and the cap 9 is placed on the back surface 2b of the semiconductor chip 2 via the heat conductive adhesive 10. The heat dissipation block (heat dissipation member) 26 is attached to the surface of the cap 9. Therefore, the heat dissipation block 26 is arranged on the back surface 32 b side of the auxiliary substrate 32.
[0147]
In the high-frequency package 1 according to the second embodiment, a component on the coaxial cable 7 side and a component on the semiconductor chip 2 side are separately selected, and good products are connected to each other, thereby improving the yield as the high-frequency package 1. Can be achieved.
[0148]
That is, the chip-side structure 36 shown in FIG. 42 in which the semiconductor chip 2 to which the cap 9 is attached is flip-chip connected, and the cable-side structure 37 shown in FIG. 43 in which the coaxial cable 7 is connected to the auxiliary substrate 32 by the solder connection 31. Are assembled, and each structure is separately tested separately.
[0149]
Accordingly, since both structures include the microstrip line, a high frequency test can be performed as each component, and the yield can be separated by connecting non-defective products. As a result, the yield risk can be divided between the chip-side structure 36 and the cable-side structure 37, and the yield of the high-frequency package 1 shown in FIG. 41 in which both structures are connected can be improved.
[0150]
Further, the chip-side structure 36 and the cable-side structure 37 can be distributed as individual components, respectively, and each can be obtained as a component.
[0151]
In addition, since all the external connection terminals are provided on the main surface 4a on the flip chip connection side of the package substrate 4, a selection test can be easily performed when selecting the high-frequency semiconductor chip 2 of 40 Gbps. .
[0152]
That is, since all of the high-frequency and low-frequency external connection terminals are provided on one surface (the main surface 4a) of the package substrate 4, the probe needle can be easily brought into contact during the screening test, which is complicated. The test can be performed without using a jig having a complicated shape.
[0153]
As a result, the test time can be reduced.
[0154]
Note that the auxiliary substrate 32 can be used as a testing substrate 35 as shown in FIG. 44, and can also be used as a socket in a sorting test of the package substrate 4.
[0155]
At this time, the test is performed by bringing the package substrate 4 into electrical contact with the testing substrate 35 via an interposer 35a such as an ACF (Anisotropic Conductive Film) and transmitting a signal to the outside via the pin member 35b.
[0156]
The testing substrate 35 has a signal surface wiring 35c, an internal signal wiring 35d, a GND layer 35f and a microstrip line arranged via the signal surface wiring 35c and the insulating layer 35e, similarly to the auxiliary substrate 32 and the like. 35 g are formed.
[0157]
After separately testing the chip-side structure 36 shown in FIG. 42 and the cable-side structure 37 shown in FIG. 43 and obtaining non-defective products, the chip-side structure 36 and the cable-side structure 37 are separated. The assembled high-frequency package 1 shown in FIG. 45 is a high-frequency package 1 according to a modification of the second embodiment.
[0158]
Further, a heat conductive adhesive 10 is applied to the surface of the cap 9, a heat radiation block 26 is attached via the heat conductive adhesive 10, and the high frequency package 1 is connected to the module substrate of the optical module 14 via a pin member 35 b. The mounting structure shown in FIG.
[0159]
In the high-frequency package 1 shown in FIG. 41, a cap 9 is first attached to the back surface 2b of the semiconductor chip 2 via a heat conductive adhesive 10, and the heat conductive adhesive 10 is further applied to the surface of the cap 9. In the optical module 14, the module case 15 shares the role of the heat radiation block 26, and the cap 9 has the cap 9 and the surface wiring such as the signal surface wiring 4c. (A meat escape portion) 9a is formed to insulate.
[0160]
Therefore, in the high-frequency package 1 shown in FIG. 41 as well, not only the cap 9 but also the heat-dissipating block 26 (the module case 15) is provided on the cap 9, so that the heat radiation of the high-frequency package 1 can be further improved. Deterioration of high frequency characteristics can be prevented.
[0161]
(Embodiment 3)
FIG. 46 is a plan view showing an example of the arrangement of components incorporated in the optical module according to Embodiment 3 of the present invention. FIG. 47 is a cross-sectional view showing an example of the arrangement of components incorporated in the optical module shown in FIG. FIG. 49 is a cross-sectional view showing a modification of the connection method of the transmission line section in the optical module shown in FIG. 46. FIG. 49 is a plan view showing the arrangement of components incorporated in the optical module of the modification of the third embodiment of the present invention. 50 is a cross-sectional view showing an example of the arrangement of components to be incorporated in the optical module shown in FIG. 49, and FIG. 51 is a plan view showing the structure of a tape-shaped transmission line unit which is an example of the transmission line unit according to the third embodiment of the present invention. FIG. 52 is a cross-sectional view showing a cross-sectional structure taken along line AA shown in FIG. 51. FIG. 53 is a cross-sectional view showing a cross-sectional structure taken along line BB shown in FIG. FIG. 54 is a cross-sectional view of the tape shape shown in FIG. FIG. 55 is a cross-sectional view showing a cross-sectional structure taken along the line C-C shown in FIG. 51, and FIG. 56 is a modification of the third embodiment of the present invention. FIG. 57 is a plan view showing the structure of the tape-shaped transmission line portion, FIG. 57 is a cross-sectional view showing the structure of a cross section cut along the line AA shown in FIG. 56, and FIG. 58 is a diagram showing the structure along the line BB shown in FIG. FIG. 59 is a rear view showing the structure of the back surface of the tape-shaped transmission line portion shown in FIG. 56, and FIG. 60 is a cross-sectional view taken along the line CC shown in FIG. 61 is a cross-sectional view showing the structure of FIG. 61, FIG. 61 is a plan view showing the structure of a tape-shaped transmission line portion of a modified example of Embodiment 3 of the present invention, and FIG. 62 is cut along the line AA shown in FIG. 63 is a cross-sectional view showing a cross-sectional structure, FIG. 63 is a cross-sectional view showing a cross-sectional structure taken along line BB shown in FIG. 61, 64 is a back view showing the structure of the back surface of the tape-shaped transmission line portion shown in FIG. 61, FIG. 65 is a sectional view showing the structure of a cross section cut along line CC shown in FIG. 61, and FIG. FIG. 67 is a cross-sectional view illustrating an example of a mounting structure of a high-frequency package provided with a tape-shaped transmission line portion according to the third embodiment. FIG. 67 is an enlarged partial cross-sectional view illustrating the structure of a D portion illustrated in FIG. 68 is a cross-sectional view showing a cross-sectional structure taken along line EE shown in FIG. 67, FIG. 69 is a cross-sectional view showing a modification of the structure shown in FIG. 68, and FIG. 70 is a modification of the structure shown in FIG. 71 is a cross-sectional view showing a modification of the structure shown in FIG. 66, FIG. 72 is a plan view showing the structure of a tape-shaped transmission line portion of a modification of the third embodiment of the present invention, and FIG. 72 is a plan view showing a connection state of the tape-shaped transmission line portion of the modification of FIG. 72, and FIG. FIG. 75 is a cross-sectional view illustrating a mounting structure of a modification of the tape-shaped transmission line unit according to the third embodiment. FIG. 75 is a cross-sectional view illustrating a mounting structure of a modification of the tape-shaped transmission line unit according to the third embodiment of the present invention. It is.
[0162]
The third embodiment describes a high-frequency package (semiconductor device) 38 mounted on an electronic device such as the optical module 39 shown in FIG. 46 having the same structure as the optical module 14 described in the first embodiment. .
[0163]
That is, the high-frequency package 38 is also a semiconductor package on which the optical communication IC is mounted, and is a semiconductor device capable of performing high-speed transmission of 1 giga Hz (GHz) or more, for example, 40 Gbps. The high-frequency package 38 has a tape-shaped line portion 40 as a tape-shaped transmission line portion as shown in FIGS. 51 to 55 as a transmission line portion of a high-frequency signal, and transmits a high-frequency signal to the semiconductor chip 2. Input or output of a signal is performed via the tape-shaped line section 40. Therefore, the tape-shaped line portion 40 is a member that transfers high-speed signals.
[0164]
The configuration of the high-frequency package 38 includes a package substrate (wiring substrate) 4 on which a signal surface wiring (surface wiring) 4 c as shown in FIG. 66 is formed, and a plurality of solder bump electrodes 5 on a main surface 4 a of the package substrate 4. A high-frequency semiconductor chip 2 which is electrically connected and mounted by flip-chip connection via a semiconductor chip 2, a tape-shaped line portion 40 which is electrically connected to the signal surface wiring 4 c of the package substrate 4, An underfill resin 6 that is poured between the main surface 2a (see FIG. 1) and the main surface 4a of the package substrate 4 to protect the flip-chip connection portion, and a back surface 4b opposite to the main surface 4a of the package substrate 4. And a ball electrode 3 which is a plurality of external connection terminals.
[0165]
Further, as shown in FIG. 51, the tape-shaped line portion 40 of the third embodiment has a plate-shaped lead 40a which is a transmission line and also a high-frequency wiring. It is electrically connected to the signal surface wiring 4c of the package substrate 4.
[0166]
As shown in FIG. 1, the package substrate 4 includes a signal surface wiring 4c and a GND layer (ground conductor layer) 4f formed inside via the signal surface wiring 4c and the insulating layer 4e. Is formed.
[0167]
Therefore, similarly to the high-frequency package 1 of the first embodiment, the high-frequency package 38 of the third embodiment transmits a high-frequency (for example, 40 Gbps) signal from the tape-shaped line portion 40 to the signal surface wiring 4 c of the package substrate 4. Through the solder bump electrode 5 and directly input to the semiconductor chip 2 or, on the contrary, to output a high-frequency signal from the semiconductor chip 2 to the outside through the tape-shaped line portion 40. The structure is such that signals can be transmitted only by microstrip lines on all surface layers of the package substrate 4.
[0168]
As a result, by transmitting the high-frequency signal only through the microstrip line on the surface layer of the package substrate 4 without passing through vias or the like, the high-frequency signal can be transmitted without losing the frequency characteristics.
[0169]
Specifically, by transmitting a high-frequency signal only through the microstrip line on the surface layer, the reflection characteristics in high-frequency transmission can be reduced and the transmission characteristics can be increased. As a result, loss in high-frequency transmission can be reduced, and high-quality high-frequency signal transmission becomes possible.
[0170]
Further, the disturbance of the waveform of the high-frequency signal in the high-frequency transmission can be reduced, so that high-quality high-frequency signal transmission is possible.
[0171]
That is, as described in the first embodiment, when a via enters a high-frequency transmission, a mismatch portion of the characteristic impedance is generated, which causes transmission loss. However, in the case of a microstrip line, a desired characteristic impedance can be obtained by designing parameters such as a wiring width, an insulating layer thickness, and a space between adjacent patterns. Therefore, a uniform characteristic impedance can be designed from the input side to the output side, and the transmission loss can be reduced.
[0172]
The surface wiring of the package substrate 4 such as the signal surface wiring 4c and the GND surface wiring 4h according to the third embodiment is formed of, for example, copper, and is disposed in the uppermost layer on the main surface 4a side of the package substrate 4. And may be exposed on the surface of the main surface 4a, or may be coated with a non-conductive thin film or the like.
[0173]
In the high-frequency package 38, a plurality of ball electrodes (bump electrodes) 3 provided as terminals for external connection are arranged in an array on the back surface 4b of the package substrate 4 as in the high-frequency package 1. 38 is also a ball grid array type semiconductor package.
[0174]
Accordingly, the size of the package can be reduced as compared with an outer lead protruding type high-frequency package in which the outer leads protrude outward from the package body.
[0175]
Next, the optical module 39 shown in FIG. 46 on which the high-frequency package 38 is mounted will be described.
[0176]
The optical module 39 according to the third embodiment has the same structure as the optical module 14 according to the first embodiment, and converts an input optical signal into an electric signal by a photoelectric converter (another semiconductor device) 20. After being amplified by an amplifier element (another semiconductor device) 19, arithmetic processing is performed inside the semiconductor chip by an electric signal, the processing result is converted again into an optical signal, and then output to the next module product.
[0177]
In the optical module 39 shown in FIG. 46, a high-frequency signal on the order of giga (G) Hz is input / output to the next stage of the amplifier element 19. Therefore, the high-frequency package 38 and the amplifier element 19 as another semiconductor device are connected via the tape-shaped line portion 40.
[0178]
Therefore, in the connection via the tape-shaped line portion 40, as shown in FIG. 47, in the connection between the high-frequency package 38 mounted on the same module substrate 13 and the amplifier element 19, each tape-shaped line portion 40 is connected. Once connected to the module substrate 13, the high-frequency package 38 and the amplifier element 19 are electrically connected via the surface wiring on the module substrate 13 and the tape-shaped line portion 40.
[0179]
Further, as shown in FIG. 48, the high-frequency package 38 and the amplifier element 19 can be directly connected by the tape-shaped line portion 40.
[0180]
That is, since the tape-shaped line portion 40 has flexibility, the high-frequency package 38 or the amplifier element 19 can be mounted by bending the tape-shaped line portion 40 in advance as shown in FIG. It can be easily performed.
[0181]
On the other hand, since the tape-shaped line portion 40 has flexibility, both can be directly connected by the tape-shaped line portion 40 even between components having different heights. Therefore, as shown in FIG. 48, the distance between the two components can be reduced, the mounting area can be reduced, and the surface wiring of the module substrate 13 is not interposed in the transmission of the high-frequency signal between the components. In addition, loss in transmission of a high-frequency signal can be reduced, and high-quality transmission of a high-frequency signal can be achieved.
[0182]
The optical module 39 shown in FIGS. 49 and 50 has a tape-like line between the high-frequency package 38 and the amplifier element 19 and also between the amplifier element 19 and the photoelectric converter (other semiconductor device) 20. It has a structure in which the portion 40 is interposed. Further, the mounting area of the components can be reduced, and the quality of high-frequency signal transmission can be improved.
[0183]
In the optical module 39 shown in FIG. 46, for example, the semiconductor chip 2 provided with the tape-shaped line portion 40 on the input side of the signal includes, for example, a plurality of input signals of the first frequency which are smaller than the first frequency. On the other hand, the semiconductor chip 2 provided with the tape-shaped line portion 40 on the output side of the signal includes, for example, a plurality of third frequency signals. A circuit for integrating an input signal into a signal of a fourth frequency higher than the third frequency and outputting the integrated signal is incorporated. Here, the first and fourth frequencies are 1 giga Hz or more.
[0184]
The structure of the optical module 39 of the third embodiment other than the tape-shaped line portion 40 shown in FIGS. 46 to 50 is the same as that of the optical module 14 shown in FIG. I do.
[0185]
Next, the configuration of the tape-shaped line portion 40 provided in the high-frequency package 38 according to the third embodiment will be described.
[0186]
The tape-shaped line portion 40 shown in FIGS. 51 to 55 has a single base metal layer (ground conductor layer) 40b having the ground potential shown in FIG. 54, an insulating layer 40c disposed thereabove, and a further upper layer. This is a tape-shaped member having a four-layer structure as shown in FIG. 52, including the formed surface metal layer 40d and the cover coat layer 40e which is a solder resist covering the surface metal layer 40d.
[0187]
As shown in FIG. 51, the surface metal layer 40d has a surface signal lead 40g, which is a plate-like lead 40a arranged near the center in the width direction along the longitudinal direction, and is arranged along the longitudinal direction on both sides thereof. And a surface GND lead 40h having a ground potential, and the base metal layer 40b and the two surface GND leads 40h are connected by a plurality of vias 40f as shown in FIGS. 53 and 55, respectively. The ground potential is the same.
[0188]
That is, the surface GND leads 40h are arranged on both sides of the surface signal leads 40g of the surface metal layer 40d via the insulating cover coat layer 40e, respectively, and further, the base metal is disposed on the back side of the surface signal leads 40g via the insulating layer 40c. The layer 40b is arranged, and thereby, the microstrip line 40i is formed in the tape-shaped line portion 40 as shown in FIG.
[0189]
As a result, a high-frequency signal is transmitted to another semiconductor device such as the amplifier element 19 or the module substrate 13 via the signal surface wiring 4c of the package substrate 4 and the surface signal lead 40g of the microstrip line 40i of the tape-shaped line portion 40. Thus, high-quality high-frequency signals can be transmitted with reduced loss in high-frequency transmission.
[0190]
The base metal layer 40b is made of, for example, stainless steel (SUS), and has a thickness of, for example, about 0.1 to 0.2 mm. The surface metal layer 40d is, for example, a thin film of copper, and has a thickness of, for example, about several tens μm to 35 μm. The insulating layer 40c is made of, for example, a polyimide resin.
[0191]
However, the materials, thicknesses, and the like of the components of the tape-shaped line portion 40 are not limited to those described above.
[0192]
In the tape-shaped line portion 40 shown in FIGS. 51 to 55, the surface metal layer 40d is formed on the surface of the insulating layer 40c. The surface metal layer 40d is formed by a wiring pattern such as copper, The base metal layer 40b on the back surface side of the layer 40c is, for example, a thin lined metal sheet having elasticity.
[0193]
By disposing the base metal layer 40b on the back surface side of the insulating layer 40c, the tape-shaped line portion 40 can be easily formed by bending, and the bent shape can be kept constant. This makes it easier to form a gull wing shape as shown in FIG. 66. As a result, the tape-shaped line portion 40 is formed from the high-frequency package 38 to the module substrate 13 or the like, or from the high-frequency package 38 to another semiconductor device. The high-frequency package 38 can be arranged with high precision, and the workability at the time of mounting can be improved.
[0194]
Further, the tape-shaped line portion 40 of the modified example shown in FIGS. 56 to 60 has a ground potential metal layer 40j provided on a base metal layer 40b via an adhesive 401 as shown in FIG. This metal layer 40j is electrically connected to surface GND lead 40h via a plurality of vias 40f. Since the ground potential layer made of copper foil is increased by one layer as compared with the tape-shaped line section 40 shown in FIGS. 51 to 55, the resistance value can be reduced as compared with the case where only the base metal layer 40b is used. Characteristic can be improved.
[0195]
However, since the tape-shaped line portion 40 shown in FIGS. 51 to 55 has a simpler structure than the tape-shaped line portion 40 of the modified example shown in FIGS. 56 to 60, the cost can be reduced.
[0196]
In the tape-shaped line portion 40 of the modified example shown in FIGS. 61 to 65, a surface metal layer 40d and a metal layer 40j are provided as a wiring pattern, and both are electrically connected by a plurality of vias 40f. At the same time, the surface metal layer 40d and the metal layer 40j are respectively covered with a cover coat layer 40e which is an insulating solder resist.
[0197]
The tape-shaped line portion 40 of the modified example shown in FIGS. 61 to 65 can also be patterned because the metal layer 40j is also a copper foil, and further has electrical characteristics as compared with the tape-shaped line portion 40 shown in FIGS. In addition, the structure can be simplified as compared with the tape-shaped line portion 40 of the modified example shown in FIGS. 56 to 60, so that the cost can be reduced. In addition, since it has flexibility, it is possible to easily connect components having different heights.
[0198]
In the high-frequency package 38 of the third embodiment, the tape-like line portion 40 as shown in FIGS. 51 to 65 is used as the transmission line portion of the high-frequency signal, so that the high-frequency package using the coaxial cable 7 of the first embodiment is used. 1, and the cost of the tape-shaped line portion 40 is significantly lower than that of the coaxial cable 7, so that the cost of the high-frequency package 38 is reduced. be able to.
[0199]
Further, since the transmission line such as the surface signal lead 40g, the surface GND lead 40h, or the metal layer 40j formed on the tape-shaped line portion 40 can be formed as a wiring pattern by the photolithography technique, the dimensions of the transmission line can be formed with high precision. And the design of the transmission line can be facilitated.
[0200]
66 to 71 show a mounting structure (electronic device) of the high-frequency package 38. The high-frequency package 38 to which the tape-shaped line portion 40 bent and formed in a gull wing shape is mounted in advance is mounted on a mounting substrate 41. It is implemented in.
[0201]
Since the tape-shaped line portion 40 is bent and formed in a gull-wing shape in advance, the mounting operation is easy, and the mountability can be improved. When the tape-shaped line portion 40 is formed into a gull-wing shape in this manner, the tape-shaped line portion 40 is backed like the tape-shaped line portion 40 shown in FIGS. 51 to 55 or the modified tape-shaped line portion 40 shown in FIGS. 56 to 60. It is preferable to use the tape-shaped line portion 40 provided with the base metal layer 40b.
[0202]
67 and 68 show the details of the connection between the tape-shaped line portion 40 and the mounting substrate 41. The surface signal lead (transmission line) 40g of the tape-shaped line portion 40 and the signal for the mounting substrate 41 are shown in FIGS. The surface wiring (electrode) 41 a is further connected to the surface GND lead (transmission line) 40 h of the tape-shaped line portion 40 and the GND surface wiring (electrode) 41 b of the mounting board 41 via the solder 42.
[0203]
FIG. 69 shows a case where an anisotropic conductive resin 43 is used in place of the solder 42. The surface signal lead 40g of the tape-shaped line portion 40 and the signal surface wiring 41a of the mounting board 41 are further tape-shaped. The surface GND lead 40h of the line portion 40 and the surface wiring 41b for GND of the mounting board 41 are electrically connected by the conductive particles 43a.
[0204]
By using the solder 42 and the anisotropic conductive resin 43 in this manner, the respective tape-shaped line portions 40 can be removed, and the high-frequency package 38 can be easily repaired.
[0205]
As shown in FIG. 70, when the high-frequency package 38 is mounted, the connection of the ball electrode 3 which is an external connection terminal and the connection of the tape-shaped line portion 40 are different from each other on the mounting substrate 41. It is also possible to connect to different mounting substrates 41. That is, since the shape of the tape-shaped line portion 40 has a degree of freedom, such a mounting structure can be realized.
[0206]
FIG. 71 shows a structure in which the high-frequency package 38 and another semiconductor package (other semiconductor device) 44 are electrically connected by the tape-shaped line portion 40. In this case, since the high-frequency package 38 and the other semiconductor package 44 often have different heights, the tape-shaped line section 40 having relatively flexibility as shown in the modified examples of FIGS. It is preferable to use them, so that even if there is a difference between the heights, they can be easily connected.
[0207]
In this case, the high-frequency package 38 to which the tape-shaped line portion 40 is attached in advance may be mounted on the mounting substrate 41, and then the tape-shaped line portion 40 and another semiconductor package 44 may be connected. After the high-frequency package 38 having no tape-shaped line portion 40 and another semiconductor package 44 are mounted on the mounting substrate 41, the tape-shaped line portion 40 may be connected to both of them. It is preferable to use the tape-shaped line portion 40 having a target flexibility (flexibility).
[0208]
Further, in the mounting structure shown in FIG. 71, since the tape-shaped line portion 40 is directly connected to the high-frequency package 38 and another semiconductor package 44 without connecting to the mounting substrate 41, the distance between the packages can be shortened. The mounting area can be reduced.
[0209]
Next, FIG. 72 shows a modification of the transmission line portion, which is a forked tape-like line portion 45 (differential line) used when inputting and outputting a high-frequency signal between a plurality of packages. A surface GND lead 40h is arranged on the signal lead 40g and on both sides thereof.
[0210]
In this case, as shown in FIG. 73, one end of the forked tape-shaped line portion 45 is connected to one high-frequency package 38, and the other ends are connected to separate semiconductor packages 44 and the like.
[0211]
74 and 75 show that the high-frequency package 38 or other semiconductor package 44 to which the tape-shaped line portion 40 is not attached is mounted on the mounting board 41 first, and then the tape-shaped line portion 40 is mounted by a user or the like. It shows a structure for connection.
[0212]
In this case, the user can easily turn on / off the electrical connection between the packages by attaching / detaching the tape-shaped line portion 40, and the usage can be changed.
[0213]
(Embodiment 4)
76 is a perspective view showing an example of the structure of the high-frequency package according to Embodiment 4 of the present invention, FIG. 77 is a plan view showing the structure of the high-frequency package shown in FIG. 76, and FIG. 78 is provided in the high-frequency package shown in FIG. FIG. 79 is a perspective view showing the structure on the back side of the frame-shaped transmission line portion, FIG. 79 is a cross-sectional view showing an example of the mounting structure of the high-frequency package shown in FIG. 76, and FIG. 80 is a modification of the fourth embodiment of the present invention. 81 is a plan view showing the structure of the high-frequency package, FIG. 81 is a perspective view showing the structure of the high-frequency package shown in FIG. 80, and FIG. 82 is a perspective view showing the structure on the back side of the transmission line provided in the high-frequency package shown in FIG. 83 is a plan view showing the structure of a high-frequency package according to a modification of the fourth embodiment of the present invention, FIG. 84 is a perspective view showing the structure of the high-frequency package shown in FIG. 83, and FIG. Perspective view showing the back surface side of the structure of the transmission line section provided in the cage, Figure 86 is a sectional view showing the structure of a high-frequency package shown in FIG. 83.
[0214]
In the fourth embodiment, as shown in FIG. 76, the transmission line portion of the high-frequency package (semiconductor device) 47 is disposed so as to protrude in two opposing directions of the package substrate 4. Is provided with a connecting portion 46g that protrudes from the transmission line portion in a direction crossing the transmission line and is formed integrally with the transmission line portion.
[0215]
The connecting portion 46g is formed in a frame shape according to the outer peripheral shape of the package substrate 4 as shown in FIG. 78, and the plate-shaped line portion 46 serving as a transmission line portion is formed in two opposing directions of the frame-shaped connecting portion 46g. Project and are formed integrally with the connecting portion 46g.
[0216]
Also in this plate-shaped line portion 46, a base metal layer (ground conductor layer) 46b and a surface metal layer 46e (see FIG. 78) are arranged via an insulating layer 46f made of polyimide resin or the like. 46e is a plate-like lead (wiring) 46a composed of a surface signal lead (transmission line) 46c and a surface GND lead (transmission line) 46d.
[0217]
Since the connection portion 46g has a frame shape, when the connection portion 46g is mounted on the package substrate 4, the semiconductor chip 2 is exposed in the frame as shown in FIGS.
[0218]
FIG. 79 shows a mounting structure in which the high-frequency package 47 is mounted on the mounting board 41. In the high-frequency package 47, the signal surface wiring 4c of the package substrate 4 and the surface signal lead 46c of the plate-shaped line portion 46 are connected. The surface signal lead 46c of the plate-shaped line portion 46 and the signal surface wiring 41a of the mounting board 41 are electrically connected to each other.
[0219]
In the high-frequency package 47 of the fourth embodiment shown in FIG. 76, the connection portion 46g protruding from the plate-shaped line portion 46 plays a role of reinforcement in the connection between the plate-shaped line portion 46 and the package substrate 4; The connection strength between the portion 46 and the package substrate 4 can be increased by the connection portion 46g. At this time, the larger the connection area between the connection portion 46g and the package substrate 4, the higher the connection strength between them.
[0220]
Furthermore, since the connecting portion 46g formed integrally with the plate-shaped line portion 46 is directly connected to the package substrate 4 over a large area in the form of a frame, heat generated from the semiconductor chip 2 is transferred through the connecting portion via the package substrate 4. 46 g, and the heat radiation of the high frequency package 47 can be improved.
[0221]
Further, since the plate-shaped line portion 46 having the base metal layer 46b of the ground potential is connected to the package substrate 4, the ground of the high-frequency package 47 can be strengthened, and the noise margin can be improved.
[0222]
When the plate-shaped line portion 46 and the connection portion 46g are integrally formed, the surface signal lead 46c and the surface GND lead 46d, which are transmission lines, are formed by etching, and further, the central portion of the connection portion 46g is formed. Is punched out and press-formed. At this time, the bending accuracy of the plate-shaped line portion 46 can be set to about ± 0.05 mm depending on the accuracy of the press die.
[0223]
The connecting portion 46g may not be formed in a frame shape so as to necessarily connect the two plate-shaped line portions 46 arranged opposite to each other, and may be formed in a direction crossing the transmission line from the plate-shaped line portion 46. What is necessary is just to have a region which protrudes and can be connected to the package substrate 4. That is, the two plate-shaped line portions 46 disposed to face each other need not necessarily be connected.
[0224]
Next, FIG. 80 to FIG. 82 show a high-frequency package 47 on which the plate-shaped line portion 46 of the modified example is mounted. Transmission lines are formed corresponding to the four directions of the package substrate 4, and correspond to the four sides. This is a structure in which the plate-shaped line portions 46 formed as described above are integrally connected.
[0225]
As described above, by adopting a structure in which the plate-shaped line portions 46 corresponding to the four sides of the package substrate 4 are connected at the corners, the lead flatness can be improved.
[0226]
For example, when the bending accuracy of the press die is about ± 0.05 mm, flatness of 0.05 mm or less can be ensured, and a plate-shaped line portion having an integrated structure corresponding to four sides of the package substrate 4 is provided. 46, the flatness of the ball electrode mounting surface of the package substrate 4 can be reduced to 0.1 mm or less.
[0227]
In addition, since the lead flatness can be improved, the ball electrode 3 for height control (see FIG. 76) is not required, so that the cost and connection reliability of the high-frequency package 47 can be reduced.
[0228]
FIGS. 83 to 86 show a high-frequency package 47 on which a plate-shaped line portion 46 according to another modification is mounted, in which a connection portion 46g is also arranged on the semiconductor chip 2, and as shown in FIG. The back surface 2b of the chip 2 and the connecting portion 46g are joined by an adhesive 48.
[0229]
Thereby, the heat radiation in the high-frequency package 47 can be further improved.
[0230]
(Embodiment 5)
FIG. 87 is a plan view showing the structure of the tape-shaped transmission line unit according to the fifth embodiment of the present invention. FIG. 88 is a plan view showing the structure of the base metal layer of the tape-shaped transmission line unit shown in FIG. 87 is a plan view showing the structure of the insulating layer of the tape-shaped transmission line shown in FIG. 87, FIG. 90 is a plan view showing the structure of the surface metal layer of the tape-shaped transmission line shown in FIG. 87, and FIG. 87 is a plan view showing the structure of the cover coat layer of the tape-shaped transmission line portion shown in FIG. 92, FIG. 92 is a cross-sectional view showing a cross-sectional structure taken along the line AA shown in FIG. 87, and FIG. 93 is shown in FIG. FIG. 94 is a cross-sectional view showing a cross-sectional structure taken along the line BB, FIG. 94 is a partial cross-sectional view showing a connection structure of a base metal layer of the tape-shaped transmission line portion shown in FIG. 87, and FIG. Partial sectional view showing a connection structure of a surface metal layer of a tape-shaped transmission line portion, 96 is a plan view showing a structure of a tape-shaped transmission line unit according to a modification of the fifth embodiment of the present invention; FIG. 97 is a plan view showing a structure of a base metal layer of the tape-shaped transmission line unit shown in FIG. 96; FIG. 98 is a plan view showing the structure of the insulating layer of the tape-shaped transmission line shown in FIG. 96, FIG. 99 is a plan view showing the structure of the surface metal layer of the tape-shaped transmission line shown in FIG. 96, and FIG. 96 is a plan view showing the structure of the cover coat layer of the tape-shaped transmission line portion shown in FIG. 96, FIG. 101 is a cross-sectional view showing a cross-sectional structure taken along the line AA shown in FIG. 96, and FIG. 103 is a cross-sectional view showing a cross-sectional structure taken along the line BB shown in FIG. 103. FIG. 103 is a partial cross-sectional view showing a connection structure of a surface metal layer (GND) of the tape-shaped transmission line shown in FIG. Is a surface metal layer (FIG. 96) of a tape-shaped transmission line portion. FIG. 105 is a sectional view showing the structure of a tape-shaped transmission line portion according to a modification of the fifth embodiment of the present invention, and FIG. 106 is a modification of the fifth embodiment of the present invention. FIG. 107 is a plan view showing a structure of a tape-shaped transmission line section of an example, FIG. 107 is a plan view showing a structure of a tape-shaped transmission line section of a modification of the fifth embodiment of the present invention, and FIG. 108 is an embodiment of the present invention. FIG. 109 is a plan view showing an example of the connection structure of the tape-shaped transmission line portion of mode 5, FIG. 109 is a plan view showing an example of how the return current flows in the connection structure shown in FIG. 108, and FIG. 110 is the connection structure shown in FIG. FIG. 9 is a plan view showing how a return current flows in a connection structure of a comparative example with respect to FIG.
[0231]
The fifth embodiment describes another embodiment of the tape-shaped transmission line section.
[0232]
The tape-shaped line portion (transmission line portion) 49 shown in FIG. 87 has a structure substantially similar to that of the tape-shaped line portion 40 described in the third embodiment, except for the base metal layer 40b and the insulating layer 40c. The notch 40k is formed in each of the cover coat layers 40e.
[0233]
The detailed structure of the tape-shaped line portion 49 shown in FIG. 87 will be described. The base metal layer 40b shown in FIG. 88, the insulating layer 40c shown in FIG. 89, the surface metal layer 40d shown in FIG. 90, and the cover shown in FIG. It is composed of four coat layers 40e. FIG. 92 shows a cross-sectional structure along the GND line, and FIG. 93 shows a cross-sectional structure along the signal line.
[0234]
Note that the base metal layer 40b shown in FIG. 88, the insulating layer 40c shown in FIG. 89, and the cover coat layer 40e shown in FIG. A cutout 40k is formed in a part.
[0235]
The length of the insulating layer 40c in the longitudinal direction is shorter than the length of the base metal layer 40b, and an end of the base metal layer 40b is exposed so as to be connectable to a surface wiring of a wiring board such as the package board 4. .
[0236]
Further, the surface metal layer 40d is composed of a surface signal lead 40g and a surface GND lead 40h, and the surface GND lead 40h is shorter than the surface signal lead 40g, and an end of the surface GND lead 40h is covered with an insulating layer 40c. Is
[0237]
A cover coat layer 40e shown in FIG. 91 is disposed on the surface metal layer 40d. Further, the base metal layer 40b and the surface GND lead 40h of the surface metal layer 40d are electrically connected by a plurality of vias 40f. At this time, in the vicinity of the notch 40k of each layer, the installation pitch of the vias 40f is made narrower than other locations, or a continuous via 40n is provided.
[0238]
94 and 95 show the connection state of the tape-shaped line portion 49 shown in FIG. 87 to the package substrate 4, and FIG. 94 shows the solder between the base metal layer 40b and the surface wiring for GND 4h of the package substrate 4. FIG. 95 shows the connection state of the surface signal lead 40g and the signal surface wiring 4c of the package substrate 4 by the solder 42 (may be a conductive paste). Things.
[0239]
As shown in FIGS. 88 and 89, the length of the insulating layer 40c in the longitudinal direction is shorter than the length of the base metal layer 40b, so that the end of the base metal layer 40b can be exposed. As shown at 94, the base metal layer 40b of the tape-shaped line portion 49 can be connected to the GND surface wiring 4h of the package substrate 4, thereby stabilizing the GND potential and improving the electrical characteristics. be able to.
[0240]
In the fifth embodiment, the base metal layer 40b, the insulating layer 40c, and the cover coat layer 40e of the tape-shaped line portion 49 are partially overlapped with the surface signal leads 40g of the surface metal layer 40d. Is formed with a notch 40k.
[0241]
In addition, in the vicinity of the notch 40k in each layer, the pitch at which the vias 40f are installed is made narrower than other locations, or continuous vias 40n are provided. As a result, as shown in FIG. 109, the flow of the return current 54 can be made smoother and the power supply inductance can be reduced.
[0242]
Here, the difference in the flow of the return current 54 between the case where the notch 40k is provided in the tape-shaped line portion 49 and the case where it is not provided will be described.
[0243]
As shown in FIG. 108, when the notch 40k is provided in the tape-shaped line portion 49 as in the fifth embodiment, the connection portion of the surface layer signal lead 40g has the coplanar structure 50, An inner GND layer 4f is provided on the substrate side, while a base metal layer 40b is provided on the lead side from the connection portion. Therefore, both sides of the connection portion have a GND coplanar structure 51.
[0244]
In the tape-shaped line portion 49 shown in the comparative example of FIG. 110, the notch 40k as shown in FIG. 108 is not formed. That is, the connection portion of the surface signal lead 40g has the GND coplanar structure 51. Therefore, when connecting the surface signal lead 40g of the GND coplanar structure 51 to the substrate, the end of the base metal layer 40b is arranged on the back surface side of the surface signal lead 40g, and in the overlapping portion with the surface signal lead 40g. Since the signal surface wiring 4c is formed, the connection between the base metal layer 40b and the GND surface wiring 4h is limited to the vicinity of the edge of the end of the base metal layer 40b.
[0245]
Therefore, for example, the return current 54 flowing from the lead side to the substrate directly under the wiring changes its direction rapidly near the edge (near Q) of the base metal layer 40b (GND) and enters the substrate side. become.
[0246]
Therefore, it is not preferable because the moving distance of the return current 54 may be increased to cause an increase in power supply inductance.
[0247]
On the other hand, as shown in FIG. 109, when the notch 40k is provided, the return current 54 flowing directly under the wiring from the lead side toward the substrate changes its direction gently, so that the base metal layer 40b (GND The increase in the power supply inductance at the end (near P) of FIG.
[0248]
Therefore, by providing the notch 40k in the tape-shaped line portion 49 to form the GND coplanar structure 51 + the coplanar structure 50 + the GND coplanar structure 51, the transmission loss of a high-frequency signal can be reduced. Further, by setting the pitch of the vias 40f in the vicinity of the notch 40k to be narrower than other places or providing the continuous vias 40n, the flow of the return current 54 can be made smoother and the power supply inductance can be further reduced. In addition, the electrical characteristics can be further improved.
[0249]
Next, FIG. 96 shows a tape-shaped line portion 49 according to a modification of the fifth embodiment, and the structure and cross-sectional structure thereof are shown in FIGS.
[0250]
The tape-like line portion 49 of the modification shown in FIG. 96 has a structure substantially similar to that of the tape-like line portion 49 shown in FIG. 87, and has a cutout 40k. In this case, the length of the surface GND lead 40h in the surface metal layer 40d is longer.
[0251]
In this case, as shown in FIG. 103, the surface GND lead 40h of the surface metal layer 40d and the surface wiring 4h for GND of the package substrate 4 are connected with the solder 42 or conductive paste, and as shown in FIG. 104. Then, the surface signal lead 40g of the surface metal layer 40d and the signal surface wiring 4c of the package substrate 4 are connected by solder 42 or conductive paste.
[0252]
Here, as shown in FIGS. 103 and 104, the semiconductor chip 2 is mounted on the package substrate 4 via the solder bump electrodes 5, and the GND surface wiring 4h and the predetermined solder bump electrodes 5 are The surface wiring 4c for use and a predetermined solder bump electrode 5 are connected.
[0253]
In the package substrate 4 shown in FIGS. 103 and 104, a region (a region where the GND layer 4f is not formed) up to the left end of the substrate with respect to the GND layer 4f in the figures is defined as a first region, and a GND layer is formed. Assuming that the area where 4f is formed is the second area, no other wiring layer is formed between the surface layer wiring for GND 4h and the GND layer 4f in the second area. Furthermore, the GND layer 4f is not formed below the wiring of the surface layer wiring for GND 4h or the surface wiring for signal 4c formed in the first region.
[0254]
Therefore, also in the case of the tape-shaped line portion 49 shown in FIG. 96, since the notch 40k is formed, the GND coplanar structure 51 + the coplanar structure 50 + the GND coplanar structure 51 as shown in FIGS. 103 and 104. As in the case of the tape-shaped line portion 49 shown in FIG. 87, the transmission loss of a high-frequency signal can be reduced. As a result, electrical characteristics can be improved.
[0255]
If the base metal layer 40b can be formed to be sufficiently thick, the tape-shaped line portion 49 shown in FIG. 87 can increase the connection strength of the GND connection.
[0256]
Next, in the tape-shaped line portion 52 of the modification shown in FIG. 105, another metal layer 40j made of a wiring pattern or the like is provided between the base metal layer 40b and the insulating layer 40c, and the surface of the base metal layer 40b is provided. This is one in which a surface protective layer 40m is formed.
[0257]
In this case, since the metal layer 40j having a high metal purity composed of the wiring pattern can be formed, the power supply inductance can be further reduced, and the electrical characteristics can be improved.
[0258]
In the fifth embodiment, a case is described in which one signal line is arranged in each of the tape-shaped line portions 49 and 52, and a total of three lines are formed, one GND line on each side. However, the number of signal lines and GND lines is not limited to this. Therefore, as shown in FIGS. 106 and 107, two surface signal leads 40g may be provided. The tape-like line portion 53 shown in FIG. 106 has two surface signal leads 40g arranged between the surface GND leads 40h at both ends, and the tape-like line portion 55 shown in FIG. A surface GND lead 40h is arranged on both sides of each of the surface signal leads 40g, and a surface GND lead 40h is arranged between the two surface signal leads 40g. Two surface signal leads 40g and three And a surface GND lead 40h.
[0259]
Since the notch 40k is also provided in the tape-shaped line portion 53 and the tape-shaped line portion 55, the same effect as that of the tape-shaped line portion 49 shown in FIG. 87 can be obtained.
[0260]
As described above, the invention made by the inventor has been specifically described based on the embodiment of the invention. However, the invention is not limited to the embodiment of the invention, and various modifications may be made without departing from the gist of the invention. It goes without saying that it is possible.
[0261]
For example, in the first to fifth embodiments, the case where the semiconductor device is a ball grid array type semiconductor package has been described. For example, an LGA (Land Grid Array) may be used.
[0262]
Further, in the first to fifth embodiments, the case where the semiconductor chip 2 is flip-chip connected to the package substrate 4 has been described. Not limited to connection, ribbon bonding using a flat metal wire may be used.
[0263]
【The invention's effect】
The effects obtained by typical aspects of the invention disclosed in the present application will be briefly described as follows.
[0264]
By transmitting the high-frequency signal through the transmission line connected to the surface wiring of the wiring board, the high-frequency transmission loss can be reduced and the signal can be transmitted. Will be possible.
[Brief description of the drawings]
FIG. 1 is a sectional view illustrating an example of a structure of a semiconductor device (high-frequency package) according to a first embodiment of the present invention;
FIG. 2 is an external perspective view showing an example of a structure of an optical module into which the high-frequency package shown in FIG. 1 is incorporated.
FIG. 3 is a sectional view showing a structure of the optical module shown in FIG.
FIG. 4 is a plan view showing an example of an arrangement of components incorporated in the optical module shown in FIG.
FIG. 5 is a cross-sectional view showing an example of an arrangement of components incorporated in the optical module shown in FIG.
FIG. 6 is a cross-sectional view showing a structure of a semiconductor device (high-frequency package) according to a modification of the first embodiment of the present invention.
FIG. 7 is a partial plan view showing an example of a structure of a microstrip line in the wiring board of the high-frequency package shown in FIG.
8 is a partial cross-sectional view showing a structure of the microstrip line shown in FIG.
FIG. 9 is a partial plan view showing a structure of a microstrip line of a modification in the wiring board of the high-frequency package shown in FIG. 1;
FIG. 10 is a partial cross-sectional view illustrating a structure of a microstrip line according to a modification shown in FIG.
FIGS. 11A and 11B are a perspective view and a cross-sectional view illustrating a structure of a semiconductor device (high-frequency package) according to a modification of the first embodiment of the present invention; FIGS.
FIG. 12 is a cross-sectional view showing an example of a cap mounting structure of the high-frequency package shown in FIG.
FIG. 13 is a plan view of the cap mounting structure shown in FIG.
14 is a cross-sectional view showing a cross-sectional structure taken along line AA of FIG.
FIG. 15 is a bottom view of the cap mounting structure shown in FIG. 13;
16 is a plan view showing an example of a positional relationship between a surface wiring and a cap in the cap mounting structure shown in FIG.
FIG. 17 is a bottom view showing the structure of the cap as viewed from the arrow C in FIG. 14;
18 is a side view showing the structure of the cap shown in FIG.
19 is a sectional view showing the structure of the cap shown in FIG. 17 and an enlarged partial sectional view of a corner.
20 is an enlarged partial cross-sectional view showing a detailed structure of a cross section cut along line AA in FIG. 13;
FIG. 21 is an enlarged partial cross-sectional view showing a detailed structure of a cross section cut along the line BB of FIG. 13;
22 is an enlarged partial plan view showing an example of a positional relationship between a surface wiring and an opening of a cap in the cap mounting structure shown in FIG. 12;
FIG. 23 is a cross-sectional view illustrating a structure of a semiconductor device (high-frequency package) according to a modification of the first embodiment of the present invention.
24 is an enlarged partial sectional view showing an example of a structure in which a heat radiating member is attached to the cap shown in FIG.
FIG. 25 is a cross-sectional view showing a structure of a semiconductor device (high-frequency package) according to a modification of the first embodiment of the present invention.
FIG. 26 is a cross-sectional view showing a structure of a semiconductor device (high-frequency package) according to a modification of the first embodiment of the present invention.
FIG. 27 is a cross-sectional view showing a structure of a semiconductor device (high-frequency package) according to a modification of the first embodiment of the present invention.
FIG. 28 is a plan view showing a structure of a semiconductor device (high-frequency package) according to a modification of the first embodiment of the present invention.
FIG. 29 is a sectional view showing a structure of the high-frequency package shown in FIG. 28;
FIG. 30 is a plan view showing a structure of a semiconductor device (high-frequency package) according to a modification of the first embodiment of the present invention.
FIG. 31 is a plan view showing a structure of a semiconductor device (high-frequency package) according to a modification of the first embodiment of the present invention.
FIG. 32 is a plan view showing the structure of a semiconductor device (high-frequency package) according to a modification of the first embodiment of the present invention.
FIG. 33 is a plan view showing a structure of a semiconductor device (high-frequency package) according to a modification of the first embodiment of the present invention.
FIG. 34 is a cross-sectional view showing a structure of the high-frequency package shown in FIG.
FIG. 35 is a plan view showing a structure of a semiconductor device (high-frequency package) according to a modification of the first embodiment of the present invention.
FIG. 36 is a sectional view showing the structure of the high-frequency package shown in FIG. 35;
FIG. 37 is a plan view showing a structure of a semiconductor device (high-frequency package) according to a modification of the first embodiment of the present invention.
FIG. 38 is a sectional view showing the structure of the high-frequency package shown in FIG. 37;
FIG. 39 is a cross-sectional view illustrating a structure of a semiconductor device (high-frequency package) according to the second embodiment of the present invention;
FIG. 40 is a cross-sectional view showing a structure of a semiconductor device (high-frequency package) according to a modification of the second embodiment of the present invention.
FIG. 41 is a cross-sectional view showing a structure of a semiconductor device (high-frequency package) according to a modification of the second embodiment of the present invention.
42 is a cross-sectional view showing an example of a cap mounted state in assembling the high frequency package shown in FIG. 41.
43 is a partial cross-sectional view showing one example of a connection state between an auxiliary board and a coaxial cable in assembling the high-frequency package shown in FIG. 41.
44 is a partial cross-sectional view showing one example of a testing state in assembling the high frequency package shown in FIG. 41.
FIG. 45 is a partial cross-sectional view showing one example of a structure after the assembly of the high-frequency package shown in FIG. 41 is completed.
FIG. 46 is a plan view showing an example of an arrangement of components incorporated in the optical module according to the third embodiment of the present invention.
FIG. 47 is a cross-sectional view showing an example of the arrangement of components incorporated in the optical module shown in FIG. 46.
48 is a cross-sectional view showing a modification of the connection method of the transmission line in the optical module shown in FIG.
FIG. 49 is a plan view showing an arrangement of components incorporated in an optical module according to a modification of the third embodiment of the present invention.
50 is a cross-sectional view showing an example of the arrangement of components incorporated in the optical module shown in FIG. 49.
FIG. 51 is a plan view showing a structure of a tape-shaped transmission line unit which is an example of the transmission line unit according to the third embodiment of the present invention.
FIG. 52 is a cross-sectional view showing a cross-sectional structure taken along the line AA shown in FIG. 51.
FIG. 53 is a cross-sectional view showing a cross-sectional structure taken along the line BB shown in FIG. 51;
FIG. 54 is a rear view showing the structure of the rear surface of the tape-shaped transmission line shown in FIG. 51.
FIG. 55 is a cross-sectional view showing a cross-sectional structure taken along the line CC shown in FIG. 51.
FIG. 56 is a plan view showing a structure of a tape-shaped transmission line section according to a modification of the third embodiment of the present invention.
FIG. 57 is a cross-sectional view showing a cross-sectional structure taken along the line AA shown in FIG. 56;
FIG. 58 is a cross-sectional view showing a cross-sectional structure cut along the line BB shown in FIG. 56;
59 is a rear view showing the structure of the rear surface of the tape-shaped transmission line section shown in FIG. 56.
FIG. 60 is a cross-sectional view showing a cross-sectional structure taken along the line CC shown in FIG. 56;
FIG. 61 is a plan view showing a structure of a tape-shaped transmission line unit according to a modification of the third embodiment of the present invention.
FIG. 62 is a cross-sectional view showing a cross-sectional structure taken along the line AA shown in FIG. 61;
FIG. 63 is a cross-sectional view showing a cross-sectional structure taken along the line BB shown in FIG. 61;
FIG. 64 is a rear view showing the structure of the rear surface of the tape-shaped transmission line shown in FIG. 61.
FIG. 65 is a cross-sectional view showing a cross-sectional structure taken along the line CC shown in FIG. 61.
FIG. 66 is a cross-sectional view illustrating an example of a mounting structure of a high-frequency package provided with a tape-shaped transmission line unit according to the third embodiment of the present invention.
FIG. 67 is an enlarged partial cross-sectional view showing a structure of a portion D shown in FIG. 66 in an enlarged manner.
FIG. 68 is a cross-sectional view showing a cross-sectional structure taken along the line EE shown in FIG. 67.
FIG. 69 is a cross-sectional view showing a modification of the structure shown in FIG. 68.
70 is a sectional view showing a modification of the structure shown in FIG. 66.
FIG. 71 is a sectional view showing a modification of the structure shown in FIG. 66.
FIG. 72 is a plan view showing a structure of a tape-shaped transmission line unit according to a modification of the third embodiment of the present invention.
FIG. 73 is a plan view showing a connection state of the tape-shaped transmission line section of the modified example of FIG. 72.
FIG. 74 is a cross-sectional view showing a mounting structure of a modified example of the tape-shaped transmission line unit according to the third embodiment of the present invention.
FIG. 75 is a cross-sectional view showing a mounting structure of a modified example of the tape-shaped transmission line unit according to the third embodiment of the present invention.
FIG. 76 is a perspective view showing an example of the structure of the high-frequency package according to Embodiment 4 of the present invention.
FIG. 77 is a plan view showing the structure of the high-frequency package shown in FIG. 76.
FIG. 78 is a perspective view showing the structure on the back side of the frame-shaped transmission line provided in the high-frequency package shown in FIG. 76;
FIG. 79 is a cross-sectional view showing one example of a mounting structure of the high-frequency package shown in FIG. 76;
FIG. 80 is a plan view showing a structure of a high-frequency package according to a modification of the fourth embodiment of the present invention.
FIG. 81 is a perspective view showing the structure of the high-frequency package shown in FIG. 80.
FIG. 82 is a perspective view showing a structure on the back surface side of a transmission line provided in the high-frequency package shown in FIG. 81;
FIG. 83 is a plan view showing a structure of a high-frequency package according to a modification of the fourth embodiment of the present invention.
FIG. 84 is a perspective view showing the structure of the high-frequency package shown in FIG. 83.
85 is a perspective view showing the structure on the back side of the transmission line provided in the high-frequency package shown in FIG. 84.
86 is a sectional view showing the structure of the high-frequency package shown in FIG. 83.
FIG. 87 is a plan view showing the structure of a tape-shaped transmission line unit according to the fifth embodiment of the present invention.
FIG. 88 is a plan view showing a structure of a base metal layer of the tape-shaped transmission line section shown in FIG. 87.
89 is a plan view showing a structure of an insulating layer of the tape-shaped transmission line portion shown in FIG. 87.
90 is a plan view showing the structure of the surface metal layer of the tape-shaped transmission line shown in FIG. 87. FIG.
FIG. 91 is a plan view showing a structure of a cover coat layer of the tape-shaped transmission line portion shown in FIG. 87.
FIG. 92 is a cross-sectional view showing a cross-sectional structure taken along line AA shown in FIG. 87.
93 is a cross-sectional view showing a cross-sectional structure taken along the line BB shown in FIG. 87.
94 is a partial cross-sectional view showing a connection structure of a base metal layer of the tape-shaped transmission line shown in FIG. 87.
FIG. 95 is a partial cross-sectional view showing a connection structure of a surface metal layer of the tape-shaped transmission line portion shown in FIG. 87.
FIG. 96 is a plan view showing a structure of a tape-shaped transmission line unit according to a modification of the fifth embodiment of the present invention.
97 is a plan view showing the structure of the base metal layer of the tape-shaped transmission line section shown in FIG. 96.
FIG. 98 is a plan view showing the structure of the insulating layer of the tape-shaped transmission line section shown in FIG. 96.
FIG. 99 is a plan view showing the structure of a surface metal layer of the tape-shaped transmission line section shown in FIG. 96.
FIG. 100 is a plan view showing the structure of a cover coat layer of the tape-shaped transmission line portion shown in FIG. 96.
101 is a cross-sectional view showing a cross-sectional structure taken along the line AA shown in FIG. 96.
FIG. 102 is a cross-sectional view showing a cross-sectional structure cut along the line BB shown in FIG. 96;
103 is a partial cross-sectional view showing a connection structure of a surface metal layer (GND) of the tape-shaped transmission line section shown in FIG. 96.
104 is a partial cross-sectional view showing a connection structure of a surface metal layer (signal) of the tape-shaped transmission line section shown in FIG. 96.
FIG. 105 is a cross-sectional view illustrating a structure of a tape-shaped transmission line unit according to a modification of the fifth embodiment of the present invention.
FIG. 106 is a plan view showing a structure of a tape-shaped transmission line unit according to a modification of the fifth embodiment of the present invention.
FIG. 107 is a plan view showing the structure of a tape-shaped transmission line unit according to a modification of the fifth embodiment of the present invention.
FIG. 108 is a plan view illustrating an example of a connection structure of a tape-shaped transmission line unit according to the fifth embodiment of the present invention.
109 is a plan view showing an example of a flow of a return current in the connection structure shown in FIG. 108.
110 is a plan view showing how a return current flows in the connection structure of the comparative example with respect to the connection structure shown in FIG. 108.
[Explanation of symbols]
1 High-frequency package (semiconductor device)
2 Semiconductor chip
2a Main surface
2b back
3 Ball electrode (external connection terminal)
3a Support ball
4 Package board (wiring board)
4a Main surface
4b back side
4c Signal surface wiring (surface wiring)
4d internal signal wiring
4e insulating layer
4f GND layer
4g microstrip line
4h Surface wiring for GND
4i Via wiring
4j Solder resist
4k steps
4l recess
5 Solder bump electrode
6 Underfill resin
7 Coaxial cable (transmission line section)
7a core wire
7b shield
8 Frame members
9 caps
9a Opening
9b leg
9c Notch
9d base material
9e conductive film
9f non-conductive film
10. Thermal conductive adhesive
11 Coaxial connector
12 glass beads
12a core wire
13 Module board (wiring board)
13a Main surface
13b back side
13c Signal surface wiring (surface wiring)
13d internal signal wiring
13e insulating layer
13f GND layer
13g microstrip line
13h opening
14 Optical module
15 Module case
16 Fins
17 Module connector
18 wind
19 Amplifier elements (other semiconductor devices)
20 photoelectric converters (other semiconductor devices)
21 Microstrip line structure
22 Coaxial structure
23 Coplanar structure
23a coplanar track
24 Thin coaxial connector
24a Signal surface wiring (surface wiring)
24b GND line
24c microstrip line
24d step
25 conductive material
26 Heat dissipation block
27 Second semiconductor chip
28 Balancer
29 Screw member
30 chip capacitors
31 Solder connection
32 Auxiliary board
32a main surface
32b back side
32c Signal surface wiring (surface wiring)
32d internal signal wiring
32e insulating layer
32f GND layer
32g microstrip line
32h opening
33 pin member
34 Thin ball electrode
35 Testing board
35a interposer
35b Pin member
35c Surface wiring for signal
35d internal signal wiring
35e insulating layer
35f GND layer
35g microstrip line
36 Chip side structure
37 Cable side structure
38 High-frequency Package (Semiconductor Device)
39 Optical module (electronic device)
40 Tape line section (transmission line section)
40a Plate-shaped lead (wiring)
40b Base metal layer (ground conductor layer)
40c insulating layer
40d Surface metal layer
40e cover coat layer
40f via
40g Surface signal lead (transmission line)
40h Surface GND lead (transmission line)
40i microstrip line
40j metal layer
40k cutout
40l adhesive
40m surface protective layer
40n continuous via
41 Mounting board
41a Signal surface wiring (electrode)
41b Surface wiring for GND (electrode)
42 Solder
43 Anisotropic conductive resin
43a conductive particles
44 Other semiconductor packages (other semiconductor devices)
45 Bifurcated tape line section (transmission line section)
46 Plate-shaped line part (transmission line part)
46a plate-shaped lead (wiring)
46b Base metal layer (ground conductor layer)
46c Surface signal lead (transmission line)
46d Surface GND lead (transmission line)
46e Surface metal layer
46f insulation layer
46g connection
47 High-frequency Package (Semiconductor Device)
48 adhesive
49 Tape line section (transmission line section)
50 Coplanar structure
51 GND coplanar structure
52, 53, 55 Tape line section (transmission line section)
54 Return current

Claims (19)

A wiring board on which surface wiring is formed,
A semiconductor chip mounted electrically connected to the wiring board,
A plurality of external connection terminals provided in any surface of the main surface of the wiring substrate or the back surface opposite thereto,
A transmission line portion electrically connected to the surface wiring of the wiring board,
A semiconductor device, wherein at least one of input and output of a signal to the semiconductor chip is performed via the transmission line unit. 2. The semiconductor device according to claim 1, wherein the transmission line portion is a coaxial cable, and a core wire of the coaxial cable is electrically connected to the surface wiring. 2. The semiconductor device according to claim 1, wherein said transmission line portion has a plate-shaped lead, and said plate-shaped lead is electrically connected to said surface wiring. . 4. The semiconductor device according to claim 3, wherein said transmission line portion is a tape-shaped member. 5. The semiconductor device according to claim 4, wherein said connection portion protrudes from said transmission line portion in a direction crossing the transmission line of said transmission line portion, and is provided integrally with said transmission line portion. . The semiconductor device according to claim 5, wherein the connection portion is disposed on the semiconductor chip. 5. The semiconductor device according to claim 4, wherein the transmission line portion has a wiring and a ground conductor layer arranged with the wiring and an insulating layer interposed therebetween. 2. The semiconductor device according to claim 1, wherein the semiconductor device is a ball grid array having a plurality of bump electrodes as the external connection terminals. 2. The semiconductor device according to claim 1, wherein the semiconductor device is a land grid array having a plurality of land electrodes as the external connection terminals. 2. The semiconductor device according to claim 1, wherein the semiconductor chip divides an input signal of a first frequency into a plurality of signals of a second frequency lower than the first frequency and outputs the divided signals. A semiconductor device comprising: a circuit for integrating an input signal of a third frequency into a signal of a fourth frequency higher than the third frequency and outputting the integrated signal. 11. The semiconductor device according to claim 10, wherein the first and fourth frequencies are 1 GHz or more. 2. The semiconductor device according to claim 1, wherein said semiconductor chip is mounted on said wiring board via a plurality of solder bump electrodes. A wiring board,
A semiconductor chip mounted electrically connected to the wiring board,
A plurality of external connection terminals provided in any surface of the main surface of the wiring substrate or the back surface opposite thereto,
A transmission line portion having a plate-like lead electrically connected to the wiring of the wiring board,
A semiconductor device, wherein at least one of input and output of a signal to the semiconductor chip is performed via the plate-shaped lead. A wiring board on which a surface wiring is formed, a semiconductor chip electrically connected to and mounted on the wiring board, and a plurality of semiconductor chips provided on any one of a main surface of the wiring substrate or a back surface opposite to the main surface. A semiconductor device having a terminal for external connection and a transmission line portion electrically connected to the surface wiring of the wiring board;
An electronic device, comprising: a mounting board electrically connected to a transmission line of the transmission line portion of the semiconductor device. 15. The electronic device according to claim 14, wherein the transmission line of the semiconductor device and an electrode of the mounting board are connected by solder. A wiring board on which a surface wiring is formed, a semiconductor chip electrically connected to and mounted on the wiring board, and a plurality of semiconductor chips provided on any one of a main surface of the wiring substrate or a back surface opposite to the main surface. A semiconductor device having a terminal for external connection and a transmission line portion electrically connected to the surface wiring of the wiring board;
An electronic device, comprising: another semiconductor device electrically connected to the transmission line of the semiconductor device. A wiring board having first and second regions;
Wiring formed in the first and second regions on the wiring board;
A semiconductor chip mounted electrically connected to the wiring board,
A transmission line electrically connected to the wiring in the first region,
A semiconductor device in which at least one of input or output of a signal to the semiconductor chip is performed via the transmission line,
A semiconductor, wherein a GND layer is formed under the wiring arranged in a second region of the wiring substrate, and the GND layer is not formed under the wiring arranged in the first region. apparatus. 18. The semiconductor device according to claim 17, wherein no other wiring layer is formed between the wiring in the second region and the GND layer. 19. The semiconductor device according to claim 18, wherein the transmission line in the first region has a coplanar structure, and the wiring in the second region has a ground coplanar structure.

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