JP4696621B2 - Semiconductor device - Google Patents

Semiconductor device Download PDF

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JP4696621B2
JP4696621B2 JP2005082785A JP2005082785A JP4696621B2 JP 4696621 B2 JP4696621 B2 JP 4696621B2 JP 2005082785 A JP2005082785 A JP 2005082785A JP 2005082785 A JP2005082785 A JP 2005082785A JP 4696621 B2 JP4696621 B2 JP 4696621B2
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semiconductor chip
heat
chip
wiring board
printed wiring
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JP2006269564A (en
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汪元 山脇
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Sony Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors

Description

本発明は、半導体チップから発生した熱を効率良く放熱することができる半導体装置に関する。   The present invention relates to a semiconductor device that can efficiently dissipate heat generated from a semiconductor chip.

半導体装置は、近年、電子機器の小型化に伴って、小型化が求められている。そこで、半導体装置では、半導体チップをプリント配線基板上に実装する方法としてフェイスアップ実装からフリップチップ実装へとなってきている。フェイスアップ実装は、例えば高周波トランジスタ等の回路が形成された側の面を上向きにしてプリント配線基板上に半導体チップを実装して、ワイヤーで半導体チップとプリント配線基板に形成された導体パターンとを電気的に接続する。一方、フリップチップ実装は、回路が形成されている面が下向きとなるように半導体チップを配置し、半導体チップと導体パターンとの間に導電性材料からなるバンプを設け、バンプを介して半導体チップと導体パターンとを電気的に接続する。   In recent years, miniaturization of semiconductor devices has been demanded with the miniaturization of electronic devices. Therefore, in semiconductor devices, the method of mounting a semiconductor chip on a printed wiring board has been changed from face-up mounting to flip chip mounting. In face-up mounting, for example, a semiconductor chip is mounted on a printed wiring board with a surface on which a circuit such as a high-frequency transistor is formed facing upward, and a semiconductor chip and a conductor pattern formed on the printed wiring board are connected with wires. Connect electrically. On the other hand, in flip chip mounting, a semiconductor chip is arranged so that a surface on which a circuit is formed faces downward, a bump made of a conductive material is provided between the semiconductor chip and the conductor pattern, and the semiconductor chip is interposed via the bump. And the conductor pattern are electrically connected.

半導体装置では、ワイヤーを用いて半導体チップとプリント配線基板とを電気的に接続するフェイスアップ実装よりも、バンプを使うため、フリップチップ実装の方が信号の伝送経路が短くなり、信号の伝送損失を抑えることができる。また、半導体装置では、フリップチップ実装の場合、ワイヤーを用いていないことから、このワイヤーの取り付け部分の面積を省くことができ、小型化することができる。   In semiconductor devices, bumps are used rather than face-up mounting that electrically connects a semiconductor chip and a printed wiring board using wires, so flip chip mounting shortens the signal transmission path and causes signal transmission loss. Can be suppressed. In the semiconductor device, in the case of flip chip mounting, since no wire is used, the area of the wire attachment portion can be omitted, and the size can be reduced.

そこで、半導体装置では、信号の伝送が良好であり、小型化することができることから、フェイスアップ実装よりもフリップチップ実装で半導体チップをプリント配線基板上に実装するようにしている。また、フリップチップ実装は、信号の伝送経路が短くなることで、信号の伝送を良好にすることができることから、例えばμ波、ミリ波等の高周波領域において作動する半導体チップを用いる場合に有効である。   Therefore, in the semiconductor device, since signal transmission is good and the size can be reduced, the semiconductor chip is mounted on the printed wiring board by flip chip mounting rather than face-up mounting. In addition, flip chip mounting is effective when using a semiconductor chip that operates in a high frequency region such as μ wave and millimeter wave because the signal transmission path can be shortened to improve the signal transmission. is there.

しかしながら、半導体装置では、μ波、ミリ波等の高周波領域において作動する半導体チップを用いた場合、電力効率が悪く、一定ＲＦ（Radio Frequency）出力を得るために直流供給電力が大きくなるため、発熱量が多くなってしまう。半導体装置では、半導体チップから発生した熱を十分に放熱できないと、半導体チップの特性が劣化し、更には半導体チップの破損にも結びつく虞がある。このため、半導体装置では、十分に放熱を行う必要がある。   However, in a semiconductor device, when a semiconductor chip that operates in a high-frequency region such as μ wave or millimeter wave is used, power efficiency is poor, and DC supply power increases to obtain a constant RF (Radio Frequency) output. The amount will increase. In a semiconductor device, if the heat generated from the semiconductor chip cannot be sufficiently dissipated, the characteristics of the semiconductor chip may deteriorate, and further, the semiconductor chip may be damaged. For this reason, it is necessary to sufficiently dissipate heat in the semiconductor device.

半導体チップをフリップチップ実装した半導体装置では、例えば下記の特許文献１に提案されているような方法で放熱を行っている。図８に示すように、特許文献１に提案されている半導体装置６０は、多層基板６１上に信号用電極６２及び地導体用電極６３が形成されており、半導体チップ６４に設けられた導電性バンプ６５がこの信号用電極６２及び地導体用電極６３と電気的に接続するように、多層基板６１上に半導体チップ６４がフリップチップ実装されている。この半導体装置６０では、半導体チップ６４の発熱部６４ａから発生した熱を導電性バンプ６５を介して地導体用電極６３に伝え、多層基板６１や図示しない多層基板６１に積層されたヒートシンクに放熱される。この半導体装置６０では、熱が導電性バンプ６５まで導かれるため、半導体チップ６４の回路が形成されている面に対して面方向に放熱経路が形成され、放熱経路をとることによって効率よく放熱されず、放熱効率が低下してしまう。   In a semiconductor device in which a semiconductor chip is flip-chip mounted, heat is radiated by a method as proposed in Patent Document 1 below, for example. As shown in FIG. 8, the semiconductor device 60 proposed in Patent Document 1 has a signal electrode 62 and a ground conductor electrode 63 formed on a multilayer substrate 61, and has a conductive property provided on a semiconductor chip 64. A semiconductor chip 64 is flip-chip mounted on the multilayer substrate 61 so that the bump 65 is electrically connected to the signal electrode 62 and the ground conductor electrode 63. In the semiconductor device 60, heat generated from the heat generating portion 64a of the semiconductor chip 64 is transmitted to the ground conductor electrode 63 through the conductive bumps 65, and is radiated to the multilayer substrate 61 or a heat sink laminated on the multilayer substrate 61 (not shown). The In this semiconductor device 60, since heat is guided to the conductive bumps 65, a heat radiation path is formed in the surface direction with respect to the surface of the semiconductor chip 64 on which the circuit is formed, and heat is efficiently radiated by taking the heat radiation path. Therefore, the heat dissipation efficiency is lowered.

また、半導体チップをフリップチップ実装した半導体装置では、下記の特許文献２に提案されているような放熱方法もある。図９に示すように、特許文献２に提案されている半導体装置７０は、モジュール基板７１上にフリップチップ実装された半導体チップ７２が実装基板７３上に実装されている。具体的に、この半導体装置７０は、半導体チップ７２がフリップチップ実装されているモジュール基板７１が上側となり、半導体チップ７２のフリップチップ実装側とは反対側の面が実装基板７３側となるように、実装基板７３上に熱伝導性材料７４で半導体チップ７２が実装されている。この半導体装置７０では、半導体チップ７２のフリップチップ実装側とは反対側の全面が熱伝導性材料７４で実装基板７３と接着されているため、半導体チップ７２の発熱部７２ａから発生した熱が熱伝導性材料７４を介して実装基板７３に放熱される。   Further, in a semiconductor device in which a semiconductor chip is flip-chip mounted, there is a heat dissipation method as proposed in Patent Document 2 below. As shown in FIG. 9, in the semiconductor device 70 proposed in Patent Document 2, a semiconductor chip 72 that is flip-chip mounted on a module substrate 71 is mounted on a mounting substrate 73. Specifically, in the semiconductor device 70, the module substrate 71 on which the semiconductor chip 72 is flip-chip mounted is on the upper side, and the surface of the semiconductor chip 72 opposite to the flip chip mounting side is on the mounting substrate 73 side. The semiconductor chip 72 is mounted on the mounting substrate 73 with a heat conductive material 74. In this semiconductor device 70, since the entire surface of the semiconductor chip 72 opposite to the flip chip mounting side is bonded to the mounting substrate 73 with the heat conductive material 74, the heat generated from the heat generating portion 72a of the semiconductor chip 72 is heat. Heat is radiated to the mounting substrate 73 via the conductive material 74.

この半導体装置７０では、下記の特許文献１のようにバンプを用いて放熱した場合よりも、半導体チップ７０のフリップチップ実装側とは反対側の全面が実装基板７３に接着されているため、半導体チップ７０のフリップチップ実装側とは反対側の全面から放熱することができ、放熱効率はよくなる。しかしながら、この半導体装置７０では、半導体チップ７２と実装基板７３との間の信号の伝送経路をモジュール基板７１と実装基板７３上に形成された配線パターン７５との間に接続部材７６を設けて形成するようになる。このため、半導体装置７０では、モジュール基板７１と実装基板７３との間に設けた接続部材７６の分だけ半導体チップ７２と実装基板７３との間の信号の伝送経路が長くなってしまう。半導体装置７０では、信号の伝送経路が長くなることにより、信号を伝送損失しやすくなり、特性劣化が生じ、半導体チップ７２をモジュール基板７１上にフリップチップ実装することによる効果が得られなくなってしまう。   In this semiconductor device 70, the entire surface of the semiconductor chip 70 opposite to the flip chip mounting side is bonded to the mounting substrate 73 rather than the case where heat is radiated using bumps as in Patent Document 1 below. Heat can be radiated from the entire surface of the chip 70 on the side opposite to the flip chip mounting side, and the heat radiation efficiency is improved. However, in this semiconductor device 70, a signal transmission path between the semiconductor chip 72 and the mounting substrate 73 is formed by providing the connection member 76 between the module substrate 71 and the wiring pattern 75 formed on the mounting substrate 73. To come. For this reason, in the semiconductor device 70, the signal transmission path between the semiconductor chip 72 and the mounting substrate 73 becomes longer by the amount of the connecting member 76 provided between the module substrate 71 and the mounting substrate 73. In the semiconductor device 70, since the signal transmission path becomes longer, it becomes easier to transmit a signal, the characteristics are deteriorated, and the effect of flip-chip mounting the semiconductor chip 72 on the module substrate 71 cannot be obtained. .

また、半導体チップをフリップチップ実装した半導体装置では、下記の特許文献３に提案されているような放熱方法もある。図１０に示すように、特許文献３に提案されている半導体装置８０は、半導体チップとなる半導体ペレット８１がベース基板８２上にフリップチップ実装され、半導体ペレット８１をベース基板８２との間で封じ、放熱部材となる封止用キャップ８３が設けられている。また、この半導体装置８０には、半導体ペレット８１と封止用キャップ８３との間に、半導体ペレット８１が作動することにより発生する電磁波を電荷で吸収し、外部に伝播する電磁波を防止する金属層８４が設けられている。この半導体装置８０では、半導体ペレット８１と、放熱部材となる封止用キャップ８３との間の金属層８４が設けられているため、半導体ペレット８１の発熱部８１ａからの熱は金属層８４に伝わり、金属層８４を介して封止用キャップ８３に伝わることから、熱伝導率が悪くなり、放熱効率が低下してしまう。このため、このような半導体装置８０では、電力が大きい半導体ペレット８１を用いた場合には十分な放熱を行うことができなくなってしまう。   Further, in a semiconductor device in which a semiconductor chip is flip-chip mounted, there is a heat dissipation method as proposed in Patent Document 3 below. As shown in FIG. 10, in the semiconductor device 80 proposed in Patent Document 3, a semiconductor pellet 81 to be a semiconductor chip is flip-chip mounted on a base substrate 82, and the semiconductor pellet 81 is sealed between the base substrate 82. A sealing cap 83 serving as a heat radiating member is provided. Further, in this semiconductor device 80, a metal layer that absorbs electromagnetic waves generated by the operation of the semiconductor pellet 81 with electric charges between the semiconductor pellet 81 and the sealing cap 83 and prevents the electromagnetic waves propagating to the outside. 84 is provided. In this semiconductor device 80, since the metal layer 84 is provided between the semiconductor pellet 81 and the sealing cap 83 serving as a heat dissipation member, the heat from the heat generating portion 81 a of the semiconductor pellet 81 is transmitted to the metal layer 84. Since it is transmitted to the sealing cap 83 through the metal layer 84, the thermal conductivity is deteriorated and the heat dissipation efficiency is lowered. For this reason, in such a semiconductor device 80, when the semiconductor pellet 81 with high electric power is used, sufficient heat dissipation cannot be performed.

上述したように、半導体装置では、半導体チップをプリント配線基板上にフリップチップ実装して、信号の伝送を良好にするとともに、半導体チップから発生した熱を十分に放熱することは困難である。特に、μ波、ミリ波等の高周波領域において作動する半導体チップを用いた場合には、直流供給電力が大きくなり、発熱しやすくなるため、信号の伝送を良好にし、十分な放熱を行うことが困難となる。   As described above, in a semiconductor device, it is difficult to flip-chip mount a semiconductor chip on a printed wiring board to improve signal transmission and to sufficiently dissipate heat generated from the semiconductor chip. In particular, when a semiconductor chip that operates in a high-frequency region such as μ-wave and millimeter-wave is used, the DC supply power becomes large and heat is likely to be generated, so that signal transmission is good and sufficient heat dissipation is performed. It becomes difficult.

特開２００１−３４５３９８号公報JP 2001-345398 A 特開２００２−１１０８７１号公報JP 2002-110871 A 特開平７−１６９８６９号公報JP-A-7-169869

そこで、本発明は、半導体チップがプリント配線基板上にフリップチップ実装され、信号の伝送が良好であり、放熱も十分に行うことができる半導体装置を提供することを目的とする。   Therefore, an object of the present invention is to provide a semiconductor device in which a semiconductor chip is flip-chip mounted on a printed wiring board, signal transmission is good, and heat radiation can be sufficiently performed.

上述した目的を達成する本発明に係る半導体装置は、プリント配線基板の一方の面にフリップチップ実装される半導体チップと、半導体チップから発生した熱を放熱し、半導体チップのフリップチップ実装している側とは反対側の全面に熱伝導性接着剤を介して取り付けられ、半導体チップとともにプリント配線基板上に取り付けられる放熱部材と、凹部状に形成され、凹部の内面を半導体チップ側にして、プリント配線基板の半導体チップが実装されている面に熱伝導性導電接着剤を介して外周壁が突き合わされ、該外周壁よりも内側に形成され、凹部の内面から突出した突部が熱伝導性導電接着剤で放熱部材に突き合わされている金属製のキャップ部材とを有し、キャップ部材の外周壁と突部に跨って、突部と放熱部材とに接する遮蔽板が形成されている。 A semiconductor device according to the present invention that achieves the above-described object is provided with a semiconductor chip flip-chip mounted on one surface of a printed wiring board, and heat generated from the semiconductor chip is dissipated and the semiconductor chip is flip-chip mounted. The heat dissipation adhesive is attached to the entire surface opposite to the side via a heat conductive adhesive, and is formed on the printed circuit board together with the semiconductor chip, and is formed in a concave shape. The outer peripheral wall is abutted on the surface of the wiring board on which the semiconductor chip is mounted via a heat conductive conductive adhesive, and the protrusion protruding from the inner surface of the recess is formed on the inner side of the outer peripheral wall. and a metal cap member that is abutted to the heat radiating member with an adhesive, over the outer peripheral wall and the projection of the cap member, the shield plate in contact with the projecting portion and the heat radiating member It is formed.

本発明では、プリント配線基板上にフリップチップ実装されている半導体チップのフリップチップ実装側とは反対側の全面を覆うように放熱部材が設けられているため、半導体チップの反対側の全面から熱を吸収し、放熱することができることから、効率よく放熱することができ、十分な放熱を行うことができる。また、本発明では、プリント配線基板上に半導体チップが実装されているため、信号の伝送経路を縮小することができ、信号の伝送損失を防止することができる。更に、本発明では、キャップ部材により半導体チップが保護されると共に、半導体チップが発生した熱を放熱することができる。これにより、本発明では、半導体チップをプリント配線基板上にフリップチップ実装することによる効果である信号の伝送性を良好にし、放熱も十分行うことができる。 In the present invention, since the heat radiation member is provided so as to cover the entire surface of the semiconductor chip flip-chip mounted on the printed wiring board on the side opposite to the flip chip mounting side, the heat is applied from the entire surface on the opposite side of the semiconductor chip. Can be absorbed and dissipated, so that heat can be dissipated efficiently and sufficient heat can be dissipated. In the present invention, since the semiconductor chip is mounted on the printed wiring board, the signal transmission path can be reduced and signal transmission loss can be prevented. Furthermore, in the present invention, the semiconductor chip is protected by the cap member, and the heat generated by the semiconductor chip can be radiated. Thereby, in this invention, the signal transmission property which is the effect by flip-chip mounting a semiconductor chip on a printed wiring board can be made favorable, and heat dissipation can also be performed sufficiently.

以下、本発明を適用した半導体装置について図面を参照して詳細に説明する。本発明を適用した半導体装置は、例えばμ波、ミリ波等の高周波領域において作動する高周波回路が形成された半導体チップを有しているものである。半導体装置１は、図１に示すように、プリント配線基板２と、プリント配線基板２上にフリップチップ実装される半導体チップ３と、半導体チップ３から発生した熱を放熱する放熱部材４とを有し、更に半導体チップ３と放熱部材４を覆うキャップ部材５を有する。   Hereinafter, a semiconductor device to which the present invention is applied will be described in detail with reference to the drawings. A semiconductor device to which the present invention is applied has a semiconductor chip on which a high-frequency circuit that operates in a high-frequency region such as μ wave and millimeter wave is formed. As shown in FIG. 1, the semiconductor device 1 includes a printed wiring board 2, a semiconductor chip 3 flip-chip mounted on the printed wiring board 2, and a heat radiating member 4 that radiates heat generated from the semiconductor chip 3. In addition, a cap member 5 that covers the semiconductor chip 3 and the heat dissipation member 4 is provided.

プリント配線基板２は、絶縁基板が複数積層されている。各基板上には、銅箔をパターンニングした導体パターンが複数形成されている。具体的に、プリント配線基板２は、図１に示すように、半導体チップ３がフリップチップ実装される側の第１の基板１１ａと、接地層が設けられた第２の基板１１ｂとを有している。第１の基板１１ａには、図２に示すように、導体パターンとして信号を伝送するための信号用導体パターン１２ａと、半導体チップ３に直流を供給する直流供給用導体パターン１２ｂと、接地用導体パターン１２ｃとが形成されている。信号用導体パターン１２ａ及び直流供給用導体パターン１２ｂは、互いに直交するような向きで形成されている。なお、プリント配線基板２は、図１に示すような２層構造に限定されず、１層又は３層以上であってもよい。   The printed wiring board 2 includes a plurality of insulating substrates stacked. A plurality of conductor patterns obtained by patterning copper foil are formed on each substrate. Specifically, as shown in FIG. 1, the printed wiring board 2 includes a first substrate 11a on the side where the semiconductor chip 3 is flip-chip mounted, and a second substrate 11b provided with a ground layer. ing. As shown in FIG. 2, the first substrate 11a includes a signal conductor pattern 12a for transmitting a signal as a conductor pattern, a DC supply conductor pattern 12b for supplying a direct current to the semiconductor chip 3, and a grounding conductor. A pattern 12c is formed. The signal conductor pattern 12a and the DC supply conductor pattern 12b are formed so as to be orthogonal to each other. The printed wiring board 2 is not limited to the two-layer structure as shown in FIG. 1 and may be one layer or three or more layers.

信号用導体パターン１２ａの一端は、半導体チップ３に設けられた信号用バンプ２１ａを介して、半導体チップ３に形成された高周波回路と電気的に接続されている。他端は、詳細を図示しない第１の基板１１ａ内部に形成されたスルーホールやめっき等で形成する半田バンプでプリント配線基板２内に形成された他の導体パターンと電気的に接続されている。信号用導体パターン１２ａは、半導体チップ３の高周波回路とプリント配線基板２内の導体パターンとを電気的に接続することによって、信号の入出力線となる。   One end of the signal conductor pattern 12 a is electrically connected to a high-frequency circuit formed on the semiconductor chip 3 via a signal bump 21 a provided on the semiconductor chip 3. The other end is electrically connected to other conductor patterns formed in the printed wiring board 2 by through holes formed in the first substrate 11a (not shown in detail) or solder bumps formed by plating or the like. . The signal conductor pattern 12 a becomes a signal input / output line by electrically connecting the high-frequency circuit of the semiconductor chip 3 and the conductor pattern in the printed wiring board 2.

直流供給用導体パターン１２ｂの一端は、半導体チップ３に設けられた直流供給用バンプ２１ｂを介して、半導体チップ３に形成された高周波回路と電気的に接続されている。他端は、プリント配線基板２内に形成された電源層とスルーホールやめっき等で形成された半田バンプを介して電気的に接続されている。直流供給用導体パターン１２ｂは、半導体チップ３の高周波回路と電源層とを電気的に接続することによって、半導体チップ３に直流を供給する。   One end of the DC supply conductor pattern 12 b is electrically connected to a high frequency circuit formed on the semiconductor chip 3 via a DC supply bump 21 b provided on the semiconductor chip 3. The other end is electrically connected to a power supply layer formed in the printed wiring board 2 via a solder bump formed by a through hole or plating. The direct current supply conductor pattern 12b supplies direct current to the semiconductor chip 3 by electrically connecting the high frequency circuit of the semiconductor chip 3 and the power supply layer.

接地用導体パターン１２ｃは、後述する放熱部材４の接合部３１と電気的に接続され、図４に示すように、第１の基板１１ａと第２の基板１１ｂとの間に設けられた接地層１３と第１の基板１１ａに形成されたスルーホール１４、又は半田バンプを介して電気的に接続されている。   The grounding conductor pattern 12c is electrically connected to a joint 31 of the heat radiating member 4 to be described later, and as shown in FIG. 4, a grounding layer provided between the first substrate 11a and the second substrate 11b. 13 and the first substrate 11a are electrically connected through through holes 14 or solder bumps.

プリント配線基板２上にフリップチップ実装される半導体チップ３は、一方の面に電界効果トランジスタ等を含む高周波回路が形成されている。半導体チップ３には、図４に示すように、プリント配線基板２の信号用導体パターン１２ａの一端と電気的に接続される信号伝送用の信号用バンプ２１ａと、直流供給用導体パターン１２ｂの一端と電気的に接続される直流供給用バンプ２１ｂとが電解又は無電解めっき等で形成されている。半導体チップ３は、信号用バンプ２１ａを信号用導体パターン１２ａに電気的に接続し、直流供給用バンプ２１ｂを直流供給用導体パターン１２ｂに電気的に接続することで、プリント配線基板２上にフリップチップ実装される。   A semiconductor chip 3 flip-chip mounted on the printed wiring board 2 has a high frequency circuit including a field effect transistor or the like formed on one surface. As shown in FIG. 4, the semiconductor chip 3 has signal transmission signal bumps 21a electrically connected to one end of the signal conductor pattern 12a of the printed wiring board 2, and one end of the DC supply conductor pattern 12b. The DC supply bumps 21b that are electrically connected to each other are formed by electrolysis or electroless plating. The semiconductor chip 3 is flipped onto the printed wiring board 2 by electrically connecting the signal bump 21a to the signal conductor pattern 12a and electrically connecting the DC supply bump 21b to the DC supply conductor pattern 12b. Chip mounted.

半導体チップ３から発生した熱を放熱する放熱部材４は、図３及び図４に示すように、半導体チップ３の高周波回路が形成されている一方の面とは反対側の他方の全面を覆うように半導体チップ３上に取り付けられる。放熱部材４は、熱伝導性の良好な銅等の金属で形成されている。   As shown in FIGS. 3 and 4, the heat radiating member 4 that radiates the heat generated from the semiconductor chip 3 covers the other surface of the semiconductor chip 3 opposite to the one surface on which the high-frequency circuit is formed. Is mounted on the semiconductor chip 3. The heat radiating member 4 is made of a metal such as copper having good thermal conductivity.

放熱部材４には、半導体チップ３と接合されるチップ接合部３１の四隅にプリント配線基板２に形成された接地用導体パターン１２ｃと電気的に接続される突起３２が離間して設けられている。突起３２は、チップ接合部３１が半導体チップ３と接合され、放熱部材４がプリント配線基板２上に取り付けられた際に、チップ接合部３１を支持する。この突起３２は、半導体チップ３をプリント配線基板２上にフリップチップ実装した際に、半導体チップ３の他方の面と同じ高さとなるように形成されている。チップ接合部３１の半導体チップ３と接合される面の突起３２で囲まれた内側は、半導体チップ３を収納する収納部となる。また、チップ接合部３１は、突起３２が設けられている側の面とは反対側の面が平坦に形成されている。   The heat radiation member 4 is provided with protrusions 32 that are electrically connected to the grounding conductor pattern 12 c formed on the printed wiring board 2 at the four corners of the chip joint 31 that is joined to the semiconductor chip 3. . The protrusion 32 supports the chip bonding portion 31 when the chip bonding portion 31 is bonded to the semiconductor chip 3 and the heat dissipation member 4 is mounted on the printed wiring board 2. The protrusion 32 is formed to be the same height as the other surface of the semiconductor chip 3 when the semiconductor chip 3 is flip-chip mounted on the printed wiring board 2. The inside of the chip bonding portion 31 surrounded by the protrusions 32 on the surface bonded to the semiconductor chip 3 is a storage portion for storing the semiconductor chip 3. Further, the chip bonding portion 31 has a flat surface opposite to the surface on which the protrusions 32 are provided.

以上のように構成される放熱部材４は、図４に示すように、半導体チップ３の高周波回路が形成されている一方の面とは反対側の他方の全面に塗布して形成した金とスズの合金（ＡｕＳｎ）からなるＡｕＳｎ溶剤等の熱伝導性接着剤からなる接着層３３を介して、半導体チップ３上に取り付けられる。半導体チップ３に取り付けられた放熱部材４は、図３に示すように、接地用導体パターン１２ｃの取付部を基準にして、突起３２が取付部に導電性接着剤を介して接着されることで、プリント配線基板２に取り付けられる。これにより、放熱部材４は、接地用導体パターン１２ｃに接地されるとともに、プリント配線基板２上に安定した姿勢で取り付けられることになる。プリント配線基板２上に取り付けられた放熱部材４は、チップ接合部３１に突起３２が離間して設けられているため、プリント配線基板２上に実装された際に、突起３２間に信号用導体パターン１２ａ及び直流供給用導体パターン１２ｂが通ることになる。   As shown in FIG. 4, the heat dissipating member 4 configured as described above is formed by coating gold and tin on the other surface of the semiconductor chip 3 opposite to the surface on which the high frequency circuit is formed. It is attached on the semiconductor chip 3 through an adhesive layer 33 made of a heat conductive adhesive such as an AuSn solvent made of an alloy (AuSn). As shown in FIG. 3, the heat radiating member 4 attached to the semiconductor chip 3 has the protrusion 32 bonded to the attachment portion via a conductive adhesive with reference to the attachment portion of the grounding conductor pattern 12c. And attached to the printed circuit board 2. As a result, the heat radiating member 4 is grounded to the grounding conductor pattern 12c and attached to the printed wiring board 2 in a stable posture. Since the heat dissipation member 4 mounted on the printed wiring board 2 is provided with the protrusions 32 at the chip joint portion 31 so as to be spaced apart from each other, the signal conductor between the protrusions 32 when mounted on the printed wiring board 2. The pattern 12a and the DC supply conductor pattern 12b pass therethrough.

また、放熱部材４をプリント配線基板２上に実装する際には、放熱部材４の半導体チップ３と接続されている面とは反対側の面が平坦に形成されているため、吸着及び加圧可能な接合具を用い、この接合具を平坦な面に吸着させることによって、放熱部材４を容易に移動させ、正確な位置決めを行うことができる。   Further, when the heat radiating member 4 is mounted on the printed circuit board 2, the surface opposite to the surface connected to the semiconductor chip 3 of the heat radiating member 4 is formed flat. By using a possible connector and adsorbing the connector on a flat surface, the heat dissipating member 4 can be easily moved and accurate positioning can be performed.

半導体チップ３及び放熱部材４を覆うキャップ部材５は、図１に示すように、放熱部材４と同様に熱伝導性の良好な例えばアルミニウム等の金属材料からなり、ダイキャストにより凹状に形成されている。キャップ部材５は、プリント配線基板２の半導体チップ３がフリップチップ実装されている面に取り付けられ、凹部部分に半導体チップ３と放熱部材４とを収納する。キャップ部材５は、半導体チップ３及び放熱部材４を収納することで、半導体チップ３を湿気等から保護し、半導体チップ３の劣化を防止する。また、キャップ部材５は、外部からの電磁波が内部に伝播されることを防止し、外部からの電磁波から半導体チップ３を保護する。   As shown in FIG. 1, the cap member 5 covering the semiconductor chip 3 and the heat radiating member 4 is made of a metal material such as aluminum having a good thermal conductivity like the heat radiating member 4, and is formed in a concave shape by die casting. Yes. The cap member 5 is attached to the surface of the printed wiring board 2 on which the semiconductor chip 3 is flip-chip mounted, and accommodates the semiconductor chip 3 and the heat dissipation member 4 in the recessed portion. The cap member 5 accommodates the semiconductor chip 3 and the heat dissipation member 4 to protect the semiconductor chip 3 from moisture and prevent the semiconductor chip 3 from deteriorating. Further, the cap member 5 prevents the electromagnetic wave from the outside from being propagated inside, and protects the semiconductor chip 3 from the electromagnetic wave from the outside.

キャップ部材５は、プリント配線基板２と突き合わされる外周壁４１の内部の放熱部材４と対向する位置に、放熱部材４と突き合わされる突部４２が設けられている。外周壁４１は、プリント配線基板２の半導体チップ３が実装されている面の外周と突き合わされ、プリント配線基板２と接着される。突部４２は、キャップ部材５の凹部の内面から突出して形成され、放熱部材４の半導体チップ３が接着している側とは反対側の面に突き合わされ、放熱部材４と接着される。この突部４２は、放熱部材４と接着される面の面積が少なくとも放熱部材４の面積と同じ、又は放熱部材４の面積よりも大きく形成される。これにより、突部４２と放熱部材４との接着が容易となる。   The cap member 5 is provided with a protrusion 42 that abuts the heat radiating member 4 at a position facing the heat radiating member 4 inside the outer peripheral wall 41 that abuts the printed wiring board 2. The outer peripheral wall 41 is abutted with the outer periphery of the surface on which the semiconductor chip 3 of the printed wiring board 2 is mounted, and is bonded to the printed wiring board 2. The protrusion 42 is formed so as to protrude from the inner surface of the concave portion of the cap member 5, is abutted against the surface of the heat dissipation member 4 opposite to the side to which the semiconductor chip 3 is bonded, and is bonded to the heat dissipation member 4. The protrusion 42 is formed so that the area of the surface bonded to the heat radiating member 4 is at least the same as the area of the heat radiating member 4 or larger than the area of the heat radiating member 4. Thereby, adhesion with the protrusion 42 and the heat radiating member 4 becomes easy.

キャップ部材５をプリント配線基板２に取り付ける際には、プリント配線基板２と外周壁４１との間に熱伝導性導電接着剤からなる接着層４３ａ、及び放熱部材４と突部４２との間に熱伝導性導電接着剤からなる接着層４３ｂを設け、窒素（Ｎ２）ガス雰囲気中で加熱硬化させることにより、キャップ部材５とプリント配線基板２及び放熱部材４とを接着し、プリント配線基板２に取り付ける。 When the cap member 5 is attached to the printed wiring board 2, an adhesive layer 43 a made of a heat conductive conductive adhesive is provided between the printed wiring board 2 and the outer peripheral wall 41, and between the heat radiation member 4 and the protrusion 42. An adhesive layer 43b made of a heat conductive conductive adhesive is provided and heated and cured in a nitrogen (N 2 ) gas atmosphere to bond the cap member 5, the printed wiring board 2 and the heat dissipation member 4 to each other. Attach to.

キャップ部材５は、プリント配線基板２に取り付けられることによって、外周壁４１とプリント配線基板２の間に接着層４３ａが設けられているため、内部を気密にし、半導体チップ３及び放熱部材４を保護する。また、キャップ部材５の外周壁４１と突部４２との間に形成された空間には、Ｎ２が充填されているため、半導体チップ３の酸化が防止される。 Since the cap member 5 is attached to the printed wiring board 2 and an adhesive layer 43a is provided between the outer peripheral wall 41 and the printed wiring board 2, the inside is hermetically sealed and the semiconductor chip 3 and the heat dissipation member 4 are protected. To do. Further, since the space formed between the outer peripheral wall 41 and the protrusion 42 of the cap member 5 is filled with N 2 , the oxidation of the semiconductor chip 3 is prevented.

プリント配線基板２に取り付けられたキャップ部材５は、突部４２が放熱部材４と間に設けた接着層４３ｂを介して接合されることによって、半導体チップ３から発生した熱が放熱部材４及び接着層４３ｂを介して伝わり、放熱部材４と同様に熱を放熱させることができる。   The cap member 5 attached to the printed circuit board 2 is bonded to the heat dissipation member 4 and the heat generated by the semiconductor chip 3 by bonding the protrusion 42 via the adhesive layer 43b provided between the heat dissipation member 4 and the cap member 5. It is transmitted through the layer 43b and heat can be dissipated in the same manner as the heat dissipating member 4.

以上のような構成からなる半導体装置１では、半導体チップ３が作動することによって発生した熱は半導体チップ３の高周波回路が形成されている一方の面とは反対側の他方の全面から放熱部材４との間に設けられた接着層３３を介して、放熱部材４に伝わり、放熱部材４に伝わった熱がキャップ部材５との間に設けた接着層４３ｂを介してキャップ部材５に伝わることによって、熱を外部に放熱することができる。半導体装置１では、発生した熱が半導体チップ３の他方の全面から放熱部材４に伝わり、この放熱部材４より更に大きい面積を有するキャップ部材５に熱を伝えて放熱することによって、効率よく放熱することができる。   In the semiconductor device 1 configured as described above, the heat generated by the operation of the semiconductor chip 3 is the heat radiation member 4 from the other surface opposite to the one surface where the high frequency circuit of the semiconductor chip 3 is formed. The heat is transferred to the heat radiating member 4 through the adhesive layer 33 provided between and the heat transferred to the heat radiating member 4 and is transferred to the cap member 5 through the adhesive layer 43b provided between the heat radiating member 4 and the cap member 5. , Heat can be dissipated to the outside. In the semiconductor device 1, the generated heat is transferred from the other entire surface of the semiconductor chip 3 to the heat radiating member 4, and the heat is transferred to the cap member 5 having a larger area than the heat radiating member 4 to radiate heat, thereby efficiently radiating heat. be able to.

また、この半導体装置１では、プリント配線基板２に半導体チップ３を信号用バンプ２１ａ及び直流供給用バンプ２１ｂを用いたフリップチップ実装を用いているため、信号の伝送経路をワイヤーで形成したフェイスアップ実装の場合よりも伝送経路が短縮され、信号の伝送損失を抑えられることから、信号の伝送が良好であり、半導体チップ３の入出力信号の伝達を効率よく行わせることができる。これにより、半導体装置１では、半導体チップ３に形成されている高周波回路への直流供給電力が大きいため、発熱しやすいが効率よく放熱することができ、半導体チップ３の熱による劣化が防止され、高周波特性が向上し、良好な状態で維持することができる。   In the semiconductor device 1, the semiconductor chip 3 is mounted on the printed circuit board 2 by flip chip mounting using the signal bumps 21 a and the direct current supply bumps 21 b, so that the signal transmission path is formed with a wire face-up. Since the transmission path is shortened and the signal transmission loss is suppressed as compared with the case of mounting, the signal transmission is good, and the input / output signals of the semiconductor chip 3 can be transmitted efficiently. Thereby, in the semiconductor device 1, since the direct current power supplied to the high frequency circuit formed in the semiconductor chip 3 is large, it is easy to generate heat, but can be efficiently dissipated, and deterioration of the semiconductor chip 3 due to heat is prevented, High frequency characteristics are improved and can be maintained in a good state.

また、この半導体装置１では、プリント配線基板２上に半導体チップ３をフリップチップ実装することによって、フェイスアップ実装を用いた場合よりもワイヤーで半導体チップ３とプリント配線基板２とを接続する工程を省くことができるため、製造工数が削減され、製造工程を短縮することができる。これにより、この半導体装置１では、製品の納期を短縮でき、製造単価を低減させることができる。   Further, in the semiconductor device 1, the semiconductor chip 3 is flip-chip mounted on the printed wiring board 2, thereby connecting the semiconductor chip 3 and the printed wiring board 2 with a wire rather than using face-up mounting. Since it can be omitted, the number of manufacturing steps can be reduced and the manufacturing process can be shortened. Thereby, in this semiconductor device 1, the delivery time of a product can be shortened and a manufacturing unit price can be reduced.

また、この半導体装置１では、熱等による半導体チップ３への影響が小さく、半導体チップ３の特性を維持できるため、特性の低い半導体チップ３を用いることができる。これにより、半導体装置１では、コストを削減することができる。   Moreover, in this semiconductor device 1, since the influence on the semiconductor chip 3 due to heat or the like is small and the characteristics of the semiconductor chip 3 can be maintained, the semiconductor chip 3 having low characteristics can be used. Thereby, in the semiconductor device 1, cost can be reduced.

また、上述した半導体装置１では、プリント配線基板２上に１つの半導体チップ３を設けたものを例に挙げて説明したが、このことに限定されず、図５に示すように、複数の半導体チップ３を設けてもよい。図５に示す半導体装置５０では、上述した半導体装置１と同じ構成については同一符号を付して詳細な説明を省略する。   Further, in the semiconductor device 1 described above, an example in which one semiconductor chip 3 is provided on the printed wiring board 2 has been described as an example. However, the present invention is not limited to this, and a plurality of semiconductors as shown in FIG. A chip 3 may be provided. In the semiconductor device 50 shown in FIG. 5, the same components as those of the semiconductor device 1 described above are denoted by the same reference numerals, and detailed description thereof is omitted.

この半導体装置５０では、プリント配線基板２上に３つの半導体チップ３がフリップチップ実装されている。各半導体チップ３には、放熱部材４が熱伝導性接着剤からなる接着層３３を介して取り付けられる。半導体装置５０には、更にプリント配線基板２に取り付けられるキャップ部材５１を有する。   In this semiconductor device 50, three semiconductor chips 3 are flip-chip mounted on the printed wiring board 2. The heat radiating member 4 is attached to each semiconductor chip 3 via an adhesive layer 33 made of a heat conductive adhesive. The semiconductor device 50 further includes a cap member 51 attached to the printed wiring board 2.

キャップ部材５１は、放熱部材４と同様に熱伝導性の良好な例えばアルミニウム等の金属材料からなり、ダイキャストにより凹状に形成されている。キャップ部材５１は、プリント配線基板２の半導体チップ３がフリップチップ実装されている面に取り付けられ、凹部部分に各半導体チップ３と放熱部材４とを収納し、保護する。また、キャップ部材５１は、外部からの電磁波が内部に伝播されることを防止し、外部からの電磁波から各半導体チップ３を保護する。   The cap member 51 is made of a metal material such as aluminum having good thermal conductivity like the heat radiating member 4 and is formed in a concave shape by die casting. The cap member 51 is attached to the surface of the printed wiring board 2 on which the semiconductor chip 3 is flip-chip mounted, and houses and protects each semiconductor chip 3 and the heat dissipation member 4 in the recessed portion. Further, the cap member 51 prevents the electromagnetic wave from the outside from being propagated inside, and protects each semiconductor chip 3 from the electromagnetic wave from the outside.

キャップ部材５１は、プリント配線基板２と突き合わされる外周壁５２の内部の各放熱部材４と対向する位置に、各放熱部材４と突き合わされる突部５３が設けられている。突部５３は、キャップ部材５１の凹部の内面から突出して形成され、各放熱部材４の半導体チップ３が接着している側とは反対側の面に突き合わされ、各放熱部材４と接着する。この突部５３は、各放熱部材４と接着される面の面積が少なくとも放熱部材４の面積と同じ、又は放熱部材４の面積よりも大きく形成される。このため、突部５３と各放熱部材４との接着が容易となる。   The cap member 51 is provided with a protrusion 53 that abuts each heat radiating member 4 at a position facing each heat radiating member 4 inside the outer peripheral wall 52 that abuts the printed wiring board 2. The protrusion 53 is formed so as to protrude from the inner surface of the concave portion of the cap member 51, is abutted against the surface of each heat radiating member 4 opposite to the side to which the semiconductor chip 3 is bonded, and is bonded to each heat radiating member 4. The protrusion 53 is formed such that the area of the surface bonded to each heat radiating member 4 is at least the same as the area of the heat radiating member 4 or larger than the area of the heat radiating member 4. For this reason, adhesion with the protrusion 53 and each heat radiating member 4 becomes easy.

キャップ部材５１をプリント配線基板２に取り付ける際には、プリント配線基板２と外周壁５２との間に熱伝導性導電接着剤を用いた接着層５４ａ、及び各放熱部材４と突部５３との間に熱伝導性導電接着剤からなる接着層５４ｂを設け、窒素（Ｎ２）ガス雰囲気中で加熱硬化させることにより、キャップ部材５１とプリント配線基板２及び放熱部材４とを接着し、プリント配線基板２に取り付ける。 When the cap member 51 is attached to the printed wiring board 2, an adhesive layer 54 a using a heat conductive conductive adhesive between the printed wiring board 2 and the outer peripheral wall 52, and each of the heat radiating members 4 and the protrusions 53. An adhesive layer 54b made of a heat conductive conductive adhesive is provided between the cap member 51, the printed wiring board 2 and the heat radiating member 4 by heating and curing in a nitrogen (N 2 ) gas atmosphere. Attach to the substrate 2.

キャップ部材５１は、プリント配線基板２に取り付けられることによって、プリント配線基板２の間に接着層５４ａが設けられているため、内部を気密にし、半導体チップ３及び放熱部材４を保護する。また、キャップ部材５１の外周壁５２と突部５３との間に形成された空間には、Ｎ２が充填されているため、半導体チップ３の酸化が防止される。 The cap member 51 is attached to the printed wiring board 2 so that the adhesive layer 54a is provided between the printed wiring boards 2, so that the inside is hermetically sealed and the semiconductor chip 3 and the heat dissipation member 4 are protected. Further, since the space formed between the outer peripheral wall 52 and the protrusion 53 of the cap member 51 is filled with N 2 , the oxidation of the semiconductor chip 3 is prevented.

プリント配線基板２に取り付けられたキャップ部材５１は、各突部５３が各放熱部材４と接着層５４ｂを介して接着されていることによって、各半導体チップ３から発生した熱が放熱部材４及び接着層５４ｂに伝わり、熱を外部に放熱させることができる。   The cap member 51 attached to the printed circuit board 2 has the protrusions 53 bonded to the heat dissipation members 4 via the adhesive layer 54b, so that the heat generated from the semiconductor chips 3 is bonded to the heat dissipation members 4 and the bonding members 54b. The heat is transferred to the layer 54b and can be radiated to the outside.

この半導体装置５０では、各半導体チップ３から発生した熱が各半導体チップ３の他方の全面から放熱部材４を介して伝わり、放熱部材４の面積よりも更に大きい面積を有するキャップ部材５１に伝わることによって、各半導体チップ３から発生した熱を効率よく放熱することができる。   In this semiconductor device 50, heat generated from each semiconductor chip 3 is transmitted from the other entire surface of each semiconductor chip 3 through the heat radiating member 4, and is transmitted to the cap member 51 having an area larger than the area of the heat radiating member 4. Thus, the heat generated from each semiconductor chip 3 can be efficiently radiated.

また、この半導体装置５０では、プリント配線基板２に半導体チップ３がフリップチップ実装されているため、伝送経路が短縮され、信号の伝送損失が抑えられるため、信号の伝送が良好であり、半導体チップ３の入出力信号の伝達を効率よく行わせることができる。これにより、半導体装置５０では、各半導体チップ３から発生した熱を効率よく放熱することで、半導体チップ３の熱による劣化を防止され、半導体チップ３の高周波特性が向上し、良好な状態で維持することができる。また、この半導体装置５０では、上述した半導体装置１と同様に、フェイスアップ実装する場合よりも製造工程を短縮することができ、コストを削減することもできる。   Further, in this semiconductor device 50, since the semiconductor chip 3 is flip-chip mounted on the printed wiring board 2, the transmission path is shortened and the signal transmission loss is suppressed, so that the signal transmission is good. 3 can be transmitted efficiently. Thereby, in the semiconductor device 50, the heat generated from each semiconductor chip 3 is efficiently radiated to prevent the semiconductor chip 3 from being deteriorated by heat, and the high frequency characteristics of the semiconductor chip 3 are improved and maintained in a good state. can do. Further, in the semiconductor device 50, like the semiconductor device 1 described above, the manufacturing process can be shortened and the cost can be reduced as compared with the face-up mounting.

また、半導体装置５０には、図６及び図７に示すように、外周壁５２と突部５３との間に遮蔽板５５を設けてもよい。遮蔽板５５は、プリント配線基板２上に形成されている直流供給用導体パターン１２ｂと並設するように、外周壁５２と突部５３との間に設ける。この遮蔽板５５は、キャップ部材５１をダイキャストで成型する際に、突部５３と同時成型して形成される。遮蔽板５５は、プリント配線基板２に突き合わさるように設けたり、プリント配線基板２との間に、外周壁５２とプリント配線基板２との間に設けた接着層５４ａや突部５３と放熱部材４との間に設けた接着層５４ｂと同様の接着層を設けて、プリント配線基板２に接着させてもよい。この遮蔽板５５は、放熱部材４の側面と接している。   In addition, as shown in FIGS. 6 and 7, the semiconductor device 50 may be provided with a shielding plate 55 between the outer peripheral wall 52 and the protrusion 53. The shielding plate 55 is provided between the outer peripheral wall 52 and the protrusion 53 so as to be juxtaposed with the DC supply conductor pattern 12 b formed on the printed wiring board 2. The shielding plate 55 is formed by simultaneous molding with the protrusion 53 when the cap member 51 is molded by die casting. The shielding plate 55 is provided so as to abut against the printed wiring board 2, or between the printed wiring board 2 and the adhesive layer 54 a or the protrusion 53 provided between the outer peripheral wall 52 and the printed wiring board 2, and the heat dissipation member. 4 may be adhered to the printed wiring board 2 by providing an adhesive layer similar to the adhesive layer 54b provided between the printed circuit board 2 and the adhesive layer 54b. The shielding plate 55 is in contact with the side surface of the heat dissipation member 4.

遮蔽板５５を設けた半導体装置５０では、遮蔽板５５が放熱部材４の側面に接し、熱伝導性の良好な材料で形成されているため、放熱部材４から突部５３及び遮蔽板５５に熱が伝わり、遮蔽板５５が設けられた分だけ熱が伝わる面積が広くなるため、遮蔽板５５を設けていない場合よりもより効率よく放熱することができる。また、半導体装置５０では、遮蔽板５５を設けることによって、キャップ部材５１内の電磁的干渉を防止することができる。これにより、半導体装置５０では、高周波回路が電磁波の影響を受けず安定して作動するため、各半導体チップ３の高周波特性の劣化を防止できる。   In the semiconductor device 50 provided with the shielding plate 55, the shielding plate 55 is in contact with the side surface of the heat radiating member 4 and is formed of a material having good thermal conductivity, so that the protrusion 53 and the shielding plate 55 are heated from the heat radiating member 4. Since the area where heat is transmitted is increased by the amount of the shield plate 55 provided, heat can be radiated more efficiently than when the shield plate 55 is not provided. Further, in the semiconductor device 50, by providing the shielding plate 55, electromagnetic interference in the cap member 51 can be prevented. Thereby, in the semiconductor device 50, since the high frequency circuit operates stably without being affected by the electromagnetic wave, it is possible to prevent deterioration of the high frequency characteristics of each semiconductor chip 3.

なお、半導体装置５０では、３つ半導体チップ３を設けることに限定されず、１又は複数設けるようにしてもよい。また、上述した半導体装置１及び半導体装置５０では、高周波回路が形成されている半導体チップ３を用いたがこのことに限定されず、高周波領域以外で作動する半導体チップを用いてもよい。   Note that the semiconductor device 50 is not limited to the provision of the three semiconductor chips 3, and one or a plurality of the semiconductor chips 3 may be provided. In the semiconductor device 1 and the semiconductor device 50 described above, the semiconductor chip 3 on which the high-frequency circuit is formed is used. However, the present invention is not limited to this, and a semiconductor chip that operates outside the high-frequency region may be used.

本発明を適用した半導体装置の断面図である。It is sectional drawing of the semiconductor device to which this invention is applied. プリント配線基板に形成された導体パターンを示す平面図である。It is a top view which shows the conductor pattern formed in the printed wiring board. 同半導体装置のフリップチップ実装部分を拡大した平面図である。It is the top view to which the flip chip mounting part of the semiconductor device was expanded. 図３中における線分Ａ−Ａにおける断面図である。It is sectional drawing in line segment AA in FIG. 同半導体装置の他の実施例を示す断面図である。It is sectional drawing which shows the other Example of the same semiconductor device. 同半導体装置の他の実施例を示す断面図である。It is sectional drawing which shows the other Example of the same semiconductor device. 同半導体装置の他の実施例で用いるキャップ部材の平面図である。It is a top view of the cap member used in other examples of the semiconductor device. 従来の半導体装置の断面図である。It is sectional drawing of the conventional semiconductor device. 従来の半導体装置の断面図である。It is sectional drawing of the conventional semiconductor device. 従来の半導体装置の断面図である。It is sectional drawing of the conventional semiconductor device.

符号の説明Explanation of symbols

１ 半導体装置、２ プリント配線基板、３ 半導体チップ、４ 放熱部材、５ キャップ部材、１１ａ 第１の基板、１１ｂ 第２の基板、１２ａ 信号用導体パターン、１２ｂ 直流供給用導体パターン、１２ｃ 接地用導体パターン、１３ 接地層、１４ スルーホール、２１ａ 信号用バンプ、２１ｂ 直流用バンプ、３１ チップ接合部、３２ 突起、３３ 接着層、４１ 外周壁、４２ 突部、４３ａ 接着層、４３ｂ 接着層   DESCRIPTION OF SYMBOLS 1 Semiconductor device, 2 Printed wiring board, 3 Semiconductor chip, 4 Heat dissipation member, 5 Cap member, 11a 1st board | substrate, 11b 2nd board | substrate, 12a Signal conductor pattern, 12b DC supply conductor pattern, 12c Grounding conductor Pattern, 13 Ground layer, 14 Through hole, 21a Signal bump, 21b DC bump, 31 Chip joint, 32 Protrusion, 33 Adhesive layer, 41 Outer wall, 42 Protrusion, 43a Adhesive layer, 43b Adhesive layer

Claims (2)

プリント配線基板の一方の面にフリップチップ実装される半導体チップと、
上記半導体チップから発生した熱を放熱し、上記半導体チップのフリップチップ実装している側とは反対側の全面に熱伝導性接着剤を介して取り付けられ、上記半導体チップとともに上記プリント配線基板上に取り付けられる放熱部材と、
外周壁によって内側に凹部が形成され、上記凹部を上記半導体チップ側にして、上記プリント配線基板の上記半導体チップが実装されている面に熱伝導性導電接着剤を介して外周壁が突き合わされ、凹部の内面から突出した突部が熱伝導性導電接着剤で放熱部材に突き合わされている金属製のキャップ部材とを有し、
上記キャップ部材の上記外周壁と上記突部に跨って、上記突部と上記放熱部材とに接する遮蔽板が形成されている半導体装置。 A semiconductor chip flip-chip mounted on one side of the printed wiring board;
The heat generated from the semiconductor chip is dissipated and attached to the entire surface of the semiconductor chip opposite to the flip chip mounted side via a heat conductive adhesive, and the semiconductor chip is mounted on the printed wiring board together with the semiconductor chip. A heat dissipating member to be attached;
A concave portion is formed on the inner side by the outer peripheral wall, the concave portion is on the side of the semiconductor chip, and the outer peripheral wall is abutted through a thermally conductive conductive adhesive on the surface of the printed wiring board on which the semiconductor chip is mounted, The protrusion protruding from the inner surface of the recess has a metal cap member that is butted against the heat dissipation member with a heat conductive conductive adhesive,
Across the peripheral wall and the protrusion of the cap member, the protruding portion and the heat radiating member and the semi-conductor device shielding plate is formed in contact with. 上記半導体チップには、高周波回路が形成されている請求項１記載の半導体装置。 The semiconductor device according to claim 1, wherein a high-frequency circuit is formed on the semiconductor chip .
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