JP2004125882A - Method for washing substrate - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain sufficient washing effectiveness in a method for washing a substrate with only a single washing operation while suppressing increase in surface roughness. <P>SOLUTION: The method for washing the substrate is characterized by being provided with processes of: treating the substrate with ozone water having 15 ppm or higher ozone concentration (steps S21-S30); treating the substrate with a dilute hydrofluoric acid aqueous solution having 1-10 ppm hydrofluoric acid concentration (steps S21-S30); and treating the substrate with ozone water having 15 ppm or higher ozone concentration (steps S21-S30). In the method for washing the substrate, contamination on the film surface is removed and besides an oxide film is formed as a protective film with the ozone water. Subsequently the oxide film and metal on the substrate surface are removed by using hydrofluoric acid. Then, organic matter removal, metal removal, passivation film formation and contaminant reattachment prevention are carried out by using the ozone water again. As the ozone water with a sufficient ozone concentration is used, the contamination is certainly removed with only a single washing operation and the increase in surface roughness is suppressed. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a substrate cleaning method suitable for a glass substrate, a polysilicon substrate, and the like.
[0002]
[Prior art]
For example, a liquid crystal device is configured by sealing liquid crystal between two substrates such as a glass substrate and a quartz substrate. The structure of the liquid crystal device includes a passive type in which pixels are arranged in a matrix on the surface of a substrate, and a non-linear type such as a TFT (Thin Film Transistor) or a TFD (Thin Film Diode) for each pixel. An active element is provided in which an element is provided, and a signal electrode and a pixel electrode are connected via the non-linear element.
[0003]
In an active liquid crystal device, active elements are arranged in a matrix on one substrate, electrodes facing the other substrate are arranged, and the optical characteristics of a liquid crystal layer sealed between the two substrates are determined according to image signals. The image display is made possible by changing
[0004]
Such a TFT substrate is formed by repeating steps of cleaning, film formation, and pattern formation. In a liquid crystal device, there is a strong demand for higher quality of a display image, and for this purpose, it is necessary to make a pixel pitch finer. With the miniaturization of such elements, the influence of particles and metal impurities mixed in the manufacturing process on the yield and characteristics of the device is increasing. For example, adhesion of particles causes nonuniform film thickness of various insulating films, and metal impurities cause a breakdown voltage failure and a junction leak failure of an oxide film. However, most of the TFT manufacturing process is a source of particles and metal impurities, and in order to improve device yield and its characteristics, the substrate surface must be kept clean throughout the entire manufacturing process. .
[0005]
RCA cleaning (for example, RCA Review 31-6, pp. 185-205 (1970)), which has been widely used as a method for cleaning a silicon semiconductor substrate, is conventionally used for cleaning such a TFT substrate. RCA cleaning, which is a representative of the wet cleaning method, is a cleaning method based on hydrogen peroxide, which includes alkali cleaning and acid cleaning. In general RCA cleaning, so-called SC-1 (RCA Standard Clean-1) cleaning using a solution containing ammonia and hydrogen peroxide, and so-called SC-2 (RCA) using a solution containing hydrochloric acid and hydrogen peroxide are used. Standard Clean-2) cleaning and dilute hydrofluoric acid cleaning are employed. SC-1 cleaning is effective in removing particles, and SC-2 (RCA Standard Clean-2) cleaning is effective in removing metal impurities. The diluted hydrofluoric acid cleaning is effective in removing the natural oxide film formed on the substrate surface by the SC-1 cleaning and the SC-2 cleaning and removing metal impurities.
[0006]
In recent years, a functional water cleaning method that takes into consideration the effects on the environment and the like has been adopted for a chemical solution cleaning method represented by such RCA cleaning. For example, in Patent Document 1, as a method for cleaning a silicon semiconductor substrate, a silicon oxide film is formed with ozone water, particles and metal impurities are taken into the oxide film, and the silicon oxide film is cleaned by dilute hydrofluoric acid aqueous solution. A cleaning method for removing particles and metal impurities simultaneously by etching and removing is disclosed.
[0007]
In addition, for example, Patent Literature 2 discloses a cleaning method of removing and cleaning a Cu film by treating a silicon semiconductor substrate with a dissolved ozone aqueous solution and then treating with a diluted hydrofluoric acid aqueous solution.
[0008]
[Patent Document 1]
JP-A-6-314679
[Patent Document 2]
JP-A-8-153698
[Problems to be solved by the invention]
However, the functional water cleaning method proposed in Patent Documents 1 and 2 removes contamination by repeatedly using ozone water and hydrofluoric acid aqueous solution. Even in this case, there is no particular problem since these proposals aim at cleaning the single crystal silicon substrate. However, when the cleaning method according to these proposals is applied to the cleaning of a polysilicon film formed on a glass substrate, considering the characteristics of the roughness of the polysilicon, the cleaning is performed repeatedly with ozone water and a hydrofluoric acid aqueous solution. It is conceivable that the roughness of the silicon film increases, which adversely affects the oxide film. In addition, since the surface potential is different between a single crystal silicon substrate and a polysilicon substrate, and the behavior of metal adhesion and particle adhesion is different, the functional water cleaning method for a single crystal silicon substrate is simply diverted to a polysilicon substrate. I can't.
[0011]
The present invention has been made in view of such a problem, and an object of the present invention is to provide a substrate cleaning method capable of obtaining a sufficient cleaning effect while suppressing an increase in roughness by only one cleaning. .
[0012]
[Means for Solving the Problems]
The substrate cleaning method according to the present invention includes a step of treating the substrate with ozone water having a concentration of 15 ppm or more, a step of treating the substrate with a dilute hydrofluoric acid aqueous solution having a concentration of 0.1 to 10%, With ozone water having a concentration of 15 ppm or more.
[0013]
According to such a configuration, organic and metal impurities present on the substrate surface are dissolved and removed with a sufficient concentration of ozone water, so that one-time cleaning enables reliable removal of contamination. At the same time, an oxide film is formed on the treated surface to take in metal impurities, and further, the oxide film is removed by a dilute hydrofluoric acid aqueous solution, and at the same time, metal impurity molecules (atoms) present in the oxide film and on the oxide film surface It is possible to almost completely separate the remaining metal impurities and particles from the treated surface. In addition, the ozone water can remove organic substances and metal impurities, and can perform passivation to prevent re-adhesion of contamination.
[0014]
Further, the substrate is a single crystal silicon substrate, a polysilicon substrate, or a glass substrate.
[0015]
According to such a configuration, the contamination can be removed only once with ozone water having a sufficient concentration, so that the roughness is increased not only in a single crystal silicon substrate but also in a polysilicon substrate or a glass substrate. Reliable washing can be performed without causing the cleaning.
[0016]
Further, the substrate is subjected to a film forming process.
[0017]
According to such a configuration, contamination of the silicon film, the polysilicon film, the oxide film, and the like on the substrate can be reliably removed.
[0018]
The ozone water has a concentration of 15 to 100 ppm.
[0019]
According to such a configuration, cleaning using ozone water which is applicable to the cleaning device and has a sufficient cleaning capability is possible.
[0020]
Further, the treatment with the ozone water is performed only once.
[0021]
According to such a configuration, the influence of the ozone water treatment on the substrate and the film on the substrate can be minimized.
[0022]
Further, the treatment time with the ozone water is characterized in that the treatment time is controlled so that the thickness of the oxide film formed by the ozone water treatment is in the range of 0.5 to 2 nm.
[0023]
According to such a configuration, by controlling the treatment time of the ozone water, a sufficient and optimal protective oxide film can be formed.
[0024]
Further, the ozone water is used at a temperature similar to room temperature.
[0025]
According to such a configuration, ozone water at the same temperature as room temperature can be used, and the cleaning workability is excellent.
[0026]
Further, the cleaning method of the present invention can also be applied to a substrate of an electro-optical device such as a liquid crystal device, an EL (electroluminescence) device, and an electrophoresis device.
[0027]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a flowchart showing a substrate cleaning method according to the first embodiment of the present invention. FIG. 2 is an equivalent circuit diagram of various elements, wiring, and the like in a plurality of pixels forming a pixel region of a TFT substrate (element substrate) as a substrate to which the present embodiment is applied. FIG. 3 is a plan view of a liquid crystal device using an element substrate to which the present embodiment is applied, and is a plan view together with each component formed on the element substrate as viewed from the counter substrate side. FIG. 4 is a cross-sectional view of the liquid crystal device after the assembly step of bonding the element substrate and the counter substrate and enclosing the liquid crystal after completion of the assembly process, taken along the line HH 'in FIG. FIG. 5 is a sectional view showing the liquid crystal device of FIGS. 3 and 4 in detail. 6 and 7 are process diagrams showing a substrate process of the element substrate.
[0028]
In this embodiment, three cleaning patterns, i.e., cleaning once with ozone water, cleaning once with ozone water and dilute hydrofluoric acid solution, and cleaning only once with ozone water, dilute hydrofluoric acid solution, and ozone water are described. By adopting each cleaning process in the manufacturing process of the TFT substrate, a sufficient cleaning effect can be obtained while suppressing an increase in roughness. Note that cleaning with ozone water is not used for metal-based cleaning, but only for silicon-based cleaning.
[0029]
Further, in each of the cleaning patterns, as will be described later, by appropriately controlling the concentration and the cleaning time, unnecessary etching can be prevented while suppressing the hydrofluoric acid residue, thereby enabling efficient cleaning. Thereby, the yield can be improved. In addition, as described later, the concentration of ozone water is 30 to 100 ppm, and the concentration of the diluted hydrofluoric acid aqueous solution is set to 0.1 to 10%.
[0030]
First, a structure of a liquid crystal device using an element substrate to be cleaned in this embodiment will be described with reference to FIGS.
[0031]
As shown in FIGS. 3 and 4, the liquid crystal device is configured by sealing a liquid crystal 50 between an element substrate 10 such as a TFT substrate and a counter substrate 20. Pixel electrodes and the like constituting pixels are arranged in a matrix on the element substrate 10. FIG. 2 shows an equivalent circuit of an element on the element substrate 10 that constitutes a pixel.
[0032]
As shown in FIG. 2, in the pixel area, a plurality of scanning lines 3a and a plurality of data lines 6a are wired so as to intersect with each other, and a pixel electrode is formed in an area defined by the scanning lines 3a and the data lines 6a. 9a are arranged in a matrix. Then, a TFT 30 is provided corresponding to each intersection of the scanning line 3a and the data line 6a, and the pixel electrode 9a is connected to the TFT 30.
[0033]
The TFT 30 is turned on by the ON signal of the scanning line 3a, whereby the image signal supplied to the data line 6a is supplied to the pixel electrode 9a. A voltage between the pixel electrode 9 a and the counter electrode 21 provided on the counter substrate 20 is applied to the liquid crystal 50. In addition, a storage capacitor 70 is provided in parallel with the pixel electrode 9a, and the storage capacitor 70 allows the voltage of the pixel electrode 9a to be maintained for a period of time, for example, three digits longer than the time during which the source voltage is applied. The storage capacitor 70 improves voltage holding characteristics and enables image display with a high contrast ratio.
[0034]
FIG. 5 is a schematic cross-sectional view of a liquid crystal device focusing on one pixel.
[0035]
A groove 11 is formed in an element substrate 10 such as glass or quartz. On the groove 11, a TFT 30 having an LDD structure is formed via a light shielding film 12 and a first interlayer insulating film 13. The groove 11 flattens the boundary surface between the TFT substrate and the liquid crystal 50.
[0036]
The TFT 30 includes a semiconductor layer having a channel region 1a, a source region 1d, and a drain region 1e provided with a scanning line 3a serving as a gate electrode via lower and upper insulating films 2a and 2b. The light-shielding film 12 is formed in a region corresponding to the formation region of the TFT 30, a formation region of the data line 6a and the scanning line 3a described later, that is, a region corresponding to a non-display region of each pixel. The light shielding film 12 prevents reflected light from entering the channel region 1a, the source region 1d, and the drain region 1e of the TFT 30.
[0037]
A second interlayer insulating film 14 is stacked on the TFT 30, and an intermediate conductive layer 15 is formed on the second interlayer insulating film 14. A capacitance line 18 is disposed on the intermediate conductive layer 15 with a dielectric film 17 interposed therebetween. The capacitance line 18 is composed of a capacitance layer and a light-shielding layer, forms a storage capacitance with the intermediate conductive layer 15, and has a light-shielding function of preventing internal reflection of light. Since the intermediate conductive layer 15 is formed at a position relatively close to the semiconductor layer, diffused reflection of light can be efficiently prevented.
[0038]
A third interlayer insulating film 19 is arranged on the capacitance line 18, and the data line 6 a is stacked on the third interlayer insulating film 19. The data line 6a is electrically connected to the source region 1d through contact holes 24a and 24b penetrating the third and second interlayer insulating films 19 and 14. The pixel electrode 9a is stacked on the data line 6a via the fourth interlayer insulating film 25. The pixel electrode 9a is electrically connected to the drain region 1e via the capacitance line 18 by contact holes 26a, 26b penetrating the fourth and second interlayer insulating films 25, 19, 14. An alignment film 16 made of a polyimide-based polymer resin is laminated on the pixel electrode 9a and rubbed in a predetermined direction.
[0039]
When an ON signal is supplied to the scanning line 3a (gate electrode), the channel region 1a becomes conductive, the source region 1d and the drain region 1e are connected, and the image signal supplied to the data line 6a is supplied to the pixel electrode 9a.
[0040]
On the other hand, the opposing substrate 20 is provided with a first light-shielding film 23 in a region facing the data line 6a, the scanning line 3a, and the region where the TFT 30 is formed on the TFT array substrate, that is, in a non-display region of each pixel. The first light-shielding film 23 prevents incident light from the counter substrate 20 from entering the channel region 1a, the source region 1d, and the drain region 1e of the TFT 30. A counter electrode (common electrode) 21 is formed over the entire surface of the substrate 20 on the first light shielding film 23. An alignment film 22 made of a polyimide polymer resin is laminated on the counter electrode 21 and rubbed in a predetermined direction.
[0041]
Then, a liquid crystal 50 is sealed between the element substrate 10 and the counter substrate 20. Thus, the TFT 30 writes the image signal supplied from the data line 6a to the pixel electrode 9a at a predetermined timing. In accordance with the written potential difference between the pixel electrode 9a and the counter electrode 21, the orientation and order of the molecular assembly of the liquid crystal 50 are changed, thereby modulating light and enabling gray scale display.
[0042]
As shown in FIGS. 3 and 4, the opposing substrate 20 is provided with a light-shielding film 42 as a frame for dividing a display area. The light shielding film 42 is formed of, for example, the same or different light shielding material from the light shielding film 23.
[0043]
A sealing material 41 for enclosing liquid crystal is formed between the element substrate 10 and the counter substrate 20 in a region outside the light shielding film 42. The sealing material 41 is disposed so as to substantially match the contour shape of the counter substrate 20, and fixes the element substrate 10 and the counter substrate 20 to each other. The sealing material 41 is missing on a part of one side of the element substrate 10, and a liquid crystal injection port 78 for injecting the liquid crystal 50 is formed in a gap between the bonded element substrate 10 and the counter substrate 20. You. After the liquid crystal is injected from the liquid crystal injection port 78, the liquid crystal injection port 78 is sealed with a sealing material 79.
[0044]
A data line drive circuit 61 and a mounting terminal 62 are provided along a side of the element substrate 10 in a region outside the sealing material 41 of the element substrate 10, and a scanning line is formed along two sides adjacent to the one side. A drive circuit 63 is provided. On one remaining side of the element substrate 10, a plurality of wirings 64 for connecting the scanning line driving circuits 63 provided on both sides of the screen display area are provided. In at least one of the corners of the opposing substrate 20, a conductive material 65 for electrically connecting the element substrate 10 and the opposing substrate 20 is provided.
[0045]
Next, the manufacturing process of the element substrate and the substrate cleaning method thus configured will be described with reference to the flowchart of FIG. 1 and the process diagrams of FIGS.
[0046]
First, a TFT array substrate 10 such as a quartz substrate, hard glass, or silicon substrate is prepared. In the present embodiment, the cleaning process of step S21 is performed on the substrate 10.
[0047]
That is, in step S21, the substrate 10 shown in FIG. 6A is washed with ozone water O3 having a concentration of 30 to 60 ppm and a temperature of 23 to 40 ° C. for ₃ to 5 minutes. Thus, organic substances and metals on the surface of the substrate 10 are removed, and passivation (protection film formation) using ozone water is performed. The above cleaning method is hereinafter described as [O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./3 to 5 min) Organic substance removal, metal removal, formation of vaporization].
[0048]
In step S21, the ozone water may be removed by rinsing with pure water at room temperature for 3 to 5 minutes. This cleaning method is hereinafter referred to as “replacement with ultrapure water (room temperature / 3 to 5 min)”. Further, it may be used by mixing with the following hydrofluoric acid aqueous solution without rinsing.
[0049]
Next, in step S21, cleaning is performed for 30 seconds to 3 minutes using a diluted hydrofluoric acid aqueous solution in which hydrofluoric acid, hydrogen peroxide, and pure water are mixed at a ratio of 1: 1: 50 and a temperature of 23 to 25 ° C. . Thus, the metal on the surface of the substrate 10 is removed, and the chemical and natural oxide films are removed by etching. This cleaning method is hereinafter referred to as [DHForFPM (HF (: H ₂ O ₂ ): DIW = 1 (: 1): 50 to 400/23 to 25 ° C./30 s to 3 min) Metal removal, chemical and natural oxide film etching] write.
[0050]
Next, in step S21, cleaning with [ultra pure water (room temperature / 5-8 min) replacement] is performed, and then [O ₃ (ozone) water (concentration 30-60 ppm / temperature 23-40 ° C./3-5 min) Washing by organic substance removal, metal removal, formation of vapor, prevention of reattachment of contamination], washing with [pure water (room temperature / 3 to 5 min) replacement], and finally drying ([Dry (IPA) (Isopropyl alcohol) Drying in atmosphere)]).
[0051]
That is, the cleaning of the substrate in step S21 is summarized as follows.
[0052]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./3 to 5 min) Removal of organic substances, removal of metals, formation of vapors]
[Replace with ultrapure water (room temperature / 3 to 5 min)]
[DHForFPM (HF (: H ₂ O ₂ ): H ₂ O = 1 (: 1): 50 to 400/23 to 25 ° C./30 s to 3 min) Metal removal, chemical and natural oxide film etching]
[Replace with ultrapure water (room temperature / 5-8 min)]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./3 to 5 min) Removal of organic substances, removal of metals, formation of vapor, prevention of reattachment of contamination]
[Replace with ultrapure water (room temperature / 3 to 5 min)]
[Dry (IPA atmosphere lifting drying)]
In order to increase the reactivity of ozone, it is effective to control the temperature of ozone water so that the temperature is in the range of 23 to 40 ° C. In addition, the temperature near 35 ° C. is the highest in reactivity more than the degradation of ozone, and the cleaning ability is up to eight times as high as room temperature. In the present embodiment, ozone water is used at a concentration of 30 ppm or more, and a high cleaning ability is obtained. In addition, since ozone is deteriorated even when the temperature is controlled, it is preferable that the original ozone concentration is higher.
[0053]
In the description of step S21, the batch cleaning is described as an example. However, in the single wafer cleaning, a cleaning method using ozone water, a dilute hydrofluoric acid aqueous solution, and ozone water can be considered. In this case, for example, the following cleaning method using a rotary single-wafer cleaning machine can be considered. Note that the rotary type single-wafer cleaning machine performs cleaning by discharging a cleaning liquid from a nozzle to a substrate while rotating the substrate.
[0054]
That is, ozone water O ₃ having a concentration of 30 to 60 ppm and a temperature of 23 to 40 ° C. is discharged from the nozzle to the substrate 10. The ozone water is discharged from the nozzle and sprayed on the substrate surface, and the cleaning is performed for 30 seconds to 3 minutes. Thus, organic substances and metals on the surface of the substrate 10 are removed, and passivation (protection film formation) using ozone water is performed.
[0055]
The above cleaning method is hereinafter referred to as [O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./30 s to ₃ min) Organic substance removal / metal removal / gasification formation].
[0056]
Next, a diluted hydrofluoric acid aqueous solution having a temperature of 23 to 25 ° C. in which hydrofluoric acid and pure water are mixed at a ratio of 1:50 to 200 is discharged from the nozzle. Then, cleaning is performed for 5 to 30 seconds using a diluted hydrofluoric acid aqueous solution. Thus, the metal on the surface of the substrate 10 is removed, and the chemical and natural oxide films are removed by etching. This cleaning method is hereinafter referred to as [DHF HF: H ₂ O = 1: 50 to 200/23 to 25 ° C./5 to 30 s) Metal removal, chemical and natural oxide film etching].
[0057]
Next, cleaning with [ultra pure water (spin rinse, 1 min)] is performed. That is, pure water is discharged from the nozzle for one minute and sprayed on the surface of the substrate. The pure water discharged from the nozzle rushes out of the center of the substrate 10 in the centrifugal direction. Particles (contaminants) lifted off from above the substrate 10 by the flow of the pure water are washed away around the substrate 10 and removed therefrom.
[0058]
Next, ozone water is again discharged from the nozzle and sprayed on the surface of the substrate 10. That is, cleaning by [O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./30 s to ₃ min) removal of organic substances / metals / gas formation / prevention of re-contamination] is performed, and finally drying ([Dry ( performing N ₂ persistent Bu spin drying) the drawing). In addition, even during the drying process, the substrate 10 can be drained in a short time by rotating the substrate 10.
[0059]
The following is a summary of substrate cleaning when single wafer cleaning is employed in step S21.
[0060]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./30 s to ₃ min) Removal of organic substances, removal of metals, formation of vaporization]
[DHF (HF: H ₂ O = 1: 50 to 200/23 to 25 ° C./5 to 30 s) Metal removal, chemical and natural oxide film etching]
[Ultra pure water (smooth rinse, 1 min)]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./30 s to ₃ min) Removal of organic substances, removal of metals, formation of vapor, prevention of reattachment of contamination]
[Dry (N _{2 base} type spin drying)]
Next, the cleaned substrate 10 is annealed, preferably in an inert gas atmosphere such as N ₂ (nitrogen) and at a high temperature of about 900 to 1300 ° C., and is generated on the TFT array substrate 10 in a high-temperature process performed later. Pre-processing is performed so that distortion is reduced.
[0061]
Next, in step S1 of FIG. 1, a groove 11 (see FIGS. 1 and 5) is formed in the TFT array substrate 10 by etching or the like. Next, in step S2 of FIG. 1, a metal such as Ti, Cr, W, Ta, Mo, and Pd, or a metal alloy film such as a metal silicide is formed by sputtering to a thickness of about 100 to 500 nm, preferably about 200 nm. Deposit to a film thickness. Then, the lower light-shielding film 12 having a lattice-like planar shape is formed by photolithography and etching.
[0062]
Next, in step S22, a cleaning process is performed before forming the first interlayer insulating film 13 (FIG. 6B). The cleaning in step S22 is indicated by the same notation as in the above [], as follows.
[0063]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./3 to 5 min) Removal of organic substances, removal of metals, formation of vapors]
[Replace with ultrapure water (/ room temperature / 3-5min)]
[DHF or FPM (HF (: H ₂ O ₂ ): H ₂ O = 1 (: 1): 50 to 400/23 to 25 ° C./30 s to 3 min) Metal removal, chemical and natural oxide film etching, particle removal]
[Replace with ultrapure water (room temperature / 5-8 min)]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./3 to 5 min) Removal of organic substances, removal of metals, formation of vapor, prevention of reattachment of contamination]
[Replace with ultrapure water (room temperature / 3 to 5 min)]
[Dry (IPA atmosphere lifting drying)]
Although WSi forming the lower light-shielding film 12 is easily oxidized, in the present embodiment, it is possible to form passivation quickly by the strong oxidizing power of ozone. In addition, a lift-off function using hydrofluoric acid can provide a high particle removal capability after sputter deposition at room temperature without using MS (megasonic). Remaining particles promote abnormal growth in the correlated insulating film, hindering uniform deposition of the film formed on the top, causing film residue after disconnection and subsequent dry etching, causing device failure. Would. However, in the present embodiment, high particle removal performance is obtained by cleaning with a hydrofluoric acid aqueous solution, and the occurrence of device failure can be prevented.
[0064]
In step S22, the following cleaning method can be employed. This cleaning method is particularly suitable for single-wafer cleaning.
[0065]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./30 s to ₃ min) Removal of organic substances, removal of metals, formation of vaporization]
[DHF (HF: H ₂ O = 1: 50 to 200/23 to 25 ° C./5 to 30 s) Metal removal, chemical and natural oxide film etching]. Vehicle removal]
[Ultra pure water (smooth rinse, 1 min)]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./30 s to ₃ min) Removal of organic substances, removal of metals, formation of vapor, prevention of reattachment of contamination]
[Dry (N _{2 base} type spin drying)]
Next, in step S3, a TEOS (tetra-ethyl-ortho-silicate) gas, a TEB (tetra-ethyl-borate) gas, and a TMOP (tetra-ethyl-borate) gas are formed on the lower light-shielding film 12 by, for example, normal pressure or reduced pressure CVD. The interlayer insulating film 13 made of a silicate glass film such as NSG, PSG, BSG, or BPSG, a silicon nitride film, a silicon oxide film, or the like is formed by using a tetramethyl oxy phoslate) gas or the like. The thickness of the interlayer insulating film 13 is, for example, about 500 to 2000 nm.
[0066]
Next, in step S23, a cleaning process is performed before forming the semiconductor layer 1a (FIG. 6C). The cleaning in step S23 is indicated by the same notation as in the above [], and is as follows.
[0067]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./3 to 5 min) Removal of organic substances, removal of metals, formation of vapors]
[Replace with ultrapure water (room temperature / 3 to 5 min)]
[DHForFPM (HF (: H ₂ O ₂ ): DIW = 1 (: 1): 50 to 400/23 to 25 ° C./30 s to 3 min) Metal removal, chemical and natural oxide film etching]
[Replace with ultrapure water (room temperature / 5-8 min)]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./3 to 5 min) Removal of organic substances, removal of metals, formation of vapor, prevention of reattachment of contamination]
[Replace with ultrapure water (room temperature / 3 to 5 min)]
[Dry (IPA atmosphere lifting drying)]
This cleaning step also has the same effect as each of the above cleaning steps.
[0068]
Further, in step S23, the following cleaning method can be adopted. This cleaning method is particularly suitable for single-wafer cleaning.
[0069]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./30 s to ₃ min) Removal of organic substances, removal of metals, formation of vaporization]
[DHF (HF: H ₂ O = 1: 50 to 200/23 to 25 ° C./5 to 30 s) Metal removal, chemical and natural oxide film etching]
[Ultra pure water (smooth rinse,> 1min)]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./30 s to ₃ min) Removal of organic substances, removal of metals, formation of vapor, prevention of reattachment of contamination]
[Dry (N _{2 base} type spin drying)]
Next, in step S4, low pressure CVD using monosilane gas, disilane gas or the like at a flow rate of about 400 to 600 cc / min in a relatively low temperature environment of about 450 to 550 ° C., preferably about 500 ° C., on the interlayer insulating film 13. An amorphous silicon film is formed by (for example, CVD at a pressure of about 20 to 40 Pa). Thereafter, the polysilicon film is annealed in a nitrogen atmosphere at about 600 to 700 ° C. for about 1 to 10 hours, preferably for 4 to 6 hours, so that the polysilicon film has a particle size of about 50 to 200 nm, preferably Solid phase growth is performed until the particle size becomes about 100 nm. As a method for solid phase growth, annealing treatment using RTA (Rapid Thermal Anneal) or laser annealing using excimer laser or the like may be used. At this time, depending on whether the pixel switching TFT 30 is of an n-channel type or a p-channel type, a dopant of a group V element or a group III element may be slightly doped by ion implantation or the like. Then, a semiconductor layer 1a having a predetermined pattern is formed by photolithography and etching.
[0070]
Next, in step S24, a cleaning process is performed before forming the gate insulating film 2a (FIG. 6D). The cleaning in step S24 is represented by the same notation as in the above [], and is as follows.
[0071]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./3 to 5 min) Removal of organic substances, removal of metals, formation of vapors]
[Replace with ultrapure water (room temperature / 3 to 5 min)]
[DHForFPM (HF (: H ₂ O ₂ ): DIW = 1 (: 1): 50 to 400/23 to 25 ° C./30 s to 3 min) Metal removal, chemical and natural oxide film etching]
[Replace with ultrapure water (room temperature / 8 to 15 min)]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./3 to 5 min) Removal of organic substances, removal of metals, formation of vapor, prevention of reattachment of contamination]
[Replace with ultrapure water (room temperature / 3 to 5 min)]
[Dry (IPA atmosphere lifting drying)]
Further, in step S24, the following cleaning method can be adopted. This cleaning method is particularly suitable for single-wafer cleaning.
[0072]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./30 s to ₃ min) Removal of organic substances, removal of metals, formation of vaporization]
[DHF (HF: H ₂ O = 1: 50 to 200/23 to 25 ° C./5 to 30 s) Metal removal, chemical and natural oxide film etching)))))))
[Ultra pure water (smooth rinse> 1 min)]
According to the light element impurity inspection by SIMS (secondary ion mass spectrometry), fluorine is likely to remain on the cleaning interface of Si—SiO in O ₃ -DHF cleaning. Dangling bond in HF 2 ^_-, HF _- inhibits complete hydrogen termination liable to remain as residue. In order to improve the substitution characteristics, and to optimize the hydrogen termination, it is better to carry out rinsing after DHF cleaning.
[0073]
Further, when contamination in the atmosphere or in the apparatus adheres to the dangling bond of Si, it is difficult to remove the contamination by hydrofluoric acid alone. Therefore, an oxide passivation (protective film) is formed once with ozone (O ₃ ) water and lifted off with hydrofluoric acid.
[0074]
Next, in step S5, the semiconductor layer 1a constituting the TFT 30 is thermally oxidized at a temperature of about 900 to 1300 ° C., preferably at a temperature of about 1000 ° C., and then continuously performed by a low pressure CVD method or the like. Thereby, the lower and upper gate insulating films 2a and 2b (including the gate insulating film) made of a multilayer high-temperature silicon oxide film (HTO film) and a silicon nitride film are formed.
[0075]
As a result, the semiconductor layer 1a has a thickness of about 30 to 150 nm, preferably about 35 to 50 nm, and the insulating films 2a and 2b have a thickness of about 20 to 150 nm, preferably about 30 to 150 nm. The thickness is 100 nm.
[0076]
Next, in order to control the threshold voltage Vth of the pixel switching TFT 30, a predetermined amount of a dopant such as boron is doped into the N-channel region or the P-channel region of the semiconductor layer 1a by ion implantation or the like. I do.
[0077]
Next, in step S25, a cleaning process before forming the scanning line 3a (FIG. 6E) is performed. The cleaning in step S25 is represented by the same notation as in the above [], and is as follows.
[0078]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./3 to 5 min) Removal of organic substances, removal of metals, formation of vapors]
[Replace with ultrapure water (room temperature / 3 to 5 min)]
[Dry (IPA atmosphere lifting drying)]
Further, in step S25, the following cleaning method can be adopted. This cleaning method is particularly suitable for single-wafer cleaning.
[0079]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./30 s to ₃ min) Removal of organic substances, removal of metals, formation of vaporization]
[Ultra pure water (smooth rinse)]
[Dry (N _{2 base} type spin drying)]
Next, in step S6, a polysilicon film is deposited by a low pressure CVD method or the like, and phosphorus (P) is thermally diffused to make the polysilicon film conductive. Alternatively, a doped silicon film in which P ions are introduced simultaneously with the formation of the polysilicon film may be used. The thickness of the polysilicon film is about 100 to 500 nm, preferably about 350 nm. Then, a scanning line 3a having a predetermined pattern including the gate electrode portion of the TFT 30 is formed by photolithography and etching.
[0080]
For example, when the TFT 30 is an n-channel TFT having an LDD structure, the scanning line 3a (gate electrode) is used as a mask to form a low-concentration source region and a low-concentration drain region in the semiconductor layer 1a. , P, etc. at a low concentration (for example, P ions at a dose of 1 to 3 × 10 ¹³ / cm ² ) (step S7). Thus, the semiconductor layer 1a below the scanning line 3a becomes the channel region 1a '.
[0081]
Further, in order to form the high-concentration source region 1d and the high-concentration drain region 1e constituting the pixel switching TFT 30, a resist layer having a plane pattern wider than the scanning line 3a is formed on the scanning line 3a. Thereafter, a dopant of a group V element such as P is doped at a high concentration (for example, P ions are doped at a dose of 1 to 3 × 10 ¹⁵ / cm ² ) (step S8).
[0082]
Thus, an element having an LDD structure having low-concentration source / drain regions and high-concentration source / drain regions is formed. Note that, for example, a TFT having an offset structure may be used without performing low-concentration doping, and a self-aligned TFT may be formed by an ion implantation technique using P ions, B ions, or the like using the scanning line 3a as a mask. The resistance of the scanning line 3a is further reduced by the impurity doping.
[0083]
Next, in step S26, a cleaning process is performed before forming the second interlayer insulating film 14 (FIG. 6F). The cleaning in step S26 is represented by the same notation as in the above [], and is as follows.
[0084]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./3 to 5 min) Removal of organic substances, removal of metals, formation of vapors]
[Replace with ultrapure water (room temperature / 3 to 5 min)]
[Dry (IPA atmosphere lifting drying)]
Further, in step S26, the following cleaning method can be adopted. This cleaning method is particularly suitable for single-wafer cleaning.
[0085]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./30 s to ₃ min) Removal of organic substances, removal of metals, formation of vaporization]
[Ultra pure water (smooth rinse)]
[Dry (N2 base spin drying)]
Next, in step S9, a silicate glass film such as NSG, PSG, BSG, BPSG, etc., A second interlayer insulating film 14 made of a silicon film, a silicon oxide film, or the like is formed. The thickness of the second interlayer insulating film 14 is, for example, about 500 to 2000 nm. Here, preferably, annealing is performed at a high temperature of about 800 ° C. to improve the film quality of the interlayer insulating film 14.
[0086]
Next, in step S10, the contact holes 24a and 26a are simultaneously opened by dry etching such as reactive ion etching and reactive ion beam etching on the second interlayer insulating film 14.
[0087]
Next, in step S27, a cleaning process is performed before the formation of the first intermediate conductive layer 15 (FIG. 6G) constituting the lower electrode of the storage capacitor. The cleaning in step S27 is described as follows using the same notation as in the above [].
[0088]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./3 to 5 min) Removal of organic substances, removal of metals, formation of vapors]
[Replace with ultrapure water (room temperature / 3 to 5 min)]
[Dry (IPA atmosphere lifting drying)]
Further, in step S27, the following cleaning method can be adopted. This cleaning method is particularly suitable for single-wafer cleaning.
[0089]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./30 s to ₃ min) Removal of organic substances, removal of metals, formation of vaporization]
[DHF (HF: H ₂ O = 1: 50 to 200/23 to 25 ° C./5 to 10 s) Metal removal, chemical and natural oxide film etching]
[Ultra pure water (smooth rinse,> 1 min)]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./30 s to ₃ min) Removal of organic substances, removal of metals, formation of vapor, prevention of reattachment of contamination]
[Dry (N _{2 base} type spin drying)]
Next, in the present embodiment, in step S11, the first intermediate conductive layer 15 to be the lower capacitance electrode of the storage capacitor is formed. That is, a polysilicon film is deposited on the second interlayer insulating film 14 by a low-pressure CVD method or the like, and phosphorus (P) is thermally diffused to make the polysilicon film conductive. Alternatively, a doped silicon film in which P ions are introduced simultaneously with the formation of the polysilicon film may be used. The thickness of the polysilicon film is about 100 to 500 nm, preferably about 150 nm. Then, patterning is performed by photolithography and etching to form the first intermediate conductive layer 15.
[0090]
Next, in step S28, a cleaning process is performed before the formation of the dielectric film 17 (FIG. 7 (g)) constituting the insulating film of the capacitor. The cleaning in step S28 is described as follows using the same notation as in the above [].
[0091]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./3 to 5 min) Removal of organic substances, removal of metals, formation of vapors]
[Replace with ultrapure water (/ room temperature / 3-5min)]
[FPM (HF: H ₂ O ₂ : DIW = 1: 1: 50 to 400/23 to 25 ° C./30 s to 1 min) Metal removal, chemical and natural oxide film etching]
[Replace with ultrapure water (room temperature / 8 ~ 15min)]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./3 to 5 min) Removal of organic substances, removal of metals, formation of vapor, prevention of reattachment of contamination]
[Replace with ultrapure water (room temperature / 3 to 5 min)]
[Dry (IPA atmosphere lifting drying)]
Further, in step S28, the following cleaning method can be adopted. This cleaning method is particularly suitable for single-wafer cleaning.
[0092]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./30 s to ₃ min) Removal of organic substances, removal of metals, formation of vaporization]
[DHF (HF: H ₂ O = 1: 50 to 200/23 to 25 ° C./5 to 30 s) Metal removal, chemical and natural oxide film etching]
[Ultra pure water (smooth rinse> 1 min)]
[Dry (N _{2 base} type spin drying)]
In the next step S12, a dielectric film 17, which is an insulating film of the storage capacitor, is formed. That is, a dielectric made of a high-temperature silicon oxide film (HTO film) or a silicon nitride film is formed on the first intermediate conductive layer 15 and the second interlayer insulating film 14 also serving as a pixel potential side capacitor electrode by a low pressure CVD method, a plasma CVD method, or the like. The film 17 is deposited to a relatively small thickness of about 50 nm.
[0093]
The dielectric film 17 may be composed of either a single-layer film or a multilayer film as in the case of the insulating films 2a and 2b, and various known films generally used to form a gate insulating film of a TFT. It can be formed by technology. Since the storage capacity increases as the dielectric film 17 becomes thinner, the dielectric film 17 becomes an extremely thin insulating film having a thickness of 50 nm or less on condition that no defects such as film breakage occur. It is advantageous to form
[0094]
Next, in step S29, a cleaning process is performed before forming the capacitance line 18 (FIG. 7 (i)) constituting the upper electrode of the storage capacitor. The cleaning in step S29 is described as follows using the same notation as in the above [].
[0095]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./3 to 5 min) Removal of organic substances, removal of metals, formation of vapors]
[Replace with ultrapure water (room temperature / 3 to 5 min)]
[Dry (IPA atmosphere lifting drying)]
Further, in step S29, the following cleaning method can be adopted. This cleaning method is particularly suitable for single-wafer cleaning.
[0096]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./30 s to ₃ min) Removal of organic substances, removal of metals, formation of vaporization]
[Ultra pure water (smooth rinse)]
[Dry (N _{2 base} spin drying)
Next, in step S13, a capacitance line 18 is formed on the dielectric film 17. The film thickness of the capacitance line 18 is set to, for example, 150 nm.
[0097]
Next, in step S30, a cleaning process is performed before forming the third interlayer insulating film 19 (FIG. 7 (j)). The cleaning in step S30 is indicated as follows, using the same notation as in the above [].
[0098]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./3 to 5 min) Removal of organic substances, removal of metals, formation of vapors]
[Replace with ultrapure water (room temperature / 3 to 5 min)]
[FPM (HF: H ₂ O ₂ : DIW = 1: 1: 50 to 400/23 to 25 ° C./30 s to 1 min) Metal removal, chemical and natural oxide film etching]
[Replace with ultrapure water (room temperature / 8 to 15 min)]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./3 to 5 min) Removal of organic substances, removal of metals, formation of vapor, prevention of reattachment of contamination]
[Replace with ultrapure water (room temperature / 3 to 5 min)]
[Dry (IPA atmosphere lifting drying)]
Further, in step S30, the following cleaning method can be adopted. This cleaning method is particularly suitable for single-wafer cleaning.
[0099]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./30 s to ₃ min) Removal of organic substances, removal of metals, formation of vaporization]
[DHF (HF: H ₂ O = 1: 50 to 200/23 to 25 ° C./5 to 10 s) Metal removal, chemical and natural oxide film etching]
[Ultra pure water (smooth rinse,> 1min)]
[O ₃ (ozone) water (concentration: 30 to 60 ppm / temperature: 23 to 40 ° C./30 s to ₃ min) Removal of organic substances, removal of metals, formation of vapor, prevention of reattachment of contamination]
[Dry (N _{2 base} spin drying)
Next, in step S14, a third interlayer insulating film made of a silicate glass film such as NSG, PSG, BSG, or BPSG, a silicon nitride film, a silicon oxide film, or the like is formed by using, for example, a normal pressure or reduced pressure CVD method or a TEOS gas. A film 19 is formed. The thickness of the third interlayer insulating film 19 is, for example, about 500 to 1500 nm.
[0100]
Next, in step S15, a low-resistance metal such as Al or a metal silicide having a light-shielding property is formed as a metal film by sputtering or the like on the entire surface of the third interlayer insulating film 19 so as to fill the contact holes 24a and 24b. Deposit to a thickness of 100-500 nm, preferably about 300 nm. Then, the data line 6a having a predetermined pattern is formed by photolithography and etching (Step S16).
[0101]
Next, in step S17, a silicate glass film such as NSG, PSG, BSG, BPSG, or the like, a silicon nitride film, or an oxidized film is formed so as to cover the data line 6a by using, for example, normal pressure or reduced pressure CVD, TEOS gas, or the like. A fourth interlayer insulating film 25 made of a silicon film or the like is formed. The thickness of the fourth interlayer insulating film 25 is, for example, about 500 to 1500 nm.
[0102]
Next, in step S18, a contact hole 26b is formed by dry etching such as reactive ion etching or reactive ion beam etching on the fourth interlayer insulating film 25 and the third interlayer insulating film 19.
[0103]
Next, in step S19, a transparent conductive film such as an ITO film is deposited on the inner peripheral surface of the contact hole 26b and the fourth interlayer insulating film 25 by sputtering or the like to a thickness of about 50 to 200 nm. . Then, the pixel electrode 9a is formed by photolithography and etching. When the liquid crystal device is used for a reflection type liquid crystal device, the pixel electrode 9a may be formed from an opaque material having a high reflectance such as Al (aluminum). The contact hole 26b connects the first intermediate conductive layer 15 and the pixel electrode 9a.
[0104]
As described above, in the present embodiment, cleaning is performed only once with ozone water, cleaning is performed only once with ozone water and a diluted hydrofluoric acid solution, and cleaning is performed only once using ozone water, a diluted hydrofluoric acid solution, and ozone water. By adopting the three cleaning patterns in each cleaning process during the manufacturing process of the TFT substrate, a sufficient cleaning effect can be obtained while suppressing an increase in roughness.
[0105]
That is, the surface of a glass substrate / film having organic impurities, particle foreign matter, or metal impurities taken into the surface of a production line or an apparatus is first cleaned with about 30 ppm of ozone water to be present on the outermost surface. The organic and metallic impurities are separated from the surface and dissolved and removed in an aqueous solution. On the surface of the polysilicon film, the surface can be uniformly oxidized by 0.5 to 2 nm with high-concentration ozone water, and a minute residue is left in the pole interface region 0.5 to 2 nm deep from the top surface of the polysilicon film. Metal impurities which are likely to be present can be taken into the oxide film.
[0106]
Further, by using dilute hydrofluoric acid, the oxide film is removed, and at the same time, metal impurity molecules (atoms) existing in the oxide film and metal impurities and particles remaining on the oxide film surface are removed from the polysilicon film and the insulating film surface. It can be almost completely separated from.
[0107]
By using this method, it is possible to clean the polysilicon film having large lattice defects and roughness or the diffused impurity polysilicon film as compared with the single crystal silicon without excessively damaging the polysilicon film. The resulting oxide film or interlayer insulating film promotes higher quality film growth, and the device formed thereby can stabilize characteristics and yield.
[0108]
As described above, in the present embodiment, as compared with the single crystal silicon substrate, the surface of the polysilicon film, the surface of the impurity diffusion polysilicon film, and the surface of the impurity diffusion polysilicon film which are easily damaged by the aqueous hydrofluoric acid solution and the aqueous ammonia solution are introduced. It is possible to clean while suppressing micro damage on the surface. In addition, organic matter contamination, metal contamination and particle contamination can be satisfactorily removed in a short time. Further, in the cleaning of the liquid crystal substrate, particularly in the cleaning of the polysilicon surface having many lattice defects and impurity doping, the surface roughness may be increased by selective oxidation and etching as compared with the single crystal silicon surface. In the embodiment, surface roughness is suppressed by uniform oxidation with concentrated ozone-dissolved water and etching with a combination of diluted hydrofluoric acid aqueous solution or high-concentration ozone water containing diluted hydrofluoric acid, and the life of the oxide film formed on polysilicon is reduced. It is possible to improve the yield and make the yield more stable. As described above, the dissolved concentration of ozone water is 15 ppm in order to improve the uniform oxidation rate and to minimize the concentration of dilute hydrofluoric acid in consideration of the influence of the etching on the polysilicon surface and other insulating films. Set above. As a result, the time for forming an oxide film on the polysilicon, which takes in impurities present at a depth of 0.5 to 2 nm from the polysilicon surface, is reduced, and the contamination is removed by one treatment of ozone water and diluted hydrofluoric acid. Making it possible.
[0109]
The substrate of the present invention is not limited to a liquid crystal device, but can be applied to a display panel such as an EL (electroluminescence) device and an electrophoresis device.
[Brief description of the drawings]
FIG. 1 is a flowchart showing a substrate cleaning method according to a first embodiment of the present invention.
FIG. 2 is an equivalent circuit diagram of various elements, wiring, and the like in a plurality of pixels forming a pixel region of a TFT substrate (element substrate) which is a semiconductor device to which the present embodiment is applied;
FIG. 3 is a plan view of a liquid crystal device using an element substrate to which the present embodiment is applied, viewed from the counter substrate side together with components formed on the element substrate.
FIG. 4 is a cross-sectional view of the liquid crystal device after the assembly step of bonding an element substrate and a counter substrate and enclosing liquid crystal after completion of the assembly process, taken along the line HH ′ in FIG. 3;
FIG. 5 is a cross-sectional view showing the liquid crystal device of FIGS. 3 and 4 in detail.
FIG. 6 is a process chart showing a substrate cleaning method in the order of steps.
FIG. 7 is a process chart showing a substrate cleaning method in the order of steps.
[Explanation of symbols]
S21: cleaning of substrate, S22: cleaning of first interlayer insulating film, S23: cleaning of semiconductor layer, S24: cleaning of gate insulating film, S25: cleaning of scanning line, S26: cleaning of second interlayer insulating film, S27: intermediate Conductive layer pre-cleaning, S28: Pre-insulating film cleaning, S29: Capacitance line pre-cleaning, S30: Third interlayer insulating film pre-cleaning

Claims (9)

Treating the substrate with ozone water having a concentration of 15 ppm or more;
A substrate cleaning method comprising: a step of treating the substrate with a dilute hydrofluoric acid aqueous solution having a concentration of 0.1 to 10%; and a step of treating the substrate with ozone water having a concentration of 15 ppm or more. . The method according to claim 1, wherein the substrate is a single crystal silicon substrate, a polysilicon substrate, or a glass substrate. The substrate cleaning method according to claim 1, wherein the substrate has been subjected to a film forming process. The substrate cleaning method according to claim 1, wherein the concentration of the ozone water is 15 to 100 ppm. The method according to claim 1, wherein the treatment with the ozone water is performed only once. 2. The substrate cleaning according to claim 1, wherein the treatment time with the ozone water is controlled such that a thickness of an oxide film formed by the ozone water treatment is in a range of 0.5 to 2 nm. 3. Method. The substrate cleaning method according to claim 1, wherein the ozone water is used at a temperature similar to room temperature. The substrate cleaning method according to claim 1, wherein the diluted hydrofluoric acid aqueous solution contains ozone. The substrate cleaning method according to any one of claims 1 to 8, wherein the substrate is a substrate for an electro-optical device.

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