JP4399217B2 - Manufacturing method of TFT array substrate - Google Patents

Description

  The present invention relates to a method for manufacturing an active matrix TFT array substrate on which a thin film transistor (hereinafter referred to as TFT) is mounted as a switching element, and a liquid crystal display device (Liquid Crystal) using the TFT array substrate manufactured by this manufacturing method. Display: hereinafter referred to as LCD).

  In recent years, electro-optical elements using liquid crystals have been actively applied to displays. In particular, TFT-LCDs having features such as portability, space saving, and high display quality have been widely put into practical use as display devices for notebook personal computers, monitors, televisions, and the like. A TFT-LCD generally has a liquid crystal disposed between a TFT array substrate having TFTs arranged in an array and a counter electrode substrate with a color filter on which a common electrode is formed. In the case of a transmissive liquid crystal display device, a polarizing plate is installed outside the two substrates, and a backlight is installed on the back.

  In the manufacture of a TFT array substrate in which a metal thin film or an insulating film is formed on an insulating substrate such as glass and the process of patterning this by photolithography and etching is repeated, it is formed on a lower layer film (insulating film). The adhesion force between the wiring and the electrode is greatly influenced by the state and shape of the lower layer film. For example, when contaminants such as particles, fats and oils, residues in the previous process are attached to the surface of the lower layer film, it is well known that the adhesion of the transparent conductive film (ITO) is reduced (Patent Document 1 and Patent Document 2). In particular, there is a problem that the adhesion strength is likely to decrease at a stepped portion of the lower layer film, and the etching solution or etching gas used during patterning processing of wiring and electrodes permeates the interface with the lower layer, resulting in disconnection failure and lowering the yield. was there. In order to avoid such a disconnection defect, conventionally, before forming a metal thin film or a transparent conductive film to be a wiring or an electrode, ultrasonic cleaning, brush cleaning, or the like is individually or combined on the film formation surface. Although cleaning is carried out, these methods are not effective enough, and mechanical damage is caused to the lower layer film, which may cause a decrease in product reliability.

As a cleaning method for solving the lack of adhesion of the transparent conductive film (ITO) due to contamination of the deposition surface of the substrate, for example, in Patent Document 1, a first cleaning solution is used in the color filter substrate cleaning method. A method of removing the residue of the cleaning solution or the rinse solution used in the first cleaning step by performing a second cleaning step of exposing the substrate to plasma discharged under atmospheric pressure after the cleaning step of ing. In Patent Document 2, in the method for producing a color filter, after first irradiating with ultraviolet rays, secondly, a brush is provided, and cleaning is performed in a bath using alkali and / or water as a treatment liquid. No. 3 is equipped with an ultrasonic oscillator and cleaning is performed in a bath using alkali and / or water as the processing solution. Fourth, the substrate is rinsed with a pure water shower, and the method of draining and drying with an air knife is presented. Has been.
JP 2002-282807 A JP 2001-108822 A

  However, the conventional cleaning method cannot completely remove contaminants on the substrate surface, and it has been difficult to prevent disconnection of a portion having a step in the lower layer film. Also, many cleaning solutions and cleaning methods for removing organic pollutants have been proposed in the past, but the lack of adhesion between the lower layer film (insulating film) and the wiring and electrodes has not been resolved sufficiently. Therefore, it has been demanded to analyze in detail the surface contaminants that cause insufficient adhesion, and to find a new cleaning method based on the analysis result.

  The present invention has been made to solve the above-described problems, and in manufacturing a TFT array substrate for a liquid crystal display device, insufficient adhesion of wiring and electrodes due to contamination of a deposition surface of the substrate. A TFT array substrate manufacturing method capable of eliminating the disconnection failure and eliminating the disconnection failure is obtained. Furthermore, by using a TFT array substrate manufactured by this manufacturing method, a highly reliable liquid crystal display device with excellent display quality can be obtained with a high yield.

The manufacturing method of the TFT array substrate according to the present invention includes a plurality of gate wirings formed on an insulating substrate and each having a gate electrode, a plurality of gate wirings formed so as to intersect the gate wiring, each having a source electrode, A method of manufacturing a TFT array substrate comprising a thin film transistor composed of a semiconductor layer and a source electrode and a drain electrode, and a pixel electrode electrically connected to the drain electrode, the gate wiring being formed. The first cleaning step performed on the film formation surface before forming the first metal thin film, the film formation before forming the second metal thin film for forming the source wiring and the drain electrode Including a second cleaning step performed on the surface and a third cleaning step performed on the deposition surface before forming the transparent conductive film for forming the pixel electrode. 1, at least one washing step of the second and third cleaning step, contaminants comprising fluorine reaction products adhering to the film-forming surface by using a solution containing TMAH (tetramethylammonium hydroxide) The removal process to remove is performed.

In addition, another TFT array substrate manufacturing method according to the present invention includes a plurality of gate wirings formed on an insulating substrate, each having a gate electrode, and a plurality of source wirings each having a source electrode formed so as to intersect the gate wiring. A TFT array substrate comprising a semiconductor layer provided on a gate electrode via a gate insulating film, a thin film transistor comprising a source electrode and a drain electrode, and a pixel electrode electrically connected to the drain electrode, Before the first metal thin film for forming the gate wiring is formed, the first cleaning process is performed on the film formation surface, and before the second metal thin film for forming the source wiring and the drain electrode is formed. A second cleaning step that is performed on the deposition surface, and a third cleaning step that is performed on the deposition surface before the transparent conductive film that forms the pixel electrode is deposited. A removal process for removing contaminants including fluorine-based reaction products attached to the film formation surface using ozone-dissolved water in at least one of the first, second, and third cleaning steps. Is to do.

Further, another TFT array substrate manufacturing method according to the present invention includes a plurality of gate wirings formed on an insulating substrate each having a gate electrode, and a plurality of source wirings each having a source electrode formed so as to intersect the gate wiring. A method for manufacturing a TFT array substrate comprising a wiring, a semiconductor layer provided on a gate electrode through a gate insulating film, a thin film transistor comprising a source electrode and a drain electrode, and a pixel electrode electrically connected to the drain electrode. Before the first metal thin film for forming the gate wiring is formed, the first cleaning process is performed on the deposition surface, before the second metal thin film for forming the source wiring and the drain electrode is formed. A second cleaning step performed on the film formation surface and a third cleaning process performed on the film formation surface before forming the transparent conductive film for forming the pixel electrode. And at least one of the first, second, and third cleaning steps, a removal process for removing contaminants including fluorine-based reaction products attached to the film formation surface using ozone gas Is to do.

The manufacturing method of the TFT array substrate of the present invention includes a solution containing TMAH (tetramethylammonium hydroxide), ozone-dissolved water, or a fluorine-containing reaction product attached to the film-forming surface of the substrate using ozone gas. By performing the removal process for removing the substance, the adhesion between the lower layer film (insulating film) of the TFT array substrate and the wirings and electrodes formed thereon can be improved, and disconnection defects can be reduced.

In the liquid crystal display device produced by the present invention, by performing the removal process for removing contaminants comprising fluorine reaction products adhering to the film-forming surface of the TFT array board, the lower film of the TFT array substrate It is possible to improve the adhesion between the (insulating film) and the wiring or electrode formed thereon, and to reduce the disconnection failure. For this reason, a highly reliable liquid crystal display device with excellent display quality can be obtained. It becomes possible to manufacture with a yield.

  Embodiments 1 to 4 which are the best modes for carrying out the present invention will be described below. First, the structure of the TFT array substrate for a liquid crystal display device manufactured in the first to fourth embodiments will be described with reference to FIG. FIG. 1 is a cross-sectional view showing the vicinity of a TFT portion of a TFT array substrate manufactured in the first to fourth embodiments, and FIG. 2 is a plan view showing one pixel of the TFT array substrate. 1 and 2, on a transparent insulating substrate 1 such as a glass substrate, a plurality of gate wirings 3 and auxiliary capacitance electrodes 4 each having a gate electrode 2 are formed of a first metal thin film. A gate insulating film 5 made of a first insulating film is formed on the gate electrode 2, the gate wiring 3 and the auxiliary capacitance electrode 4.

  A semiconductor active layer 6 made of an amorphous silicon film and an ohmic contact layer 7 made of an n + amorphous silicon film are formed on the gate electrode 2 via a gate insulating film 5, and further, a second metal thin film is formed thereon. A source electrode 8, a source wiring 9, and a drain electrode 10 are formed to form a TFT channel portion (semiconductor active layer corresponding portion) 11. A plurality of source lines 9 each having a source electrode 8 are formed so as to intersect with the gate line 3. Further, a passivation film 12 made of a second insulating film is formed, and a pixel drain electrode contact hole 13 penetrating to the surface of the drain electrode 10 is formed in the passivation film 12. The pixel electrode 14 made of a transparent conductive film is in electrical contact with the underlying drain electrode 10 through the pixel drain electrode contact hole 13. A liquid crystal is disposed between the TFT array substrate configured as described above and a counter electrode substrate (not shown) having a transparent electrode, a color filter, and the like, thereby completing a liquid crystal display device.

  The inventors of the present invention have attempted to consider the cause of a decrease in adhesion with a lower layer film that causes a wire or electrode disconnection failure in the TFT array substrate configured as described above. As a result, organic substances mainly composed of C (carbon) or CH (hydrocarbon) are well known as contaminants adhering to the surface of the substrate. From the results of surface analysis of the film surface, elements such as C (carbon), S (sulfur), and F (fluorine) are detected. It became clear that it was the cause. It is considered that these contaminations are caused by the environmental contamination from the place where the TFT array substrate is manufactured, that is, the clean room, or the residue of the resist components and their alterations used in the previous process.

  Further, for example, when a dry etching process using a gas containing fluorine is performed, a fluorine-based reaction product, for example, a silicon fluoride or a metal fluoride, which is a reaction product of an etching scattering element and fluorine is re-applied to the substrate. It has also been clarified by the present inventors that these adherent substances are substances that inhibit the aforementioned adhesion reduction and electrical continuity (conventional cleaning solutions and cleaning agents that remove organic pollutants). Several methods have been proposed, but none of the cleaning methods have been mentioned for removing fluorine-based reaction products).

  Further, it was found that even if the amount of these contaminants is very small, if there is a shape such as a stepped portion, it concentrates on that portion, so that disconnection failure is particularly likely to occur at the stepped portion. For example, as shown in FIG. 3, the gate electrode 2 and the drain electrode 10 have stepped portions 15 and 16 with patterns, respectively, and the gate insulating film 5 and the passivation film 12 are formed on the upper layers thereof. In such a place, the adhesive force between the insulating films 5 and 12 and the drain electrode 10 and the pixel electrode 14 formed on the insulating films 5 and 12 is likely to be reduced, which is a cause of the disconnection defects 18 and 19. It was.

  Therefore, in the first to fourth embodiments described below, in the manufacture of a TFT array substrate for a liquid crystal display device, a fluorine-based reaction product such as silicon fluoride or metal fluoride adhered to the film formation surface of the substrate. It is characterized by having a removal process for removing contaminants including substances. Specifically, the first cleaning step performed on the deposition surface before forming the first metal thin film for forming the gate electrode 2 and the gate wiring 3, the source electrode 8, the source wiring 9, and the drain A second cleaning step is performed on the deposition surface before the second metal thin film for forming the electrode 10 is formed, and the deposition is performed before the transparent conductive film for forming the pixel electrode 14 is deposited. In at least one of the third cleaning steps performed on the film surface, a removal process for removing contaminants including the fluorine-based reaction product is provided. In the removal treatment for removing contaminants including fluorine-based reaction products, a solution containing TMAH (tetramethylammonium hydroxide), ozone-dissolved water, or ozone gas is used.

Embodiment 1 FIG.
Hereinafter, a manufacturing method of the TFT array substrate according to the first embodiment of the present invention will be described with reference to FIG. The manufacturing method of the TFT array substrate according to the present embodiment is composed of five steps (A) to (E) as shown in FIG. 4, and includes five photolithography processes.

(A) First Step First, the transparent insulating substrate 1 such as a glass substrate is cleaned using pure water or hot sulfuric acid (first cleaning step, FIG. 4A). First, a first metal thin film is formed (FIG. 4B). Subsequently, the first metal thin film is patterned by the first photoengraving to form the gate electrode 2, the gate wiring 3, and the auxiliary capacitance electrode 4 (FIG. 4C). As the first metal thin film, Al, Ti, Cr, Cu, Nb, Mo, Ta, W, or an alloy containing these as a main component is used, and among these, Al, Cr having a particularly low specific resistance. It is preferable to use Mo, Mo or an alloy containing these as a main component. In this embodiment, Cr is deposited to a thickness of 200 nm by a sputtering method using a known Ar gas. Thereafter, etching is performed using a known solution containing cerium ammonium nitrate and perchloric acid (FIG. 4D), and the resist pattern is removed to form the gate electrode 2, the gate wiring 3, and the auxiliary capacitance electrode 4 (FIG. 4). 4 (e)).

(B) Second step After the substrate is cleaned with pure water (FIG. 4 (f)), a gate insulating film 5 which is a first insulating film made of SiN, a semiconductor active layer 6 made of amorphous silicon, and impurities are added. The ohmic contact layer 7 made of the n + type amorphous silicon is sequentially formed (FIG. 4G). Subsequently, the semiconductor active layer 6 and the ohmic contact layer 7 are formed by the second photoengraving from the pattern of the source electrode 8, the source wiring 9 and the drain electrode 10 formed by the portion where the thin film transistor is formed and the subsequent process. It is large and path to turning the continuous shape (FIG. 4 (h)). In the present embodiment, a silicon nitride film (SiN) is 400 nm as the gate insulating film 5 by using a chemical vapor deposition (CVD) method, an amorphous silicon film is 150 nm as the semiconductor active layer 6, and a phosphorus is used as the ohmic contact layer 7. An n + amorphous silicon film doped with as an impurity was sequentially formed to a thickness of 30 nm.

  Thereafter, the semiconductor active layer 6 and the ohmic contact layer 7 are etched by a dry etching method using a known fluorine-based gas (FIG. 4I). Further, the resist pattern was removed to form a transistor forming semiconductor pattern (semiconductor active layer 6, ohmic contact layer 7) (FIG. 4 (j)). Through the steps so far, the gate insulating film 5 made of SiN as the first insulating film and the ohmic contact layer 7 made of n + amorphous silicon are formed on the surface of the transparent insulating substrate 1. Further, a step portion 15 is formed by the pattern of the lower gate electrode 2, gate wiring 3 and auxiliary capacitance electrode 4.

(C) Third Step Next, in the second cleaning process, a removal process is performed to remove contaminants including fluorine-based reaction products attached to the film formation surface of the substrate. In this embodiment, in the removal treatment for removing contaminants including fluorine-based reaction products, a solution containing TMAH (tetramethylammonium hydroxide) is used, followed by washing with pure water, draining, and clean air. (Second cleaning step, FIG. 4 (k)). As the cleaning using TMAH, a method of immersing a substrate in a cleaning tank containing a TMAH solution or a shower method can be used. In the present embodiment, cleaning was performed by a shower method using a TMAH solution having a concentration of 2.4% set at a liquid temperature of 23 ° C.

  Subsequently, a second metal thin film is formed on the film formation surface cleaned in the second cleaning step (FIG. 4 (l)), and patterned by the third photoengraving to form the source electrode 8, A source wiring 9 and a drain electrode 10 are formed (FIG. 4M). As the second metal thin film, Al, Ti, Cr, Cu, Nb, Mo, Ta, W, or an alloy containing these as a main component can be used with a low electrical specific resistance. In particular, when Al or Cu having low resistance is used, it is difficult to obtain good electrical contact characteristics due to diffusion with the lower ohmic contact layer 7, so that Ti, Cr, Nb, Mo, Ta, W, or these It is preferable to use a laminated film of at least two layers formed of an alloy as a barrier layer in the lower layer. In this embodiment, Cr is deposited to a thickness of 200 nm by a sputtering method using a known Ar gas. Then, etching is performed using a known solution containing cerium ammonium nitrate and perchloric acid (FIG. 4 (n)), and further, a dry etching method using a known fluorine-based gas is used to form a gap between the source electrode 8 and the drain electrode 10. The ohmic contact layer is removed (FIG. 4 (o)). Subsequently, the resist pattern is removed to form the source electrode 8, the source wiring 9, the drain electrode 10, and the TFT channel portion 11 (FIG. 4 (p)).

(D) Fourth Step After the substrate is washed with pure water (FIG. 4 (q)), a second insulating film is formed to form a passivation film 12 (FIG. 4 (r)). Subsequently, by a fourth photoengraving, at least a contact hole penetrating to the surface of the drain electrode 10 of the second metal thin film, a contact hole penetrating to the gate wiring terminal surface of the first metal thin film, and a second metal A contact hole that penetrates to the surface of the thin film source wiring terminal is formed simultaneously (FIG. 4 (s)). In this embodiment mode, a chemical vapor deposition (CVD) method is used, and a silicon nitride film (SiN) is formed to a thickness of 300 nm as the second insulating film.

Thereafter, etching is performed by a dry etching method using a known fluorine-based gas (FIG. 4 (t)), the resist pattern is removed, the pixel drain electrode contact hole 13, the gate terminal portion contact hole (not shown), and the source terminal A part contact hole (not shown) is formed (FIG. 4 (u)). At this time, since the area of the opening of the contact hole is usually as small as several μm ² to several tens of μm ² , Si etched through a dry etching process or a fluoride compound in which a resist component and fluorine gas are combined is formed in the opening. It may re-adhere to the surface of the metal thin film. In this case, it is preferable to perform dry etching by mixing oxygen gas with fluorine-based gas, or to perform dry etching using oxygen gas, that is, oxygen plasma treatment after completion of the dry etching.

(E) Fifth Step Next, in the third cleaning step, the deposition surface of the substrate is cleaned with pure water (FIG. 4 (v)), and then a transparent conductive film is formed (FIG. 4 (w) )). Subsequently, by the fifth photolithography, the pixel electrode 14 electrically connected to the lower drain electrode 10 through the pixel drain electrode contact hole 13, the lower gate terminal portion, the lower source terminal portion, and the contact hole are formed. A terminal pad pattern that is electrically connected through the wiring is formed (FIG. 4 (x)). In this embodiment, an ITO film in which indium oxide (In ₂ O ₃ ) and tin oxide (SnO ₂ ) are mixed as a transparent conductive film is formed to a thickness of 100 nm by a sputtering method using a known Ar gas. did. Thereafter, etching is performed using a known solution containing hydrochloric acid and nitric acid (FIG. 4 (y)), and the resist pattern is removed to form a pixel electrode 14, a gate terminal pad, and a source terminal pad (not shown). 4 (z)).

  The TFT array substrate in the present embodiment is completed by the manufacturing method including the above five steps (A) to (E). In this embodiment, the resist removal shown in FIG. 4 (j) and the cleaning step using the TMAH solution shown in FIG. 4 (k) are performed separately. By using a processing apparatus having a configuration in which a TMAH solution cleaning tank is connected, the resist removal process and the TMAH solution cleaning process can be performed continuously in one step. According to such an apparatus configuration and processing method, the process can be simplified and the production capacity can be improved.

  As a comparative example of the present embodiment, in the second cleaning step performed on the deposition surface before the second metal thin film is formed, conventional pure water only is cleaned without using the TMAH solution. The TFT array substrate was completed and the number of disconnection defects was compared. As a result, the TFT array substrate manufactured in this embodiment has an average number of occurrences of disconnection defects 19 (see FIG. 3) in the step portions 16 of the source wiring 9 and the drain electrode 10 as compared with the TFT array substrate of the comparative example. About 60%.

  As described above, in the first embodiment of the present invention, in manufacturing the TFT array substrate including the above five steps (A) to (E) and performing the photoengraving five times, the source electrode 8 and the source wiring 9 and silicon fluoride adhering to the film formation surface in the second cleaning step performed on the film formation surface before forming the second metal thin film forming the drain electrode 10 Since the cleaning process using the TMAH solution was performed as a removal process for removing contaminants including fluorine-based reaction products such as, the adhesion between the lower layer film (gate insulating film 5) and the second metal thin film (Cr) is improved. This improved the disconnection failure due to insufficient adhesion between the lower layer film and the electrode or wiring made of the second metal thin film. This makes it possible to manufacture a highly reliable liquid crystal display device with excellent display quality and high yield.

Embodiment 2. FIG.
A method for manufacturing a TFT array substrate for a liquid crystal display device according to Embodiment 2 of the present invention will be described with reference to FIGS. The manufacturing method of the TFT array substrate according to the present embodiment is composed of four steps (A) to (D) as shown in FIG. 5, and includes four times of photoengraving.

(A) First Step First, the transparent insulating substrate 1 such as a glass substrate is cleaned using pure water or hot sulfuric acid (first cleaning step, FIG. 5A). First, a first metal thin film is formed (FIG. 5B). Subsequently, the gate electrode 2 by the first metal thin film by a first photolithography and patterned to form a gate line 3 and the auxiliary capacitance electrode 4 (FIG. 5 (c)). As the first metal thin film, Al, Ti, Cr, Cu, Nb, Mo, Ta, W, or an alloy containing these as a main component is used, and among these, Al, Cr having a particularly low specific resistance. It is preferable to use Mo, Mo or an alloy containing these as a main component. In this embodiment, Cr is deposited to a thickness of 200 nm by a sputtering method using a known Ar gas. Thereafter, etching is performed using a known solution containing ceric ammonium nitrate and perchloric acid (FIG. 5D), and the resist pattern is removed to form the gate electrode 2, the gate wiring 3, and the auxiliary capacitance electrode 4 (FIG. 5). 5 (e)).

(B) Second Step After cleaning the substrate with pure water (FIG. 5 (f)), a gate insulating film 5 as a first insulating film made of a silicon nitride film (SiN) and a semiconductor active layer made of amorphous silicon 6 and an ohmic contact layer 7 made of n + type amorphous silicon doped with impurities are sequentially formed (FIG. 5G). In this embodiment, a chemical vapor deposition (CVD) method is used to form a silicon nitride film as the gate insulating film 5 with a thickness of 400 nm, an amorphous silicon film as the semiconductor active layer 6 with a thickness of 150 nm, and an ohmic contact layer 7 with phosphorus as an impurity. The added n + amorphous silicon film was sequentially formed to a thickness of 30 nm.

  Subsequently, in the second cleaning process, a removal process is performed to remove contaminants including the fluorine-based reaction product attached to the film formation surface of the substrate. In this embodiment, in the removal treatment for removing contaminants including fluorine-based reaction products, a solution containing TMAH (tetramethylammonium hydroxide) is used, followed by washing with pure water, draining, and clean air. (2nd washing | cleaning process, FIG.5 (h)). As the cleaning using TMAH, a method of immersing a substrate in a cleaning tank containing a TMAH solution or a shower method can be used. In the present embodiment, cleaning was performed by a shower method using a TMAH solution having a concentration of 2.4% set at a liquid temperature of 23 ° C.

  Next, Cr is deposited to a thickness of 200 nm as a second metal thin film on the deposition target surface cleaned in the second cleaning step by a sputtering method using a known Ar gas (FIG. 5 (i)). )). Thereafter, a resist pattern for forming the TFT portion semiconductor film, the source wiring, the drain electrode, and the TFT channel portion is formed by the second photolithography (FIG. 5J). As a suitable example of the resist pattern formed by the second photolithography, in this embodiment, as shown in FIG. 6A, a novolak resin-based positive resist is first formed to a thickness of about 1.6 μm by a spin coater. And a pre-bake at 120 ° C. for about 90 seconds, and then a resist pattern 17 for forming a pattern of the TFT portion semiconductor film (semiconductor active layer 6 and ohmic contact layer 7), source wiring 9 and drain electrode 10 is formed. The first exposure to be formed is performed. Subsequently, the second exposure for forming the first portion 17b of the resist pattern for forming the source electrode 8 and the channel portion 11 of the TFT is performed. The first exposure portion 17b of the resist pattern 17 does not completely remove the resist, but the second exposure is a half exposure with an exposure amount of about 40% of the first exposure so that the first portion 17b remains with a thin film thickness. went.

  After the two-stage exposure as described above and development with an organic alkaline developer, post-baking is performed at 120 ° C. for about 180 seconds. As shown in FIG. Resist having at least three or more different film thicknesses including a portion 17b, a second portion 17a thicker than the first portion and positioned above the gate electrode pattern 2, and a third portion 17c thicker than the second portion. A pattern 17 is formed. In the present embodiment, the resist pattern is formed so that the thickness of the first portion 17b is about 0.4 μm, the thickness of the second portion 17a is about 1.4 μm, and the thickness of the third portion 17c is about 1.6 μm. 17 was formed.

  In this embodiment, the two-step exposure is performed. For example, resist patterns having different film thicknesses are formed by batch exposure using a halftone pattern mask in which the transmission amount of the first portion 17b is about 40%. You can also In the halftone pattern mask, a filter film that reduces the amount of light transmitted in a wavelength region (usually 350 nm to 450 nm) used for exposure to about 40% is formed in a pattern portion located in the first portion 17b, or a slit-shaped pattern. It can be formed by utilizing the optical diffraction phenomenon. When such a halftone pattern mask is used, the resist patterns 17a, 17b, and 17c shown in FIG. 6B can be collectively formed by a single exposure, so that the process can be simplified.

  Next, a first etching is performed on the second metal thin film made of Cr using a known solution containing cerium ammonium nitrate and perchloric acid (FIG. 5 (k)). Furthermore, a semiconductor film made of amorphous silicon and an ohmic contact film made of n + amorphous silicon are etched using a known dry etching method using a fluorine-based gas to obtain a TFT portion semiconductor film (semiconductor active layer 6, ohmic contact layer 7), A source wiring 9 and a drain electrode 10 are formed (FIG. 5L). Next, the resist pattern is etched to remove the first portion 17b of the resist pattern and leave the second portion 17a and the third portion 17c by resist ashing using a known oxygen plasma, as shown in FIG. A resist pattern 17 as shown is formed (FIG. 5 (m)).

  Next, a second etching is performed on the second metal thin film located in the first portion of the resist pattern removed using a known solution containing cerium ammonium nitrate and perchloric acid (FIG. 5 (n)). ). Further, after removing the ohmic contact layer by using a dry etching method using a known fluorine-based gas (FIG. 5 (o)), the resist pattern is removed, and the source electrode 8, source wiring 9, drain electrode 10 and TFT are removed. Channel portion 11 is formed (FIG. 5 (p)).

(C) Third Step After the substrate is cleaned with pure water (FIG. 5 (q)), a second insulating film is formed to form a passivation film 12 (FIG. 5 (r)). Subsequently, by a third photoengraving, at least a contact hole that penetrates to the surface of the drain electrode 10 in the second metal thin film, a contact hole that penetrates to the gate wiring terminal surface of the first metal thin film, and a second metal A contact hole penetrating to the surface of the thin film source wiring terminal is formed simultaneously (FIG. 5 (s)). In this embodiment mode, a chemical vapor deposition (CVD) method is used, and a silicon nitride film (SiN) is formed to a thickness of 300 nm as the second insulating film.

Thereafter, etching is performed by a dry etching method using a known fluorine-based gas (FIG. 5 (t)), the resist pattern is removed, the pixel drain electrode contact hole 13, the gate terminal portion contact hole (not shown), and the source terminal A contact hole (not shown) is formed (FIG. 5 (u)). At this time, since the area of the opening of the contact hole is usually as small as several μm ² to several tens of μm ² , Si that is etched through a dry etching process or a fluoride compound in which a resist component is combined with fluorine gas is used as the metal in the opening. It may reattach to the thin film surface. In this case, it is preferable to perform dry etching by mixing oxygen gas with fluorine-based gas, or to perform dry etching using oxygen gas, that is, oxygen plasma treatment after completion of the dry etching.

(D) Fourth Step After the substrate is cleaned with pure water in the third cleaning step (FIG. 5 (v)), a transparent conductive film is formed (FIG. 5 (w)). Subsequently, by the fourth photoengraving, the pixel electrode 14 electrically connected to the lower drain electrode 10 through the pixel drain electrode contact hole 13, the lower gate terminal portion and the lower source terminal portion, and the contact hole are formed. A terminal pad pattern that is electrically connected through the wiring is formed (FIG. 5 (x)). In this embodiment, an ITO film in which indium oxide (In ₂ O ₃ ) and tin oxide (SnO ₂ ) are mixed as a transparent conductive film is formed to a thickness of 100 nm by a sputtering method using a known Ar gas. did. Thereafter, etching is performed using a known solution containing hydrochloric acid and nitric acid (FIG. 5 (y)), and the resist pattern is removed to form a pixel electrode 14, a gate terminal pad, and a source terminal pad (not shown). 5 (z)).

  The TFT array substrate in the present embodiment is completed by the manufacturing method including the above four steps (A) to (D). In the present embodiment, the number of times of photoengraving can be reduced by one as compared with the first embodiment, so that the production capacity is improved. The TFT array substrate obtained by this embodiment is subjected to severe conditions against disconnection defects because the wet etching process is performed twice in total for the first time and the second time for the second metal thin film. Nevertheless, the occurrence rate could be kept low.

  As a comparative example of the present embodiment, in the second cleaning step performed on the deposition surface before the second metal thin film is formed, conventional pure water only is cleaned without using the TMAH solution. The TFT array substrate was completed and the number of disconnection defects was compared. As a result, the TFT array substrate manufactured in this embodiment has an average number of occurrences of disconnection defects 19 (see FIG. 3) in the step portions 16 of the source wiring 9 and the drain electrode 10 as compared with the TFT array substrate of the comparative example. About 60%.

  As described above, in the second embodiment of the present invention, in manufacturing a TFT array substrate including the four steps (A) to (D) as described above and performing photoengraving four times, the source electrode 8 and the source wiring 9 and silicon fluoride adhering to the film formation surface in the second cleaning step performed on the film formation surface before forming the second metal thin film forming the drain electrode 10 Since the cleaning process using the TMAH solution was performed as a removal process for removing contaminants including fluorine-based reaction products such as, the adhesion between the lower layer film (gate insulating film 5) and the second metal thin film (Cr) is improved. This improved the disconnection failure due to insufficient adhesion between the lower layer film and the electrode or wiring made of the second metal thin film. This makes it possible to manufacture a highly reliable liquid crystal display device with excellent display quality and high yield.

  In the first embodiment and the second embodiment, the concentration of the TMAH solution used in the second cleaning process performed on the deposition surface before the second metal thin film is formed is 2.4. However, the concentration of the TMAH solution is not limited to this. Actually, it is preferably carried out in the concentration range of 0.1% to 3.0%, and may be determined to an arbitrary value while confirming the transition of the occurrence rate of disconnection failure. In particular, when an Al-based alloy having poor alkali chemical resistance is used as the lower first metal thin film, it is preferable to use a low-concentration TMAH solution in order to prevent corrosion due to solution penetration during cleaning. For example, when an AlNd alloy in which 10 wt% or less of Nd is added to Al is used as the first metal thin film, cleaning is performed using a 0.1% to 1.5% TMAH solution. Good results were obtained in reducing the disconnection failure of the second metal thin film without causing corrosion of the AlNd alloy.

Embodiment 3 FIG.
In the first embodiment and the second embodiment, the second cleaning step (FIG. 4 (k) and FIG. 5 (h)) is performed on the film formation surface before forming the second metal thin film. In this embodiment, cleaning using a TMAH solution is performed as a removal process for removing contaminants including a fluorine-based reaction product. In this embodiment, cleaning using ozone-dissolved water or ozone gas is performed instead of the TMAH solution. An example will be described. Other steps are the same as those in the first embodiment or the second embodiment, and the description thereof is omitted here.

  In the present embodiment, after completing the steps up to FIG. 4J or FIG. 5G, ozone-dissolved water containing about 5 mg / liter of ozone is ejected from the shower nozzle onto the substrate as the second cleaning step. Shower-type wet ozone cleaning was performed for 10 seconds to 80 seconds. Subsequently, it was washed with pure water, drained and air-dried. The ozone-dissolved water was prepared using a known ozone generator and ozone dissolver. Thereafter, as described in detail in the first and second embodiments, the steps after FIG. 4 (1) or FIG. 5 (i) were performed to complete the TFT array substrate according to the present embodiment.

  In the TFT array substrate obtained by this embodiment, the disconnection failure of the source wiring 9 in the step portion 15 hardly occurred, and an extremely good result was obtained. In this embodiment, the concentration of ozone-dissolved water is 5 mg / liter, but the concentration of ozone-dissolved water is not limited to this. However, in order to sufficiently obtain the effects of the present invention, dissolved water containing at least 0.1 mg / liter or more of ozone is preferable.

  In addition, the wet ozone cleaning as described above does not cause a problem when Cr is used as the first metal thin film formed in the lower layer. For example, Al, Al alloy, Mo, Mo alloy In the case where a metal having poor resistance to acid is used as described above, there is a possibility that corrosion disconnection may occur in cleaning of ozone-dissolved water having strong oxide. In such a case, it is preferable that the ozone-dissolved water is not brought into direct contact with the substrate, but the substrate is placed in a gas containing ozone gas and the cleaning process is performed by bringing water vapor into contact therewith. For example, a cleaning method in the case where an Al alloy added with 10 wt% or less of Nd is used as the first metal thin film and a Mo alloy added with 15 wt% or less of Nb will be described below.

  These substrates are placed in an ozone gas atmosphere in the second cleaning step, and pure water that has been heated and vaporized is sprayed from the nozzles onto the substrate to perform an ozone gas cleaning process. Thereafter, the same process as in the first and second embodiments was performed to complete the TFT array substrate. According to this method, good results were obtained that the first metal thin film made of AlNd and MoNb was not corroded, and the disconnection defect 18 of the second metal thin film in the step portion 15 was hardly generated. . In this embodiment, the ozone gas atmosphere is supplied with ozone gas at a flow rate of 1 liter / min to 5 liter / min and the vapor spraying time is about 60 seconds. However, the processing conditions are not limited to this. The first metal thin film can be arbitrarily determined as long as it does not corrode. Further, a reducing substance such as hydrogen gas or alcohol may be mixed during ozone gas cleaning. In this case, since the effect which prevents the oxidative corrosion of Al type alloy or Mo type alloy is acquired, it is further more preferable.

  Thus, in the third embodiment of the present invention, the five steps (A) to (E) as in the first embodiment, or the four steps (A) to (D) as in the second embodiment. ) Including a second cleaning step performed on the deposition surface before the second metal thin film for forming the source electrode 8, the source wiring 9, and the drain electrode 10 is formed. As a removal process for removing contaminants including fluorine-based reaction products such as silicon fluoride or metal fluoride adhering to the film formation surface, cleaning using ozone-dissolved water or ozone gas was performed. It is possible to improve the adhesion between the gate insulating film 5) and the second metal thin film (Cr) and reduce the disconnection failure due to the insufficient adhesion between the lower layer film and the electrode or wiring made of the second metal thin film. did it. This makes it possible to manufacture a highly reliable liquid crystal display device with excellent display quality and high yield.

Embodiment 4 FIG.
In Embodiments 1 to 3 above, contaminants including fluorine-based reaction products are removed in the second cleaning step performed on the film formation surface before forming the second metal thin film. Cleaning using a TMAH solution, ozone-dissolved water, or ozone gas was performed. Further, in the present embodiment, not only the second cleaning process but also the third cleaning process performed on the film formation surface before forming the transparent conductive film includes the fluorine-based reaction product. An example of cleaning using a TMAH solution, ozone-dissolved water, or ozone gas, which is a removal process for removing contaminants, will be described.

  That is, in the present embodiment, when the TFT array substrate is completed by photolithography five times as in the first embodiment, the third cleaning step in FIG. In the case where the TFT array substrate is completed by four times of photoengraving, the TMAH is performed under the same conditions as those shown in the first to third embodiments in the third cleaning step of FIG. Cleaning is performed using any one of a solution, ozone-dissolved water, and ozone gas.

As a result, the electrical resistance value of the interface contact portion between the lower layer drain electrode 10 made of Cr and the pixel electrode 14 made of ITO through the pixel drain electrode contact hole 13 is the case where cleaning with only pure water is performed (comparison) Compared to Example), good results were obtained. Comparing the contact resistance values of the upper layer (ITO) and the lower layer (Cr) in the pixel drain electrode contact hole 13 having an opening with an area of about 50 μm ² , 50 Ω to 10 KOI in the case of normal pure water cleaning alone. In contrast, the TFT array substrate obtained according to the present embodiment showed a stable value as low as 50 ohms to 100 ohms.

  In addition, as a result of analyzing the cross section of the interface between ITO and Cr for both the comparative example and the present embodiment, the fluorine element was detected from the interface when only pure water was washed, and the thickness was about 5 nm. Whereas a fluorine-based reaction product was present, no fluorine-based reaction product was detected in the present embodiment. From this, it was confirmed that surface contamination including fluorine-based reaction products adhered to the film formation surface was removed when cleaning with TMAH solution, ozone-dissolved water or ozone gas was performed. As a result, it has been clarified that the effect of improving the adhesion of wiring and electrodes and reducing the contact resistance is obtained.

  Further, according to the present embodiment, after dry etching using a fluorine-based gas at the time of forming the pixel drain electrode contact hole 13 as shown in the first and second embodiments, it is reattached to the substrate surface. Thus, it is possible to omit the oxygen plasma treatment that has been performed to remove the fluorinated compound.

The transparent conductive film formed in the fourth embodiment 1 embodiment of the above-described embodiment, ITO is not limited to (indium + tin oxide), indium oxide (In 2 O _3), tin oxide ( SnO ₂ ), zinc oxide (ZnO), or a mixture thereof may be used. For example, when using IZO in which zinc oxide is mixed with indium oxide, a weak acid such as oxalic acid is used as an etching solution instead of strong acid such as hydrochloric acid and nitric acid as in the ITO film of the above embodiment. Therefore, when an Al-based or Mo-based alloy having poor resistance to acid chemicals is used for the first and second metal thin films, corrosion disconnection due to penetration of the chemicals can be prevented, which is preferable. The indium oxide, tin oxide, if less transmittance and specific resistance characteristics than the oxygen composition stoichiometry of their respective sputter film of the zinc oxide is defective, O ₂ gas Ya well Ar as a sputtering gas It is preferable to form a film using a gas mixed with H ₂ O.

  As described above, in the first to third embodiments, the contaminant containing the fluorine-based reaction product is removed in the second cleaning step performed on the film formation surface before forming the second metal thin film. Further, in the fourth embodiment, in addition to the second cleaning step, the fluorine treatment is also performed in the third cleaning step performed on the film formation surface before forming the transparent conductive film. An example is shown in which a removal process for removing contaminants including reaction products is performed. However, the manufacturing method of the TFT array substrate according to the present invention is not limited to these embodiments, and at least one of the first, second, and third cleaning steps generates a fluorine-based reaction. The removal process which removes the contaminant containing a thing is performed. That is, before the first metal thin film for forming the gate electrode 2 and the gate wiring 3 is formed, contaminants including fluorine-based reaction products are also removed in the first cleaning step performed on the film formation surface. The removal process may be performed. In each of the first, second, and third cleaning steps, any of TMAH solution, ozone-dissolved water, and ozone gas can be freely selected.

  Furthermore, the present invention is not limited to the device structure described in the above embodiment, but includes, for example, a device structure of an IPS (In Plane Switching) mode of a horizontal electric field drive including a large number of metal wiring regions including a gate and a source electrode. Can be applied, and the effect of improving the adhesion of the metal thin film and the transparent conductive film can be obtained.

The TFT array substrate manufactured according to the present invention is used for a liquid crystal display device, and can be used for a display device or monitor of a personal computer, a display device of a television, or the like.

It is sectional drawing which shows the structure of the TFT array substrate for liquid crystal display devices which concerns on Embodiment 1-4 of this invention. It is a top view which shows the structure of the TFT array substrate for liquid crystal display devices which concerns on Embodiment 1-4 of this invention. It is sectional drawing which shows the structure of the TFT array substrate for liquid crystal display devices which concerns on Embodiment 1-4 of this invention. It is a flowchart which shows the manufacturing process of the TFT array substrate for liquid crystal display devices which concerns on Embodiment 1 of this invention. It is a flowchart which shows the manufacturing process of the TFT array substrate for liquid crystal display devices which concerns on Embodiment 2 of this invention. It is sectional drawing which shows the manufacturing process of the TFT array substrate for liquid crystal display devices which concerns on Embodiment 2 of this invention.

DESCRIPTION OF SYMBOLS 1 Transparent conductive substrate, 2 1st metal thin film (gate electrode), 3 1st metal thin film (gate wiring), 4 1st metal thin film (auxiliary capacitance electrode), 5 1st insulating film (gate insulating film) ), 6 Semiconductor active layer, 7 Ohmic contact film, 8 Second metal thin film (source electrode), 9 Second metal thin film (source wiring), 10 Second metal thin film (drain electrode), 11 Channel portion of TFT , 12 Second insulating film (passivation film), 13 pixel drain electrode contact hole, 14 transparent conductive film (pixel electrode), 15 step due to gate electrode, 16 step due to drain electrode, 17 resist pattern, 18, 19 step portion Disconnection failure.

Claims (3)

A plurality of gate wirings formed on an insulating substrate, each having a gate electrode, a plurality of source wirings each having a source electrode crossing the gate wiring, and provided on the gate electrode via a gate insulating film A method of manufacturing a TFT array substrate comprising a semiconductor layer, a thin film transistor comprising a source electrode and a drain electrode, and a pixel electrode electrically connected to the drain electrode, comprising: a first metal thin film forming the gate wiring; A first cleaning process is performed on the deposition surface before film formation, and is performed on the deposition surface before forming the second metal thin film for forming the source wiring and the drain electrode. Including a second cleaning step and a third cleaning step performed on the deposition surface before forming the transparent conductive film for forming the pixel electrode. In at least one washing step of the third cleaning process, removing process for removing contaminants comprising the fluorine-based reaction products adhering to the film-forming surface by using a solution containing TMAH (tetramethylammonium hydroxide) A method for manufacturing a TFT array substrate, comprising: A plurality of gate wirings formed on an insulating substrate and each having a gate electrode, a plurality of source wirings each having a source electrode crossing the gate wiring, and provided on the gate electrode via a gate insulating film A method of manufacturing a TFT array substrate comprising a semiconductor layer, a thin film transistor comprising a source electrode and a drain electrode, and a pixel electrode electrically connected to the drain electrode, comprising: a first metal thin film forming the gate wiring; A first cleaning process is performed on the deposition surface before film formation, and is performed on the deposition surface before forming the second metal thin film for forming the source wiring and the drain electrode. Including a second cleaning step and a third cleaning step performed on the deposition surface before forming the transparent conductive film for forming the pixel electrode. In a third of the at least one washing step of the washing process, TFT, which comprises carrying out the removal process to remove contaminants containing the fluorine-based reaction products adhering to the film-forming surface with ozone dissolved water A method for manufacturing an array substrate. A plurality of gate wirings formed on an insulating substrate and each having a gate electrode, a plurality of source wirings each having a source electrode crossing the gate wiring, and provided on the gate electrode via a gate insulating film A method of manufacturing a TFT array substrate comprising a semiconductor layer, a thin film transistor comprising a source electrode and a drain electrode, and a pixel electrode electrically connected to the drain electrode, comprising: a first metal thin film forming the gate wiring; A first cleaning process is performed on the deposition surface before film formation, and is performed on the deposition surface before forming the second metal thin film for forming the source wiring and the drain electrode. Including a second cleaning step and a third cleaning step performed on the deposition surface before forming the transparent conductive film for forming the pixel electrode. The third at least one washing step of the washing process, TFT array substrate, which comprises carrying out the removal process to remove contaminants containing the fluorine-based reaction products adhering to the film-forming surface by using an ozone gas Manufacturing method.

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