JP2004112363A - Image forming device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To execute a plurality of image signal input/output operations effectively. <P>SOLUTION: There is provided an image forming device comprising a control means for executing processes based on a priority, and a specifying means for specifying the priority of an image signal input/output operation. According to the control means, when a plurality of image signal input/output operation requests are received (step 110), the received requests are searched for a process of high priority (step 111) to determine whether a process on execution can be interrupted or not (step 112). If the interruption is possible, the priority of the process, i.e., image signal input/output operation, on execution is compared to that of the received operation request of high priority (step 113). When the priority of the process on execution is lower, it is interrupted (step 114) to allow the received operation request to be executed (step 115) first, which is followed by the resumption of the interrupted process (step 116). If the interruption is impossible, or the priority of the process on execution is higher, it is sustained. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an image forming apparatus, such as a digital copying machine, a facsimile, and a printer, that can efficiently perform input / output operations of image signals.
[0002]
[Prior art]
2. Description of the Related Art In recent years, digitalization of copiers has been progressing, and processing and editing using an image memory have become active. Among them, there is a function called an electronic sort in which the image data of a plurality of documents is stored in a memory so that a designated number of copies are collectively copied and output to eliminate the sorting operation. In order to store a plurality of image data and store the image data as it is in the semiconductor memory, a memory corresponding to the data amount of the number of stored images is required. Structures and methods shown in (1) to (3) are generally used.
[0003]
1. A semiconductor memory and a storage memory are used, and a secondary storage device such as a hard disk which is less expensive than the semiconductor memory is used as the storage memory.
2. A semiconductor memory is used as a storage memory, image data is compressed using a compression process, and the total amount of memory is reduced by reducing the amount of data per sheet.
3. A plurality of image input / output units (for example, an image scanner, a printer controller, a file server, a FAX controller, etc.) share the same image memory.
[0004]
In order to execute input / output of image data to / from an image memory, a memory controller (hereinafter, referred to as a DMA controller) using a DMA (Direct Memory Access) data transfer method is often used (for example, see Patents). References 1 and 2). The DMA controller transfers data to a specific area of the image memory based on memory area management information called a descriptor. It is also possible to transfer data by dividing a memory area where one image is stored into a plurality of descriptors. For example, by using an image memory in the form of a ring buffer, a memory capacity smaller than the capacity of image data can be obtained. In some cases, input / output of image data is executed.
[0005]
In the memory control using the DMA controller, the progress (start, end) of data transfer specified by each descriptor is controlled, and the execution timing of data transfer is controlled (interrupting or resuming data transfer in the middle of the image memory area). And the like, so that the degree of freedom in controlling the timing of data transfer of a semiconductor memory connected to a DMA controller or a large-capacity secondary storage device is high, and the range of application is wide.
[0006]
As described above, when a secondary storage device such as a hard disk, which is less expensive than a semiconductor memory, is used as a storage memory, a plurality of data transfers (data write / read operations) cannot normally be performed on a single storage device. By dividing the data transfer unit to the secondary storage device using the descriptor of the DMA controller and executing the data transfer in a time-division manner, it is possible to execute a plurality of data transfer operations as if they were being executed in parallel. General.
[0007]
However, when such time-division processing is used, the time required for data transfer is not shortened. Therefore, minimizing the time required for inputting / outputting image data as in an image forming apparatus can reduce the productivity of the apparatus. If it does, performing the time-sharing process may, on the contrary, cause a decrease in productivity. Therefore, a configuration is adopted in which image data is compressed to reduce the amount of data transfer, or a secondary storage device with a high data transfer speed is mounted to shorten the time required for data transfer to the secondary storage device. Was. Conventionally, for reasons of simplification of memory control, the resources of the secondary storage device are not synchronized with the image data input / output operation using the image input / output means but are actively performed in a time-division manner. Means for occupying and transferring data has been used.
[0008]
The conventional secondary storage device has a lower speed for transferring the image data of the semiconductor memory to the secondary storage device than the image data transfer speed from the image input / output means to the semiconductor memory, and the image data compression speed is lower. Is performed, the data processing capacity of the secondary storage device is reduced, and since there is no difference between the data processing speed between the image input / output means and the semiconductor memory, the data transfer processing between the semiconductor memory and the secondary storage device ( Independently and optimally controlling transfer timing control (including data conversion processing such as data compression), the degree of improvement in productivity of the image forming apparatus has not been very high.
[0009]
However, in the above problem, the transfer processing speed of the secondary storage device such as a hard disk has been improved year by year, and the degree of improvement in productivity has been increased by optimal control. Reading becomes possible, the processing capability of the image input / output means is improved, and in order to achieve productivity, mechanical constraints arise in which productivity cannot be realized unless the document feeding process of the image input device is operated at non-intervals. There is also a model, and not only memory timing control after data transfer from the image input unit but also a preliminary prediction notifying unit for the image input unit is provided, and image input is performed based on conditions such as the current state of the memory control and the characteristics of the storage device. Means for determining whether or not document transport non-interval control is possible, and performs switching processing of document transport interval and non-interval control on the image input device side. Functions, such as has become necessary.
[0010]
[Patent Document 1]
JP-A-6-103225 [Patent Document 2]
JP 2000-158724 A
[Problems to be solved by the invention]
With the advance of technology in recent years, the data transfer speed of a large-capacity storage device such as a hard disk, and the data compression rate and processing speed of a data compression unit have been remarkably improved. In an image forming apparatus in which such a large-capacity storage device can be connected as a secondary storage device, the data transfer speed for the secondary storage device is compared with the data input and output speed of the connected image input / output means. May be faster. For this reason, in the case of having a configuration in which input and output of a plurality of image signals can be performed simultaneously and in parallel, how efficiently image signal data input (save) and output (read) processing to the secondary storage device is performed. This is a problem in improving the productivity of the image forming apparatus. In a situation where the image input / output means in the image forming apparatus is extremely diverse, it is difficult to secure the productivity by maximizing the capabilities of the storage device and the data compression means in the conventional memory control.
[0012]
Further, in the image forming apparatus, there is a case where a restriction on processing time occurs. For example, in the facsimile transmission process, since there is a rule in the data transfer time in the protocol of data transfer using a telephone line, if the data transmission is not performed within a predetermined time, the telephone line is disconnected and the data transfer is abnormal. Become. In a case where a color image forming apparatus has a configuration in which a color image is obtained by outputting a plurality of color image data at regular intervals and superimposing the image data, the image data stored in the secondary storage device is determined. If it is not possible to read out and output within the allotted time, a color image cannot be formed, or productivity will be significantly reduced.
[0013]
SUMMARY OF THE INVENTION The present invention has been made in view of such a situation, and a memory control method using DMA is applied so that a data transfer operation process can be efficiently controlled according to the processing capability of a storage device. It is an object to provide an image forming apparatus having high reliability.
[0014]
Further, according to the present invention, optimal image input / output processing is performed in accordance with the processing time conditions and the image signal transfer speed between the image input / output means and the storage device determined by the configuration of the image input / output means and its peripheral control device. It is an object to provide a possible image forming apparatus.
[0015]
[Means for Solving the Problems]
That is, according to the first aspect of the present invention, an image input unit, an image output unit, and an image signal input from the image input unit are stored in a primary storage unit, and the image signal stored in the primary storage unit is stored in a primary storage unit. Means for storing the image signal stored in the secondary storage unit, storing the image signal in the primary storage unit, and outputting the image signal stored in the primary storage unit to the image output unit; And a means for designating a priority for each image signal input / output operation request.
[0016]
According to the first aspect of the present invention, when a request for an input / output operation of an image signal is made, by specifying the priority thereof, a series of image signal input / output operations can be efficiently executed based on the priority. It is possible to efficiently control the input / output operation of the image signal according to the processing capability of the device.
[0017]
According to a second aspect of the present invention, in the image forming apparatus of the first aspect, a means for receiving a plurality of image signal input / output operation requests, and a plurality of image signal input / output operation requests, each having a designated priority. An order control means for determining a processing order based on the image signal input / output operation, wherein the priority of the image signal input / output operation whose processing order is determined by the order control means is higher than the priority of the image signal input / output operation being executed; and When the currently executed image signal input / output operation can be interrupted, the currently executed image signal input / output operation is interrupted, and the first image signal input / output operation in the processing order is started. An interrupt / resume control unit for restarting the interrupted image signal input / output operation after the operation is completed.
[0018]
According to the invention of claim 2, in response to a plurality of image signal input / output operation execution requests, the image signal input / output operation having the highest priority is extracted based on the specified priority. When the priority is higher than the priority of the image signal input / output operation being executed and the image signal input / output operation being executed can be interrupted, the image signal input / output operation being executed is interrupted and the requested image signal is interrupted. The input / output operation is interrupted, and after this processing is completed, the interrupted image signal input / output operation is controlled to be restarted. This makes it possible to reduce the processing time of the image signal input / output operation with high priority. It should be noted that information on whether or not the image signal input / output operation being executed can be interrupted may be input via the specifying unit.
[0019]
According to a third aspect of the present invention, in the image forming apparatus of the second aspect, there is provided a means for selecting whether or not to perform control by the sequence control means and the interruption / resumption control means. This makes it possible to use the processing order control method based on the priority as needed.
[0020]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings. Here, a digital copying machine will be described as an example of an image forming apparatus, but the image forming apparatus of the present invention is not limited to a digital copying machine.
[0021]
FIG. 1 shows a basic configuration of a digital copying machine according to an embodiment of the present invention. A reading unit 1 for reading an image, an image forming unit 2 for forming an image on a recording sheet, and storing image data. A storage unit 3, an operation unit 4 operated by an operator, and a system control unit 5 for controlling each unit based on operation information from the operation unit 4 are provided. Further, the FAX unit 6 can be switched via a selector unit 7. It is connected.
[0022]
In the above configuration, the reading process of the reading unit 1 and the image forming process of the image forming unit 2 will be briefly described. In the reading unit 1, the original A is scanned and exposed by an exposure lamp 12 movable along an original table 11, and the reflected light is subjected to photoelectric conversion by a CCD (image sensor) 13, and an electric signal corresponding to the intensity of light is output. I do. The electric signal is subjected to processing such as shading correction by an IPU (image processing unit) 14 and A / D-converted into an 8-bit digital signal. Further, image processing such as scaling processing and dither processing is performed. At the same time, the image signal is sent to the image forming unit 2. FIG. 2 is a diagram of the document table 11 viewed from above. The scanner control unit 15 performs detection of various sensors, controls a drive motor and the like, and sets various parameters in the IPU 14 in order to execute the above process. The above is the reading process.
[0023]
The image forming unit 2 writes the sent image data into the writing unit 16, and rotates the photoreceptor 18, which is uniformly charged by the charging unit 17, and rotates at a constant speed, by the laser light modulated by the image data from the writing unit 16. Exposure with light. An electrostatic latent image is formed on the photoreceptor 18, and is developed into a toner image by developing the electrostatic latent image with toner by the developing device 19. The recording paper B, which has been fed in advance from the paper feed tray 21 by the paper feed roller 20 and has been waiting at the registration rollers 22, is conveyed at a timing to the photoconductor 18, and the toner on the photoconductor 18 is transferred by the transfer charger 23. The recording paper B is electrostatically transferred to the recording paper B, and the recording paper B is separated from the photoconductor 18 by the separation charger 24. Thereafter, the toner image on the recording paper B is heated and fixed by the fixing device 25, and is discharged to a discharge tray by a discharge roller 26. On the other hand, the toner image remaining on the photoconductor 18 after the electrostatic transfer is pressed against the photoconductor 18 by the cleaning device 27 to be removed, and the photoconductor 18 is discharged by the discharging charger 28. The plotter control unit 29 detects various sensors and controls a drive motor and the like in order to execute the above process. The above is the image forming process.
[0024]
Here, the state of the image synchronization signal output from the IPU 14 of the reading unit 1 will be described with reference to FIG. The image synchronization signal includes a frame gate signal (/ FGATE), a line synchronization signal (/ LSYNC), and a pixel synchronization signal (PCLK). The frame gate signal (/ FGATE) is a signal indicating an image effective range for an image area in the sub-scanning direction, and image data is valid while this signal is at a low level (low active). The signal / FGATE is asserted or negated at the falling edge of the line synchronization signal (/ LSYNC). / LSYNC is asserted for a predetermined number of clocks at the rising edge of the pixel synchronization signal (PCLK), and after the rising of this signal, the image data in the main scanning direction becomes valid after a predetermined clock. The transmitted image data is one for one cycle of PCLK, and is, for example, divided into 400 DPI equivalents from the arrow portion in FIG. The image data is sent out as raster format data, starting from the arrow. The effective sub-scanning range of image data is usually determined by the size of the recording paper.
[0025]
The system control unit 5 detects the input state of the operation unit 4 by the operator, and sets various parameters to the reading unit 1, the storage unit 3, the image forming unit 2, and the facsimile unit 6, and sends a process execution instruction through communication. Do. The state of the entire system is displayed on the operation unit 4. An instruction to the system control unit 5 is made by a key input to the operation unit 4 by the operator.
[0026]
In accordance with an instruction from the system control unit 5, the FAX unit 6 performs binary compression of the transmitted image data based on G3 and G4 FAX data transfer rules, and transfers the image data to a telephone line. The data transferred from the telephone line to the FAX unit 6 is restored to binary image data, sent to the writing unit 16 of the image forming unit 2, and visualized.
[0027]
The selector unit 7 changes the state of the selector according to an instruction from the system control unit 5 and selects a source of the image data for forming an image from the reading unit 1, the storage unit 3, or the FAX unit 6.
[0028]
The storage unit 3 stores image data of a document normally input from the IPU 14 and is used for copy applications such as repeat copy and rotation copy. It is also used as a buffer memory for temporarily storing the binary image data from the FAX unit 5. These data storage instructions are given by the system control unit 5.
[0029]
The storage unit 3 has a configuration as shown in FIG. 4, for example. In FIG. 1, a storage unit 3 includes an image input / output DMA controller (DMAC) 31 for inputting / outputting image data, a semiconductor memory 32 for storing image data, and a memory control unit 33 for writing / reading the semiconductor memory 32. A hard disk (HD) 34 of a secondary storage device, an HDD controller 35 for writing and reading the HD 34, an image transfer DMAC 36 and a code transfer DMAC 37 for transferring image data between the semiconductor memories 32 and HD 34, And a compression / decompression device 38 for performing compression and decompression. Hereinafter, the function will be described for each block with reference to FIG.
[0030]
The image input / output DMAC 31 is configured by a CPU and logic, communicates with the memory control unit 33, receives a command, sets an operation according to the command, and transmits status information notifying the state of the image input / output DMAC. I do. When an image input command is received, the input image data is packed as 8-pixel memory data according to the input image synchronization signal, and is output to the memory control unit 33 together with the memory access signal as needed. When an image output command is received, image data from the memory control unit 33 is output in synchronization with an output image synchronization signal.
[0031]
The semiconductor memory 32 is composed of a semiconductor storage element such as a DRAM. The total amount of memory is 400 DPI, 4 Mbytes of A3 size of binary image data, 4 Mbytes of electronic sort storage memory, and data storage after data conversion. The total of 1 Mbyte of memory for use is 9 MB. Reading and writing are controlled by the memory control unit 33.
[0032]
The image transfer DMAC 36 is configured by a CPU and logic, communicates with the memory control unit 33, receives a command, sets an operation according to the command, and transmits status information notifying the state. When a compression command is received, a memory access request signal is output to the memory control unit 33, and when the memory access permission signal is active, image data is received and transferred to the compression / expansion unit 38. Further, it incorporates an address counter that counts up in response to a memory access request signal, and outputs a 22-bit memory address indicating a storage location where image data is stored.
[0033]
The code transfer DMAC 37 is configured by a CPU and logic, communicates with the memory control unit 33, receives a command, performs an operation setting according to the command, and transmits status information notifying the state. When a decompression command is received, a memory access request signal is output to the memory control unit 33. When the memory access permission signal is active, image data is received and transferred to the compression / decompression unit 38. Further, it incorporates an address counter that counts up in response to a memory access request signal, and outputs a 22-bit memory address indicating a storage location where image data is stored.
[0034]
The compression / expansion unit 38 is configured by a CPU and logic, communicates with the memory control unit 33, receives a command, sets an operation according to the command, and transmits status information notifying the state. The binary data is processed by the MH encoding method.
[0035]
The HDD controller 35 is configured by a CPU and logic, communicates with the memory control unit 33, receives a command, sets an operation according to the command, and transmits status information notifying the state. The status of the HD 34 is read and data is transferred.
[0036]
The memory control unit 33 is configured by a CPU and logic, communicates with the system control unit 5, receives a command, sets an operation according to the command, and transmits status information notifying the state. The operation commands from the system control unit 5 include image input, image output, compression, decompression, and the like. Image input and image output commands are transmitted to the image input / output DMAC 31, and compression-related commands are transmitted to the image transfer DMAC 36 and code transfer DMAC 37. Are transmitted to the compression / decompression unit 38.
[0037]
The memory control unit 33 has, for example, an internal configuration as shown in FIG. Hereinafter, the function of each block will be described with reference to FIG.
[0038]
The input / output image address counter 33a counts up in response to an input / output memory access request signal from the image input / output DMAC 31, and outputs a 22-bit memory address indicating a storage location where the input / output image data is stored. . At the start of memory access, the address is initialized once.
[0039]
The transfer image address counter 33b is an address counter that counts up according to a transfer memory access permission signal, and outputs a 22-bit memory address indicating a storage location where transfer image data is stored. The address is initialized once at the start of memory access.
[0040]
The difference calculation unit 33c calculates the difference between the number of transfer processing lines output by the compression / decompression unit and the number of input / output processing lines output by the image input / output unit when an image is input.
[0041]
The difference comparison unit 33d compares the number of difference lines output by the difference calculation unit 33c at the time of image input with a set value, outputs an error signal if the number of difference lines = set value, and sets the difference line number to 0. Becomes active, the transfer request mask signal is activated. Otherwise, or when the input / output image is not operating, no active signal is output.
[0042]
The line setting unit 33e sets a setting value used for comparison in the difference comparing unit 33d based on a setting request from the system control unit 5 when the semiconductor memory 32 is used as a buffer memory at the time of image input. Any value can be set.
[0043]
The request mask 33f masks (disables) the transfer memory access request signal for accessing the compression / decompression unit based on the comparison result of the difference comparison unit 33d, and stops the transfer processing.
[0044]
The arbiter 33g outputs a transfer memory access permission signal for accessing the compression / decompression unit based on an input / output memory access signal from the image input / output unit and a transfer memory access request signal input via the request mask 33f.
[0045]
The address selector 33h is a selector selected by the arbiter 33g, and selects either the address of the input image or the address of the transfer image.
[0046]
The access control circuit 33i divides the input physical address into a row address and a column address corresponding to the DRAM, which is the semiconductor memory 32, and outputs the divided addresses to an 11-bit address bus. In addition, it outputs a DRAM control signal (RAS, CAS, WE) in accordance with an access start signal from the arbiter 33g.
[0047]
In the configuration of the memory control unit 33, the memory control unit 33 is initialized by an image input instruction from the system control unit 5, waits for image data, and the scanner of the reading unit 1 operates to store the image in the storage unit 3. The data is entered. The input image data is written into the semiconductor memory 32 once. The number of processing lines of the written image data is counted by the image input / output DMAC 31 and input to the memory control unit 33. The compression / expansion unit 38 outputs the transfer memory access request signal in response to the image transfer command. However, the request signal is masked by the request mask 33f of the memory control unit 33, and the actual memory access is not performed. When one line of input data from the image input / output unit ends, the mask of the transfer memory access request signal is released, the semiconductor memory 32 is read, and the transfer operation of the image data to the compression / decompression unit is started. . Also during operation, the difference calculation unit 33c calculates the difference between the two processing line numbers, and when it becomes 0, masks the transfer memory access request signal so as not to overtake the address.
[0048]
As an overall operation of the storage unit 3, upon input of an image and accumulation of data, image data is written to or read from a predetermined image area of the image memory by the image input / output DMAC 31 according to an instruction from the system control unit 3. At this time, the image input / output DMAC 31 counts the number of image lines.
[0049]
FIG. 6 is a view for explaining the descriptor access operation and the data transfer operation of the image input / output DMAC 31. The image data P in the figure is divided into four bands, and the image data of the number of lines set in each band is transferred.
[0050]
Hereinafter, a procedure for adding the total number of transfer lines in one image will be described. First, when the image input DMAC 31 receives the transfer command, the descriptor 1 is read-accessed to the chain destination address (a) set in advance by the CPU in the internal descriptor storage register, and the contents of the descriptor 1 in the memory are stored in the descriptor storage register 31a. To load. The loaded content is composed of four words, a chain destination address indicating the storage address of the next descriptor, a data storage destination address indicating the transfer destination address of the data to be transferred, and the number of lines of data to be transferred. And the format information indicating whether or not a CPU interrupt is to be generated when the transfer of the set number of lines is completed. In the least significant bit of the format information, a bit indicating whether to generate a CPU interrupt when the set number of lines has been transferred is arranged. 0 generates a CPU interrupt, 1 masks the CPU interrupt.
[0051]
In FIG. 6, one image is divided into four bands, and the least significant bits of the format information of each descriptor are set to 0, 0, 0, 0 in order from 1 to 4. As a result, when the image data transfer of each band is completed, a CPU interrupt is generated, and by the generation of the interrupt, the transfer end timing and the number of lines are detected by adding the number of lines set in each descriptor. It is possible to do.
[0052]
Similarly, when data is transferred from the semiconductor memory 32 to the HD 34 through the compression / decompression device 38 (primary storage device → secondary storage device), the setting of the descriptor of the image transfer DMAC 36 is performed in one band. The number of lines is set and transferred as the number of image lines. At that time, the transfer destination of the code transfer DMAC 37 is set to the HDD controller 35. A storage address is set in the HDD controller 35, and image data can be transferred through the path of the semiconductor memory 32 → the image transfer DMAC 36 → the compression / expansion device 38 → the code transfer DMAC 37 → the HDD controller 35 → HD34. After the end of the data transfer, the HDD controller 35 notifies the HDD controller 35 of the amount of data used when the data is stored in the HD 34, and the HDD management area in which the address stored in the HD 34 and the amount of data used are secured in the primary storage device (semiconductor memory 32). Remember. The memory control unit 33 masks the transfer memory access request so that the transfer of the image data to the compression / expansion unit 38 does not overtake the transfer from the image input / output DMAC 31 (data transfer to the secondary storage device). Controls not to overtake the data transfer of image input.)
[0053]
Conversely, when data is transferred from the HD 34 to the semiconductor memory 32 through the compression / decompression device 38 (secondary storage device → primary storage device), the data is transferred to the HD 34 stored in the HDD management area secured in the primary storage device. The storage address and the used data amount at the time of accumulation are obtained, the storage address is set in the HDD controller 35, the used data amount is set in the code transfer DMAC 37, and the number of expanded lines is set in the image transfer DMAC 36. Image data can be transferred through the path of the HDD controller 35, the code transfer DMAC 37, the compression / expansion unit 38, the image transfer DMAC 36, and the semiconductor memory 32.
[0054]
According to an embodiment of the present invention, in the above-described configuration, a priority specifying unit that specifies a priority of an image signal input / output operation, an input / output operation request receiving unit that receives a request for a plurality of image signal input / output operations, Order control means for determining a processing order based on the respective priorities in response to a request for an image signal input / output operation, and interruption determination means for determining whether or not the input / output operation of the image signal being executed can be interrupted And interruption / resumption control means for controlling interruption / resumption of the image signal input / output operation being executed based on the priority of the image signal input / output operation and the judgment result of the interruption judgment means. These means are provided in the system control unit 5 shown in FIG.
[0055]
The priority designating means is a means for designating the priority of the image signal transfer operation at the time of requesting the execution of the image signal input / output operation. The processing operation will be described with reference to FIG. When a request to execute an input / output operation of an image signal is received, a request to specify a priority by a key input from the operation unit 4 shown in FIG. 1 is accepted (step 100), and the execution of the priority specified by the operation unit 4 is requested. The image signal input / output operation is set (step 101). If the priority designation request has not been received from the operation unit 4, the priority of the image signal input / output operation requested to be executed is set to a default value (step 102).
[0056]
With this priority specifying means, it is possible to specify a priority when making an execution request for an input / output operation of an image signal, and it is possible to determine a priority.
[0057]
Next, a series of processing operations from the order control means to the interruption / resumption control means will be described with reference to FIG. First, when a plurality of image signal input / output operation requests are received (step 110), a process having the highest priority among the received requests is searched (step 111). Next, it is determined whether or not the currently executed process can be interrupted (step 112). If the currently executed process can be interrupted, the priority of the currently executed image signal input / output operation and the received image signal The priority of the input / output operation request is compared (step 113). If the priority of the received image signal input / output operation request is higher than the priority of the processing being executed, the processing being executed is interrupted (step 114), and the received image signal input / output operation request is canceled. The process is executed (step 115), and when the received process is completed, the interrupted process is resumed (step 116). When it is impossible to interrupt the process being executed, or when the priority of the process being executed is higher than the priority of the received process, the process being executed is continued.
[0058]
Next, the processing operation of the input / output operation request receiving means for receiving a plurality of image signal input / output operation requests will be described with reference to FIG. Depending on whether there are a plurality of received image signal input / output operation requests (step 120), if a plurality of requests are received, data is transferred from the primary storage device to the secondary storage device in a plurality of times (step 120). 121). If a plurality of image signal input / output requests have not been received, data transfer is performed once from the primary storage device to the secondary storage device (step 122). It is checked whether a plurality of data transfer requests have been received until the data transfer ends (step 123). As described above, reception of a plurality of processing requests becomes possible by performing divided data transfer.
[0059]
By using a means for acquiring a primary storage area and a means for acquiring a secondary storage area for storing image data subjected to data compression (data conversion) by the compression / expansion unit 38, an arbitrary capacity of each area can be acquired. Also, a fixed capacity can be obtained. In the case of dividing the data transfer, the primary transfer area is secured with a fixed capacity, data is converted by the fixed capacity, and then transferred to the secondary storage area.
[0060]
FIG. 10 shows a processing flow for transferring data in the primary storage area in one data transfer. First, an area for securing all of the compressed capacity of the image data stored in the primary storage device (semiconductor memory 32) is secured in the primary storage device (step 130). Next, data is compressed using the compression / decompression device 38 (step 131), and the compressed image data is stored in the primary storage area secured in step 130 (step 132). After the storage is completed, an area for the capacity after the data compression is secured in the secondary storage device (HD34) (step 133), and the data in the primary storage area is transferred to this secondary storage area (step 134). After the transfer is completed, the area secured in the primary storage device is released (step 135).
[0061]
Next, FIG. 11 shows a processing flow for transferring data in the primary storage area by dividing the data into a plurality of times. First, an area of the primary storage device to be saved after data conversion is secured with a fixed capacity (step 140). Since this area has a fixed capacity, it has no relation with the size after data compression. Next, the data is compressed using the compression / expansion unit 38 (step 141), and the compressed image data is stored in the fixed-capacity primary storage area secured in (step 140) (step 142). Since the data compression may not be completed with the fixed capacity secured at this time, it is necessary to change the processing according to the end response of the compression / expansion unit. In the fixed area secured in the primary storage area, an area corresponding to the used capacity is secured in the secondary storage device (step 143), and the data in the primary storage area is transferred (step 144). After the transfer is completed, it is determined whether or not compression of all data has been completed (step 145). If not completed, the process returns to step 141 to continue the compression process. Here, the data after the data compression is overwritten on the fixed area which has been previously transferred. When the data compression is completed, the secured fixed capacity primary storage area is released (step 146).
[0062]
The selection of the data conversion amount and the storage capacity makes it possible to estimate the data transfer capability from the data transfer speed to the secondary storage device, and the primary data conversion and storage capacity can be selected by the data transfer capability. It is possible to efficiently select the occupancy of the storage area and the secondary storage area.
[0063]
As described above, in the present embodiment, when a plurality of image signal input / output operation requests are received, the processing order is determined according to the priority specified at the time of the input / output operation request, and It is determined whether or not the processing can be interrupted, and if the processing can be interrupted, the interruption / restart control is performed, thereby making it possible to reduce the time required for processing with a higher priority.
[0064]
Further, in the above-described embodiment, the determination as to whether or not the interruption can be performed with respect to the process being executed is determined based on restrictions such as the transfer time and the processing time of each image signal input / output operation. It is also possible to provide a means for specifying whether or not the input / output operation can be interrupted when an execution request is made, and to determine whether or not the input / output operation can be interrupted from this specification information. FIG. 12 shows an operation flow of the designation means for specifying whether the image signal input / output operation can be suspended.
[0065]
In FIG. 12, when an execution request for an image signal input / output operation is received, a designation as to whether or not the image signal transfer operation can be interrupted by a key input from the operation unit 4 is accepted (step 150). The setting is performed (step 151). If there is no designation input from the operation unit 4, the interruption of the image signal input / output operation is set to be impossible (step 152).
[0066]
As a result, it is possible to specify whether or not the process being executed can be interrupted, and it can be determined whether or not the process can be interrupted.
[0067]
Further, a means for selecting whether or not to perform the processing based on the priority as shown in FIG. 8 may be provided for the above embodiment. FIG. 13 shows an operation flow of this priority processing selection means.
[0068]
In FIG. 13, when an execution request of an image signal input / output operation is received, a priority processing request is accepted from the operation unit 4 (step 160), and a request for performing control based on the priority by a key input of the operation unit 4 is received. Is received, the control of execution / interruption / resumption of the image signal input / output operation based on the priority is enabled (step 161). If the priority processing request is not received, the control based on the priority is invalidated (step 162).
[0069]
By providing such priority processing selection means and enabling / disabling the order control based on the priority, processing can be performed as needed.
[0070]
【The invention's effect】
As described above, according to the first aspect of the present invention, by providing the priority designation means, a series of image input / output operations can be efficiently processed, and the productivity of the image forming apparatus can be relatively easily reduced. Can be enhanced.
[0071]
According to the second aspect of the present invention, by providing the order control means and the interruption / resumption control means based on the priority, even if the data transfer processing may not be completed within a predetermined processing time if they are executed simultaneously, By controlling the execution order and suspending / resuming the operation being executed based on the designated priority, a plurality of image signal input / output operations can be efficiently processed as requested.
[0072]
According to the third aspect of the present invention, by providing the priority processing selection means, when the control based on the priority is unnecessary, the processing related to this control can be omitted, and the image input / output operation can be performed with the optimal control. Processing can be performed more efficiently.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating an overall configuration of a digital copying machine according to an embodiment of an image forming apparatus of the present invention.
FIG. 2 is a top view of a platen of a reading unit in FIG. 1;
FIG. 3 is a timing chart showing transfer timings of an image synchronization signal and image data.
FIG. 4 is a block diagram illustrating a configuration of a storage unit in FIG. 1;
FIG. 5 is a block diagram illustrating a configuration of a memory control unit in FIG. 2;
FIG. 6 is a diagram for explaining a data transfer method of an image input / output DMAC; FIG. 7 is a flowchart showing a processing operation of a priority designation unit;
FIG. 8 is a flowchart showing processing operations of an order control unit and an interruption / resumption control unit.
FIG. 9 is a flowchart showing a processing operation of a means for receiving a request for a plurality of image signal input / output operations.
FIG. 10 is a flowchart illustrating a process of collectively transferring image data from a primary storage area to a secondary storage area.
FIG. 11 is a flowchart showing processing for dividing and transferring image data from a primary storage area to a secondary storage area.
FIG. 12 is a flowchart illustrating a processing operation of a designation unit for determining whether or not the image signal input / output operation can be interrupted;
FIG. 13 is a flowchart showing a processing operation of a priority processing selection means.
[Explanation of symbols]
11 Platen 17 Charge Charge 18 Photoconductor 19 Developing Device 21 Feed Tray 25 Fixing Device 31a Descriptor Storage Register

Claims (3)

An image input unit, an image output unit, an image signal input from the image input unit, stored in a primary storage unit, and an image signal stored in the primary storage unit stored in a secondary storage unit; Reading an image signal stored in the secondary storage unit, storing the read image signal in the primary storage unit, and outputting the image signal stored in the primary storage unit to image output means. An image forming apparatus comprising means for designating the priority of each input / output operation request. Means for receiving a plurality of image signal input / output operation requests;
An order control unit that determines a processing order based on a specified priority for each of a plurality of image signal input / output operation requests,
The priority of the image signal input / output operation whose processing order is determined by this order control means is higher than the priority of the image signal input / output operation being executed, and the image signal input / output operation being executed can be interrupted. In this case, the currently executed image signal input / output operation is interrupted, the image signal input / output operation having the first processing order is started, and after the completion of the image signal input / output operation, the interrupted image signal input / output operation is completed. 2. The image forming apparatus according to claim 1, further comprising an interruption / resumption control unit that resumes the operation. 3. The image forming apparatus according to claim 2, further comprising: means for selecting whether to perform control by the sequence control means and the interruption / resumption control means.

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