JP3967074B2 - Image processing apparatus and image forming apparatus - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an image processing apparatus having a DMA controller that performs DMA data transfer (input / output) to / from an image memory based on descriptor information stored in a descriptor area, and an image processed by the image processing apparatus The present invention relates to an image forming apparatus that forms an image based on data.
[0002]
[Prior art]
Image forming apparatuses such as copying machines, facsimile machines, printers, and scanners are widely used, and these image forming apparatuses are also digitized as digital technology advances. 2. Description of the Related Art In digitized image forming apparatuses, image processing and editing are actively performed by applying an image memory. Among them, there is a function called electronic sorting, in which image data for a plurality of originals is stored in a memory, so that a designated number of copies are collectively output and the sorting work is eliminated. In order to implement this electronic sorting function, it is necessary to hold a plurality of image data, and in order to store the image data as it is in a semiconductor memory or the like, a memory corresponding to the amount of data corresponding to the number of stored images is required. Because the memory cost becomes enormous,
(1) It is composed of two memories, a semiconductor memory for controlling the image forming apparatus and a storage memory for storing image data, and a secondary storage device such as a hard disk that is cheaper than the semiconductor memory is used as the storage memory.
[0003]
{Circle around (2)} A semiconductor memory is used as a storage memory, but the total amount of memory is reduced by compressing image data by compression processing and reducing the amount of data per sheet.
[0004]
(3) A plurality of image input / output means such as an image scanner, a printer controller, a file server, or a facsimile controller share the same image memory.
[0005]
Such a configuration and method are generally used.
[0006]
On the other hand, in order to execute input / output of image data to / from the image memory, a memory control controller (hereinafter referred to as “DMA controller”) using a DMA (Direct Memory Access) data transfer method is used, for example. This is proposed in Japanese Laid-Open Patent Publication No. 6-103225.
[0007]
A conventional DMA controller is configured to transfer data to a specific area of an image memory based on memory area management information called a descriptor. It is also possible to divide a memory area in which one image is stored into a plurality of descriptors and perform data transfer. For example, by using an image memory in the form of a ring buffer, a memory smaller than the image data capacity can be used. It is also possible to execute input / output of image data by capacity.
[0008]
On the other hand, with respect to the image data input from the image input means, image movement such as centering (for transfer paper having a size larger than the input image data, the image data is arranged at the center of the transfer paper and output), When implementing an image editing / processing function that adds margins such as binding margins to input, a memory area larger than the input image data (corresponding to the size of the transfer paper) is secured. Then, image editing is performed by image processing means. In this case, by selecting the image editing function, the memory capacity necessary for the processing increases, and further, preprocessing for using the increased memory area (clearing memory data outside the input image data area, (Initialization) occurs, and extra processing time is required, so that a phenomenon occurs in which the productivity of the image forming apparatus is lowered according to the function to be selected. In addition, even if there is no need to output as a result of image movement processing or there is input data that is no longer to be saved, there may be cases where the processing is performed while retaining the corresponding memory area. It is done.
[0009]
In a DMA controller having a structure for transferring data to a specific area of an image memory using a descriptor, the minimum unit (one pixel) of specific data (for a blank area) is used for an area other than input image data. It is also possible to control the operation such as designating data corresponding to white) and outputting specific data continuously for a certain period of time virtually. Therefore, although the memory capacity required for the editing process varies depending on the selected function, it becomes a memory area of about one pixel to several pixels, so that the increase in the memory capacity is minimized and preprocessing is performed. It is possible to bring the time required for the time closer to zero. Furthermore, for input data that does not require data transfer (storage) to the memory, operation control is performed so that the input data is not transferred to the image memory, thereby saving image memory capacity. It is also possible to do. Note that it is possible to selectively instruct whether or not to discard the input data in consideration of moving the image after inputting or outputting the image data.
[0010]
In an image forming apparatus having a plurality of image input / output means, a plurality of image input / output requests are made simultaneously. In this case, in the operation control of the image memory, it is essential to process a plurality of data transfers in parallel at the same time so as to minimize the free time for execution based on a plurality of data transfer requests. When there is an execution request for image processing for this input / output operation, for example, an operation of outputting image data input from a scanner to a plotter is taken as an example.
Request 1. Scanner input (image 1)
Request 2. Plotter output (image 1) + binding allowance (requested during operation of request 1)
Request 3. Scanner input (image 2) (requested during operation of request 2)
Request 4. Plotter output (image 2) + binding allowance (requested during operation of request 3)
Request 5. Scanner input (image 3) (requested during operation of request 4)
If the same memory area can be read and the plotter output of request 2 can be performed during the data transfer (input) of request 1, the output of image 1 is obtained from the start of the request. Can be shortened, so that the productivity of the image forming apparatus is improved.
[0011]
Similarly, if another memory area is secured during the data transfer (output) of request 2 and the image data transfer (input) of request 3 is executed, the time for processing the entire request is greatly reduced. Further, the same memory area that uses the memory area for data transfer of request 3 in request 2 is selected, and operation control is performed to overwrite the portion of image 1 in which data transfer has been completed in the memory area. As a result, the required capacity of the image memory can be reduced, and the cost of the apparatus can be reduced.
[0012]
[Problems to be solved by the invention]
However, in the case of performing the control as described above, in consideration of image processing such as binding margin, the output of the data area in which the input operation is not completed is prohibited or the memory area in which the output is not completed is performed. Processing such as prohibiting data input such as overwriting is required. Specifically, an image moving operation in which image data at a position ahead of the head image in the sub-scanning direction of the input image data is output as a start point and margin data is added to the rear end in the operation sub-scanning direction, that is, In the case of an operation of skipping the leading end portion of the input image and adding margin data (binding margin) called “minus binding margin” to the trailing end side, image input for at least the number of lines of the output start point of the image data Output must be disabled until the data transfer is complete.
[0013]
In this way, in order to perform a large amount and high speed of data transfer of image data to / from a plurality of image input / output means, in order to set execution timing of data transfer including control for prohibiting the above-described operation. In addition, a means for detecting an operation state including an image processing operation for minimizing a time loss and performing it accurately is essential.
[0014]
The present invention has been made in view of such a state of the art, and an object of the present invention is to perform DMA at an optimal timing when a request for image editing such as image movement at the time of output is made with respect to input data. An object of the present invention is to provide an image processing apparatus capable of executing data transfer and improving the productivity of image formation.
[0015]
Another object of the present invention is to perform DMA data transfer at an optimal timing to perform image formation with high productivity when image editing such as image movement is requested at the time of output for input data. It is to provide a forming apparatus.
[0016]
[Means for Solving the Problems]
In order to achieve the above object, the present invention provides an image memory having a descriptor area for storing descriptor information and an image data area for storing image data, and the image data stored in the image memory is based on the descriptor information. In the image processing apparatus for performing DMA data transfer based on descriptor information stored in the descriptor area, the DMA controller includes descriptor information stored in the descriptor area. A means for setting a process when data to be transferred is completed, a means for instructing whether or not to send an interrupt signal when the set process is completed, and an interrupt according to the presence or absence of an interrupt. Stored in the descriptor information of the descriptor where the error occurred By referring to the number of data transfer lines are, and the structure and means for adding the total number of transfer completion lines in one screen.
[0017]
In this case, when inputting the image data in the descriptor information, the DMA controller divides the descriptor in one screen into a plurality of equal parts in advance and issues an image data output request to the image data being transferred. If there is a request to output image data starting from a line position ahead of the top of the image in the sub-scanning direction with respect to the image data, Roll of A means for comparing the number of lines obtained from the means for adding the number of transmission end lines with the number of output start lines and further determining whether or not the total number of transfer end lines in one screen has reached the number of output start lines; Then, it is determined whether or not image data can be output during data transfer. The request for outputting the image data with the line position ahead of the image head in the sub-scanning direction as the starting point for the image data includes, for example, image movement and binding margin setting. The DMA controller sets the descriptor in one screen to only three divisions, the first division line number is one line, the second is the maximum image output start line number that can be set, and the third is the remaining lines. It is a number.
[0018]
According to the present invention, an image forming apparatus includes the image processing apparatus having the above-described configurations and an image forming unit that forms an image based on the image data that has been subjected to image processing. An image is processed by the processing device, and an image is formed based on the processed data. Specifically, in an image forming apparatus having means that can be controlled by dividing the storage area into at least one descriptor area, the storage means is provided by providing attribute data for controlling the operation of each descriptor area. To reduce the load on the control means such as the CPU that controls the storage device, and to shorten and simplify the preparation period required to control the input and output of image data Was made easy.
[0019]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0020]
FIG. 1 is a block diagram showing the overall configuration of a digital copying machine according to an embodiment of the present invention. FIG. 2 is an explanatory diagram showing the relationship between a document table in FIG. 1 and a document placed thereon. Is a timing chart for explaining an image synchronization signal output from the IPU in FIG. 1, FIG. 4 is a block diagram showing details of the storage unit in FIG. 1, and FIG. 5 is a block diagram showing a configuration of the memory control unit in FIG. FIG. 6 is a diagram for explaining the operation of the video input DMAC according to this embodiment.
[0021]
The digital copying machine according to the present embodiment stores a reading unit 10, an image forming unit 20, and a control unit that functions as an image processing apparatus that stores image data read by the reading unit 10 and forms an image by the image forming unit 20. 40 is mainly composed.
[0022]
The reading unit 10 includes a document table 11, an exposure lamp 12 that exposes a document placed on the document table 11, a plurality of reflection mirrors 13, a CCD (image sensor) 14, and an image processing unit (hereinafter referred to as “IPU”). And the scanner control unit 16. The image forming unit 20 includes a photosensitive drum 22, a charging charger 21, a writing unit 23, a developing device 24, a transfer charger 28, a separation charger 29, and a cleaning device 34 arranged along the outer periphery of the photosensitive drum 22. And the image forming system including the static elimination charger 35, the paper feeding and fixing system including the paper feed tray 26, the registration roller 27, the fixing device 31, the paper discharge roller 32, and the paper discharge tray 33, and the writing unit 23 and the image forming system. And a plotter control unit 36 for controlling the sheet feeding and fixing system. The control unit 40 includes a system control unit 41, an operation unit 42, a storage unit 43, a FAX unit 44, and a selector unit 45 that control each unit and overall control of the digital copying machine.
[0023]
The reading process of the reading unit 10 having each configuration as described above and the image forming process of the image forming unit 30 will be briefly described.
[0024]
In the reading unit 10, the document D is subjected to scan exposure by an exposure lamp 12 movable along the document table 11, reflected light from the document is guided to the CCD 14 by a plurality of reflecting mirrors 13, and photoelectric conversion is performed by the CCD 14. Use electrical signals according to strength. The image data converted into an electrical signal by the CCD 14 is input to the IPU 15, and the IPU 15 performs image data processing such as shading correction on the input image data, and further A / D converts it to an 8-bit digital signal. And Further, image processing such as scaling processing and dither processing is performed, and the image signal is sent to the image forming unit 20 together with the image synchronization signal. In order to execute the above process, the scanner control unit 16 performs detection of various sensors, control of a drive motor, and the like, and sets various parameters in the IPU 15. The above is the reading process.
[0025]
In the image forming unit 20, the photoconductor drum 22 that rotates uniformly and is uniformly charged by the charging charger 21 is exposed with laser light modulated by image data from the writing unit 23. An electrostatic latent image is formed on the surface of the photosensitive drum 22, and the latent image is developed with toner by the developing device 24 to be visualized as a toner image. On the other hand, the sheet on which the image is transferred is unloaded from the sheet feeding tray 26 by the sheet feeding roller 25 in advance and waits at the registration roller 27 position. Then, the photosensitive drum 22 is conveyed at the timing of the leading edge of the image forming position, the toner on the photosensitive drum 22 is electrostatically transferred to the transfer paper by the transfer charger 28, and the transfer paper is transferred to the photosensitive drum 22 by the separation charger 29. Separate from. Thereafter, the toner image on the transfer paper is heated and fixed by the fixing device 31, and is discharged to the discharge tray 33 by the discharge roller 32. The toner remaining on the photosensitive drum 22 after the electrostatic transfer is removed from the photosensitive drum 22 by the cleaning device 34, and the surface of the photosensitive drum 22 is neutralized by the neutralizing charger 35. The plotter control unit 36 performs detection of various sensors in the image forming unit and controls a drive motor and the like in order to execute the above process. The above is the image forming process.
[0026]
The image synchronization signal output from the IPU 15 of the reading unit 10 is as shown in the timing chart of FIG. In the figure, / FGATE is a frame gate signal, and this signal represents a valid image range for an image area in the sub-scanning direction. Image data while this signal is at a low level (low active) is validated. This / FGATE is asserted or negated at the falling edge of the line synchronization signal (/ LSYNC). / LSYNC is asserted for a predetermined number of clocks at the rising edge of the pixel synchronization signal (PCLK), and image data in the main scanning direction is validated after a predetermined clock after the rising of this signal. The sent image data is one for one period of PCLK, and is divided by 400 DPI equivalent from the portion indicated by the arrow Z in FIG. The image data is sent out as raster format data starting from the arrow Z. Further, the sub-scanning effective range of image data is usually determined by the transfer paper size.
[0027]
As shown in FIG. 1, the control unit 40 of the digital copying machine includes a system control unit 41, an operation unit 42, a storage unit 43, a FAX unit 44, and a selector unit 45. The system control unit 41 detects an input state to the operation unit 42 by an operator, and performs various parameter settings, process execution instructions, and the like to the reading unit 10, the storage unit 43, the image forming unit 20, and the FAX unit 44 through communication. . Further, the state of the entire system is displayed on a display unit (not shown) provided in the operation unit 42. The instruction to the system control unit 41 is made by key input to the operation unit 42 by the operator.
[0028]
In response to an instruction from the system control unit 41, the FAX unit 44 performs binary compression on the received image data based on FAX data transfer rules such as G3 and G4 and transfers the image data to the telephone line. The data transferred from the telephone line to the FAX unit 44 is restored to binary image data, which is sent to the writing unit 23 of the image forming unit 20 to be visualized. In response to an instruction from the system control unit 41, the selector unit 45 changes the state of the selector and selects the source of image data for image formation from any one of the reading unit 10, the storage unit 43, and the FAX unit 44.
[0029]
The storage unit 43 normally stores image data of a document input from the IPU 15 and is used for a copy application such as repeat copy or rotated copy. The storage unit 43 is also used as a buffer memory for temporarily storing binary image data from the FAX unit 44. These data storage instructions are given by the system control unit 41.
[0030]
As shown in FIG. 4, the storage unit 43 includes an image input / output DMA controller (hereinafter referred to as “image input / output DMAC”) 51, an image memory 52, a memory control unit 53, an image transfer DMAC 54, a code transfer DMAC 55, and a compression / decompression. The device 56 is configured. The image input / output DMAC 51 includes a CPU and a logic circuit, communicates with the memory control unit 53, receives a command, performs operation settings according to the command, and informs the state of the image input / output DMAC 51. Send as status information. When an image input command is received, the input image data is packed as memory data in units of 8 pixels according to the input image synchronization signal, and is output to the memory control unit 53 together with the memory access signal as needed. When an image output command is received, the image data from the memory control unit 53 is output in synchronization with the output image synchronization signal. The image memory 52 stores image data and is configured by a semiconductor storage element such as a DRAM. The total memory amount of the image memory is, for example, a total of 8 Mbytes of 4 Mbytes of A3 size of binary image data with a writing density of 400 DPI and 4 Mbytes of electronic sort storage memory. The image memory 52 is read from the memory control unit 53 and controlled for writing.
[0031]
The memory control unit 53 includes a CPU and a logic circuit, communicates with the system control unit 41, receives a command, and performs operation settings according to the command. The memory control unit 53 also transmits status information to notify the state of the storage unit 43. The operation commands from the system control unit 41 include image input, image output, compression, decompression, and the like. Image input and image output commands are input to the image input / output DMAC 41, compression-related commands are the image transfer DMAC 54, code The data is transmitted to the transfer DMAC 55 and the compression / decompression unit 56.
[0032]
As shown in FIG. 5, the memory control unit 53 includes an aviator 57 and an access control unit 58. The aviator 57 adjusts memory access request signals from the image input / output DMAC 51, the image transfer DMAC 54, and the code transfer DMAC 55, and outputs an access permission signal. The aviator 57 incorporates a refresh control circuit (not shown). The priority order is refresh, the image input / output DMAC 51, the image transfer DMAC 54, and the code transfer DMAC 55. Active output of signal. Further, the memory address is selected together with this memory access permission signal, and a trigger signal indicating the start of memory access is output to the access control circuit 58. On the other hand, the access control circuit 58 divides the input physical address into a row address and a column address corresponding to a DRAM which is a semiconductor memory by a signal from the access control circuit 58, and outputs it to an 11-bit address bus. Further, in accordance with an access start signal from the aviator 57, a DRAM control signal (RAS, CAS, WE) is output.
[0033]
Returning to FIG. 4 again, the image transfer DMAC 54 is described. The image transfer DMAC 54 is composed of a CPU and a logic circuit, communicates with the memory control unit 53, receives a command, performs an operation setting according to the command, It is sent as status information to inform the state. When a compression command is received, a memory access request signal is output to the memory control unit 53, and image data is received and transferred to the compression / decompression unit 56 when the memory access permission signal is active. The image transfer DMAC 54 also incorporates an address counter (not shown) that counts up in response to a memory access request signal, and outputs a 22-bit memory address indicating a storage location where image data is stored.
[0034]
The code transfer DMAC 55 includes a CPU and a logic circuit, communicates with the memory control unit 53, receives a command, performs operation setting according to the command, and transmits it as status information to notify the state. When an expansion command is received, a memory access request signal is output to the memory control unit 53. When the memory access permission signal is active, image data is received and transferred to the compression / decompression unit 56. In addition, an address counter that counts up in response to a memory access request signal is built in, and a 22-bit memory address indicating a storage location where image data is stored is output. The descriptor access operation of the code transfer DMAC 55 and the image transfer DMAC 54 will be described later.
[0035]
The compression / decompression unit 56 is also composed of a CPU and a logic circuit, communicates with the memory control unit 53, receives a command, performs operation settings according to the command, and transmits it as status information to notify the state. The binary data is processed by the MH encoding method.
[0036]
As the overall operation of the storage unit configured as described above, image data is written to a predetermined image area of the image memory 52 by the image transfer DMAC 54 in response to an instruction from the system control unit 41 when inputting an image and storing data. Read out. At this time, the image transfer DMAC 54 counts the number of image lines.
[0037]
Next, the descriptor access operation and data transfer operation of the image transfer DMAC 54 will be described with reference to FIG. In this embodiment, the video input DMAC constitutes an image transfer DMAC. The video input DMAC 61 includes a descriptor storage register 62 and a data transfer control unit 63 including a CPU. Further, as shown in the figure, the image data is divided into four bands, band 1, band 2, band 3, and band 4, and image data of the number of lines set in each band is transferred.
[0038]
A procedure for adding the total number of transfer lines in one image will be described below. First, when the video input DMAC 61 receives a transfer command, the DMA is activated, and the descriptor 1 is set to an address a which is a chain destination address set in advance in the internal descriptor storage register 62 by the CPU (not shown) of the data transfer control unit 63. Read access is performed, and the contents of descriptor 1 in the memory are loaded into descriptor storage register 62. The loaded contents are composed of 4 words, the chain destination address indicating the storage address of the next descriptor, the data storage (transfer) destination address indicating the start address of the data to be transferred, and the data amount of the data to be transferred. The number of data transfer lines indicated by the number of lines, and format information indicating whether or not to generate a CPU interrupt when transfer of the set number of lines is completed. In the least significant bit of the format information, when the transfer of the set number of lines is completed, a bit indicating whether or not to generate a CPU interrupt is “0”, for example, and a CPU interrupt is generated. “1” The CPU interrupt is arranged as a mask. In this way, the video input DMAC 61 divides the descriptor-type DMA into one-screen data in units of transfer by descriptors, and issues an interrupt after each transfer ends, so that the current accurate transfer line number can be determined. The transfer line number register can be managed without polling by the CPU of the data transfer control unit 63, for example.
[0039]
In FIG. 6, one image data is divided into four bands, and this bit of the four descriptors is 0, 0, 0, 0 in order from 1 to 4. When the image data transfer for each band is completed, a CPU interrupt is generated. Upon the occurrence of the interrupt, the number of lines set in each descriptor is added by, for example, the CPU of the data transfer control unit 63, thereby detecting the transfer end line number. can do.
[0040]
In the case of “minus binding margin” that skips the leading edge of the image and adds a margin to the trailing edge, The number of lines obtained by adding the number of transfer end lines in one screen (total number of transfer lines) is compared with the number of output start lines, and the total number of transfer end lines in one screen has reached the number of output start lines. And whether or not image data can be output during data transfer is determined. .
[0041]
The determination procedure is shown in the flowchart of FIG. The image data transfer for each band is completed, When a CPU interrupt occurs, the number of transfer lines set in the descriptor is detected (step 701), and it is checked whether the total number of transfer lines is equal to or greater than the number of output start lines (step 702). If the total number of transfer lines is equal to or greater than the number of output start lines, data output is enabled (step 703), and the total number of transfer lines is equal to the number of output start lines. Less than In this case, data output is disabled (step 704). As a result, even if a plotter output request is issued for image data that is being input with data from an image input device such as a plotter and sub-scanning minus binding is requested for the image data, total transfer is performed. Spelling by managing the number of lines Time The relationship between the number of proxy lines and the total number of transfer lines is Time If the relationship of the number of substitution lines ≦ the total number of lines is satisfied, it is possible to determine that the plotter data can be output.
[0042]
In the embodiment described above, the case where the input image data is divided into four bands has been described. However, the number of divisions is not limited to this, and may be divided into three bands as shown in FIG. The case of dividing into three bands will be described with reference to FIG. FIG. 8 is a diagram for explaining the configuration of the descriptor when the input image data is divided into three bands.
[0043]
As shown in FIG. 8, the transfer data that is input image data is divided into three bands, bands 1, 2, and 3, and the number of data transfer lines A that is the first divided line number is set to the first and second bands. Data transfer line number B, which is the number of divided lines, can be set Maximum image output start line number (number of image moving lines) The third divided line number, data transfer line number C, is set to the number of remaining image lines The structure of each descriptor is shown. If there is no image movement, the first CPU interrupt is the DMA transfer start timing of image data output. If there is an image shift, the second CPU interrupt is the image data output regardless of the number of shift lines. This is the timing for starting DMA transfer. In this way, when the data of one screen to be transferred is divided into one line, the maximum binding margin line, and the remaining input lines, there is no binding margin in the sub-scanning direction of the binding margin or when it is positive Can determine that the plotter can be output if the first descriptor interrupt has occurred, and in the case of negative binding margin in the sub-scanning direction, it can be determined that the plotter can be output if the second descriptor interrupt has occurred. Thus, the optimum determination control and the number of interruptions to the CPU are suppressed depending on the binding margin direction, and as a result, the processing load on the CPU can be reduced.
[0044]
In the above-described embodiment, the digital copying machine has been described as an example. However, the image input / output device such as a facsimile, a printer, a scanner, and a network file server, or a digital multifunction machine type having a plurality of functions of these devices. The present invention can also be applied to an image forming apparatus.
[0045]
【The invention's effect】
As is apparent from the above description, according to the first aspect of the present invention, the DMA controller includes means for setting processing when data to be transferred is completed in the descriptor information stored in the descriptor area. Means for instructing whether or not to send an interrupt signal when the set processing is completed, and referring to the number of data transfer lines stored in the descriptor information of the descriptor in which the interrupt has occurred, depending on the presence or absence of the interrupt And a means for adding the total number of transfer end lines in one screen, so that the data of one screen is divided in units of transfer by descriptors, and an interrupt is sent to each after the transfer ends, so that the current accurate The number of transfer lines is polled by the transfer line number register in the DMA controller, for example, by a CPU that controls the storage device. And no can manage, it is possible to improve the productivity of the image forming.
[0046]
According to the second aspect of the present invention, when the image data is input into the descriptor information, the DMA controller divides the descriptor in one screen into a plurality of equal parts in advance, and the image data with respect to the image data being transferred. If there is a request to output image data starting from a line position ahead of the top of the image in the sub-scanning direction with respect to the image data, Roll of Comparing the number of lines obtained from the means for adding the number of transmission end lines and the number of output start lines, and means for determining whether the total number of transfer end lines in one screen has reached the number of output start lines, Since it is determined whether or not image data can be output during data transfer, it is possible to satisfactorily determine whether or not the plotter can output data. That is, the total number of transfer lines is managed even when a plotter output request is issued for the image data being input from the image input means and a sub-scanning minus binding margin is requested for the image data. Therefore, if the relationship between the number of binding margin lines and the total number of transfer lines is such that the number of binding margin lines ≦ the total number of lines, it can be determined that the plotter can output data.
[0047]
According to the third aspect of the present invention, since the request for outputting image data starting from a line position ahead of the top of the image in the sub-scanning direction with respect to the image data is the setting of image movement and binding margin, these processes are performed. With respect to, it is possible to satisfactorily determine whether the plotter can output data.
[0048]
According to the fourth aspect of the present invention, since one screen data to be transferred is divided into three lines, one line, the maximum binding margin line, and the remaining input lines, the binding margin of the binding margin in the sub-scanning direction is reduced. If there is no or positive, if the first descriptor interrupt is generated, it is determined that the plotter output is acceptable. If the sub-scanning direction minus binding margin, the plotter output is output if the second descriptor interrupt is generated. It is possible to determine that it is possible, the optimal determination control depending on the binding direction, and the number of interruptions to the CPU or the like that controls the storage device can be suppressed, resulting in a reduction in the processing load on the CPU.
[0049]
According to the fifth aspect of the present invention, the image is formed based on the image data processed by the image processing device according to any one of the first to fourth aspects. When a request for image editing such as image movement is made, DMA data transfer can be executed at an optimal timing, and image formation with high productivity can be performed.
[Brief description of the drawings]
FIG. 1 is a block diagram for explaining an overall configuration of an embodiment of the present invention.
FIG. 2 is a diagram for explaining the relationship between the document table of FIG. 1 and a document placed thereon.
FIG. 3 is a timing chart for explaining an image synchronization signal output from the IPU in FIG. 1;
4 is a block diagram for explaining a configuration of a storage unit in FIG. 1. FIG.
5 is a block diagram for explaining a configuration of a memory control unit in FIG. 4; FIG.
FIG. 6 is a diagram for explaining a configuration of a video input DMAC used in this embodiment together with image data.
FIG. 7 is a flowchart for detecting a DMA transfer start timing when a binding margin is provided.
FIG. 8 is a diagram for explaining the configuration of a descriptor when input image data is divided into three bands.
[Explanation of symbols]
10 Reading unit
20 Image forming unit
41 System controller
42 Operation unit
43 Memory
44 FAX section
45 Selector section
51 Image Input / Output DMAC
52 Image memory
53 Memory controller
54 Image Transfer DMAC
55 Code transfer DMAC
56 Compression / Expansion Machine
61 Video input DMAC
62 Descriptor storage register
63 Data transfer control unit 63

Claims (5)

An image memory having a descriptor area for storing descriptor information and an image data area for storing image data, and a DMA controller for transferring the image data stored in the image memory based on the descriptor information In an image processing apparatus that performs DMA data transfer based on descriptor information stored in the descriptor area,
The DMA controller sets, in the descriptor information stored in the descriptor area, processing when data to be transferred is terminated,
Means for instructing whether or not to send an interrupt signal when the set processing is completed;
Depending on the presence or absence of the interrupt, means for interrupt refers the number of data transfer line stored in the descriptor information of the descriptor generated, adds the number of transfer end line in one screen,
An image processing apparatus comprising: The DMA controller, when inputting the image data in the descriptor information, divides the descriptor in one screen into a plurality of equal parts in advance, issues an output request for the image data to the image data being transferred, when the image data is a request to output the image data as a starting point the previous line position than the image head of the sub-scanning direction, the number of lines obtained from means adding the number of transfer end line in one screen And a means for comparing the output start line number and determining whether or not the total transfer end line number in one screen has reached the output start line number, and whether or not image data can be output during data transfer 2. The image processing apparatus according to claim 1, wherein the determination is made as to whether or not.   3. The image according to claim 2, wherein the request for outputting the image data starting from a line position ahead of the image head in the sub-scanning direction with respect to the image data is image movement and / or binding margin setting. Processing equipment.   The DMA controller divides the descriptor in one screen into three, the first division line number is one line, the second is the maximum settable image output start line number, and the third is the remaining number of lines. The image processing apparatus according to claim 1, wherein the image processing apparatus is an image processing apparatus. An image processing apparatus according to any one of claims 1 to 4,
Image forming means for forming an image based on image processed image data;
An image forming apparatus characterized in that the input image data is subjected to image processing by the image processing apparatus, and an image is formed based on the image processed data.

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