JP2003179732A - Image processor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve the utilization rate of storage areas for respective resources and to shorten a transfer time in the case of transfer from the buffer area of an image (semiconductor) memory for primarily storing input/output images to an HDD for saving compressed data. <P>SOLUTION: A DMA control system is applied and whether or not the storage areas of a transfer destination HDD 48 are to be made continuous or discontinuous and a transfer mode therefor can be selected and set. When saving an image signal inputted and primarily held in an image memory 42 in the HDD, processing is performed in the order of image memory → compressor/ expander 46 (data compression conversion) → image memory (converted data storage area) → HDD. At that point, buffer areas corresponding to the capacity of the transfer destination to be used are secured by one time of transfer operation in each of continuous and discontinuous transfers so that the utilization rate of the resources can be improved, the transfer time can be shortened and productivity in the device provided with such a storage part can be improved. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image input / output device such as a digital copying machine, a facsimile, a printer, an image scanner, a network file server, or an image processing apparatus such as a digital multi-function peripheral having a plurality of functions. Regarding an apparatus, such as a relatively small capacity image storage unit (semiconductor memory) mainly equipped for work that handles input / output digital images, and a hard disk (HD) drive or the like capable of mutually transferring data with this storage unit. The present invention relates to a control technique of data transfer performed with a large-capacity storage device (for storing compressed data).

[0002]

2. Description of the Related Art In recent years, with the progress of digitalization of copying machines, processing and editing using image memories have become popular. Among them, by storing image data for multiple read originals in an image memory (usually a semiconductor memory is used), a designated number of copies can be collectively output and a function called electronic sorting that eliminates sorting work There is. In order to store the image data of all originals, in order to store the original image data in the semiconductor memory, a memory equivalent to the data amount for the number of read originals is required, and the memory cost becomes huge. 1. ~ 3. This method is generally used. 1. A semiconductor memory + storage (storage) memory is used, and a secondary storage device such as a hard disk, which is cheaper than a semiconductor memory, is used as the storage memory. 2. With the configuration of semiconductor memory + storage memory, semiconductor memory is used as storage memory, image data is compressed using compression processing, and the total amount of memory is reduced by reducing the amount of data per sheet. 3. In the digital multi-function peripheral, a plurality of image input / output units (image scanner, printer controller, file server, FAX controller, etc.) share the same image memory.

In order to execute input / output of image data to / from various image memories (storage means) as described above, D
Memory controller using MA (Direct Memory Access) data transfer method (hereinafter "DMA controller")
Alternatively, “DMAC” is often used.
The DMA controller transfers data to a specific area of the image memory based on memory area management information called a descriptor. It is also possible to divide the memory area in which one image is stored into multiple descriptors for data transfer. For example, by using the image memory in the form of a ring buffer, the memory capacity is smaller than the image data capacity. It is also possible to input and output image data with. In the memory control using the DMA controller, the progress (start, end) of the data transfer specified by each descriptor and the execution timing control of the data transfer (such as interrupting or restarting the data transfer in the middle of the image memory area) ) Is also possible, the degree of freedom in timing control of data transfer in a semiconductor memory connected to a DMA controller or a large-capacity secondary storage device is high, and the application range is wide. When a secondary storage device such as a hard disk, which is cheaper than a semiconductor memory, is used as the storage (storing) memory as described above, in this type of storage device, a plurality of data transfer (data writing) is usually performed to a single device. , The read operation) cannot be performed. Therefore, by dividing the data transfer unit to the secondary storage device using the descriptor of the DMA controller and executing this in a time-division manner, it is possible to perform multiple data transfer operations as if in parallel. It is common to make sure they are running.

However, when such time division processing is used, the time required for data transfer is not shortened, so that the time required for inputting / outputting image data is minimized as in image forming apparatuses such as copying machines and printers. If the setting affects the productivity of the apparatus, performing the time-sharing process may cause a decrease in productivity. For this reason, image data is compressed to reduce the data transfer amount, or a secondary storage device with a high data transfer rate is installed to shorten the time required for data transfer to the secondary storage device. It had a composition. Further, conventionally, for the purpose of simplifying the memory control, the secondary storage device of the secondary storage device is substantially synchronized with the image data input / output operation performed by using the image input / output means without actively performing the time division transfer. A means for occupying resources and transferring data was used. By the way, in the conventional secondary storage device, the transfer speed of the image data of the semiconductor memory to the secondary storage device is slower than the transfer speed of the image data from the image input / output means to the semiconductor memory. Even if the data processing capacity of the secondary storage device is reduced by compressing the data, there is no difference in the data processing speed between the image input / output unit and the semiconductor memory. (Including conversion processing)
In addition, the degree of improvement in productivity of the image forming apparatus by controlling the transfer timing of the data transfer processing to the secondary storage device independently and optimally is not so high.

[0005]

However, with the recent technological progress, the data transfer rate of the secondary storage device such as a hard disk and the data compression rate and the processing rate of the data compression means are remarkably improved. In the situation where the image input / output means connected to the forming device is extremely diverse,
With conventional memory control, it is difficult to maximize productivity by making full use of the capabilities of the storage device and data compression means. The present invention has been made in view of such a state of the art, and an object of the present invention is to mutually provide an image storage unit (for example, a semiconductor memory) that handles input / output images and is mainly used for work, and this storage unit. A memory control method using DMA is applied to a storage unit equipped with a secondary storage device (for example, an HDD) for storing compressed data that enables data transfer, and the storage device is provided with a capacity (performance related to transfer) depending on the capacity. Management control of resource acquisition and release for maximum utilization efficiency, and control of the start timing of data transfer operation to improve the utilization rate of the storage area and shorten the transfer time. An object of the present invention is to provide an image processing apparatus that is equipped with and can ensure high productivity. Also,
For the above purpose, the input image data input to the semiconductor memory is subjected to data conversion such as compression using the buffer memory, and the data in the buffer memory after the data conversion is stored in the secondary storage device. In the image processing device,
When a storage medium such as HDD is used as the secondary storage device,
If the storage area of the secondary storage device can be secured continuously, one data transfer operation (buffer memory → HD
In order to save the processing time faster when the data is stored in D), conversely, when the storage area cannot be secured continuously, a plurality of (inconsecutive addresses) inside the storage medium are stored.
A storage area is secured, and the contents of the buffer memory can be selected in each area to store data by a plurality of data transfer operations. Furthermore, when selecting such transfer control, the time required to prepare for each data transfer operation,
Time to search for a physically discontinuous storage area of the storage medium (seek time for moving the recording head in case of HDD)
Is required, and as a result, the secondary storage device occupies a longer time, which may reduce the utilization efficiency. Therefore, the state of securing the area of the secondary storage device (continuous / discontinuous)
By providing means for selectively varying the reserved capacity of the buffer memory according to the above, it is possible to reduce the occupation time of the secondary storage device (HDD) and prevent the redundant capacity of the buffer memory from being occupied. It is an object to provide means.

[0006]

According to a first aspect of the present invention, primary storage means having a function as a buffer for input / output images / intermediate images, data conversion means for performing data conversion on input / output images, and data conversion are provided. The secondary storage means for storing the subsequent image and the access control for the primary storage means and the secondary storage means are performed, and the buffer areas provided in the primary storage means are mutually exchanged and the buffer areas of the primary storage means and the secondary storage means are mutually exchanged. An image processing apparatus having transfer control means for controlling the image transfer of, wherein the transfer control means changes a continuous storage area or a divided storage area from a buffer area of the primary storage means to a storage medium of the secondary storage means. An image is characterized in that an operation mode for securing the unit image and transferring the unit image to the area can be executed, and the transfer is performed in the operation mode instructed by the setting. It is a processing apparatus.

According to a second aspect of the present invention, in the image processing apparatus according to the first aspect, the transfer control means secures a continuous storage area in a storage medium of the secondary storage means from a buffer area of the primary storage means. As the buffer area of the primary storage means for storing the converted data, which corresponds to the continuous storage area of the secondary storage means, so that the transfer is completed by one data transfer operation when the operation mode for transferring the unit image is executed. It is characterized by ensuring the capacity.

According to a third aspect of the present invention, in the image processing apparatus according to the first or second aspect, the transfer control means secures the divided storage area in the storage medium of the secondary storage means from the buffer area of the primary storage means. When the operation mode for transferring the unit image is executed, the divided storage area of the secondary storage means is used as the buffer area of the primary storage means for storing the converted data so that the data transfer operation is transferred for each divided area. It is characterized in that a corresponding capacity is secured.

According to a fourth aspect of the invention, in the image processing apparatus according to any one of the first to third aspects, the transfer control means performs data conversion on the image in the primary storage means, and then transfers the data to the primary storage means. The transfer rate of the converted data transferred to the buffer area and the transfer rate of the image transferred to the secondary storage means from the buffer area are respectively acquired, and the continuous storage area or the divided area is divided according to the comparison result of both transfer rates. Which operation mode to select to secure the storage area,
Alternatively, it is characterized in that the capacity of the buffer area of the primary storage means is adjusted.

According to a fifth aspect of the present invention, primary storage means having a function as a buffer for input / output images / intermediate images, data conversion means for performing data conversion on the input / output images, and the image after data conversion are stored. Access control is performed on the secondary storage means, the primary storage means and the secondary storage means, and the image transfer between the buffer areas provided in the primary storage means and between the buffer areas of the primary storage means and the secondary storage means is controlled. An image processing apparatus having a transfer control means, wherein the transfer control means transfers the image after data conversion from a buffer area of the primary storage means to a storage area of a storage medium of the secondary storage means. As a buffer area for storing the converted data, the capacity corresponding to the storage area of the secondary storage means is secured, and after the data conversion is performed on the image of the primary storage means, The transfer speed of the converted data transferred to the buffer area of the storage means and the transfer speed of the image transferred to the secondary storage means from the buffer storage area are respectively acquired, and the primary storage is performed according to the comparison result of both transfer speeds. The image processing apparatus is characterized in that the capacity of the buffer area secured by the means is adjusted.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An image processing apparatus of the present invention will be described based on the following embodiments shown with reference to the accompanying drawings. An image processing apparatus of the present invention will be described based on the following embodiments shown with reference to the accompanying drawings. FIG. 1 is a schematic configuration diagram showing an example in which the image processing apparatus of the present invention is applied to a digital copying machine. The reading process of the reading unit 20 and the image forming process of the image forming unit 30 will be described with reference to FIG. In the reading process, the original is scan-exposed by the exposure lamp 22 that is movable along the original table 21, and the reflected light is exposed to C
Photoelectric conversion is performed by a CD (image sensor) 23 to obtain an electric signal according to the intensity of light. The IPU (image processing unit) 24 performs a process such as shading correction on the electric signal to perform A / D conversion, and
The bit digital signal is further subjected to image processing such as scaling processing, MTF correction, spatial filter processing, γ correction processing, and dither processing, and the image signal is sent to the image forming unit 30 together with the image synchronization signal. FIG. 2 is a view of the document table viewed from above.
As shown in the scanning direction in the figure, the CCD 23 performs the main scanning and the sub-scanning is performed by the movement of the scanner to read the document in a raster format. The scanner control unit 25 detects various sensors in order to perform the reading process.
It controls the scan drive motor, etc.
Set various parameters to.

In the image forming process, the charger 32
The photoconductor 33 that is uniformly charged by
Exposure is performed with laser light modulated by the image data from the writing unit 31. An electrostatic latent image is formed on the photoconductor 33,
By developing it with toner by the developing device 34, it becomes a visualized toner image. The transfer paper previously fed by the paper feed roller 15 from the paper feed tray 16 and waiting by the registration roller 14 is conveyed in time with the photoconductor 33, and is transferred by the transfer charger 35.
The toner on 3 is electrostatically transferred onto the transfer paper, and the transfer paper is separated from the photoconductor 33 by the separation charger 36. After that, the toner image on the transfer paper is heated and fixed by the fixing device 13, and is ejected to the paper ejection tray 11 by the paper ejection roller 12.
On the other hand, the toner image remaining on the photoconductor 33 after electrostatic transfer is
The cleaning device 37 presses and removes the photoconductor 33, and the photoconductor 33 is neutralized by the neutralization charger 38. The plotter control unit 39 detects various sensors and controls a drive motor and the like in order to execute the above process.

Here, referring to FIG. 3 showing the state of the image synchronization signal output from the IPU 24 of the reading section 20,
Each image synchronization signal and its relationship will be described. The frame gate signal (/ FGATE) is a signal indicating an effective image range for an image area in the sub-scanning direction, and image data is valid while this signal is at a low level (low active). This / FGATE is asserted or negated at the falling edge of the line sync signal (/ LSYNC). / LSYNC is
A predetermined number of clocks (8CLK in this example) is asserted at the rising edge of the pixel synchronization signal (PCLK), and a predetermined number of clocks (8CLK in this example) after the rising edge of this signal
After that, the image data in the main scanning direction is validated. The image data sent is one for one cycle of PCLK, and is divided into 400 DPI equivalent from the arrow portion in FIG. The image data is transmitted as raster format data with the arrowhead at the beginning. The effective sub-scanning range of image data is usually determined by the transfer paper size.

The system control unit 1 constitutes a system for controlling the entire copying machine, and an operator operates the operation unit 7.
An input state to the reading unit 20, the storage unit 4, the image forming unit 30, and the FAX unit 9 is set by communication, and a process execution instruction is performed. Further, the state of the entire system is displayed on the operation unit 7. The instruction to the system control unit 1 is made by a key input to the operation unit 7 by the operator. In response to an instruction from the system control unit 1, the FAX unit 9 performs binary compression on the sent image data based on the G3 and G4 FAX data transfer regulations, and transfers the image data to a telephone line.
Further, the data transferred to the FAX unit 9 from the telephone line is restored to binary image data, which is sent to the writing unit 31 of the image forming unit 30 and visualized. In response to an instruction from the system control unit 1, the selector unit 5 changes the state of the selector and determines the source of image data for forming an image by the reading unit 2.
0, the storage unit 4, or the FAX unit 9 is selected. The storage unit 4 is used for copying applications such as repeat copying and rotating copying by storing the image data of the original that is normally input from the IPU 24. It is also used as a buffer memory for temporarily storing the binary image data from the FAX unit 9. These data storage instructions are given by the system control unit 1.

The storage unit 4 will be described in detail with reference to FIG. 4, which shows a block diagram of its configuration. The function of each block shown in FIG. 4 will be described below. <Memory Control Unit 43> The memory control unit 43 includes a CPU and logic, communicates with the system control unit 1 to receive commands, sets operating conditions according to the commands, and stores the state of the storage unit 4. The status information is transmitted to the system control unit 1 in order to inform the user. The operation commands from the system control unit 1 include image input, image output, compression, decompression, etc., commands for image input and image output are sent to the image input / output DMAC 41 (described later), and commands related to compression are sent to the image transfer DMAC 44. (Described later), code transfer DMAC 45
(Described later), and transmitted to the compression / expansion unit 46 (described later). <Image input / output DMAC41> Image input / output DMAC41
Is composed of a CPU and logic, and is a memory control unit 43.
It communicates with (described later) to receive commands, sets operating conditions according to the commands, and also performs image input / output DMA.
The status information for notifying the state of C41 is transmitted to the memory control unit 43. When an image input command is received, the input image data is packed as memory data in units of 8 pixels according to the input image synchronization signal, and is output to the memory control unit 43 together with the memory access signal at any time. When receiving the image output command, the image data from the memory control unit 43 is output in synchronization with the output image synchronization signal. <Image memory 42> The image memory 42 stores image data, and is composed of a semiconductor memory element such as DRAM. The total memory amount is, for example, 600 DPI, A3 size of binary image data, 18 Mbytes for two planes. And the memory for data compression is 9 MB and the total is 27 MB. Reading and writing is controlled from the memory control unit 43.

<Image transfer DMAC 44> Image transfer DMA
The C44 is composed of a CPU and a logic, communicates with the memory control unit 43 to receive a command, sets an operating condition in accordance with the command, and also transfers an image transfer DMAC44.
The status information for notifying the state of is transmitted to the memory control unit 43. When it receives a compression command, it outputs a memory access request signal to the memory control unit 43. When the memory access permission signal is active, it receives image data and transfers it to a compression / expansion unit 46 (described later). Further, an address counter that counts up in response to a memory access request signal is built in, and a 22-bit memory address indicating the storage location where the converted image data is stored is output. <Code Transfer DMAC 45> The code transfer DMAC 45 is a CP
It is composed of U and logic, communicates with the memory control unit 43 to receive a command, sets an operating condition according to the command, and sends status information to the memory control unit 43 to inform the state of the code transfer DMAC 45. Send. When it receives a decompression command, it outputs a memory access request signal to the memory control unit 43, and when the memory access permission signal is active, it receives image data and transfers it to a compression / decompression unit 46 (described later). In addition, an address counter that counts up in response to a memory access request signal is incorporated, and a 22-bit memory address indicating a storage location where the converted image data is stored is output. In addition,
The descriptor access operation of the DMAC will be described later. <Compressor / decompressor 46> Comprised of a CPU and logic, communicates with the memory controller 43 to receive a command, sets an operating condition in accordance with the command, and a status for notifying the state of the compressor / decompressor 46. The information is transmitted to the memory control unit 43. Binary data is converted to MH (Modified Huffma
n) Process by the encoding method. <HDD controller 47> Comprised of a CPU and logic, it communicates with the memory control unit 43 to receive commands, sets operating conditions in accordance with the commands, and H
Status information is transmitted to the memory control unit 43 to notify the state of the DD controller 47. The status information of the HDD 48 is read and the data is transferred. This HDD
The controller 47 can also transmit the code data after compression conversion to the HDD 48 by using the descriptor method. <HDD48> A secondary storage device, which is a hard disk.
The HDD is a large-capacity storage device for storing compression-converted code data (transferred from a buffer area in the image memory 42 for storing conversion data).
According to an instruction from the controller 47, the operation of writing the code (image) data in the internal hard disk (HD) and saving it, and the operation of reading the saved code data and sending it to the HDD controller 47 are performed.

Memory control unit 4 which is a component of the storage unit 4
The internal configuration of No. 3 will be described in detail with reference to the block diagram of FIG. The function of each block shown in FIG. 5 will be described below. <Input / output image address counter 435> Image input / output DM
An address counter that counts up in response to an input / output memory access request signal from the AC 41 outputs a 22-bit memory address indicating a storage location where input / output image data is stored. The address is initialized once when the memory access is started. <Transfer image address counter 437> An address counter that counts up in accordance with a transfer memory access permission signal and indicates a storage location where transfer image data is stored.
Output bit memory address. The address is initialized once when the memory access is started. <Line setting unit 431> When the image (semiconductor) memory 42 is used as a buffer at the time of image input, the difference comparison unit 4
At 32 (described later), a value to be compared with the difference result between the input processing line and the transfer line output from the difference calculation unit 430 (described later) is set. An arbitrary value is set by the system control unit 1. <Difference calculation unit 430> When an image is input, the compression / decompression unit 46
Subtracts the number of input / output processing lines output by the image input / output unit from the number of transfer processing lines output by
Output to 2. <Difference comparison unit 432> At the time of image input, the difference calculation unit 43
The difference line number output by 0 is compared with the set value output by the line setting unit, and if the difference line number = the set value, an error signal is output, and the difference line number is 0. Then, the transfer request mask signal of the comparison result output to the arbiter 434 (described later) is activated. Other than that, or when the input / output image is not in operation, the active is not output.

<Address Selector 436> Arbiter 43
The selector selected by 4 selects either the input / output image address or the transfer image address. <Arbiter 434> It arbitrates the memory access request signal from the image input / output DMAC 41, the image transfer DMAC 44, and the code transfer DMAC 45, and outputs the access permission signal.
A refresh control circuit is built-in, and priority is given to refresh, image input / output DMAC, image transfer DMAC, and code transfer DMAC in this order, and a memory access permission signal is actively output to the permission destination under the condition that memory access is inactive. Further, the permission signal is output and the image memory 42
Address is selected, and a trigger signal indicating the start of memory access is output to the access control circuit 438 (described later). <Request Mask 433> The transfer memory access request signal for access of the compression / expansion unit 46 is masked (set in the disable state) based on the comparison result from the difference comparison unit 432, and the transfer process is stopped. <Access control circuit 438> The input physical address is divided into a row address and a column address corresponding to a DRAM which is a semiconductor memory by a signal from the access control circuit 438 and output to an 11-bit address bus. Further, according to the access start signal from the arbiter 434, D
RAM control signals (RAS, CAS, WE) are output.

The operation of the entire storage unit 4 includes image input,
When storing (saving) data, the system control unit 1
In response to an image input instruction from the memory control unit 43, the memory control unit 43 is initialized to wait for image data, and the scanner of the reading unit 20 operates to input image data to the storage unit 4. The input image data is once written in the image (semiconductor) memory 42. The number of processing lines of the written image data is counted by the image input / output DMAC 41 and input to the memory control unit 43. The compression / expansion unit 46 outputs the transfer memory access request signal in response to the image transfer command, but the request signal is masked by the request mask unit 433 of the memory control unit 43, and the actual memory access is not performed. . When the input data from the image input / output unit is completed by one line, the mask of the transfer memory access request signal is released, the semiconductor memory 42 is read, and the transfer operation of the image data to the compression / decompression unit 46 is started. . In addition, the difference calculation unit 430 sets 2 during operation.
The difference between the numbers of the two processing lines is calculated, and if it becomes 0, the transfer memory access request signal is masked so that there is no address overtaking. Through the above operation, transfer control according to writing / reading to / from the image memory 42 is performed.

Here, the image (video) input DMAC 41
The descriptor access operation and the data transfer operation for the semiconductor memory 42 will be described. FIG. 6 is a schematic diagram for explaining a descriptor format and a transfer operation by the descriptor. Referring to FIG. 6, the image data in the figure is divided into four bands of bands 1 to 4, and the image data of the number of lines set in each band is transferred according to the instructions of each descriptor 1 to 4. To do. 1
Explaining the procedure to add the total number of transfer lines in the image,
First, when the video input DMAC 41 receives a transfer command, the DMA is activated, and the descriptor 1 in the semiconductor memory 42 is read-accessed to the chain destination address (a) preset by the CPU in the internal descriptor storage register 411. Is loaded into the descriptor storage register 411. The loaded content consists of 4 words.The chain destination address that indicates the storage address of the next descriptor, the data storage destination address that indicates the start address of the data to be transferred, and the data amount of the data to be transferred are the number of lines. The number of data transfer lines indicated by and the format information indicating whether or not a CPU interrupt is generated when the transfer of the set number of lines is completed. In the least significant bit of the format information, a bit indicating whether or not to generate a CPU interrupt when the transfer of the set number of lines is completed is arranged. When 0, a CPU interrupt is generated, and when 1, a CPU interrupt is masked. In the example of FIG. 6, one image is divided into four bands, and the least significant bits of this format information of four descriptors are 0, 0, 0, 0 in order from 1 to 4. CP when the image data transfer of each band is completed
A U interrupt occurs, and when the interrupt occurs, the number of lines set in each descriptor is added to transfer the image to the image memory 42 as the primary storage unit while detecting the transfer end timing and the number of lines. .

As described above, the image (video) input D
The MAC 41 temporarily stores the input image in the image (semiconductor) memory 42 as the primary storage unit, and then transfers this image to the HDD 48 as the secondary storage device. In the present invention, the input image is subjected to compression processing,
The compressed data is stored in the secondary storage device. Therefore, the input image stored in the image memory 42 is sent to the compression / expansion unit 46 by the descriptor set in the image transfer DMAC 44, and the compression processing is performed there. The encoded converted data (intermediate image data) after the compression processing is transferred to the buffer area provided in the image memory 42 for storing the converted data by the descriptor set in the code transfer DMAC 45. After that, the data is further transferred from the buffer area to the secondary storage device. Therefore, the image memory 42 as the primary storage unit is provided with the image (video) input DMAC4.
In addition to the buffer area of the input image transferred by 1, the code transfer DMAC 46 also uses it as a buffer area for temporarily storing the converted data compressed through the compression / expansion unit 46. As described above, the input image is input by the image (video) input DMAC 41 or the converted data (intermediate image data) compressed by the compression / expansion unit 46 by the code transfer DMAC 46 is temporarily used as an image (semiconductor) memory as a primary storage unit. After being stored in 42, this image is transferred and stored in the HDD 48 as a secondary storage device. In the present invention, the input image is subjected to compression processing, and the converted data after compression is transferred to the secondary storage device and stored, but during the transfer control, a continuous area is secured in the secondary storage device. The operation mode can be selected whether to transfer or to secure the divided area and transfer. Next, an embodiment relating to such transfer control will be described. According to the method described above with reference to FIG.
The image data input to the image transfer DMAC 44 transfers the image data to the compression / expansion unit 46, and the data is compressed and converted there. DMA transfer of converted compressed data
The data is transferred to the data conversion memory secured in the image memory 42 in C45. The number of data transfer lines of the image transfer DMAC 44 at that time is set to the number of lines of image data, and is set to transfer by one descriptor. Also, code transfer D
The transfer destination of the code of the MAC 45 is set in the image memory 42. The code transfer DMAC 45 counts the code amount and can recognize the compressed data amount.

The data transferred after being compressed to the data conversion memory secured in the image memory 42 as the primary storage is
The HDD controller 47 communicates with the memory control unit 43 to receive a command, and the HDD 48, which is a secondary storage device, receives the command.
Save the data to. The storage area of the HDD 48, which is a secondary storage device, is secured by the amount of data transferred to the data conversion memory secured in the image memory 42 after compression.
Three management tables of an image ID table, a descriptor table, and a block table are used to manage acquisition and release of the storage area of the HDD 48, which is a secondary storage device. These management tables are stored in the system controller 1
It is stored in a non-volatile memory (not shown). First,
The "image ID table" will be described. FIG. 7 is a memory map diagram showing a configuration example of an image ID table necessary for the memory control unit 43 to acquire and release the storage area of the HDD 48. This image ID table is
Under the table ID consisting of 0 to n, one table is added to the image I.
D and the start descriptor table ID. The image ID is the image memory (primary storage unit) 42, H
Unique ID in DD (Secondary Storage) 48
(Identification information), and duplicate IDs in different image data in each storage unit must not exist. The image ID is
Since 0 (NULL) is the initial state on the image ID table, it cannot be used as the system reservation ID.
The start descriptor table ID indicates the ID of the descriptor table acquired first. In the initial state of the image ID table, the image ID is set to NULL and the start descriptor table ID is set to EOD (End Of Discriptor).

Next, the "descriptor table" will be described. In FIG. 8, the HDD is controlled by the memory control unit 43.
It is a memory map figure which shows the structural example of the descriptor table required in order to acquire and release 48 memory areas. This descriptor table has one table under the table ID consisting of "0 to n" and a start block ID.
, Number of used blocks, and next descriptor table ID
It consists of and. The start block ID indicates the ID of the first acquired block. The number of used blocks means the number of blocks continuously acquired from the start block. The next descriptor table ID has a chain structure when the storage area of the HDD 48 cannot be continuously acquired (used), and the storage area is discontinuously acquired and can be managed. If an EOB (End Of Block) code is inserted as the start block ID,
It can be determined as an unused descriptor. When the EOT (End Of Table) code is inserted, the next descriptor table ID can be determined to be the end of the chain. Similarly, in the initial state of the descriptor table, the start block is set to EO.
The number of used blocks is set to “0” in B, and the next descriptor table ID is set to EOT. Next, the “block table” will be described. FIG. 9 shows the memory control unit 43.
FIG. 7 is a memory map diagram showing a configuration example of a block table required for acquiring and releasing a storage area of the HDD 48 by. In this block table, the storage area of the HDD 48 is subdivided into fixed length sizes (the subdivided unit areas are referred to as "blocks" hereinafter), the usage state of one block is represented by 1 bit, and "0" is an unused block. , "1" is defined as a used block, and the use state of the compressed image storage area is managed.

The HDD 4 uses the "image ID table", "descriptor table" and "block table" described above.
8 storage areas are managed, a continuous area and a divided area are secured for the image unit to be processed that is temporarily stored in the image memory 42 after compression, and this image data is stored in the designated area. can do. The setting as to whether the data storage area in the HDD 48 may be continuously acquired or may be acquired by dividing the data is set by a key operation from the operation unit 7. Next, an embodiment relating to the acquisition / release processing of the storage area of the HDD 48 executed by the memory control unit 43 according to the continuous / discontinuous (division) setting will be described. 10 and 11 show flowcharts of this example. Referring to FIG. 10, when an acquisition request is generated, first, at the beginning of the process for an image to be stored (saved) as a target this time, a table ID counter (a counter for instructing an image ID table) necessary for the image ID table acquisition process is displayed. The variable of the acquired block table counter is set to 0, initialization is performed (S1), and an image ID table acquisition is tried. When the image ID table is acquired, the image ID
A loop search is performed from the top of the image ID table for the table having a null value. If the table ID counter reaches the final table ID value in the loop search, all are used, so it is checked whether the table ID count is FULL (S2). If it is FULL, the image ID table It is determined that the image cannot be acquired, the image ID table FULL is returned, abnormality processing is performed (S3), and the processing ends. If the table ID count is not FULL in step S2 (that is, the image ID exists), the table ID count is
The table ID counter is incremented until it becomes a null value, that is, an empty image ID table exists (S4-YES) (S4).
5), loop search the image ID table. As a result,
If the empty image ID table exists (S4-YES),
The requested image ID is set to the image ID of the target image ID table (S6).

Next, the descriptor table acquisition is tried. First, table I required for descriptor acquisition processing
The variable of the D counter (the counter that indicates the descriptor table) is set to 0, and the previous descriptor table ID
(Variable) is initialized to EOD (S7). To obtain the descriptor table, a loop search is performed from the beginning of the descriptor table for a table whose start block is EOB. When the table ID counter reaches the final table ID value in the loop search, all are used,
It is checked whether or not the table ID count is FULL (S8). If it is FULL, it is determined that the descriptor table cannot be acquired, the descriptor table FULL is returned, an abnormal process is performed (S9), and the process is exited. If the table ID count is not FULL in step S8 (that is, the descriptor table ID exists), the table ID counter is incremented until the start block becomes EOB, that is, there is a free descriptor table (S10-YES) ( S11), the descriptor table is loop-searched. As a result, if there is a free descriptor table (S10-YES), the process is divided depending on whether or not the previous descriptor table ID is EOT, and if it is EOT (S12-EYS), it is determined to be the first descriptor table. The retrieved descriptor table ID (counter value) is set in the start descriptor table ID of the acquired image ID table (S6) (S13). On the other hand, when a value other than EOT is assigned to the previous descriptor table ID (S12-NO), the descriptor table ID (counter value) searched for in the next descriptor table ID of the descriptor table set in the previous descriptor table ID Is set (S1
4). Since the descriptor table has been acquired, the table ID counter (counter value) acquired in the previous step is set in the previous descriptor table ID (variable) (S15).

Next, the block table acquisition is tried. First, the variables of the block ID counter (the counter that indicates the block) and the continuous acquisition block counter (the counter that indicates the number of blocks) necessary for the block table acquisition process are set to 0, and the initialization process is performed by resetting the loop flag. Perform (S16). To obtain the block table, a loop search is performed from the head block of the block table to see if it is a block in use, and an unused block is processed according to the set continuous / division instruction. For this reason, it is checked whether or not a loop flag (described later) that is set at the time of dividing acquisition is set (S17), and when the flag is set, the sequence returns to the sequence of step S7 for performing the dividing acquisition process. Other than the above, as a process of this block acquisition loop search, it is checked whether or not the block ID counter is FULL (S18). When the block ID counter reaches the final table ID value, it is checked whether all the table IDs are used. When the counter is FULL (S18-YES), it is determined that the block table cannot be acquired. The block table FULL is returned, abnormal processing is performed (S19), and the processing ends.

In step S18, the block ID count is
If it is not FULL, that is, if the target block exists, it is checked whether the block is in use (S20). If "1" is not written in the block table (S20-NO), it is an unused block.
The acquisition process is performed as a usable block, and the continuous acquisition block counter is incremented by +1 (S2).
1). Here, processing for setting data to the start block ID in the descriptor table currently being acquired is performed. Therefore, it is checked whether or not the current value of the continuous acquisition block counter is "1" (S22),
If the value is "1", since it is the first block, the value of the block ID counter is written and set to the start block ID in the descriptor table currently being acquired (S23). If the value is other than "1", the setting process is unnecessary and this process is skipped. Thereafter, the acquired block counter is incremented by +1 (S24).
Next, it is checked whether or not there is an instruction to secure a continuous area (S25). If a continuous area is instructed, it is checked whether the value of the continuous acquisition block counter has reached the number of acquisition request blocks (S26). . Here, when the number of acquisition request blocks has been reached, the value of the continuous acquisition block counter is set to the number of used blocks in the descriptor table that is currently being acquired in which the start block ID is set in the previous step S23, and The data indicating the usage state is changed from "0" to "1" (S2
8). When the number of acquisition request blocks has not been reached, the block ID counter is incremented by +1 (S31), and the process returns to the sequence of step S17 for starting the search for the next target block. On the other hand, when the continuous area allocation is not instructed (discontinuous (divided) area instruction) (S25-NO), it is checked whether the value of the acquired block counter has reached the acquisition request block number (S27). Here, in either the case where it has reached or the case where it has not reached, the processing is branched to step S28 and step S17, similar to the processing in step S26.

In step S20 for searching the target block, if the target block is already used (S20-YES), the process shifts to the process for searching the next target block (S31 → S17). In the current acquisition process, I already acquired one or more blocks.
That is, if the sequence after step S21 has been performed (S30-NO), there is a process that must be performed before the next block search. The processing is branched depending on whether or not there is an instruction to secure a continuous area. If the continuous area is instructed (S32-YES), the continuous area cannot be reserved by the used block (S20-YES), so the continuous acquisition block counter (S
21, reference), and clears the block ID counter value (see S23) set as the start block ID in the descriptor table currently being obtained (S3).
4). After that, the sequence is returned to the sequence of step S17 for newly starting the search for the target block. If there is no instruction to secure a continuous area (secured in a divided area) (S32-N
O), the continuous number of blocks acquired here is separated, so the current value of the continuous acquisition block counter is set to the number of used blocks in the descriptor table that is currently being acquired, and the data indicating the usage status of the blocks acquired at the same time is displayed. The value is changed from "0" to "1", and the loop flag (see S17) is set to chain the divided areas (S33). After that, the process returns to the sequence of step S17 for starting the search for the next target block. in this case,
Since the loop flag has been set (S17-YES), the descriptor ID is secured for the division acquisition step S7.
Then, the sequence after this step is executed again.

As described above, it is instructed whether the storage area of the secondary storage means (HDD 48) which is the transfer destination is secured by continuous / division (discontinuous), the area is acquired according to the instruction, and the generated descriptor is generated. The operating condition is set by and the DMA transfer is performed. Therefore, image data is input and output, and an image memory 42 as a primary storage means having a transfer buffer function and an HD as a secondary storage means for storing an image signal input through the primary storage means.
In accordance with the capacity of the storage means in the storage device unit configured by D48 and the state of the storage medium, an operation mode is selected so that the storage means can be effectively used, a storage area is secured, and compression is performed. It becomes possible to transfer and save the processed image data. In particular, according to the configuration of the present invention, the secondary storage means of the storage device unit includes the HDD, CD-R, and C.
When a storage medium such as D-RW is used, basically, a plurality of data transfers from the primary storage means to the secondary storage means cannot be performed at the same time. Therefore, by selecting the operation mode, one image data transfer is performed. Sometimes it is possible to minimize the occupation time of the secondary storage means. Furthermore, when the image signal input to the primary storage means (image memory) is subjected to data conversion such as compression and stored in the secondary storage means (HDD),
Primary storage means (stores input image data) → compressor / decompressor (data conversion) → primary storage means (stores converted data in a compressed data storage area of the primary storage means) → secondary storage means (compresses and converts to secondary storage means) When performing data processing / transfer such as (storing data), it is possible to efficiently process multiple image signals by having a configuration that can secure the necessary storage area in the data processing order. It is possible to optimally control the storage device according to the configuration of the input / output unit used in the processing device.

The following embodiment is a series of transfer processing in which the converted image data compressed by the compression / expansion device is transferred to the compressed data storage area of the primary storage means and then the compressed converted data is stored in the secondary storage means. It is intended to minimize the time required for processing and improve productivity. A means for storing compressed and converted data in the secondary storage means (HDD 48) in a continuous / interrupted (discontinuous) area or selecting an operation mode, and enabling transfer control in the continuous / interrupted mode according to the instruction. In the embodiment described above, the operation of saving the compressed conversion data in the secondary storage means after the transfer to the compressed data storage area of the primary storage means is the shortest in this example when the operation mode is the continuous area securing mode. Set the conditions to be performed in time. In this example, this setting condition is used as a condition for completing the transfer by one data transfer operation made possible by securing the transfer destination in the secondary storage unit (HDD 48) as a continuous area. That is, a capacity corresponding to the continuous storage area of the HDD 48 is secured as a buffer storage area for storing the converted (compressed) data in the primary storage means (image memory 42), and such transfer operation is enabled.

To execute this transfer operation, the image memory 42
It is necessary to secure a buffer storage area for storing the conversion data and to set a controller (code transfer DMAC 45) for controlling the transfer of the conversion data to the secured area. Perform processing. For securing the buffer storage area to store the conversion data,
Since the capacity corresponding to the continuous storage area of the HDD 48 is secured, the same amount as that used for the processing for securing the continuous storage area of the HDD 48 (the capacity capable of storing the compressed data of one image) is set. I can decide. In this way, the capacity required for the storage area is acquired, and the acquired capacity is set to secure this buffer area. In addition, in order to transfer the compressed conversion data to the buffer storage area for storing the reserved conversion data, the code transfer D
The control condition set in the MAC 45 is designated by the descriptor. Information for transferring a predetermined amount of data to the reserved buffer storage area is set in this descriptor. After transferring the compressed converted data to the buffer area (memory for data conversion) secured in the image memory 42 by the code transfer DMAC 45, the memory control unit 43 sends and receives an access request command to the controller 47 of the HDD. The controller 47 of the HDD that has performed the image memory 42 according to the transfer control operation described above.
From the buffer area to the continuous area secured in the HDD 48.

In the embodiment shown below, a series of transfer operations is performed in which the converted image data compressed by the compression / expansion device is transferred to the compressed data storage area of the primary storage means and then the compressed converted data is stored in the secondary storage means. It is intended to effectively use resources and improve productivity. The operation mode in which the compressed and converted data is stored in the secondary storage means (HDD 48) with the divided (discontinuous) area secured is shown in the above-mentioned embodiment. In addition, it relates to the condition setting for executing the operation of storing the compressed conversion data in the secondary storage means after the transfer to the compressed data storage area of the primary storage means without wastefully occupying resources. In this example, the data transfer operation is performed by dividing the setting condition into a plurality of times by securing the transfer destination in the secondary storage unit (HDD 48) as a divided area, and the operation is performed using a resource of an appropriate scale each time. The conditions for That is, as the buffer storage area for storing the converted data in the primary storage means (image memory 42), a capacity corresponding to each divided storage area of the HDD 48 is secured and the transfer operation is performed.

To execute this transfer operation, the image memory 42 is used.
It is necessary to secure a buffer storage area for storing the conversion data and to set a controller (code transfer DMAC 45) for controlling the transfer of the conversion data to the secured area. Perform processing. For securing the buffer storage area to store the conversion data,
Since the capacity corresponding to the divided storage area of the HDD 48 is secured, the amount is the same as the capacity used for the processing for securing the divided storage area of the HDD 48 (the capacity capable of storing the compressed data of each divided image). You can decide. In this way, the capacity required for the storage area is acquired, and the acquired capacity is set to secure this buffer area. In addition, the control condition set in the code transfer DMAC 45 in order to transfer the compressed conversion data to the buffer storage area for storing the secured conversion data is instructed by the descriptor. Information for transferring a predetermined amount of data to the reserved buffer storage area is set in this descriptor. At the time of a transfer operation in which the compressed converted data is stored in the HDD 48, the coded transfer DMAC 45 transfers the compressed converted data to a buffer area (data conversion memory) secured in the image memory 42 and temporarily stores it in the buffer area. To be done. At this time, the memory control unit 43 transmits an access request command to the HDD controller 47, and the received HDD controller 47 follows the transfer control operation described above to transfer the image memory 4 to the image memory 4.
The transfer from the second buffer area to the divided area secured in the HDD 48 is started. This transfer operation is repeated for the number of divided areas.

In the embodiment described below, a series of transfer of the converted image data compressed by the compression / expansion device to the compressed data storage area of the primary storage means and thereafter storing the compressed converted data in the secondary storage means. This is related to transfer, and is intended to minimize transfer time, effectively use resources, and improve productivity by changing settings in accordance with transfer speed. Secondary storage means (HD
In any of the above-described embodiments in which the compressed / converted data is transferred to the D48) by securing a continuous / interrupted (discontinuous) area, in either case, the capacity secured in the buffer storage area for storing the converted data is It is assumed that the capacity is equivalent to the storage area of the HDD 48 secured for performing the transfer operation once. However, in order to achieve the intended purpose, the capacity is stored in the compressed data storage area of the primary storage means (image memory 42). The optimum condition is that the amount of incoming data and the amount of outgoing data are the same, that is, the transfer rates are equal. If this condition is not met, the compressed data storage area of the primary storage means is adjusted in accordance with the difference in transfer rate for optimization. The transfer speeds of the data entering and leaving the compressed data storage area of the primary storage means are the processing speed of the compression / expansion unit 46,
It depends on the transfer rate of the HDD 48.

Therefore, the system controller 1 uses the compression / expansion unit 4
The device name and version of No. 6 and its data processing speed are held as a data table, and the device name and version of the compression / expansion device 46 are read from the compression / expansion device at the time of initial setting of the system. And the acquired processing speed of the compression / expansion device is entered in the process execution instruction, and the memory control unit 43 of the storage unit 4 is acquired.
The process is instructed to be used for setting the operation condition of the transfer control described above. Also, the transfer speed of the HDD 48 is HD
The model name of the HDD 48 is acquired through communication with the D controller 47, and the transfer speed of the HDD 48 to be used is read from the data table held in the system control unit 1 and used to set the operating condition of transfer control. If the processing speed of the obtained compression / expansion device 46 is S1 and the transfer speed to the HDD 48 is S2, if S1 is faster than S2, increasing the amount of data in one transfer increases the occupation of the HDD 48. Therefore, the buffer storage area for storing the converted data is adjusted to have a small capacity. When adjusting the capacity of the buffer storage area, a method of adjusting the buffer storage area independently and a method of changing the area reserved in the HDD 48 at the same time as the adjustment of the buffer storage area can be adopted. According to the former method, the capacity of the buffer storage area is optimized, and the image memory 42 can be effectively used. In the latter method, the transfer is performed in the division mode. For example, if S1 is faster than S2, the capacity of the area to store the converted data is 1MB, S
If 2 is faster than S1, the capacity of the area for storing the converted data is set to 4 MB, and the transfer and storage to the HDD 48 in that unit are performed. This makes it possible to further optimize the occupation time of the HDD 48.

[0036]

(1) Effect corresponding to the invention of claim 1 When transferring from the buffer area of the primary storage means for temporarily storing the input / output image to the secondary storage means for storing compressed data, the transfer destination Input / output means (data conversion means such as data compression means) , Etc.) and the setting of the secondary storage unit according to the capacity of the secondary storage unit, thereby improving the utilization rate of resources, shortening the transfer time, and eventually the storage device including the primary storage unit and the secondary storage unit. It is possible to improve the productivity of the image processing apparatus equipped with the unit. (2) Effect corresponding to the invention of claim 2 In addition to the effect of (1) above, transfer processing from the buffer area of the primary storage means to the secondary storage means for storing compressed data is performed.
Since the storage area for performing the data transfer operation once is secured as the buffer area of the primary storage means, the transfer operation can be optimized (3). Effect In addition to the effects of (1) and (2) above, transfer from the buffer area of the primary storage means to the secondary storage means for storing compressed data is divided, and the buffer area is used when the data transfer operation is performed a plurality of times. Since the capacity of each transfer operation is secured by an amount equivalent to the transfer destination capacity used in one transfer operation, the transfer operation is optimized for the purpose of improving the resource utilization rate and shortening the transfer time. (4) The effect corresponding to the invention of claim 4 In addition to the effects of (1) to (3) described above, depending on the type and characteristics of the secondary storage means, the data transfer rate is low, A state where a continuous area cannot be secured on the storage medium Since the data transfer time (speed) that changes depending on certain cases is checked, data conversion such as compression, adjustment of the buffer area capacity, or division transfer operation that matches the input speed of the image signal are selected. It is possible to optimize the transfer operation for the purpose of improving the resource utilization rate and shortening the transfer time. (5) The effect corresponding to the invention of claim 5 When transferring from the buffer area of the primary storage means for temporarily storing the input / output image to the secondary storage means for storing compressed data, the type of the secondary storage means, The data transfer time (speed) corresponds to the case where the data transfer speed differs depending on the characteristics or the continuous area cannot be secured and proper conditions cannot be maintained.
Is checked, and the capacity of the buffer area is adjusted to match the data conversion such as compression and the input speed of the image signal, so the purpose is to improve the utilization rate of resources (primary storage means) and shorten the transfer time. It is possible to optimize the transfer operation.

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram showing a digital copying machine as an embodiment of an image processing apparatus of the present invention.

FIG. 2 is a view of a document table in the digital copying machine of FIG. 1 viewed from above.

FIG. 3 is a diagram showing a state of an image synchronization signal output from an IPU of a reading unit in the digital copying machine of FIG.

4 is a block diagram showing a configuration of a storage unit in the digital copying machine of FIG.

FIG. 5 is a block diagram showing an internal configuration of a memory control unit which is a constituent element of a storage unit.

FIG. 6 is a schematic diagram for explaining a format of a descriptor and a transfer operation by the descriptor.

FIG. 7 is a memory map diagram showing a configuration example of an image ID table necessary for obtaining and releasing a storage area of an HDD.

FIG. 8 is a memory map diagram showing a configuration example of a descriptor table necessary for acquiring and releasing a storage area of the HDD.

FIG. 9 is a memory map diagram showing a configuration example of a block table necessary for obtaining and releasing a storage area of an HDD.

FIG. 10 is an HDD that is executed according to continuous / division settings.
5 is a flowchart (part 1) of the acquisition and release processing of the storage area of the.

FIG. 11: HDD executed according to continuous / division setting
5 is a flowchart (part 2) of the acquisition and release processing of the storage area of FIG.

[Explanation of symbols]

1 ... System control unit, 2 ... Operation unit, 3 ... F
AX section, 4 ... storage section, 5 ... selector section, 20 ... reading section, 21 ... document table,
23 ... CCD, 24 ... Image processing unit (IPU: image processing unit), 25 ...
Scanner control unit, 30 ... Image forming unit, 39 ... Plotter control unit, 41 ... Image input / output DMAC,
42 ... Image memory, 43 ... Memory control unit, 44 ... Image transfer DMAC, 45 ... Code transfer DMAC, 46 ... Compression / expansion unit, 47 ... H
DD controller, 48 ... HDD (hard disk drive).

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Yasuhiro Hattori             1-3-3 Nakamagome Stock Market, Ota-ku, Tokyo             Inside Ricoh (72) Inventor Michika             1-3-3 Nakamagome Stock Market, Ota-ku, Tokyo             Inside Ricoh (72) Inventor Yasumitsu Shimizu             1-3-3 Nakamagome Stock Market, Ota-ku, Tokyo             Inside Ricoh (72) Inventor Takao Okamura             1-3-3 Nakamagome Stock Market, Ota-ku, Tokyo             Inside Ricoh F-term (reference) 5C073 BA01 BB07 BB09 BD02 CA02

Claims (5)

[Claims] 1. A primary storage means having a function as a buffer for input / output images / intermediate images, a data conversion means for performing data conversion on the input / output images, and a secondary storage means for storing the images after the data conversion. A transfer control unit that controls access to the primary storage unit and the secondary storage unit, and controls image transfer between the buffer areas provided in the primary storage unit and between the buffer areas of the primary storage unit and the secondary storage unit. In the image processing device, the transfer control means secures a continuous storage area or a divided storage area in the storage medium of the secondary storage means from the buffer area of the primary storage means, and transfers the unit image to the area. An image processing apparatus, wherein an operation mode is executable, and transfer is performed according to an operation mode instructed by setting. 2. The image processing apparatus according to claim 1, wherein the transfer control means transfers a unit image by securing a continuous storage area in a storage medium of the secondary storage means from a buffer area of the primary storage means. When executing the operation mode, secure a capacity equivalent to the continuous storage area of the secondary storage means as the buffer area of the primary storage means for storing the conversion data so that the transfer is completed by one data transfer operation. An image processing device characterized in that 3. The image processing apparatus according to claim 1 or 2, wherein the transfer control means secures a divided storage area in a storage medium of the secondary storage means from a buffer area of the primary storage means to display a unit image. When executing the operation mode to transfer, a capacity equivalent to the divided storage area of the secondary storage means is secured as a buffer area of the primary storage means for storing the converted data so that the data transfer operation is transferred for each divided area. An image processing apparatus characterized in that. 4. The image processing apparatus according to claim 1, wherein the transfer control unit performs data conversion on the image in the primary storage unit and then transfers the image to the buffer area of the primary storage unit. The transfer rate of the converted data and the transfer rate of the image transferred from the buffer area to the secondary storage unit are respectively acquired, and a continuous storage area or a divided storage area is secured according to the comparison result of both transfer rates. The image processing apparatus is characterized in that which operation mode to perform is selected or the capacity of the buffer area of the primary storage means is adjusted. 5. A primary storage means having a function as a buffer for input / output images / intermediate images, a data conversion means for performing data conversion on the input / output images, and a secondary storage means for storing the images after the data conversion. A transfer control unit that controls access to the primary storage unit and the secondary storage unit, and controls image transfer between the buffer areas provided in the primary storage unit and between the buffer areas of the primary storage unit and the secondary storage unit. In the image processing device, the transfer control means stores the converted data in the primary storage means when transferring the image after data conversion from the buffer area of the primary storage means to the storage area of the storage medium of the secondary storage means. A buffer area of the primary storage means is secured after a capacity corresponding to the storage area of the secondary storage means is secured as a buffer area, and data conversion is performed on the image of the primary storage means. The transfer speed of the converted data transferred to the storage area and the transfer speed of the image transferred to the secondary storage means from the buffer storage area are respectively acquired and secured in the primary storage means according to the comparison result of both transfer speeds. An image processing apparatus, wherein the capacity of the buffer area is adjusted.