JP2004095909A - Method and device for plasma treatment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a plasma treatment method which can attain higher productivity than the conventional one by preventing surface arcing on a substrate, and to provide a plasma treatment device. <P>SOLUTION: In a state in which an argon gas is supplied into a vacuum chamber 1, a relatively low level of high frequency power, for example, 300 W is supplied to a placement stage 2 (a lower electrode) from a high frequency power supply 11 to generate a weak plasma and act it to a semiconductor wafer W so as to control the state of the electric charge accumulated in the semiconductor wafer W. To make the charge easily momvable, a DC voltage (HV) is not applied to an electrostatic chuck 4. Then, applying of the DC voltage to the electrostatic chuck 4 is started, and then, high frequency power, for example 2000 W, for a usual treatment is supplied to generate a strong plasma and perform the usual plasma treatment. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a plasma processing method and a plasma processing apparatus, and more particularly, to a plasma processing method and a plasma processing apparatus for performing a plasma etching process or the like on a substrate to be processed such as a semiconductor wafer or an LCD substrate.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, a plasma processing method for processing a substrate to be processed such as a semiconductor wafer or an LCD substrate using plasma has been frequently used. For example, in a semiconductor device manufacturing process, as a technique for forming a fine electric circuit on a substrate to be processed, for example, a semiconductor wafer, a thin film or the like formed on the semiconductor wafer is removed by etching using plasma. The plasma etching process is frequently used.
[0003]
In an etching apparatus for performing such a plasma etching process, for example, plasma is generated in a processing chamber (etching chamber) configured so that the inside can be hermetically closed. Then, a semiconductor wafer is placed on a susceptor provided in the etching chamber, and etching is performed.
[0004]
Various types of means for generating the plasma are known. Among them, in an apparatus of a type in which high-frequency power is supplied to a pair of parallel plate electrodes provided so as to face each other vertically to generate plasma, one of the parallel plate electrodes, for example, a lower electrode also serves as a susceptor. . Then, a semiconductor wafer is arranged on the lower electrode, a high frequency voltage is applied between the parallel plate electrodes to generate plasma, and etching is performed.
[0005]
[Problems to be solved by the invention]
However, in such an etching apparatus, during etching, so-called surface arcing in which a lightning-like abnormal discharge occurs on the surface of the semiconductor wafer may occur.
[0006]
In the surface arcing, for example, when an insulator layer is formed on a conductor layer and such an insulator layer is etched, for example, an insulator layer made of a silicon oxide film is etched and a lower metal layer is formed. For example, when a contact hole leading to a conductive layer is formed, a silicon oxide film whose thickness has been reduced by etching is often destroyed.
[0007]
When such abnormal discharge occurs, many parts of the silicon oxide film in the semiconductor wafer are destroyed, so that most elements of the semiconductor wafer become defective. At the same time, metal contamination occurs in the etching chamber, so that the etching process cannot be continuously performed, and the inside of the etching chamber needs to be cleaned. For this reason, there has been a problem that productivity is significantly reduced.
[0008]
The present invention has been made in view of such conventional circumstances, and a plasma processing method and a plasma processing method capable of preventing the occurrence of surface arcing occurring on a substrate to be processed and improving the productivity as compared with the related art. It is intended to provide a device.
[0009]
[Means for Solving the Problems]
In the invention of claim 1, in performing plasma processing by applying plasma to a substrate to be processed, before performing the plasma processing, plasma that is weaker than plasma used for the plasma processing is applied to the substrate to be processed. The charge state of the substrate to be processed is kept constant, and thereafter, the plasma processing is performed.
[0010]
According to a second aspect of the present invention, in the plasma processing method according to the first aspect, the weak plasma is applied to the substrate to be processed for a predetermined time, and thereafter, a DC voltage is applied to an electrostatic chuck for suction-holding the substrate to be processed. Is applied.
[0011]
According to a third aspect of the present invention, in the plasma processing method according to the second aspect, before the weak plasma is extinguished, application of a DC voltage to the electrostatic chuck is started.
[0012]
According to a fourth aspect of the present invention, in the plasma processing method according to any one of the first to third aspects, the weak plasma is Ar gas or O gas. ₂ Gas or CF ₄ Gas or N ₂ It is characterized by being a plasma formed by a gas.
[0013]
The invention according to claim 5 is the plasma processing method according to any one of claims 1 to 4, wherein the weak plasma is 0.15 to 1.0 W / cm. ² Characterized by being formed by the high-frequency power.
[0014]
According to a sixth aspect of the present invention, in the plasma processing method according to any one of the first to fifth aspects, the weak plasma is applied to the substrate to be processed for 5 to 20 seconds.
[0015]
According to a seventh aspect of the present invention, in the plasma processing method according to any one of the first to sixth aspects, at the start of the plasma processing, the application of high-frequency power for generating plasma to the electrostatic chuck is started. The method is characterized in that application of a DC voltage is started, and at the end of the plasma processing, application of the DC voltage to the electrostatic chuck is stopped, and then application of the high-frequency power is stopped.
[0016]
The invention according to claim 8 is the plasma processing method according to any one of claims 1 to 6, wherein the substrate to be processed is supported above the electrostatic chuck by a support rod grounded by a conductor, and The method is characterized in that application of a DC voltage to the electric chuck is started, and thereafter, the substrate to be processed is lowered and mounted on the electrostatic chuck.
[0017]
According to a ninth aspect of the present invention, in the plasma processing method according to any one of the first to eighth aspects, the plasma processing is an etching processing, and the weak plasma is applied to the substrate to be processed in a processing chamber for performing the etching processing. Is made to act.
[0018]
According to a tenth aspect of the present invention, there is provided a plasma processing apparatus provided with a plasma processing mechanism for performing a plasma processing on a substrate to be processed, wherein the plasma processing mechanism is controlled. And a control unit for performing the following.
[0019]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[0020]
FIG. 1 schematically shows the overall configuration of a plasma processing apparatus (etching apparatus) used in an embodiment of the present invention. In FIG. A cylindrical vacuum chamber which is configured to be airtightly closable and constitutes a processing chamber is shown.
[0021]
The vacuum chamber 1 is connected to a ground potential. Inside the vacuum chamber 1, a mounting table 2 which is made of a conductive material, for example, aluminum and has a block shape and also serves as a lower electrode is provided.
[0022]
The mounting table 2 is supported in the vacuum chamber 1 via an insulating plate 3 made of ceramic or the like. An electrostatic chuck 4 is provided on the mounting surface of the mounting table 2 on which the semiconductor wafer W is mounted. The electrostatic chuck 4 has a configuration in which an electrode 4a for an electrostatic chuck is interposed in an insulating film 4b made of an insulating material, and a DC power supply 5 is connected to the electrode 4a for the electrostatic chuck. . The electrostatic chuck electrode 4a is made of, for example, copper or the like, and the insulating film 4b is made of polyimide or the like.
[0023]
Further, inside the mounting table 2, a heat medium flow path 6 for circulating an insulating fluid as a heat medium for temperature control, and a gas for temperature control such as helium gas on the back surface of the semiconductor wafer W. A gas flow path 7 for supplying is provided.
[0024]
Then, the mounting table 2 is controlled to a predetermined temperature by circulating an insulating fluid controlled at a predetermined temperature in the heat medium flow path 6, and between the mounting table 2 and the back surface of the semiconductor wafer W. A gas for temperature control is supplied through the gas flow path 7 to promote heat exchange therebetween, so that the semiconductor wafer W can be accurately and efficiently controlled to a predetermined temperature.
[0025]
A focus ring 8 made of a conductive material or an insulating material is provided on an outer periphery above the mounting table 2, and a power supply for supplying high-frequency power is provided substantially at the center of the mounting table 2. The electric wire 9 is connected. A high frequency power supply (RF power supply) 11 is connected to the power supply line 9 via a matching unit 10, and the high frequency power supply 11 supplies high frequency power of a predetermined frequency.
[0026]
Outside the focus ring 8, there is provided an exhaust ring 12 which is formed in a ring shape and has a large number of exhaust holes. The exhaust ring 12 is connected to an exhaust port 13 through the exhaust ring 12. The processing space in the vacuum chamber 1 is evacuated by a vacuum pump or the like of the system 14.
[0027]
On the other hand, a shower head 15 is provided on the ceiling wall portion of the vacuum chamber 1 above the mounting table 2 so as to face the mounting table 2 in parallel, and the shower head 15 is grounded. Therefore, the shower head 15 and the mounting table 2 function as a pair of electrodes (an upper electrode and a lower electrode).
[0028]
The shower head 15 is provided with a large number of gas discharge holes 16 on its lower surface, and has a gas inlet 17 on its upper part. A gas diffusion space 18 is formed in the inside. A gas supply pipe 19 is connected to the gas introduction unit 17, and a gas supply system 20 is connected to the other end of the gas supply pipe 19. The gas supply system 20 includes a mass flow controller (MFC) 21 for controlling a gas flow rate, a processing gas supply source 22 for supplying, for example, a processing gas for etching, and an Ar for supplying Ar gas. It is composed of a gas supply source 23 and the like.
[0029]
On the other hand, an annular magnetic field forming mechanism (ring magnet) 24 is arranged around the outside of the vacuum chamber 1 concentrically with the vacuum chamber 1, and a magnetic field is formed in the processing space between the mounting table 2 and the shower head 15. Is formed. The entire magnetic field forming mechanism 24 is rotatable around the vacuum chamber 1 at a predetermined rotation speed by a rotating mechanism 25.
[0030]
The plasma processing mechanism such as the DC power supply 5, the high-frequency power supply 11, and the gas supply system 20 for performing the plasma processing on the semiconductor wafer W is configured to be controlled by the control unit 40.
[0031]
Next, the procedure of the etching process performed by the etching apparatus configured as described above will be described.
[0032]
(First embodiment)
First, a gate valve (not shown) provided in the vacuum chamber 1 is opened, and the semiconductor wafer W is moved by a transfer mechanism (not shown) through a load lock chamber (not shown) arranged adjacent to the gate valve. Is loaded into the vacuum chamber 1 and mounted on the mounting table 2. Then, after the transport mechanism is retracted out of the vacuum chamber 1, the gate valve is closed. At this point, the application of the DC voltage (HV) from the DC power supply 5 to the electrostatic chuck electrode 4a of the electrostatic chuck 4 has not been performed.
[0033]
Thereafter, while the inside of the vacuum chamber 1 is evacuated to a predetermined degree of vacuum through the exhaust port 13 by the vacuum pump of the exhaust system 14, first, Ar gas is supplied from the Ar gas supply source 23 into the vacuum chamber 1. Then, as shown in FIG. 2, first, a relatively low-frequency high-frequency power (for example, 13.56 MHz) such as 300 W is supplied from the high-frequency power supply 11 to the mounting table 2 as the lower electrode to generate weak plasma. The weak plasma is generated and acts on the semiconductor wafer W.
[0034]
The reason why the weak plasma is applied to the semiconductor wafer W is as follows.
[0035]
That is, the state of the semiconductor wafer W to be processed is not uniform due to the processing state in a previous step (for example, a film forming step such as CVD), and, for example, electric charges are accumulated inside the semiconductor wafer W. There are cases. If strong plasma is applied in the state where charges are accumulated inside the semiconductor wafer W, surface arcing or the like is likely to occur, so that weak plasma is applied before the strong plasma is applied. This is for uniformly adjusting (initializing) the state and the like of the electric charge accumulated inside the semiconductor wafer W.
[0036]
Then, in adjusting the state of the electric charge accumulated inside the semiconductor wafer W, the electric charge is applied to the electrostatic chuck electrode 4a of the electrostatic chuck 4 in order to easily move the electric charge from the inside of the semiconductor wafer W. The adjustment (initialization) of the semiconductor wafer is performed by the weak plasma without applying the DC voltage (HV).
[0037]
The high frequency applied power for generating such weak plasma is 0.15 W / cm. ² ~ 1.0W / cm ² For example, about 100 to 500 W, and the time for applying weak plasma to the semiconductor wafer W is, for example, about 5 to 20 seconds.
[0038]
In the above description, the case where Ar gas is used and plasma of Ar gas is applied is described. However, the gas type is not limited to this. ₂ Gas, CF ₄ Gas, N ₂ A gas such as a gas can also be used. However, in selecting this gas type, a gas type that causes an undesired effect such as etching on the semiconductor wafer W and the inner wall of the vacuum chamber 1 is selected. It is necessary to select a material that easily ignites the plasma. Further, the optimum gas type may change depending on the type of processing performed on the semiconductor wafer W to be processed in the previous step, and it is preferable to appropriately select the type in consideration of these.
[0039]
Then, after the weak plasma is applied to the semiconductor wafer W as described above, as shown in FIG. 2, a DC voltage (HV) from the DC power supply 5 is applied to the electrostatic chuck electrode 4a. Thereafter, a predetermined processing gas (etching gas) is supplied from the processing gas supply source 22 into the vacuum chamber 1, and a high-frequency power source 11 supplies the mounting table 2 as a lower electrode with a power of a normal processing power such as 2000 W, for example. A high frequency power (frequency, for example, 13.56 MHz) is supplied to generate strong plasma, and normal plasma processing (etching processing) is performed. In FIG. 2, the horizontal axis represents time, and the vertical axis represents a voltage value in the case of the electrostatic chuck HV, and a power value in the case of the RF output.
[0040]
At this time, by applying high-frequency power to the mounting table 2 as the lower electrode, a high-frequency electric field is formed in the processing space between the shower head 15 as the upper electrode and the mounting table 2 as the lower electrode. Then, a magnetic field is formed by the magnetic field forming mechanism 24, and etching by plasma is performed in this state.
[0041]
When the predetermined etching process is performed, the supply of the high-frequency power from the high-frequency power supply 11 is stopped to stop the etching process, and the semiconductor wafer W is removed from the vacuum chamber 1 in a procedure reverse to the procedure described above. Take it out.
[0042]
As described above, first, a weak plasma is applied to the semiconductor wafer W, and then, when the semiconductor wafer W is subjected to the etching process, the rate at which surface arcing occurs on the semiconductor wafer W is substantially zero regardless of the lot. (1% or less). On the other hand, when the process is started without applying the weak plasma as described above, the rate at which surface arcing occurs on the semiconductor wafer W may be about 80% depending on the lot. This is due to the fact that the semiconductor wafer W has been charged in a process prior to the etching. Such surface arcing occurs particularly when the previous process is a process of forming a so-called Low-K film by CVD. The probability of doing was high.
[0043]
Therefore, it was confirmed that the rate at which surface arcing occurs on the semiconductor wafer W can be significantly reduced by applying weak plasma to the semiconductor wafer W as described above before starting the normal processing.
[0044]
By the way, in the above-described embodiment, as shown in FIG. 1, a case where a device having a configuration in which high-frequency power is applied only to the mounting table 2 serving as the lower electrode is described, for example, as shown in FIG. The so-called upper and lower application type plasma processing apparatus configured to apply high frequency power from the high frequency power supply 31 via the matching device 30 can be applied to the shower head 15 as the upper electrode.
[0045]
In this case, for example, as shown in FIG. 4, first, the application of low-power high-frequency power to the mounting table 2 serving as the lower electrode is started, and then the low-power high-frequency power is applied to the shower head 15 serving as the upper electrode. The application is started, and the application of the high-frequency power to the mounting table 2 serving as the lower electrode is temporarily stopped here. In this state, after the weak plasma is applied to the semiconductor wafer W for a predetermined period, the application of the high-frequency power to the shower head 15 as the upper electrode is also stopped, and the plasma is temporarily extinguished.
[0046]
Thereafter, a DC voltage (HV) is applied to the electrostatic chuck electrode 4 a of the electrostatic chuck 4, a normal high-frequency power (high-power high-frequency power) for processing is applied to the mounting table 2, which is a lower electrode, The application of normal high-frequency power for processing (high-frequency high-frequency power) to the showerhead 15 as an electrode is started in this order, and normal processing of the semiconductor wafer W is started.
[0047]
In this manner, the present invention can be applied to a plasma processing apparatus of the upper and lower application type.
[0048]
In addition, in addition to applying weak plasma as described above, or alone, it is also preferable that, for example, an ionizer is applied to the semiconductor wafer W before the processing is started to reduce the charge inside the semiconductor wafer W. . By the action of such an ionizer, the occurrence of surface arcing can be suppressed. The ionizer may be located within the chamber or at another location outside the chamber.
[0049]
By the way, in the plasma processing method shown in FIG. 2, a weak high-frequency power is applied to the mounting table 2 as the lower electrode, and after the weak plasma is applied, the high-frequency power is not applied. The application of the DC voltage (HV) to the electrostatic chuck electrode 4a has started. As described above, when the application of the DC voltage (HV) to the chucking electrode 4a is started in a state where the high-frequency power after the application of the weak high-frequency power and weak plasma is not applied, the DC voltage ( When the application of HV) is started, a lightning-like discharge may be generated to damage the substrate. In such a case, as shown in FIG. 5, in a state where high-frequency power is applied to the mounting table 2 (a state in which weak plasma is generated), a DC voltage (HV) to the electrostatic chuck electrode 4a is applied. , The occurrence of discharge can be suppressed.
[0050]
In the above, in the first embodiment, the method of generating a weak plasma using Ar gas before plasma processing such as etching and the timing of applying a DC voltage to the electrostatic chuck electrode 4a at that time have been described.
[0051]
(Second embodiment)
Next, a preferred example will be described with respect to the relationship between the timing of applying high-frequency power and the timing of applying a DC voltage to the electrostatic chuck electrode 4a when performing plasma processing such as etching.
[0052]
The electrostatic chuck 4 includes a bipolar type and a monopolar type, and these types include a Coulomb type and a Johnson-Rahbek type, respectively. Among them, when the single-pole and Coulomb-type electrostatic chuck 4 is used, it is preferable to perform the suction of the semiconductor wafer W in the following sequence. FIG. 6 shows the sequence. The horizontal axis represents time, the vertical axis represents the applied high-frequency power value (W) for the dotted line, and the applied DC voltage value (V) for the solid line.
[0053]
That is, after the semiconductor wafer W is mounted on the mounting table 2 (the electrostatic chuck 4), introduction of gas into the vacuum chamber 1 is started. Then, as shown by a dotted line in FIG. 6, first, application of high-frequency power is started to the mounting table 2 to generate plasma, and thereafter, as shown by a solid line in FIG. DC voltage (HV) is applied to 4a.
[0054]
Before the start of the application of the DC voltage (HV) to the electrostatic chuck electrode 4a, the temperature of the semiconductor wafer W is not sufficiently controlled because the semiconductor wafer W is not attracted to the electrostatic chuck 4. For this reason, the high-frequency power applied to the mounting table 2 when generating plasma for the first time is a high-frequency power (for example, about 500 W) having a lower power than when processing is performed, and the temperature of the semiconductor wafer W is reduced by the action of the plasma. It is preferable not to raise.
[0055]
Also, when the semiconductor wafer W is removed from the electrostatic chuck 4, as shown in the figure, after the plasma processing is completed, first, the applied high-frequency power value is reduced to a power value (0 W Not). Thereafter, the application of the DC voltage (HV) to the electrostatic chuck electrode 4a is stopped, and then the application of the high frequency power is stopped to extinguish the plasma. When the application of the DC voltage (HV) to the electrode 4 a for electrostatic chuck is stopped, a voltage (for example, about −2000 V) having a polarity opposite to that of the suction is applied to the electrode 4 a for electrostatic chuck. The charge is removed, and the semiconductor wafer W is easily removed. The application of such a reverse polarity voltage is performed as needed. If the semiconductor wafer W can be easily removed from the electrostatic chuck 4 without applying the reverse polarity voltage, the reverse polarity voltage is applied. No voltage is applied.
[0056]
FIG. 7 illustrates a copper electrode portion (Cu) and a polyimide insulating film portion (PI) of the electrostatic chuck (ESC) during the sequence of chucking the semiconductor wafer W by the electrostatic chuck 4 as described above. Backside oxide film portion (BSOx), silicon substrate portion (Sisub) and oxide film portion (Ox) of a multi-layer semiconductor wafer (Multi Layer Wafer), a processing space portion (Space) and an upper electrode in a vacuum chamber It shows a change in the potential of each part of the unit (Wall).
[0057]
As shown in the figure, first, when the semiconductor wafer W is mounted on the mounting table 2 by lowering the wafer supporting pins provided on the mounting table 2, as shown by (1) in the figure, The potential is zero, and thereafter, when the introduction of gas into the vacuum chamber 1 is started, as shown by (2) in the figure, the potential of each part is zero.
[0058]
Thereafter, when the application of high-frequency power is started to generate plasma, the potential of the semiconductor wafer W becomes a potential of minus several hundred volts determined by the state of the plasma, as indicated by (3) in the figure.
[0059]
Then, in this state, when the application of the DC voltage (HV) to the electrostatic chuck electrode 4a is started, as shown by (4) in the figure, the potential of the electrostatic chuck electrode 4a changes to the applied DC voltage ( HV) (for example, about 1.5 KV), causing a potential difference in the insulating film portion (PI), and the semiconductor wafer W is attracted.
[0060]
As described above, according to the sequence of the suction of the semiconductor wafer W by the electrostatic chuck 4 as described above, the DC voltage (HV) is applied to the surface of the semiconductor wafer W to the electrode 4a for the electrostatic chuck. Since a high voltage is not applied, it is possible to prevent the occurrence of undesired abnormal discharge on the surface of the semiconductor wafer W.
[0061]
Note that the sequence described in the second embodiment for applying the DC voltage after the application of the high-frequency power has the following effects.
[0062]
A sequence as shown in FIG. 9, that is, a high-frequency power is applied to the lower electrode (or upper electrode) after the DC voltage is applied to the electrostatic chuck electrode 4a at the start of the plasma processing, and after the high-frequency power is turned off after the plasma processing is completed When the DC voltage is turned OFF, a large voltage is applied to the semiconductor wafer W as shown in FIG. As a result, the surface of the semiconductor wafer W may be damaged, specifically, a chip having a diameter of about several tens of μm may occur. Depending on a place where the chip occurs, arcing occurs during etching, resulting in a defective product. . In addition, the chipped particles may become particles and adhere to the surface of the semiconductor wafer W.
[0063]
However, in the case of the sequence described in the present embodiment where RF ON → HV ON at the start of processing and HV OFF → RF OFF at the end of processing, no high voltage is applied to the semiconductor wafer W. Is eliminated, and particles on the surface of the semiconductor wafer W can be prevented.
[0064]
Further, even if the surface of the semiconductor wafer W is not damaged in the sequence as shown in FIG. 9, the semiconductor wafer W is charged by the application of the DC voltage to the electrostatic chuck electrode 4a. There is a possibility that charged particles that normally float in the processing chamber due to force will adhere to the semiconductor wafer W.
[0065]
However, in the case of the sequence of RF ON → HV ON at the start of the process and HV OFF → RF OFF at the end of the process, since the high frequency discharge is maintained before the DC voltage is applied to the electrostatic chuck, it is floating. The charged particles are trapped in the ion sheath, and as a result, adhesion of the particles to the surface of the semiconductor wafer W can be reduced. There is also such an effect.
[0066]
The result of verifying the effect of the trap in the ion sheath is shown below.
[0067]
FIG. 11 shows the result of examining the difference in the number of attached particles due to the difference in the magnitude of the DC applied voltage of the electrostatic chuck for attracting the semiconductor wafer W.
[0068]
That is, first, a CF-based reactant serving as a particle generation source is attached to the processing chamber of the plasma processing apparatus (seasoning), and then the semiconductor wafer W is loaded into the processing chamber and placed on the electrostatic chuck. Then, the processing gas is circulated for a certain period of time. Thereafter, the semiconductor wafer W is discharged and taken out of the processing chamber, and the number of particles attached to the semiconductor wafer W is divided into three types of particle size. The count is performed for each of the three types of magnitudes, and the results are shown for each case where the DC voltage of the electrostatic chuck is 0 V, 1.5 kV, 2.0 kV, and 2.5 kV.
[0069]
As shown in the figure, it is understood that the number of particles adhering to the semiconductor wafer W increases as the DC applied voltage of the electrostatic chuck increases. That is, it is understood that the application of the DC voltage to the electrostatic chuck affects the adhesion of the particles to the semiconductor wafer W.
[0070]
The processing conditions of the seasoning step are as follows: pressure: 6.65 Pa, high-frequency power: 3500 W, gas used: C ₄ F ₈ / Ar / CH ₂ F ₂ = 13/600/5 sccm, wafer back pressure (center / periphery): 1330/3990 Pa, temperature (ceiling / sidewall / bottom): 60/60/60 ° C, high-frequency application time: 3 minutes.
[0071]
The conditions of the pressure, the gas used, the pressure on the wafer back surface, and the temperature when the semiconductor wafer W is placed on the electrostatic chuck and the gas is circulated are the same as those described above. Seconds.
[0072]
Further, in the above-described static elimination step, static elimination of the semiconductor wafer W is performed at a pressure of 26.6 Pa, an applied voltage of -1.5 kV, a voltage application time of 1 second, and a pressure of 53.2 Pa, N ₂ : 1000 sccm, time: 15 seconds, and static elimination of the electrostatic chuck was performed at an applied voltage of -2.0 kV and a voltage application time of 1 second. It should be noted that such static elimination is performed because the semiconductor wafer W may jump when transporting the semiconductor wafer W after the process, which may cause extra particles to adhere again. This is to prevent such a jump of the semiconductor wafer W from occurring.
[0073]
FIG. 12 shows that after the above-described seasoning step, the semiconductor wafer W is placed in the processing chamber. ₂ A dry cleaning is performed to generate a large number of particles from the reactant adhered in the seasoning process, and the number of particles adhered to the semiconductor wafer W is determined by a sequence of RF ON → HV ON at the start of the process and HV OFF → RF OFF at the end of the process 3 shows the results of measurement in the case of the sequence HV ON → RF ON at the start of the process and the sequence of RF OFF → HV OFF at the end of the process. In this measurement, the seasoning step and the static elimination step are the same as those described above. ₂ In the dry cleaning process, pressure: 13.3 Pa, high frequency power: 1000 W, gas used: O ₂ = 1000 sccm, wafer back pressure (center / periphery): 1330/3990 Pa, temperature (ceiling / sidewall / bottom): 60/60/60 ° C., high-frequency application time: 30 seconds.
[0074]
As shown in the figure, by adopting the sequence of RF ON → HV ON at the start of the process and HVOFF → RF OFF at the end of the process, the number of particles attached can be significantly reduced.
[0075]
As shown in the sequence of FIG. 8, the DC voltage (HV) applied to the electrostatic chucking electrode 4a in a state where the semiconductor wafer W is supported by the wafer supporting pins (supporting rods) provided on the mounting table 2. The application is started ((2)), and thereafter, the semiconductor wafer W is mounted on the mounting table 2 by lowering the wafer supporting pins ((3), (4)), and the semiconductor wafer W is sucked. Also in this case, the surface of the semiconductor wafer W does not reach the potential of the applied DC voltage (HV). Therefore, even by such a suction sequence, occurrence of undesired abnormal discharge on the surface of the semiconductor wafer W can be prevented. However, such a sequence cannot be performed unless the pins for supporting the wafer are conductive and a charge is supplied to the semiconductor wafer W from the pins.
[0076]
In addition, abnormal discharge that occurs at the time of suction by the electrostatic chuck as described above can be prevented by using a bipolar electrostatic chuck even with the same Coulomb-type electrostatic chuck.
[0077]
In the above example, the embodiment of the etching process using the parallel plate type etching apparatus has been described. However, the present invention is not limited to such an embodiment, and it is needless to say that the present invention can be used for any plasma processing. . Further, in the above-described embodiment, the case where the weak plasma is applied in the vacuum chamber of the etching apparatus for performing the etching process has been described. It can also be initialized.
[0078]
【The invention's effect】
As described above in detail, according to the present invention, it is possible to prevent surface arcing from occurring on a substrate to be processed, and to improve productivity as compared with the related art.
[Brief description of the drawings]
FIG. 1 is a diagram schematically showing a schematic configuration of an apparatus used in an embodiment of the present invention.
FIG. 2 is a diagram illustrating a plasma processing method according to one embodiment of the present invention.
FIG. 3 is a diagram schematically showing a schematic configuration of an apparatus used in another embodiment of the present invention.
FIG. 4 is a view for explaining a plasma processing method according to another embodiment of the present invention.
FIG. 5 is a view for explaining a plasma processing method according to a modification of the embodiment shown in FIG. 2;
FIG. 6 is a view for explaining a chucking method using an electrostatic chuck.
FIG. 7 is a diagram for explaining a change in potential of each part in the chucking method of FIG. 6;
FIG. 8 is a diagram for explaining a change in potential of each part in another chucking method.
FIG. 9 is a view for explaining a comparative example of a chucking method using an electrostatic chuck.
FIG. 10 is a diagram for explaining a change in potential of each part in the chucking method of FIG. 9;
FIG. 11 is a diagram showing the relationship between the voltage applied to the electrostatic chuck and the number of particles.
FIG. 12 is a diagram illustrating a difference in the number of particles due to a difference in a sequence.
[Explanation of symbols]
W ... Semiconductor wafer, 1 ... Vacuum chamber, 2 ... Placement table (lower electrode), 4 ... Electrostatic chuck, 5 ... DC power supply, 11 ... High frequency power supply, 15 ... Shower head (upper electrode) .

Claims (10)

In performing plasma processing by applying plasma to the substrate to be processed,
Before performing the plasma processing, a plasma that is weaker than the plasma used for the plasma processing is applied to the processing target substrate to make the state of charge of the processing target substrate constant, and thereafter, the plasma processing is performed. Performing a plasma processing method. The plasma processing method according to claim 1,
A plasma processing method, wherein the weak plasma is applied to the substrate to be processed for a predetermined time, and thereafter, a DC voltage is applied to an electrostatic chuck for suction-holding the substrate to be processed. The plasma processing method according to claim 2,
A plasma processing method characterized by starting application of a DC voltage to the electrostatic chuck before extinguishing the weak plasma. 4. The plasma processing method according to claim 1, wherein the weak plasma is a plasma formed by Ar gas, O ₂ gas, CF ₄ gas, or N ₂ gas. 5. Plasma treatment method. 5. The plasma processing method according to claim 1, wherein the weak plasma is formed by high-frequency power of 0.15 to 1.0 W / cm ^{2. 6} . The plasma processing method according to any one of claims 1 to 5, wherein the weak plasma is applied to the substrate to be processed for 5 to 20 seconds. The plasma processing method according to any one of claims 1 to 6, wherein, at the start of the plasma processing, application of a high-frequency power for generating plasma is started, and then application of a DC voltage to the electrostatic chuck is started. And a plasma processing method comprising: stopping application of a DC voltage to the electrostatic chuck and stopping application of the high-frequency power at the end of the plasma processing. 7. The plasma processing method according to claim 1, wherein a DC voltage is applied to the electrostatic chuck in a state where the substrate to be processed is supported by a support bar grounded by a conductor above the electrostatic chuck. , And thereafter, the substrate to be processed is lowered and mounted on the electrostatic chuck. 9. The plasma processing method according to claim 1, wherein the plasma processing is an etching processing, and the weak plasma is applied to the substrate to be processed in a processing chamber for performing the etching processing. 10. Plasma processing method. A plasma processing apparatus including a plasma processing mechanism for performing a plasma processing on a substrate to be processed, the plasma processing apparatus including a control unit configured to control the plasma processing mechanism and perform the plasma processing method according to any one of claims 1 to 9. A plasma processing apparatus characterized by the above-mentioned.

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