CN100416758C - Method for releasing chip static electricity thoroughly in chip etching equipment - Google Patents

Method for releasing chip static electricity thoroughly in chip etching equipment Download PDF

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Publication number
CN100416758C
CN100416758C CNB2005101264544A CN200510126454A CN100416758C CN 100416758 C CN100416758 C CN 100416758C CN B2005101264544 A CNB2005101264544 A CN B2005101264544A CN 200510126454 A CN200510126454 A CN 200510126454A CN 100416758 C CN100416758 C CN 100416758C
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electrostatic chuck
time
static
chip
static electricity
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CN1848375A (en
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付金生
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Beijing North Microelectronics Co Ltd
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Beijing North Microelectronics Co Ltd
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Abstract

In a semiconductor device, a chip is fixed on a static electricity chuck in a reaction chamber by static electricity to make the technology processing. After the process is finished, the static electricity is released and the chip is taken away. The text provides a method for thoroughly clearing the static electricity by using the argon build-up of luminance On the basis of the actual test, which overcomes the disadvantage the static electricity attraction exists when the chip is taken due to the fact that the static electricity is not eliminated thoroughly by using the original method in short time, and thereby, the satisfied effect is achieved.

Description

A kind of in chip etching equipment the thorough method of release electrostatic chuck static
Technical field
The present invention relates to field of semiconductor manufacture, specifically, relate to a kind of in chip etching equipment the method for release electrostatic chuck static.
Background technology
In the process of semiconductor technology etching, wafer relies on static to fix in reative cell on the electrostatic chuck, carry out PROCESS FOR TREATMENT.After technology finishes, need release electrostatic after, just take wafer away.The method of eliminating chip static electricity at present adopts the mode that loads reverse voltage, reverse voltage by loading certain hour or detect leakage current and reach certain value and judge whether static is eliminated, this kind method shortcoming is that the time system that loads reverse voltage is drawn by test, it exists uncertain, time is when excessive, leakage current has become reverse leakage current, time is when too small, forward leakage current again can be excessive, cause static to eliminate completely, the present invention has proposed a kind of method of thorough removing static on the basis of test, overcome in the original method static and eliminated the defective that has electrostatic attraction when not causing getting sheet only, has reached satisfied effect.
Summary of the invention
(1) technical problem that will solve
The purpose of this invention is to provide a kind of in silicon slice etching equipment the thorough method of release electrostatic chuck static.
(2) technical scheme
In order to achieve the above object, the present invention takes following scheme:
A kind of in chip etching equipment the thorough method of release electrostatic chuck static, comprise the steps:
A) feed the inert gas that is used for build-up of luminance of certain flow to reaction chamber;
B) control pendulum valve, the pressure stability that makes reaction chamber is a fixed pressure value;
C) radio-frequency power supply power output is to allow inert gas begin build-up of luminance;
D) on electrostatic chuck, load reverse voltage a period of time T1, to eliminate the most of static on the electrostatic chuck;
E) time-delay a period of time T2 is with the remaining static on the ionic conductivity elimination electrostatic chuck that utilizes the inert gas build-up of luminance.
Wherein, described time T 1 and T2 are recorded by test, and described test comprises the steps:
(1) wafer is placed on the electrostatic chuck by manipulator, carries out engineer testing behind the loading electrostatic attraction;
(2) after the off-test, on electrostatic chuck, load reverse voltage a period of time T1, time-delay a period of time T2;
(3) wafer is taken out from electrostatic chuck by manipulator;
(4) repeat more than above (1)~(3) step 3000 time, and all adjust T1 and T2 at every turn, make the summation of T1+T2 more and more littler, find the fault-free that picks and places of wafer, prove that the test parameters of T1, T2 is suitable.
Preferably, the flow of above-mentioned steps in a) is 400sccm, and the force value in the step b) is 8mTorr.
(3) beneficial effect
Compared with the prior art, owing to adopt above scheme, the present invention can eliminate the static on the electrostatic chuck completely, and simple to operate.
Description of drawings
Fig. 1 is overall hardware system structure figure of the present invention;
Fig. 2 is the reaction chamber partial enlarged drawing of Fig. 1;
Fig. 3 is the startup flow chart of chip etching equipment of the present invention;
Fig. 4 is an elimination electrostatic attraction flow chart of the present invention;
Embodiment
With reference to Fig. 1, chip etching equipment comprises an industrial computer 1 and a controlled hardware system 2 that is connected with this industrial computer of having stored control program, this controlled hardware system 2 comprises a reaction chamber 15, electrostatic chuck 5, dried pump 19, a gas flow controller 11, this industrial computer 1 is used for executive control program, and the entire work process of controlled hardware system 2 is controlled.
With reference to figure 2, wafer 14 places electrostatic chuck 5 tops, and electrostatic chuck 5 connects forward electrode 6 and reverse electrode 13.
With reference to figure 3, the startup flow process of chip etching equipment is as follows:
Industrial computer 1 sends instruction and starts dried pump 19, closes pneumatic operated valve 8, opens bypass and takes out valve 20 slowly, delays time 30 seconds, opens bypass and takes out valve 7 soon, closes bypass and takes out valve 20 slowly;
Whether the reading of judging pressure sensor 4 less than 80mTorr, as "No", then time-delay, up to reading less than 80mTorr;
Open isolating valve 18, start molecular pump 17, open pendulum valve 16, close bypass and take out valve 7 soon;
Whether the reading of judging pressure sensor 4 less than 1mTorr, as "No", then time-delay, up to reading less than 1mTorr;
Close pendulum valve 16.
After startup is finished, begin to eliminate the program of wafer 14 static, with reference to figure 4, step is as follows:
Open pneumatic operated valve 10, pneumatic operated valve 9, pneumatic operated valve 8, the flow that gas flow controller 11 is set is 400SCCM, feeds the 400SCCM argon gas to reaction chamber 15;
Control pendulum valve 16 makes reaction chamber 15 pressure stabilitys to 8mTorr;
Make the radio-frequency power of radio-frequency power supply 3 output 400W, to allow argon gas begin build-up of luminance;
On electrostatic chuck 5, load reverse voltage a period of time T1, to eliminate the most of static on the electrostatic chuck 5;
Time-delay a period of time T2 is with the remaining static on the ionic conductivity elimination electrostatic chuck 5 that utilizes the argon gas build-up of luminance;
Wherein, described time T 1 and T2 are recorded by test, and described test comprises the steps:
(1) wafer is placed on the electrostatic chuck by manipulator, carries out engineer testing behind the loading electrostatic attraction;
(2) after the off-test, on electrostatic chuck, load reverse voltage a period of time T1, time-delay a period of time T2;
(3) wafer is taken out from electrostatic chuck by manipulator;
(4) repeat more than above (1)~(3) step 3000 time, and all adjust T1 and T2 at every turn, make the summation of T1+T2 more and more littler, find the fault-free that picks and places of wafer, prove that the test parameters of T1, T2 is suitable.
T1=3s in the present embodiment, T2=1s.
Remove the power of radio-frequency power supply 3 outputs, close pneumatic operated valve 10, pneumatic operated valve 9, pneumatic operated valve 8, the gas flow of setting gas flow controller 11 is 0SCCM;
Open the pendulum valve,
EP (end of program).
Though described the present invention with relatively limited embodiment, those skilled in the art can find out many distortion and variation thus.What the present invention required is that the claim of adding covers distortion and the variation that all fall into the spirit and scope of the present invention's qualification.

Claims (2)

1. the method for a thorough release electrostatic chuck static in chip etching equipment is characterized in that described method comprises the steps:
A) feed the inert gas that is used for build-up of luminance of certain flow to reaction chamber;
B) control pendulum valve, the pressure stability that makes reaction chamber is a fixed pressure value;
C) radio-frequency power supply power output is to allow inert gas begin build-up of luminance;
D) on electrostatic chuck, load reverse voltage a period of time T1, to eliminate the most of static on the electrostatic chuck;
E) time-delay a period of time T2 is with the remaining static on the ionic conductivity elimination electrostatic chuck that utilizes the inert gas build-up of luminance;
Wherein, described time T 1 and T2 are recorded by test, and described test comprises the steps:
(1) wafer is placed on the electrostatic chuck by manipulator, carries out engineer testing behind the loading electrostatic attraction;
(2) after the off-test, on electrostatic chuck, load reverse voltage a period of time T1, time-delay a period of time T2;
(3) wafer is taken out from electrostatic chuck by manipulator;
(4) repeat more than above (1)~(3) step 3000 time, and all adjust T1 and T2 at every turn, make the summation of T1+T2 more and more littler, find the fault-free that picks and places of wafer, prove that the test parameters of T1, T2 is suitable.
2. as claimed in claim 1 in chip etching equipment the thorough method of release electrostatic chuck static, it is characterized in that the flow in the described step a) is 400sccm, the force value in the step b) is 8mTorr.
CNB2005101264544A 2005-12-09 2005-12-09 Method for releasing chip static electricity thoroughly in chip etching equipment Active CN100416758C (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNB2005101264544A CN100416758C (en) 2005-12-09 2005-12-09 Method for releasing chip static electricity thoroughly in chip etching equipment

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Application Number Priority Date Filing Date Title
CNB2005101264544A CN100416758C (en) 2005-12-09 2005-12-09 Method for releasing chip static electricity thoroughly in chip etching equipment

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CN1848375A CN1848375A (en) 2006-10-18
CN100416758C true CN100416758C (en) 2008-09-03

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Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101740339B (en) * 2008-11-24 2012-08-22 中芯国际集成电路制造(北京)有限公司 Etching method
CN104157547A (en) * 2014-08-26 2014-11-19 上海先进半导体制造股份有限公司 Electrostatic discharge method for deep trench etching equipment
CN107393856B (en) * 2016-05-16 2021-08-13 北京北方华创微电子装备有限公司 Lower electrode device, semiconductor processing equipment and residual charge releasing method
CN109659810B (en) * 2018-12-24 2021-10-08 香港中文大学(深圳) Method for reducing threshold of microcavity semiconductor laser

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6125025A (en) * 1998-09-30 2000-09-26 Lam Research Corporation Electrostatic dechucking method and apparatus for dielectric workpieces in vacuum processors
US6333246B1 (en) * 1999-06-30 2001-12-25 Kabushiki Kaisha Toshiba Semiconductor device manufacturing method using electrostatic chuck and semiconductor device manufacturing system
US20030038114A1 (en) * 1998-09-30 2003-02-27 Lam Research Corporation System and method for dechucking a workpiece from an electrostatic chuck
US6628500B1 (en) * 1998-06-16 2003-09-30 Surface Technology Systems Plc Method and apparatus for dechucking a substrate from an electrostatic chuck
CN1516256A (en) * 1996-06-21 2004-07-28 ������������ʽ���� Method for moving chip and electrostatic sucking disc device
US6793767B2 (en) * 2000-11-09 2004-09-21 Samsung Electronics Co., Ltd. Wafer stage including electrostatic chuck and method for dechucking wafer using the wafer stage
CN1679148A (en) * 2002-08-30 2005-10-05 东京毅力科创株式会社 Plasma processing method and plasma processing device

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1516256A (en) * 1996-06-21 2004-07-28 ������������ʽ���� Method for moving chip and electrostatic sucking disc device
US6628500B1 (en) * 1998-06-16 2003-09-30 Surface Technology Systems Plc Method and apparatus for dechucking a substrate from an electrostatic chuck
US6125025A (en) * 1998-09-30 2000-09-26 Lam Research Corporation Electrostatic dechucking method and apparatus for dielectric workpieces in vacuum processors
US20030038114A1 (en) * 1998-09-30 2003-02-27 Lam Research Corporation System and method for dechucking a workpiece from an electrostatic chuck
US6333246B1 (en) * 1999-06-30 2001-12-25 Kabushiki Kaisha Toshiba Semiconductor device manufacturing method using electrostatic chuck and semiconductor device manufacturing system
US6793767B2 (en) * 2000-11-09 2004-09-21 Samsung Electronics Co., Ltd. Wafer stage including electrostatic chuck and method for dechucking wafer using the wafer stage
CN1679148A (en) * 2002-08-30 2005-10-05 东京毅力科创株式会社 Plasma processing method and plasma processing device

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Address after: 100176 8 Wenchang Avenue, Beijing economic and Technological Development Zone, Beijing

Patentee after: Beijing North China microelectronics equipment Co Ltd

Address before: 100016 Jiuxianqiao East Road, Chaoyang District, Chaoyang District, Beijing

Patentee before: Beifang Microelectronic Base Equipment Proces Research Center Co., Ltd., Beijing