CN1679148A - Plasma processing method and plasma processing device - Google Patents
Plasma processing method and plasma processing device Download PDFInfo
- Publication number
- CN1679148A CN1679148A CNA038206455A CN03820645A CN1679148A CN 1679148 A CN1679148 A CN 1679148A CN A038206455 A CNA038206455 A CN A038206455A CN 03820645 A CN03820645 A CN 03820645A CN 1679148 A CN1679148 A CN 1679148A
- Authority
- CN
- China
- Prior art keywords
- plasma
- electrostatic chuck
- plasma processing
- processed substrate
- semiconductor wafer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
- H01J2237/004—Charge control of objects or beams
- H01J2237/0041—Neutralising arrangements
- H01J2237/0044—Neutralising arrangements of objects being observed or treated
Abstract
Argon gas is supplied into a vacuum chamber (1). Keeping this condition, relatively small high-frequency power such as 300W is supplied to a platform (2) (lower electrode) from a high-frequency power supply (11) in order to produce a weak plasma which acts on a semiconductor wafer (W) so as to adjust the condition of charge built up within it (W). During this adjustment, no DC voltage (HV) is applied to an electrostatic chuck (4) for ease of charge movement. Thereafter a direct current voltage is started to be applied to the electrostatic chuck (4), and then strong high-frequency power such as 2000W for a normal processing is supplied to produce a strong plasma, performing a normal processing. Thus, surface arching that possibly occurs in the processed substrate is avoided, improving the productivity compared to the conventional ones.
Description
Technical field
The present invention relates to a kind of method of plasma processing and plasma processing apparatus, relate to a kind of method of plasma processing and plasma processing apparatus of on processed substrates such as semiconductor wafer or LCD substrate, implementing plasma etch process etc. especially.
Background technology
At present, use a lot to semiconductor wafer and LCD with the method for plasma processing of processed substrate enforcement processing such as substrate by plasma.For example, in the manufacturing process of semiconductor device, as the technology that is used on processed substrate, for example semiconductor wafer forming fine circuit, use by plasma carried out the film that forms etc. is removed in etching on semiconductor wafer plasma etch process more.
In the Etaching device that carries out certain plasma etch process, for example, in the process chamber (etching chamber) that can make the inner structure that is closed airtightly, produce plasma.In addition, on the supporter of semiconductor wafer mounting in being arranged on this etching chamber, carry out etching then.
In addition, about producing the method for above-mentioned plasma, we have known and have planted type.Wherein, a kind of device is arranged, this device supply high frequency electric power on the pair of parallel plate electrode that is provided with in opposed mode up and down produces plasma, and in this device, the side in the parallel plate electrode, for example lower electrode are also used as supporter.And, configuring semiconductor wafer on this lower electrode, and between parallel plate electrode, add high frequency voltage, thus produce plasma, carry out etching.
But, in this Etaching device, in etching process, on the surface of semiconductor wafer, can produce the paradoxical discharge of thunder shape, promptly produce so-called surface arcing.
Above-mentioned surface arcing is many can be appeared at, such as forming insulator layer on the conductor layer and described insulator layer being carried out under the etched situation.For example, the insulator layer that is made of silicon oxide layer is being carried out etching, forming under the situation of contact hole of the conductor layer that constitutes by metal level lead to lower floor, how the situation of the silicon oxide layer breakage that reduces thickness can take place to make because of etching.
And, because when producing this paradoxical discharge, the mass part of the silicon oxide layer in the semiconductor wafer is destroyed, so most of element of this semiconductor wafer is produced harmful effect.In addition, meanwhile, in etching chamber, produce metallic pollution, can not proceed etch processes with maintaining the original state, need carry out the cleaning of etching chamber inside.Therefore, there is the problem that productivity is reduced significantly.
Summary of the invention
Therefore, the objective of the invention is to, provide a kind of can preventing on processed substrate, to produce surface arcing, and compared with prior art more can improve productive method of plasma processing and plasma processing apparatus.
Method of plasma processing of the present invention, on processed substrate, carry out plasma treatment and carry out plasma treatment, before carrying out above-mentioned plasma treatment, to be weaker than the action of plasma of the plasma that in this plasma is handled, uses on above-mentioned processed substrate, make the state of charge of this processed substrate keep certain state, after this, carry out above-mentioned plasma treatment.
In addition, method of plasma processing of the present invention in above-mentioned method of plasma processing, makes above-mentioned weak action of plasma preset time on above-mentioned processed substrate, after this, add direct voltage being used to adsorb on the electrostatic chuck that keeps above-mentioned processed substrate.
In addition, method of plasma processing of the present invention in above-mentioned method of plasma processing, before eliminating above-mentioned weak plasma, begins loading direct voltage on the above-mentioned electrostatic chuck.
In addition, method of plasma processing of the present invention, in above-mentioned method of plasma processing, above-mentioned weak plasma is by Ar gas, O
2Gas, CF
4Gas or N
2The plasma that gas forms.
In addition, method of plasma processing of the present invention, in above-mentioned method of plasma processing, above-mentioned weak plasma is by 0.15～1.0W/cm
2High frequency power form.
In addition, method of plasma processing of the present invention, in above-mentioned method of plasma processing, making above-mentioned weak action of plasma is 5～20 seconds in the above-mentioned processed on-chip time.
In addition, method of plasma processing of the present invention, in above-mentioned method of plasma processing, when beginning to carry out above-mentioned plasma treatment, begin to load be used to produce the High frequency power of plasma after, begin above-mentioned electrostatic chuck is loaded direct voltage, when finishing above-mentioned plasma treatment, after stopping, stopping the loading of above-mentioned High frequency power to above-mentioned electrostatic chuck loading direct voltage.
In addition, method of plasma processing of the present invention, in above-mentioned method of plasma processing, under the state that by supporting rod above-mentioned processed substrate is supported in above the above-mentioned electrostatic chuck with conductor ground connection, begin above-mentioned electrostatic chuck is loaded direct voltage, after this, above-mentioned processed substrate being descended is positioned on the above-mentioned electrostatic chuck.
In addition, method of plasma processing of the present invention, in above-mentioned method of plasma processing, above-mentioned plasma treatment is an etch processes, in the process chamber that carries out this etch processes, the above-mentioned weak plasma of effect on above-mentioned processed substrate.
In addition, plasma processing apparatus of the present invention is to possess the plasma processing apparatus of implementing the plasma processor structure of plasma treatment on processed substrate, and possesses the control part that the above-mentioned plasma processor structure of control carries out above-mentioned method of plasma processing.
Description of drawings
Fig. 1 is the figure of the schematic configuration of the device that uses in pattern ground expression an embodiment of the invention.
Fig. 2 is the figure that is used to illustrate the method for plasma processing relevant with an embodiment of the invention.
Fig. 3 is the figure of the schematic configuration of the device that uses in pattern ground expression other execution mode of the present invention.
Fig. 4 is the figure that is used to illustrate the method for plasma processing relevant with other execution mode of the present invention.
Fig. 5 is the figure that is used to illustrate the method for plasma processing relevant with the variation of execution mode shown in Figure 2.
Fig. 6 is the figure that is used to illustrate the adsorption method that uses electrostatic chuck.
Fig. 7 is the figure of potential change of each several part that is used for the adsorption method of key diagram 6.
Fig. 8 is the figure of potential change that is used for illustrating the each several part of other adsorption method.
Fig. 9 is the figure that is used to illustrate the comparative example of the adsorption method that uses electrostatic chuck.
Figure 10 is the figure of potential change of each several part that is used for the adsorption method of key diagram 9.
Figure 11 is the figure of the relation of expression on-load voltage of electrostatic chuck and population.
Figure 12 is that expression is by the different figure of the different caused populations of order.
Embodiment
Below, be elaborated for embodiments of the present invention with reference to accompanying drawing.
Fig. 1 is the figure of the whole schematic configuration of the plasma treatment appts (Etaching device) that uses in the pattern ground expression embodiments of the present invention.In Fig. 1, label 1 expression material is to be formed by the material such as aluminium etc., can seal its inside airtightly, has constituted the vacuum chamber cylindraceous of process chamber.
Above-mentioned vacuum chamber 1 is connected with earthing potential.In the inside of vacuum chamber 1, be provided with by electric conducting material and constitute mounting table 2 block, that be also used as lower electrode such as aluminium etc.
The insulation board 3 of these mounting table 2 process potteries etc. is supported in the vacuum chamber 1.The semiconductor wafer mounting surface of mounting table 2 is provided with electrostatic chuck 4.This electrostatic chuck 4 has electrostatic chuck is clipped in constituting in the middle of the dielectric film 4b that is made of insulating material with electrode 4a, and DC power supply 5 is connected with electrode 4a with electrostatic chuck.Electrostatic chuck is made of copper etc. with electrode 4a, and dielectric film 4b is made of polyimides etc.
In addition, in the inside of mounting table 2, be provided with and be used to make as the hot media stream 6 of the insulating properties circulation of fluid that is used for temperature controlled hot media and be used for the temperature control of helium etc. is supplied to gas the gas flow path 7 of the inside of semiconductor wafer W.
And, by the insulating properties fluid that is controlled in to fixed temperature is circulated in hot media stream 6, mounting table 2 is controlled to fixed temperature, and, through gas flow path 7, temperature control is supplied with between this mounting table 2 and the semiconductor wafer W the inside with gas, promoted the heat exchange between them, can high accuracy and expeditiously semiconductor wafer W is controlled on the fixed temperature.
In addition, the focusing ring 8 that the periphery setting above mounting table 2 is formed by electric conducting material or insulating material, and then, connecting the supply lines 9 that is used for supply high frequency electric power in the substantial middle of mounting table 2.Connect high frequency electric source (RF power supply) 11 through integrator 10 at this supply lines 9, make from the High frequency power of the given frequency of high frequency electric source 11 supplies.
In addition, in the outside of above-mentioned focusing ring 8, be provided with and be configured air exhaust loop 12 ring-type, that form a plurality of steam vents, through this air exhaust loop 12, the vacuum pumps of the gas extraction system 14 by being connected exhaust outlet 13 etc. carry out the vacuum exhaust in the processing space in the vacuum chamber 1.
On the other hand, on the top section of the vacuum chamber above the mounting table 21, relatively be provided with injector head 15 as parallel, and make this injector head 15 ground connection with mounting table 2.Therefore, these injector heads 15 and mounting table 2 play the effect of pair of electrodes (upper electrode and lower electrode).
Be provided with a plurality of gas squit holes 16 below the above-mentioned injector head 15, and have gas introduction unit 17 at an upper portion thereof.And, form gaseous diffusion in the inside of injector head 15 and use space 18.Gas supplying tubing 19 is connected gas introduction unit 17, and connects gas supply system 20 at the other end of this gas supplying tubing 19.This gas supply system 20 by the mass flow controller that is used for the control gaseous flow (MFC) 21, be used to supply with the processing gas supply source 22 of processing gas that for example etching uses etc. and be used to supply with the formations such as Ar gas supply source 23 of Ar gas.
On the other hand, in the outer periphery of vacuum chamber 1,, make that the processing space between mounting table 2 and injector head 15 forms magnetic field with the magnetic field formation mechanism (annular magnet) 24 of vacuum chamber 1 concentric shape ground configuration ring-type.By rotating mechanism 25, can make this magnetic field form mechanism's 24 integral body and around vacuum chamber 1, rotate with given rotary speed.
In addition, the plasma processor structure that is used for semiconductor wafer W is implemented the above-mentioned DC power supply 5, high frequency electric source 11, gas supply system 20 etc. of plasma treatment has the structure of being controlled by control unit 40.
Next, the order to the etch processes of being undertaken by the as above Etaching device of structure describes.
(first execution mode)
At first, open be arranged in the vacuum chamber 1 for illustrated sluice valve, through with the load locking room (for diagram) of this sluice valve disposed adjacent, and semiconductor wafer W is transported in the vacuum chamber 1 by conveyer (for illustrating), be positioned on the mounting table 2.And, after making conveyer be withdrawn into the outside of vacuum chamber 1, close sluice valve.In addition, at this moment, be not supplied to of the loading of the electrostatic chuck of electrostatic chuck 4 with the direct voltage from DC power supply 5 (HV) on the electrode 4a.
After this, the vacuum pump by gas extraction system 14 will be vented to given vacuum degree through exhaust outlet 13 in the vacuum chamber 1, meanwhile, at first, from Ar gas supply source 23 Ar gas is supplied in the vacuum chamber 1.In addition, in this state, as shown in Figure 2, at first from high frequency electric source 11 to the lower High frequency power (frequency for example is 13.56MHz) of supplying with 300W etc. as the mounting table 2 of lower electrode, thereby produce weak plasma, and make this weak action of plasma on semiconductor wafer W.
Make the weak reason of action of plasma on semiconductor wafer W as follows like this.
In other words, according to the treatment state in the front operation (for example CVD etc. film formation process) etc., the state of the semiconductor wafer W of handling is also different, for example, has the situation at the inner accumulation electric charge of semiconductor wafer W.And, when like this in the state of semiconductor wafer W inner accumulation electric charge, if act on strong plasma, then because the possibility of generation surface arcing etc. is very high, so make before related plasma works, weak plasma is worked, thereby equally adjust (carrying out initialization) at the state of the electric charge of semiconductor wafer W inner accumulation etc.
And, when adjusting the state of charge of this semiconductor wafer W inner accumulation, in order to be easy to from the inner dislocation charge of semiconductor wafer W, in the state of the electrostatic chuck that is not supplied to electrostatic chuck 4, semiconductor wafer is adjusted (initialization) by described weak gas ions with the direct voltage (HV) of electrode 4a.
In addition, the High frequency power that is used to produce this weak gas ions is about 0.15～1.0W/cm
2, for example be about 100～500W, make weak gas ions act on semiconductor wafer W on time for example be about 5～20 seconds.
In addition, as mentioned above, though to using Ar gas, the situation that the plasma of Ar gas is worked is illustrated, and the kind of gas is not limited thereto, and for example, also can use O
2Gas, CF
4Gas, N
2Gases such as gas.But, selected every kind of gaseous species, the gaseous plasma that the selected gas of needs produces seldom plays undesirable effects such as etching to the inwall of semiconductor wafer W and vacuum chamber 1, and needs are selected the gas of easy triggering for generating plasma.In addition, even consider that also there is the situation of parameter in the optimal gas kind, preferably suitably selects according to the effective any processing of semiconductor wafer W in the operation of front.
In addition, as mentioned above, after making weak plasma generation effect on the semiconductor wafer W, as shown in Figure 2, be supplied to the loading of electrostatic chuck with the direct voltage from DC power supply 5 (HV) on the electrode 4a.After this, from handling gas supply source 22 given processing gas (etching gas) is supplied in the vacuum chamber 1, and from high frequency electric source 11 to the high-power High frequency power of supplying with as the mounting table 2 of lower electrode such as the common processing usefulness of 2000W etc. (frequency for example is 13.56MHz), produce strong plasma, the normal plasma treatment (etch processes) that works of going forward side by side.In addition, in Fig. 2, the power value when magnitude of voltage when transverse axis express time, the longitudinal axis are represented electrostatic chuck loading HV and RF output.
At this moment, by on mounting table 2, loading High frequency power as lower electrode, forming high-frequency electric field as the injector head 15 of upper electrode with in as the processing space between the mounting table 2 of lower electrode, simultaneously form mechanism 24 and form magnetic field, and in this state, carry out plasma etching by magnetic field.
In addition, when implementing given etch processes, by stopping supply from the High frequency power of high frequency electric source 11, the processing that stops etching, and, semiconductor wafer W is transported vacuum chamber 1 outside according to the order opposite with said sequence.
As mentioned above, at first, make weak action of plasma on semiconductor wafer W, after this, when carrying out the etch processes of semiconductor wafer W, can make the ratio and the load that on semiconductor wafer W, produce surface arcing irrelevant, be roughly zero (below 1%).On the other hand, when not making above-mentioned its effect of weak plasma and beginning to handle, it is relevant with load to exist the ratio that produces surface arcing on semiconductor wafer W, is about 80% situation.Its reason is that in the operation before etching, semiconductor wafer W is charged, so under the situation of last operation for the operation that forms so-called Low-K film by CVD, the probability that aforesaid surface arcing takes place is high especially.
Therefore, can confirm before beginning common processing, make weak action of plasma as described above on semiconductor wafer W, can be reduced in the ratio that produces surface arcing on the semiconductor wafer W significantly.
; in the above-described embodiment; as shown in Figure 1; though the situation for the device that only uses the structure that loads High frequency power on as the mounting table 2 of lower electrode is illustrated; but; as shown in Figure 3, even also very suitable for the so-called top and the bottom loaded type plasma processing apparatus that loads on through integrator 30 from the structure of the High frequency power of high frequency electric source 31 as the injector head 15 of upper electrode.
At this moment, as shown in Figure 4, at first, begin the lower powered High frequency power as the mounting table 2 of lower electrode is loaded, after this, begin lower powered High frequency power is added on the injector head 15 as upper electrode, temporarily stop here High frequency power is added on the mounting table 2 as lower electrode.And, in this state, make weak action of plasma after preset time on the semiconductor wafer W, also stop High frequency power being added on the injector head 15 as upper electrode, temporarily make plasma disappearance.
Then, begin electrostatic chuck at electrostatic chuck 4 in turn and load direct voltage (HV) on electrode 4a, the common High frequency power (high-power High frequency power) that loading processing is used on as the mounting table 2 of lower electrode, the common High frequency power (high-power High frequency power) that loading processing is used on as the injector head 15 of upper electrode, and the common processing of beginning semiconductor wafer W.
So, the present invention also can be applicable to the plasma processing apparatus of lower unit making alive type.
In addition, make like that the weak action of plasma except above-mentioned, perhaps, also can be preferably separately before beginning to handle, make electro-dissociator act on the electric charge that reduces its inside on the semiconductor wafer W.By the effect of this electro-dissociator, also can suppress the generation of surface arcing.This electro-dissociator both can be arranged in the vacuum chamber, also can be arranged on other outer place of vacuum chamber.
; in method of plasma processing shown in Figure 2; do not carry out under the state of High frequency power loading after producing weak plasma on the mounting table 2 that weak High frequency power is loaded on as lower electrode, the loading of the direct voltage (HV) of electrode 4a is used in beginning to the electrostatic chuck of electrostatic chuck 4.So, if under the state that loads the loading of not carrying out High frequency power after weak High frequency power produces weak plasma, beginning is to the loading of electrostatic chuck with the direct voltage (HV) of electrode 4a, then when beginning to load this direct voltage (HV), exist the possibility that the discharge of thunder shape takes place and substrate is sustained damage.In this case, as shown in Figure 5, in the state that High frequency power is added to mounting table 2 (producing the state of weak plasma), if beginning is to the loading of electrostatic chuck with the direct voltage (HV) of electrode 4a, the then generation that can suppress to discharge.
As above, in the first embodiment, we have illustrated that the method for using Ar gas to produce weak plasma and this moment are to the timing of electrostatic chuck with the loading of the direct voltage of electrode 4a before the plasma treatment of etching etc.
(second execution mode)
Next, the timing that loads of the High frequency power of our explanations when carrying out the plasma treatment of etch processes etc. and to the preference of electrostatic chuck with the relation of the timing of the direct voltage loading of electrode 4a.
In addition, above-mentioned electrostatic chuck 4 has ambipolar and the one pole type, and these types have a coulomb type (husband husband Network one ロ Application type) and Johnson's feedback-type (ジ ョ Application ソ Application ラ one ベ ッ Network type) respectively.Wherein, when in the one pole type, using the electrostatic chuck 4 of coulomb type, preferably carry out the absorption of semiconductor wafer W with following order.In Fig. 6, represented this order.Transverse axis express time, longitudinal axis dotted line represent that institute adds high frequency electric power (W), and solid line represents that institute adds dc voltage value (V).
In other words, after semiconductor wafer W being positioned on the mounting table 2 (electrostatic chuck 4), begin gas is imported in the vacuum chamber 1.After this, shown in the dotted line of Fig. 6, at first, beginning loads High frequency power and produces plasma on mounting table 2, after this, shown in solid line among the same figure, loads direct voltage (HV) at electrostatic chuck on electrode 4a.
In addition, owing to, semiconductor wafer W is not adsorbed on the electrostatic chuck 4, can not carry out sufficient temperature control to it beginning that electrostatic chuck is loaded direct voltage (HV) before with electrode 4a.Therefore, preferably making the High frequency power that is carried in when at first plasma taking place on the mounting table 2 is that power is lower than the High frequency power (for example about 500W) when handling, and by action of plasma, makes the temperature of semiconductor wafer W not produce rising.
In addition, when when electrostatic chuck 4 takes out semiconductor wafer W, as shown in same figure, after plasma treatment finishes, at first, the High frequency power value that loads is reduced to power is lower than power value (not being 0W) when handling.After this, stop at electrostatic chuck and go up loading direct voltage (HV), then, stop to load High frequency power, make plasma disappearance with electrode 4a.In addition, when stopping at electrostatic chuck usefulness electrode 4a last loading direct voltage (HV), to be added to electrostatic chuck with on the electrode 4a with the opposite polarity voltage in when absorption (for example-about 2000V) temporarily, thereby remove electric charge, easily semiconductor wafer W be transported the outside.The opposite polarity voltage that carries out as required as above loads, and is not carrying out also can not carrying out the loading of this opposite polarity voltage simply under the situation of electrostatic chuck 4 taking-up semiconductor wafer W when described opposite polarity voltage loads.
When Fig. 7 represents to carry out the order of absorption of semiconductor wafer W by aforesaid electrostatic chuck 4, the copper electrode part (Cu) of electrostatic chuck (ESC) and the insulation membranous part (PI) of polyimides system, the oxide-film unit, the back side (B.S.Ox) of multi-lager semiconductor chip (Multi Layer Wafer) and silicon chip unit (Si sub) and oxide-film unit (Ox), potential change with each unit of processing space cell (Space) in the vacuum chamber and upper electrode unit (Wall).
As shown in Figure 7, at first, if reduce the pole that is arranged on the wafer support usefulness on the mounting table 2, semiconductor chip W is positioned on the mounting table 2, then as among the figure 1. shown in, the current potential of each unit is in zero state, after this, when beginning to import to gas in the vacuum chamber 1, as among the figure 2. shown in, the current potential of each unit is in zero state.
After this, produce plasma if begin to load High frequency power, then as among the figure 3. shown in, about the negative 100V that the current potential of semiconductor chip W becomes in plasmoid to be determined.
And, in this state, if beginning loads direct voltage (HV) at electrostatic chuck on electrode 4a, then as among the figure 4. shown in, the current potential that electrostatic chuck becomes added direct voltage (HV) with the current potential of electrode 4a (for example, about 1.5kV), and in dielectric film unit (PI) last potential difference that produces adsorb semiconductor wafer W.
So, according to order by described electrostatic chuck 4 absorption semiconductor wafer W, because on the surface of semiconductor wafer W, be accompanied by and load direct voltage (HV) at electrostatic chuck on electrode 4a and can't load high voltage, so can prevent from the surface of semiconductor wafer W, to produce undesirable paradoxical discharge.
In addition, the illustrated in a second embodiment order that loads direct voltage after loading High frequency power has the effect of following explanation.
If in order as shown in Figure 9, cut off direct voltage after promptly when the beginning plasma treatment, after electrostatic chuck is loaded direct voltage with electrode 4a, after lower electrode (or upper electrode) is gone up the loading High frequency power and finished plasma treatment, cutting off High frequency power, when then making semiconductor wafer W absorption or disengaging, as shown in figure 10, on semiconductor wafer W, load big voltage.Therefore, exist on the surface of semiconductor wafer W and damage, specifically have the damaged possibility that the tens of approximately μ m of diameter take place, and, in etching, cause electric arc, cause that goods are bad by in that this damaged place takes place.In addition, also existing damaged part becomes particle, attached to the lip-deep situation of semiconductor wafer W.
But, in the situation of order explanation in the present embodiment, RFON (the connection) → HV ON when carrying out what is called processing beginning, HV OFF (the disconnection) → RF OFF when processing finishes, because on semiconductor wafer W, do not load high voltage, so can not cause damage, and can prevent on the surface of particle attached to semiconductor wafer W to semiconductor wafer W.
In addition, in order shown in Figure 9, even if do not causing on the surface of semiconductor wafer W under the situation of damage, since electrostatic chuck with electrode 4a on the loading direct voltage make semiconductor wafer W charged, make the charged particle that in process chamber, swims usually attached to the possibility on the semiconductor wafer W so exist by its electrostatic force.
But, under the situation of the order of the RF ON → HV ON when handling beginning, the HVOFF → RF OFF when processing finishes, because before electrostatic chuck loads direct voltage, keeping high-frequency discharge, so the charged particle that will swim is captured in the ion sheath, the result can reduce particle and adhere to semiconductor wafer W is lip-deep.Also there is such effect.
Next, capture the result of effect in the expression probatio inspectionem pecuoarem ion sheath.
The difference that Figure 11 is expression investigation by the direct current on-load voltage size of the electrostatic chuck that is used to adsorb semiconductor wafer W produces the figure that adheres to the different result of population.
In other words, at first, in the process chamber of reactant that the CF that making becomes particle generation source is (dried) attached to plasma processing apparatus, after this, semiconductor wafer is transported in the process chamber, be positioned on the electrostatic chuck, and make processing gas flow certain hour, then, carry out removing electricity and in process chamber, transporting of semiconductor wafer W, owing to be divided into 3 classes, and, calculate attached to the population on the semiconductor wafer W according to the size of each class in this 3 class according to big young pathbreaker's particle of particle, therefore, the direct voltage that makes electrostatic chuck is 0V, 1.5kV, 2.0kV, 2.5kV,, and the investigation result under each situation is illustrated among Figure 11.
As shown in figure 11, can learn when improving the direct voltage that is added on the electrostatic chuck, increase attached to the population on the semiconductor wafer W.In other words, can learn loading direct voltage on the electrostatic chuck particle is exerted an influence on attached to semiconductor wafer W.
In addition, the treatment conditions of above-mentioned drying process are pressure: 6.65Pa, High frequency power: 3500W, using gases: C
4F
8/ Ar/CH
2F
2=13/600/5sccm, wafer the inside pressure (central authorities/periphery): 1330/3990Pa, temperature (ceiling/sidewall/bottom): 60/60/60 ℃, high frequency load time: 3 minutes.
In addition, semiconductor wafer W is configured on the electrostatic chuck, thereby the pressure when making gas communication, using gases, wafer the inside pressure, temperature conditions are with above-mentioned identical, High frequency power=0, the gas communication time is 60 seconds.
In addition, the above-mentioned electrician's preface of removing is in pressure: 26.6Pa, on-load voltage :-1.5kV, voltage load time: 1 second and pressure: 53.2pA, N
2: 1000sccm, time: carry out the electricity that removes of semiconductor wafer W under 15 seconds the condition, in institute's making alive :-2.0kV, voltage load time: carry out removing of electrostatic chuck under 1 second the condition.In addition, as above remove, its reason is to exist in the possibility that semiconductor wafer W when transporting semiconductor wafer W after processing finishes is takeoff and caused adhering to unnecessary particle again, in other words, as above removes electricity and just takeofing of this semiconductor wafer W can not taken place.
In addition, Figure 12 is configured in semiconductor wafer W in the process chamber after being illustrated in above-mentioned drying process, and carries out O in this state
2Dry cleansing, and in drying process, produce many particles from the reactant that adheres to, under the situation of the order of the RF ON → HV ON when what is called is handled beginning, the HV OFF → RF OFF when processing finishes and under the situation of the order of the HVON → RF ON when the processing beginning, the RF OFF → HV OFF when processing finishes, measure result attached to the population on the semiconductor wafer W.In addition, in this mensuration, drying process and remove the identical of electrician's preface and said circumstances, O
2Pressure in the dry cleansing operation: 13.3Pa, High frequency power: 1000W, using gases: O
2=1000sccm, wafer the inside pressure (central authorities/periphery): 1330/3990Pa, temperature (ceiling/sidewall/bottom): 60/60/60 ℃, time that high frequency adds: 30 seconds.
As shown in figure 12, by adopting RF ON → HV ON when handling beginning, the order of HV OFF → RF OFF when processing finishes, can reduce significantly and adhere to population.
In addition, order as shown in Figure 8, the pole (supporting rod) that is arranged on the wafer support usefulness on the mounting table 2 in use is supported in the state (1.) of semiconductor wafer W, beginning loads direct voltage (HV) (2.) at electrostatic chuck on electrode 4a, after this, reduce the pole of wafer support usefulness, semiconductor chip W is positioned in (3., 4.) on the mounting table 2, in the situation of absorption semiconductor chip W, the surface of semiconductor chip W does not become the current potential of the direct voltage (HV) of loading.Therefore, even if according to this absorption order, also can prevent from the surface of semiconductor chip W, to produce undesirable paradoxical discharge.But, this order, the pole of wafer support usefulness has conductivity, can need not to be structure from this pole to semiconductor chip W that supply with electric charge from.
In addition, if use the electrostatic chuck of same coulomb of type or ambipolar electrostatic chuck, also can prevent the paradoxical discharge that when adsorbing, produces by above-mentioned electrostatic chuck.
In addition, in above example, although understand the execution mode of the etch processes of the Etaching device that uses parallel plate-type, but the present invention is not limited to this kind execution mode, as long as can be operable just passable in all plasma treatment.In addition, in the above-described embodiment, although understand the situation of the weak plasma of effect in the vacuum chamber of the Etaching device that carries out etch processes, but also can also can carry out initialization at the effect weak plasma in place different with the device of handling to semiconductor wafer W.
As above in detail said clear, according to the present invention, can prevent the surface arcing that on processed substrate, generates, compare with present technology, can reach and improve productive purpose.
Method of plasma processing involved in the present invention and plasma processing apparatus can be used to carry out the semiconductor manufacturing industry that semiconductor makes etc.
Therefore, the present invention has the possibility of utilizing on industry.
Claims (10)
1. a method of plasma processing is characterized in that,
When making action of plasma on processed substrate, carry out plasma treatment, before carrying out described plasma treatment, to be weaker than the weak action of plasma of the plasma that in this plasma is handled, uses on described processed substrate, and state of charge that will this processed substrate is kept certain state, after this, carry out described plasma treatment.
2. method of plasma processing as claimed in claim 1 is characterized in that,
Make described weak action of plasma preset time on described processed substrate, after this, load direct voltage being used to adsorb on the electrostatic chuck that keeps described processed substrate.
3. method of plasma processing as claimed in claim 2 is characterized in that,
Before described weak plasma disappearance, begin described electrostatic chuck is loaded direct voltage.
4. as any one described method of plasma processing in the claim 1～3, it is characterized in that,
Described weak plasma is by Ar gas, O
2Gas, CF
4Gas or N
2The plasma that gas forms.
5. as any one described method of plasma processing in the claim 1～4, it is characterized in that,
By 0.15～1.0W/cm
2High frequency power form described weak plasma.
6. as any one described method of plasma processing in the claim 1～5, it is characterized in that,
Make described weak action of plasma on described processed substrate 5～20 seconds.
7. as any one described method of plasma processing in the claim 1～6, it is characterized in that,
When described plasma treatment begins, begin to load be used to produce the High frequency power of plasma after, begin described electrostatic chuck is loaded direct voltage, when described plasma treatment finishes, after stopping, stopping the loading of described High frequency power to described electrostatic chuck loading direct voltage.
8. as any one described method of plasma processing in the claim 1～6, it is characterized in that,
Under situation about by supporting rod described processed substrate being supported in above the described electrostatic chuck with conductor ground connection, begin loading direct voltage on the described electrostatic chuck, after this, described processed substrate is descended, be positioned on the described electrostatic chuck.
9. as any one described method of plasma processing in the claim 1～8, it is characterized in that,
Described plasma treatment is an etch processes, in the process chamber that carries out this etch processes, makes described weak action of plasma on described processed substrate.
10. one kind has the plasma processing apparatus of implementing the plasma processor structure of plasma treatment on processed substrate, it is characterized in that,
Have the described plasma processor structure of control, carry out claim 1～9 in the control unit of any one described method of plasma processing.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002256096A JP4322484B2 (en) | 2002-08-30 | 2002-08-30 | Plasma processing method and plasma processing apparatus |
| JP256096/2002 | 2002-08-30 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1679148A true CN1679148A (en) | 2005-10-05 |
| CN100414672C CN100414672C (en) | 2008-08-27 |
Family
ID=31972935
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB038206455A Expired - Lifetime CN100414672C (en) | 2002-08-30 | 2003-08-28 | Plasma processing method and plasma processing device |
Country Status (6)
| Country | Link |
|---|---|
| JP (1) | JP4322484B2 (en) |
| KR (1) | KR100782621B1 (en) |
| CN (1) | CN100414672C (en) |
| AU (1) | AU2003261790A1 (en) |
| TW (1) | TW200410332A (en) |
| WO (1) | WO2004021427A1 (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100416758C (en) * | 2005-12-09 | 2008-09-03 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Method for releasing chip static electricity thoroughly in chip etching equipment |
| CN101740340B (en) * | 2008-11-25 | 2011-12-21 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Reaction chamber and semiconductor processing device |
| CN109698111A (en) * | 2017-10-24 | 2019-04-30 | 应用材料公司 | System and method for pdp filter |
| CN109952636A (en) * | 2016-11-11 | 2019-06-28 | 朗姆研究公司 | Plasma ignition inhibits |
| CN113154610A (en) * | 2021-05-31 | 2021-07-23 | 北京十三和科技发展有限公司 | Air purifier with temperature adjusting function |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7205250B2 (en) * | 2003-03-18 | 2007-04-17 | Matsushita Electric Industrial Co., Ltd. | Plasma processing method and apparatus |
| US7316785B2 (en) * | 2004-06-30 | 2008-01-08 | Lam Research Corporation | Methods and apparatus for the optimization of etch resistance in a plasma processing system |
| JP4704087B2 (en) * | 2005-03-31 | 2011-06-15 | 東京エレクトロン株式会社 | Plasma processing apparatus and plasma processing method |
| JP2010199310A (en) * | 2009-02-25 | 2010-09-09 | Sharp Corp | Plasma etching method |
| JP5835985B2 (en) * | 2010-09-16 | 2015-12-24 | 東京エレクトロン株式会社 | Plasma processing apparatus and plasma processing method |
| US20120154974A1 (en) * | 2010-12-16 | 2012-06-21 | Applied Materials, Inc. | High efficiency electrostatic chuck assembly for semiconductor wafer processing |
| WO2014049915A1 (en) * | 2012-09-26 | 2014-04-03 | シャープ株式会社 | Substrate treatment device, substrate treatment method, and production method for semiconductor device |
| TWI595557B (en) * | 2014-02-28 | 2017-08-11 | 愛發科股份有限公司 | Plasma etching method, plasma etching apparatus, plasma processing method, and plasma processing apparatus |
| JP6558901B2 (en) | 2015-01-06 | 2019-08-14 | 東京エレクトロン株式会社 | Plasma processing method |
| JP6595334B2 (en) * | 2015-12-28 | 2019-10-23 | 株式会社日立ハイテクノロジーズ | Plasma processing apparatus and plasma processing method |
| CN108701586B (en) * | 2016-02-26 | 2022-09-30 | 玛特森技术公司 | Stripping treatment method for implanted photoresist |
| JP2021147635A (en) * | 2020-03-17 | 2021-09-27 | 東京エレクトロン株式会社 | Cleaning method, and manufacturing method of semiconductor device |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06318552A (en) * | 1993-05-10 | 1994-11-15 | Nissin Electric Co Ltd | Plasma processing and its apparatus |
| JPH1027780A (en) * | 1996-07-10 | 1998-01-27 | Nec Corp | Plasma treating method |
| JP3907256B2 (en) * | 1997-01-10 | 2007-04-18 | 芝浦メカトロニクス株式会社 | Electrostatic chuck device for vacuum processing equipment |
| TW484187B (en) * | 2000-02-14 | 2002-04-21 | Tokyo Electron Ltd | Apparatus and method for plasma treatment |
-
2002
- 2002-08-30 JP JP2002256096A patent/JP4322484B2/en not_active Expired - Fee Related
-
2003
- 2003-08-28 AU AU2003261790A patent/AU2003261790A1/en not_active Abandoned
- 2003-08-28 KR KR1020057003051A patent/KR100782621B1/en active IP Right Grant
- 2003-08-28 CN CNB038206455A patent/CN100414672C/en not_active Expired - Lifetime
- 2003-08-28 WO PCT/JP2003/010937 patent/WO2004021427A1/en active Application Filing
- 2003-08-29 TW TW092123978A patent/TW200410332A/en not_active IP Right Cessation
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100416758C (en) * | 2005-12-09 | 2008-09-03 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Method for releasing chip static electricity thoroughly in chip etching equipment |
| CN101740340B (en) * | 2008-11-25 | 2011-12-21 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Reaction chamber and semiconductor processing device |
| CN109952636A (en) * | 2016-11-11 | 2019-06-28 | 朗姆研究公司 | Plasma ignition inhibits |
| CN109698111A (en) * | 2017-10-24 | 2019-04-30 | 应用材料公司 | System and method for pdp filter |
| CN113154610A (en) * | 2021-05-31 | 2021-07-23 | 北京十三和科技发展有限公司 | Air purifier with temperature adjusting function |
Also Published As
| Publication number | Publication date |
|---|---|
| JP4322484B2 (en) | 2009-09-02 |
| WO2004021427A1 (en) | 2004-03-11 |
| TWI324361B (en) | 2010-05-01 |
| KR100782621B1 (en) | 2007-12-06 |
| KR20050058464A (en) | 2005-06-16 |
| AU2003261790A1 (en) | 2004-03-19 |
| CN100414672C (en) | 2008-08-27 |
| JP2004095909A (en) | 2004-03-25 |
| TW200410332A (en) | 2004-06-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN1679148A (en) | Plasma processing method and plasma processing device | |
| JP6071514B2 (en) | Electrostatic chuck reforming method and plasma processing apparatus | |
| CN1296977C (en) | Insulative film etching device | |
| CN1842242A (en) | Plasma processing apparatus and method | |
| CN100345257C (en) | Plasma processing device | |
| CN1664995A (en) | Plasma processing method and plasma processing device | |
| CN101022693B (en) | Cleaning method for substrate processing chamber and substrate processing chamber | |
| CN1992164A (en) | Plasma etching method and computer-readable storage medium | |
| CN101038849A (en) | Plasma processing apparatus, plasma processing method and focus ring | |
| CN101800161A (en) | Plasma-etching method and plasma-etching apparatus | |
| TWI576889B (en) | Plasma processing apparatus | |
| CN1612314A (en) | Electrostatic adsorption device, plasma processing device and plasma processing method | |
| CN101047114A (en) | Plasma processing apparatus and plasma processing method | |
| CN1698192A (en) | Substrate holding mechanism using electrostatic chuck and method of manufacturing the same | |
| CN101273430A (en) | Apparatus for the removal of a set of byproducts from a substrate edge and methods therefor | |
| JP6017928B2 (en) | Plasma etching method and plasma etching apparatus | |
| JP4642809B2 (en) | Plasma processing method and plasma processing apparatus | |
| CN101038861A (en) | Plasma etching method and computer-readable storage medium | |
| TW201001530A (en) | Electrode structure and substrate processing apparatus | |
| TW201703074A (en) | Method for etching magnetic layer | |
| CN101047112A (en) | Plasma processing method and plasma processing apparatus | |
| CN100352014C (en) | Etching method | |
| CN1790628A (en) | Plasma etching method and plasma etching apparatus | |
| JP4381694B2 (en) | Sample surface treatment method | |
| JPH11111830A (en) | Electrostatic sucking device and method, and method and device for treatment apparatus using them |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20080827 |