JP2004047829A5 - - Google Patents

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Publication number
JP2004047829A5
JP2004047829A5 JP2002204776A JP2002204776A JP2004047829A5 JP 2004047829 A5 JP2004047829 A5 JP 2004047829A5 JP 2002204776 A JP2002204776 A JP 2002204776A JP 2002204776 A JP2002204776 A JP 2002204776A JP 2004047829 A5 JP2004047829 A5 JP 2004047829A5
Authority
JP
Japan
Prior art keywords
input
connection
output signal
cell
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
JP2002204776A
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English (en)
Japanese (ja)
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JP2004047829A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2002204776A priority Critical patent/JP2004047829A/ja
Priority claimed from JP2002204776A external-priority patent/JP2004047829A/ja
Priority to US10/617,931 priority patent/US7353476B2/en
Publication of JP2004047829A publication Critical patent/JP2004047829A/ja
Publication of JP2004047829A5 publication Critical patent/JP2004047829A5/ja
Abandoned legal-status Critical Current

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JP2002204776A 2002-07-12 2002-07-12 半導体装置の接続端子設計装置、半導体装置の接続端子設計方法、及び半導体装置の接続端子設計プログラム Abandoned JP2004047829A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2002204776A JP2004047829A (ja) 2002-07-12 2002-07-12 半導体装置の接続端子設計装置、半導体装置の接続端子設計方法、及び半導体装置の接続端子設計プログラム
US10/617,931 US7353476B2 (en) 2002-07-12 2003-07-11 System, method and computer program product for designing connecting terminals of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002204776A JP2004047829A (ja) 2002-07-12 2002-07-12 半導体装置の接続端子設計装置、半導体装置の接続端子設計方法、及び半導体装置の接続端子設計プログラム

Publications (2)

Publication Number Publication Date
JP2004047829A JP2004047829A (ja) 2004-02-12
JP2004047829A5 true JP2004047829A5 (enExample) 2005-02-03

Family

ID=31710281

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002204776A Abandoned JP2004047829A (ja) 2002-07-12 2002-07-12 半導体装置の接続端子設計装置、半導体装置の接続端子設計方法、及び半導体装置の接続端子設計プログラム

Country Status (2)

Country Link
US (1) US7353476B2 (enExample)
JP (1) JP2004047829A (enExample)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7665044B1 (en) 2005-04-01 2010-02-16 Cadence Design Systems, Inc. Method and system for the condensed macro library creation
US7543261B2 (en) * 2005-04-27 2009-06-02 Lsi Corporation I/O planning with lock and insertion features
JP4663473B2 (ja) * 2005-09-30 2011-04-06 財団法人福岡県産業・科学技術振興財団 半導体装置設計支援装置、半導体装置設計支援方法、その方法をコンピュータにより実行可能なプログラム、及び、そのプログラムを記録した記録媒体
US8694946B1 (en) 2008-02-20 2014-04-08 Altera Corporation Simultaneous switching noise optimization
US8151233B1 (en) * 2009-04-07 2012-04-03 Altera Corporation Circuit design with incremental simultaneous switching noise analysis
JP2011192705A (ja) * 2010-03-12 2011-09-29 Toshiba Corp パッケージ基板の設計装置およびパッケージ基板の設計方法
US9557370B2 (en) 2012-02-10 2017-01-31 Taiwan Semiconductor Manufacturing Company, Ltd. Methods of improving bump allocation for semiconductor devices and semiconductor devices with improved bump allocation
TWI472941B (zh) 2012-04-18 2015-02-11 Global Unichip Corp 晶片輸出入設計的方法
KR101996825B1 (ko) 2013-01-18 2019-10-01 삼성전자 주식회사 3d 반도체 패키지 디자인 방법 및 컴퓨팅 시스템
DE102019112439A1 (de) 2018-09-28 2020-04-02 Taiwan Semiconductor Manufacturing Co., Ltd. Systeme und Verfahren zur Verletzungsprädiktion bei einer Entwurfsregelprüfung
US10943049B2 (en) 2018-09-28 2021-03-09 Taiwan Semiconductor Manufacturing Co., Ltd. Rule check violation prediction systems and methods
KR20220008171A (ko) 2020-07-13 2022-01-20 삼성전자주식회사 반도체 칩 설계 방법 및 그것을 수행하기 위한 컴퓨팅 장치
CN115410935B (zh) * 2022-08-30 2023-09-26 江苏泰治科技股份有限公司 一种ic芯片封装时避免焊线交叉的布线方法及系统

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3230937B2 (ja) 1994-08-18 2001-11-19 株式会社日立製作所 電子回路最適設計支援装置及びその方法
JPH09325979A (ja) 1996-06-05 1997-12-16 Mitsubishi Electric Corp ベースアレイデータ生成装置および方法
US5952726A (en) * 1996-11-12 1999-09-14 Lsi Logic Corporation Flip chip bump distribution on die
JP3349996B2 (ja) 1999-08-19 2002-11-25 エヌイーシーマイクロシステム株式会社 チップパッドの検索方法

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