JP2003504889A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2003504889A5 JP2003504889A5 JP2001510000A JP2001510000A JP2003504889A5 JP 2003504889 A5 JP2003504889 A5 JP 2003504889A5 JP 2001510000 A JP2001510000 A JP 2001510000A JP 2001510000 A JP2001510000 A JP 2001510000A JP 2003504889 A5 JP2003504889 A5 JP 2003504889A5
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/353,121 | 1999-07-14 | ||
| US09/353,214 US6340895B1 (en) | 1999-07-14 | 1999-07-14 | Wafer-level burn-in and test cartridge |
| US09/353,121 US6562636B1 (en) | 1999-07-14 | 1999-07-14 | Wafer level burn-in and electrical test system and method |
| US09/353,214 | 1999-07-14 | ||
| PCT/US2000/019482 WO2001004641A2 (en) | 1999-07-14 | 2000-07-13 | Wafer level burn-in and electrical test system and method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2003504889A JP2003504889A (ja) | 2003-02-04 |
| JP2003504889A5 true JP2003504889A5 (es) | 2007-06-21 |
Family
ID=26997804
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001510000A Pending JP2003504889A (ja) | 1999-07-14 | 2000-07-13 | ウエーハレベルバーンインおよび電気テスト装置および方法 |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JP2003504889A (es) |
| KR (1) | KR100751068B1 (es) |
| AU (1) | AU7329200A (es) |
| WO (1) | WO2001004641A2 (es) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6815966B1 (en) * | 2002-06-27 | 2004-11-09 | Aehr Test Systems | System for burn-in testing of electronic devices |
| JP5085534B2 (ja) | 2005-04-27 | 2012-11-28 | エイアー テスト システムズ | 電子デバイスを試験するための装置 |
| KR20060122387A (ko) * | 2005-05-27 | 2006-11-30 | 삼창기업 주식회사 | Ａ/ｄ컨버터 모듈 |
| WO2008124068A1 (en) * | 2007-04-05 | 2008-10-16 | Aehr Test Systems | Electronics tester with a signal distribution board and a wafer chuck having different coefficients of thermal expansion |
| CN101644741B (zh) * | 2008-08-04 | 2011-11-09 | 京元电子股份有限公司 | 具有电源塔的多层预烧板结构 |
| US8030957B2 (en) | 2009-03-25 | 2011-10-04 | Aehr Test Systems | System for testing an integrated circuit of a device and its method of use |
| KR101215945B1 (ko) | 2012-07-27 | 2012-12-27 | (주) 에이피 시스템 | Ｓｐｄｓ 및 이를 포함하는 메모리 모듈 실장 테스트 장치 |
| KR20180101476A (ko) | 2016-01-08 | 2018-09-12 | 에어 테스트 시스템즈 | 일렉트로닉스 테스터 내의 디바이스들의 열 제어를 위한 방법 및 시스템 |
| CN115210589B (zh) * | 2020-03-25 | 2023-07-18 | 华为技术有限公司 | 一种芯片测试装置及测试方法 |
| KR102386473B1 (ko) * | 2020-11-05 | 2022-04-13 | 광운대학교 산학협력단 | Rf 빔포밍 집적회로의 웨이퍼 레벨 테스트 방법 및 장치 |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5103168A (en) * | 1988-10-27 | 1992-04-07 | Grumman Aerospace Corporation | Stress testing equipment with an integral cooling plenum |
| JP3151203B2 (ja) * | 1988-11-23 | 2001-04-03 | テキサス インスツルメンツ インコーポレイテツド | 集積回路の自己検査装置 |
| JP3194040B2 (ja) * | 1992-04-27 | 2001-07-30 | カシオ計算機株式会社 | Ｉｃモジュール |
| US5442282A (en) * | 1992-07-02 | 1995-08-15 | Lsi Logic Corporation | Testing and exercising individual, unsingulated dies on a wafer |
| US5654588A (en) * | 1993-07-23 | 1997-08-05 | Motorola Inc. | Apparatus for performing wafer-level testing of integrated circuits where the wafer uses a segmented conductive top-layer bus structure |
| US5385487A (en) * | 1993-08-30 | 1995-01-31 | At&T Corp. | Apparatus for electrically operating devices in a controlled environment |
| US5429510A (en) * | 1993-12-01 | 1995-07-04 | Aehr Test Systems, Inc. | High-density interconnect technique |
| JP2925964B2 (ja) * | 1994-04-21 | 1999-07-28 | 松下電器産業株式会社 | 半導体ウェハ収納器及び半導体集積回路の検査方法 |
| US6577148B1 (en) * | 1994-08-31 | 2003-06-10 | Motorola, Inc. | Apparatus, method, and wafer used for testing integrated circuits formed on a product wafer |
| US5600257A (en) * | 1995-08-09 | 1997-02-04 | International Business Machines Corporation | Semiconductor wafer test and burn-in |
| JPH10163281A (ja) * | 1996-10-04 | 1998-06-19 | Hitachi Ltd | 半導体素子およびその製造方法 |
| JP3364134B2 (ja) * | 1997-10-20 | 2003-01-08 | 松下電器産業株式会社 | ウェハカセット |
| JP3294175B2 (ja) * | 1997-11-05 | 2002-06-24 | 東京エレクトロン株式会社 | 信頼性試験用ウエハ収納室 |
-
2000
- 2000-07-13 KR KR1020027000537A patent/KR100751068B1/ko active IP Right Grant
- 2000-07-13 WO PCT/US2000/019482 patent/WO2001004641A2/en active Application Filing
- 2000-07-13 JP JP2001510000A patent/JP2003504889A/ja active Pending
- 2000-07-13 AU AU73292/00A patent/AU7329200A/en not_active Abandoned