JP2003347581A - Led array - Google Patents

Led array

Info

Publication number
JP2003347581A
JP2003347581A JP2002158228A JP2002158228A JP2003347581A JP 2003347581 A JP2003347581 A JP 2003347581A JP 2002158228 A JP2002158228 A JP 2002158228A JP 2002158228 A JP2002158228 A JP 2002158228A JP 2003347581 A JP2003347581 A JP 2003347581A
Authority
JP
Japan
Prior art keywords
light emitting
electrode
semiconductor layer
conductivity type
emitting element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2002158228A
Other languages
Japanese (ja)
Other versions
JP4126454B2 (en
Inventor
Katsunobu Kitada
勝信 北田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2002158228A priority Critical patent/JP4126454B2/en
Publication of JP2003347581A publication Critical patent/JP2003347581A/en
Application granted granted Critical
Publication of JP4126454B2 publication Critical patent/JP4126454B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)
  • Led Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide an LED array which ensures high quality printing by preventing stray light. <P>SOLUTION: There is provided an LED array wherein one conductivity type semiconductor layer 2, an inverse conductivity type semiconductor layer 3 and an individual electrode 4 are sequentially laminated on a single crystal substrate 1, a plurality of light emitting elements including a common electrode 5 and an insulation film 6 provided in parallel is allocated in a plurality of lines on an extending area 7 where this one conductivity type semiconductor layer 2 is extended, and a group 9 of light emitting elements allocating an electrode pad 8 formed in common to each individual electrode 4 of these light emitting elements is allocated in a plurality of lines. In this LED array, the other electrode pad 10 formed in common to both common electrodes 5 is also allocated by providing different electrode interval x to the common electrode 5 in the extending area 7 of each light emitting element in the group of the light emitting elements 9 and providing the equal electrode interval x to the light emitting elements of one group of light emitting elements 9 and to the light emitting elements of the other group of light emitting elements 9. Only a part of the light emitting region A is covered with the insulation film 6 and moreover the area other than the light emitting region A is covered with a protection film 12. <P>COPYRIGHT: (C)2004,JPO

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明はLEDアレイに関
し、特にページプリンタ用感光ドラムの露光用光源など
に用いられるLEDアレイに関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an LED array, and more particularly, to an LED array used as an exposure light source for a photosensitive drum for a page printer.

【0002】[0002]

【従来の技術】LEDアレイの基本的な構成は、一導電
型半導体層と逆導電型半導体層と電極とを順次積層して
なる発光素子を複数個配列して成り、そして、この逆導
電型半導体層の発光領域部分をSiNxなどの光透過性
の電気的絶縁膜にて被覆し、さらに、かかる逆導電型半
導体層の発光領域以外の部分を光透過性の透明な合成樹
脂層にて被覆している。
2. Description of the Related Art The basic structure of an LED array is to arrange a plurality of light emitting elements in which a semiconductor layer of one conductivity type, a semiconductor layer of a reverse conductivity type and an electrode are sequentially laminated, and The light-emitting region of the semiconductor layer is covered with a light-transmitting electrical insulating film such as SiNx, and the portion other than the light-emitting region of the opposite conductivity type semiconductor layer is further covered with a light-transmitting transparent synthetic resin layer. are doing.

【0003】このような基本的な構成のLEDアレイに
ついて、その具体例を述べる。従来のLEDアレイを図
6と図7によって示す。図6はLEDアレイの平面図で
あり、図7はその断面図である。
A specific example of an LED array having such a basic configuration will be described. A conventional LED array is illustrated by FIGS. FIG. 6 is a plan view of the LED array, and FIG. 7 is a sectional view thereof.

【0004】21は単結晶基板であり、単結晶基板21
上において、22は一導電型半導体層、23は逆導電型
半導体層、24は個別電極、25は共通電極、26は窒
化シリコン膜などから成る保護膜としての絶縁膜であ
る。
[0004] Reference numeral 21 denotes a single crystal substrate.
In the above, 22 is a semiconductor layer of one conductivity type, 23 is a semiconductor layer of the opposite conductivity type, 24 is an individual electrode, 25 is a common electrode, and 26 is an insulating film as a protective film made of a silicon nitride film or the like.

【0005】単結晶基板21上に、各発光素子ごとに一
導電型半導体層22と逆導電型半導体層23とが順次積
層して形成され、その積層において、一導電型半導体層
22の面積は逆導電型半導体層23の面積に比べて大き
くしている。
A single conductivity type semiconductor layer 22 and a reverse conductivity type semiconductor layer 23 are sequentially formed on a single crystal substrate 21 for each light emitting element. In the stack, the area of the one conductivity type semiconductor layer 22 is reduced. The area is larger than the area of the opposite conductivity type semiconductor layer 23.

【0006】一導電型半導体層22の上に絶縁膜26を
被覆しているが、その露出部に共通電極25(25a、
25b)を接続して設けている。
An insulating film 26 is coated on the one conductivity type semiconductor layer 22, and the exposed portion thereof has a common electrode 25 (25a, 25a).
25b).

【0007】また、逆導電型半導体層23についても、
その上に絶縁膜26を被覆しているが、その露出部に個
別電極24を接続して設けている。
[0007] Also, for the opposite conductivity type semiconductor layer 23,
The insulating film 26 is coated thereon, and the individual electrodes 24 are connected to the exposed portions.

【0008】さらに図6に示すように、共通電極25
(25a、25b)は隣接する各発光素子ごとに(島状
半導体層22、23ごとに)異なる群に属するように2
群に分けて接続して設けられ、隣接する発光素子(島状
半導体層22、23)が同じ個別電極24に接続されて
いる。
[0008] Further, as shown in FIG.
(25a, 25b) are set to 2 so that they belong to different groups for each adjacent light emitting element (for each island-like semiconductor layer 22, 23).
Adjacent light emitting elements (island-shaped semiconductor layers 22 and 23) are connected to the same individual electrode 24.

【0009】この発光ダイオードアレイ構造では、個別
電極24と共通電極25(25a、25b)の組み合わ
せを選択して電流を流すことによって、各発光素子を選
択的に発光させることができる。
In this light emitting diode array structure, each light emitting element can selectively emit light by selecting a combination of the individual electrode 24 and the common electrode 25 (25a, 25b) and flowing a current.

【0010】[0010]

【発明が解決しようとする課題】近年、LEDアレイに
対し、発光素子の高密度化や、その小型化が市場のニー
ズであるが、しかしながら、前記のような構成のLED
アレイにおいては、外部接続点である電極パッドの数を
さらに減らしたり、外部回路との接続電極サイズをさら
に小さくしたり、チップサイズをさらに小さくすること
がむずかしくなっていた。
In recent years, there has been a need in the market for light-emitting elements of high density and miniaturization of the LED array.
In the array, it has been difficult to further reduce the number of electrode pads, which are external connection points, to further reduce the size of connection electrodes to external circuits, and to further reduce the chip size.

【0011】したがって、発光素子の高密度化や、LE
Dアレイの小型化という市場のニーズに十分に応えるこ
とができなくなっていた。
[0011] Therefore, the density of the light emitting element is increased,
It has not been possible to sufficiently meet the needs of the market for miniaturization of D arrays.

【0012】この課題を解消するために、マトリクス配
線電極で層間絶縁膜を介して設ける多層電極構造のLE
Dアレイが提案されている(特開平9−277592号
公報および特開平11−40842号公報参照)。
In order to solve this problem, an LE of a multilayer electrode structure provided with a matrix wiring electrode via an interlayer insulating film is provided.
A D array has been proposed (see JP-A-9-277592 and JP-A-11-40842).

【0013】しかしながら、かかる提案のLEDアレイ
についても、各発光ダイオードの個別電極の形成と、そ
れら発光ダイオードをグループに分け、各グループから
重複無く1つずつ選択するためのマトリクス配線の形成
を2回行い、しかも、それぞれを絶縁膜等を介すること
で電気的に分離する工程を経ることで、かかる多層電極
構造により製造工程が複雑化し、これによって製造歩留
まりが低下し、製造コストが大きくなるという課題があ
る。
[0013] However, in the LED array of this proposal as well, the formation of individual electrodes of each light emitting diode, the formation of matrix wiring for dividing the light emitting diodes into groups, and selecting one from each group one by one without duplication are performed twice. In addition, by performing the steps of electrically separating each of the electrodes through an insulating film or the like, the manufacturing process becomes complicated due to the multilayer electrode structure, thereby lowering the manufacturing yield and increasing the manufacturing cost. There is.

【0014】かかる課題を解消するために、本発明者は
特開2000‐76437号公報のLEDアレイにおい
て、マトリクス配線の形成を1回で行って、工程を簡略
化する技術を提案した。
In order to solve such a problem, the present inventor has proposed a technique for simplifying the process by forming a matrix wiring once in the LED array disclosed in Japanese Patent Application Laid-Open No. 2000-76437.

【0015】同公報によれば、各発光素子群ごとに、そ
れら発光素子の各一方電極に対し共通に成した電極パッ
ドを配設し、そして、発光素子群内における各発光素子
の延在部における他方電極に至る電極間隔が異なるとと
もに、一方の発光素子群の発光素子電極間隔と他方の発
光素子群の発光素子の電極間隔とを同じにして、双方の
他方電極に対し共通に成した他の電極パッドを配設して
いる。
According to the publication, an electrode pad common to one electrode of each light emitting element is provided for each light emitting element group, and an extending portion of each light emitting element in the light emitting element group is provided. In addition, the distance between the electrodes reaching the other electrode is different, and the distance between the electrodes of the light emitting element of one light emitting element group and the distance between the electrodes of the light emitting elements of the other light emitting element group are the same, and the other electrode is formed in common to both other electrodes. Electrode pads are provided.

【0016】このように複数の一方電極に対し共通に成
した電極パッドを配設し、さらに複数の他方電極に対し
共通に成した他の電極パッドを配設したことで、電極パ
ッド数が少なくなり、その配設面積が小さくなり、これ
により、発光素子の高密度化ならびにLEDアレイの小
型化が達成された。
By arranging an electrode pad commonly formed on a plurality of one electrodes and further arranging another electrode pad formed commonly on a plurality of other electrodes, the number of electrode pads is reduced. As a result, the arrangement area is reduced, thereby achieving a higher density of light emitting elements and a smaller LED array.

【0017】また、上記構成のLEDアレイによれば、
特開平9−277592号公報や特開平11−4084
2号公報において提案されている多層電極構造のLED
アレイと比べても、工程数が少なくなり、層間絶縁膜を
介した多層電極構造を用いないことで、製造コストが小
さくなり、発光素子の高密度化や小型化を達成したLE
Dアレイが得られた。
According to the LED array having the above structure,
JP-A-9-277592 and JP-A-11-4084
No. 2 Publication with LED having a multilayer electrode structure
Compared with the array, the number of processes is reduced, the manufacturing cost is reduced by not using a multilayer electrode structure with an interlayer insulating film interposed therebetween, and the LE has achieved higher density and smaller size of the light emitting element.
A D array was obtained.

【0018】しかしながら、特開2000‐76437
号公報のLEDアレイによれば、その上に絶縁膜を被覆
するに当り、各発光素子の逆導電型半導体の上部に配し
た絶縁膜と、この以外に配した絶縁膜とを、同一材に
て、同時に形成したことで、双方の光透過特性が同じに
なり、そのために、逆導電型半導体上部から発せられる
発光が、迷光として隣接する発光体への反射を招き、そ
の結果、LEDアレイのMTFを低下させ、印画品質を
低下させ、LEDヘッドの品質の安定化が図れなかっ
た。
However, Japanese Patent Application Laid-Open No. 2000-76437
According to the LED array disclosed in Japanese Patent Application Laid-Open Publication No. H10-157, the insulating film disposed on the opposite conductivity type semiconductor of each light emitting element and the insulating film disposed other than this are made of the same material when coating the insulating film thereon. Therefore, by forming them at the same time, both light transmission characteristics become the same, so that the light emitted from the upper part of the opposite conductivity type semiconductor is reflected as stray light to the adjacent light emitter, and as a result, the LED array The MTF was lowered, the printing quality was lowered, and the quality of the LED head could not be stabilized.

【0019】また、叙述した各LEDヘッドによれば、
逆導電型半導体層の発光領域部分をSiNxなどの光透
過性の電気的絶縁膜にて被覆し、さらに、かかる逆導電
型半導体層の発光領域以外の部分を光透過性の透明な合
成樹脂層にて被覆した構成であることで、光透過性の透
明な合成樹脂層の内部に迷光が生じ、これによって発光
の品質や信頼性が低下するという課題があった。
According to each LED head described above,
The light emitting region of the opposite conductivity type semiconductor layer is covered with a light-transmitting electrical insulating film such as SiNx, and the other portion of the opposite conductivity type semiconductor layer other than the light emitting region is a light transmitting transparent synthetic resin layer. In this case, there is a problem that stray light is generated inside the light-transmitting transparent synthetic resin layer, thereby reducing the quality and reliability of light emission.

【0020】本発明の目的は、叙上に鑑みて完成された
ものであり、その目的はかかる迷光を減少させたり、無
くしたLEDアレイを提供することにある。
An object of the present invention has been completed in view of the above, and an object of the present invention is to provide an LED array in which such stray light is reduced or eliminated.

【0021】本発明の他の目的は、工程数を増やすこと
もなく、層間絶縁膜を介した多層電極構造を用いない
で、製造コストを下げるとともに、発光素子の高密度化
や小型化を達成したLEDアレイを提供することにあ
る。
Another object of the present invention is to reduce the manufacturing cost and increase the density and miniaturization of the light emitting element without increasing the number of steps and without using a multilayer electrode structure with an interlayer insulating film interposed therebetween. To provide an improved LED array.

【0022】本発明のさらに他の目的はLEDアレイの
外部接続工程であるワイヤーボンディングでの電気的シ
ョート不良を発生させず、さらなる縮小化によるコスト
低下を達成するとともに、LEDアレイのMTFを改善
し、印画品質を向上させたLEDアレイを提供すること
にある。
Still another object of the present invention is to prevent the occurrence of an electrical short-circuit failure in the wire bonding which is an external connection process of the LED array, to achieve a further reduction in cost due to further miniaturization, and to improve the MTF of the LED array. Another object of the present invention is to provide an LED array with improved printing quality.

【0023】[0023]

【課題を解決するための手段】本発明のLEDアレイ
は、少なくとも一導電型半導体層と逆導電型半導体層と
電極とを順次積層してなる発光素子を複数個配列して成
り、そして、少なくとも逆導電型半導体層の発光領域の
一部分を光透過性の電気的絶縁膜にて被覆し、さらに当
該逆導電型半導体層の発光領域以外の部分を遮光性合成
樹脂層にて被覆してなることを特徴とする。
An LED array according to the present invention comprises a plurality of light-emitting elements each having at least one conductive semiconductor layer, an opposite conductive semiconductor layer, and an electrode laminated in order, and A part of the light emitting region of the opposite conductivity type semiconductor layer is covered with a light-transmitting electrical insulating film, and a part other than the light emission region of the opposite conductivity type semiconductor layer is further covered with a light-shielding synthetic resin layer. It is characterized by.

【0024】本発明の他のLEDアレイは、単結晶基板
上に一導電型半導体層と逆導電型半導体層と一方電極と
を順次積層し、この一導電型半導体層を引き出した延在
部の上に他方電極と絶縁膜とを並設して成る発光素子を
複数個配列し、これらの発光素子の各一方電極に対し共
通に成した電極パッドを配設して成る発光素子群を、複
数個ライン状に配列せしめ、さらに発光素子群内におけ
る各発光素子の延在部における他方電極に至る電極間隔
が異なるとともに、一方の発光素子群の発光素子の電極
間隔と他方の発光素子群の発光素子の電極間隔とを同じ
にして、双方の他方電極に対し共通に成した他の電極パ
ッドを配設して成り、そして、少なくとも逆導電型半導
体層の発光領域における一方電極以外の部分を光透過性
の電気的無機絶縁膜にて被覆し、さらに当該逆導電型半
導体層の発光領域以外の部分を遮光性合成樹脂層を被覆
してなることを特徴とする。
According to another LED array of the present invention, a semiconductor layer of one conductivity type, a semiconductor layer of opposite conductivity type and one electrode are sequentially laminated on a single crystal substrate, and an extended portion from which the semiconductor layer of one conductivity type is extended is formed. A plurality of light emitting elements each having an array of the other electrode and an insulating film arranged thereon, and a plurality of light emitting element groups each having an electrode pad formed in common with one electrode of each of the light emitting elements are arranged. The distance between the electrodes of the light-emitting elements in one light-emitting element group and the light-emission of the other light-emitting element group are different from each other. The electrode spacing of the element is the same, another electrode pad common to both the other electrodes is provided, and at least a portion other than the one electrode in the light emitting region of the opposite conductivity type semiconductor layer is lighted. Transparent electrical inorganic insulation It was coated with further characterized by comprising coating the light-shielding synthetic resin layer portions other than the light emitting region of the opposite conductivity type semiconductor layer.

【0025】[0025]

【発明の実施の形態】本発明のLEDアレイの基本構造
は、上述したごとく、少なくとも逆導電型半導体層の発
光領域の一部分を光透過性の電気的絶縁膜にて被覆し、
さらに当該逆導電型半導体層の発光領域以外の部分を遮
光性合成樹脂層にて被覆してなるものであって、本発明
はこのような構成を含むLEDアレイであり、その一例
を以下、添付図面に基づき詳細に説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS As described above, the basic structure of an LED array according to the present invention is to cover at least a part of a light emitting region of a semiconductor layer of the opposite conductivity type with a light-transmitting electrical insulating film,
Further, a portion other than the light emitting region of the opposite conductivity type semiconductor layer is covered with a light-shielding synthetic resin layer, and the present invention is an LED array having such a configuration. This will be described in detail with reference to the drawings.

【0026】図1〜図5は本発明のLEDアレイの一実
施形態を示す。図1はLEDアレイの要部拡大の平面図
であり、図2は図1に示すV−V‘線による断面図、図
3は図1に示すh−h’線による断面図、図4は各発光
素子の上面図である。図2および図3には、参照符号と
して、V、V‘、h、h’を明示することでもって、そ
の断面図の方向を示す。また、図5は他のLEDアレイ
における要部平面図である。
FIGS. 1 to 5 show an embodiment of the LED array of the present invention. 1 is an enlarged plan view of a main part of the LED array, FIG. 2 is a sectional view taken along line VV ′ shown in FIG. 1, FIG. 3 is a sectional view taken along line hh ′ shown in FIG. 1, and FIG. It is a top view of each light emitting element. FIGS. 2 and 3 show the directions of the cross-sectional views by clearly indicating V, V ′, h, and h ′ as reference numerals. FIG. 5 is a plan view of a main part of another LED array.

【0027】1は単結晶基板であり、この単結晶基板1
上において、2は一導電型半導体層、3は逆導電型半導
体層、4は前記一方電極である個別電極、5は前記他方
電極である共通電極、6および12は有機樹脂膜などか
ら成る保護膜としての絶縁膜である。
Reference numeral 1 denotes a single crystal substrate.
In the above, 2 is a semiconductor layer of one conductivity type, 3 is a semiconductor layer of the opposite conductivity type, 4 is an individual electrode as the one electrode, 5 is a common electrode as the other electrode, and 6 and 12 are protections made of an organic resin film or the like. An insulating film as a film.

【0028】また、8および10(10a,10b)は
外部接続用の電極パッドである。
Reference numerals 8 and 10 (10a, 10b) denote electrode pads for external connection.

【0029】単結晶基板1上に、各発光素子ごとに一導
電型半導体層2と逆導電型半導体層3とが順次積層して
形成され、その積層において、一導電型半導体層2の面
積は逆導電型半導体層3の面積に比べて大きくして、一
導電型半導体層2を引き出すことで、一導電型半導体層
2と同一材からなる延在部7を設けている。
On the single crystal substrate 1, a semiconductor layer 2 of one conductivity type and a semiconductor layer 3 of opposite conductivity type are sequentially formed for each light emitting element. In the stack, the area of the semiconductor layer 2 of one conductivity type is By extending the one-conductivity-type semiconductor layer 2 so as to be larger than the area of the opposite-conductivity-type semiconductor layer 3, the extension part 7 made of the same material as the one-conductivity-type semiconductor layer 2 is provided.

【0030】また、図2に示されるように、一導電型半
導体層2の上に前記光透過性の電気的絶縁膜であるポリ
イミド合成樹脂などの有機材もしくは窒化シリコン(S
iNx)や酸化シリコン(SiO2)などの無機材から
なる絶縁膜6を被覆しているが、その露出部に共通電極
5(5a、5b)を接続して設けることで、絶縁膜6と
共通電極5とを延在部7の上で並設している。
As shown in FIG. 2, an organic material such as a polyimide synthetic resin or a silicon nitride (S
Although the insulating film 6 made of an inorganic material such as iNx) or silicon oxide (SiO2) is covered, the common electrode 5 (5a, 5b) is connected to the exposed portion to provide the insulating film 6 and the common electrode. 5 are arranged side by side on the extending portion 7.

【0031】さらに逆導電型半導体層3の発光領域Aの
一部分を絶縁膜6にて被覆し、その露出部に個別電極4
を接続して設けている。また、前記遮光性合成樹脂層で
ある保護膜12は逆導電型半導体層3の上ならびに外部
接続用の電極パッド8、10を、それぞれ一部露出した
形で覆われている。
Further, a part of the light emitting region A of the opposite conductivity type semiconductor layer 3 is covered with the insulating film 6 and the exposed portion thereof is covered with the individual electrode 4.
Are connected. The protective film 12, which is the light-shielding synthetic resin layer, covers the opposite conductivity type semiconductor layer 3 and the electrode pads 8 and 10 for external connection in a partially exposed manner.

【0032】この保護膜12については、逆導電型半導
体層3の発光領域A以外の部分を被覆してなる。
The protective film 12 is formed by covering a portion other than the light emitting region A of the semiconductor layer 3 of the opposite conductivity type.

【0033】つぎに各部材を詳述する。単結晶基板1は
半導体基板からなり、高抵抗シリコン単結晶でもって構
成した場合には、(100)面を<011>方向に2〜
7°オフさせた基板などが好適である。
Next, each member will be described in detail. The single crystal substrate 1 is made of a semiconductor substrate, and when it is made of a high-resistance silicon single crystal, the (100) plane is placed in the <011> direction by
A substrate or the like turned off by 7 ° is preferable.

【0034】一導電型半導体層2は、バッファ層2a、
オーミックコンタクト層2bおよび電子注入層2cで構
成される。
The one conductivity type semiconductor layer 2 includes a buffer layer 2a,
It comprises an ohmic contact layer 2b and an electron injection layer 2c.

【0035】バッファ層2aとオーミックコンタクト層
2bはガリウム砒素などで形成され、電子の注入層2c
はアルミニウムガリウム砒素などで形成される。オーミ
ックコンタクト層2bにはシリコンなどの一導電型半導
体不純物を1×1017〜10 19atoms(原子)/c
3 程度含有し、電子注入層2cにはシリコンなどの一
導電型半導体不純物を程度含有する。
Buffer layer 2a and ohmic contact layer
2b is formed of gallium arsenide or the like, and has an electron injection layer 2c.
Is formed of aluminum gallium arsenide or the like. Ohmi
One contact type semiconductor such as silicon
1 × 10 body impurities17-10 19atoms (atoms) / c
mThree To the electron injection layer 2c.
Contains conductive semiconductor impurities to some extent.

【0036】バッファ層2aは単結晶基板1と半導体層
との格子定数の不整合に基づくミスフィット転位を防止
するために設けるものであり、半導体不純物を1×10
16〜1019atoms/cm3含有させる。
The buffer layer 2a is provided to prevent misfit dislocation due to mismatch of the lattice constant between the single crystal substrate 1 and the semiconductor layer.
16 to 10 19 atoms / cm 3 are contained.

【0037】バッファ層2aは2〜4μm程度の厚みに
形成され、オーミックコンタクト層2bは0.1〜3.
0μm程度の厚みに形成され、電子注入層2cは0.2
〜0.4μm程度の厚みに形成される。
The buffer layer 2a is formed to a thickness of about 2 to 4 μm, and the ohmic contact layer 2b is formed to a thickness of 0.1 to 3.
The electron injection layer 2c is formed to a thickness of about 0 μm.
It is formed to a thickness of about 0.4 μm.

【0038】逆導電型半導体層3は、発光層3a、クラ
ッド層3bおよび他のオーミックコンタクト層3cで構
成される。
The opposite conductivity type semiconductor layer 3 includes a light emitting layer 3a, a cladding layer 3b, and another ohmic contact layer 3c.

【0039】発光層3aとクラッド層3bはアルミニウ
ムガリウム砒素などから成り、オーミックコンタクト層
3cはガリウム砒素などから成る。
The light emitting layer 3a and the cladding layer 3b are made of aluminum gallium arsenide, and the ohmic contact layer 3c is made of gallium arsenide.

【0040】発光層3a、クラッド層3bおよびオーミ
ックコンタクト層3cは、電子の閉じ込め効果と光の取
り出し効果を考慮して、各層の間にてアルミニウム砒素
(AlAs)とガリウム砒素(GaAs)との混晶比を
異ならしめる。
The light emitting layer 3a, the cladding layer 3b, and the ohmic contact layer 3c are provided between the respective layers in consideration of the electron confinement effect and the light extraction effect, by mixing aluminum arsenide (AlAs) and gallium arsenide (GaAs). Different crystal ratios.

【0041】発光層3aとクラッド層3bは亜鉛(Z
n)などの逆導電型半導体不純物を1×1016〜1021
atoms/cm3 程度含有し、オーミックコンタクト
層3cは亜鉛などの逆導電型半導体不純物を1×1019
〜1021atoms/cm3 程度含有する。
The light emitting layer 3a and the cladding layer 3b are made of zinc (Z
n) or the like and 1 × 10 16 to 10 21
atoms / cm 3 , and the ohmic contact layer 3c contains 1 × 10 19 of a reverse conductivity type semiconductor impurity such as zinc.
About 10 21 atoms / cm 3 .

【0042】発光層3aとクラッド層3bは0.2〜
0.4μm程度の厚みに形成され、オーミックコンタク
ト層3cの膜厚dについては、膜厚d>(0.15μm
−オーミックコンタクト層膜厚)程度の厚みに形成され
る。
The light emitting layer 3a and the cladding layer 3b have a thickness of 0.2 to
The thickness d of the ohmic contact layer 3c is about 0.4 μm, and the thickness d> (0.15 μm
-Ohmic contact layer thickness).

【0043】また、絶縁膜6は、たとえば窒化シリコン
などから成り、厚み2000Å程度に形成される。
The insulating film 6 is made of, for example, silicon nitride and has a thickness of about 2000.degree.

【0044】個別電極4と共通電極5(5a、5b、5
c、5d)は金/クロム(Au/Cr)などから成り、
厚み1μm程度に形成される。
The individual electrodes 4 and the common electrodes 5 (5a, 5b, 5
c, 5d) are made of gold / chrome (Au / Cr) or the like,
It is formed to a thickness of about 1 μm.

【0045】各発光素子は、上記のような構成である
が、つぎに図1と図3にて各発光素子に対する電極構造
を示す。
Each light emitting element has the above-described configuration. Next, FIGS. 1 and 3 show the electrode structure for each light emitting element.

【0046】これら各発光素子の個別電極4に対し共通
に成した電極パッド8を配設し、個々の電極パッド8に
対応した発光素子群9を設け、さらに前記一方の発光素
子群と他方の発光素子群とを交互に配列することで、複
数個の発光素子群9をライン状に配列している。
An electrode pad 8 is provided in common to the individual electrodes 4 of these light emitting elements, a light emitting element group 9 corresponding to each electrode pad 8 is provided, and the one light emitting element group and the other light emitting element group are provided. By alternately arranging the light emitting element groups, a plurality of light emitting element groups 9 are arranged in a line.

【0047】また、発光素子群9内における各発光素子
の延在部7における共通電極5(5a、5b、5c、5
d)に至る電極間隔xが異なるとともに、一方の発光素
子群9の発光素子の電極間隔と、他方の発光素子群9の
発光素子の電極間隔とを同じにして、双方の他方電極に
対し共通に成した他の電極パッド10を配設している。
The common electrode 5 (5a, 5b, 5c, 5c) in the extension 7 of each light emitting element in the light emitting element group 9
The electrode spacing x leading to d) is different, and the electrode spacing of the light emitting elements of one light emitting element group 9 is the same as the electrode spacing of the light emitting elements of the other light emitting element group 9, so that both electrodes are common. Another electrode pad 10 is provided.

【0048】そして、電極間隔xを同じにした各発光素
子の共通電極5を通電させるために、延在部7の上の絶
縁膜6をまたがるように、接続線11(11a、11
b、11c、11d)を発光素子の配列ラインと平行に
形成している。
Then, in order to energize the common electrode 5 of each light emitting element with the same electrode spacing x, the connection lines 11 (11a, 11a, 11a, 11
b, 11c, 11d) are formed in parallel with the arrangement lines of the light emitting elements.

【0049】さらに一方の発光素子群と他方の発光素子
群としての隣接する発光素子群9、9に対し、発光素子
群9内にて個々の電極間隔xを配列順に長くするか、も
しくは短くして違えることで、対称的な電極間隔パター
ンにしている。
Further, with respect to one of the light emitting element groups and the adjacent light emitting element groups 9 as the other light emitting element group, the distance x between the individual electrodes in the light emitting element group 9 is increased or shortened in the arrangement order. In this case, a symmetrical electrode spacing pattern is obtained.

【0050】つぎに図5にて、電極間隔xを4とおりに
違えて、128bit(ビット)LEDアレイを示す。
Next, FIG. 5 shows a 128-bit (bit) LED array with four different electrode intervals x.

【0051】電極間隔xがもっとも短いものをX11と
して、そこを端部の発光素子として、順次、X21、X
31、X41とし、…X4n、X3n、X2n、X1n、…と
している。
The electrode having the shortest electrode interval x is defined as X11, and this is defined as the light emitting element at the end.
31, X41,..., X4n, X3n, X2n, X1n,.

【0052】128bitを4種類で32グループ(3
2個の発光素子群9)に分けることで、n=1〜32で
ある。
The 128 bits are divided into four groups of 32 groups (3
By dividing into two light emitting element groups 9), n = 1 to 32.

【0053】各発光素子群9をグループG1、G2、…
Gmとすると、グループG1における電極間隔X11の
発光素子と、グループG2における電極間隔X12の発
光素子とを、接続線11aでもって接続し、グループG
mにおける電極間隔X1nの発光素子と接続している。
Each of the light emitting element groups 9 is divided into groups G1, G2,.
Assuming that Gm is Gm, the light emitting elements having the electrode spacing X11 in the group G1 and the light emitting elements having the electrode spacing X12 in the group G2 are connected by the connection line 11a.
m is connected to the light emitting element at the electrode interval X1n.

【0054】グループG1における電極間隔X21の発
光素子と、グループG2における電極間隔X22の発光
素子と、…グループGmにおける電極間隔X2nの発光
素子とを、接続線11bでもって接続している。
The light emitting elements having the electrode spacing X21 in the group G1, the light emitting elements having the electrode spacing X22 in the group G2, and the light emitting elements having the electrode spacing X2n in the group Gm are connected by the connection line 11b.

【0055】同様に、グループG1における電極間隔X
31の発光素子と、グループG2における電極間隔X3
2の発光素子と、…グループGmにおける電極間隔X3
nの発光素子とを、接続線11cでもって接続してい
る。
Similarly, the electrode interval X in the group G1
31 light emitting elements and the electrode spacing X3 in the group G2.
2 light-emitting elements and the electrode spacing X3 in the group Gm
The n light-emitting elements are connected by a connection line 11c.

【0056】グループG1における電極間隔X41の発
光素子と、グループG2における電極間隔X42の発光
素子と、…グループGmにおける電極間隔X4nの発光
素子とを、接続線11dでもって接続している。
The light emitting elements having the electrode spacing X41 in the group G1, the light emitting elements having the electrode spacing X42 in the group G2, and the light emitting elements having the electrode spacing X4n in the group Gm are connected by a connection line 11d.

【0057】そして、各発光素子群に設けた電極パッド
8と、他のグループされた電極パッド10とに対し、双
方間に選択的に電圧を印加することで、所定の発光素子
に電流を流すことができ、その素子を発光せしめる。
Then, a current is caused to flow through a predetermined light emitting element by selectively applying a voltage between the electrode pads 8 provided in each light emitting element group and the other group of electrode pads 10. And cause the device to emit light.

【0058】かくして本発明のLEDアレイによれば、
各発光素子群9(グループG1、G2、…Gm…)ごと
に、共通に成した電極パッド8を配設し、そして、発光
素子群9(グループG1、G2、…Gm…)内における
各発光素子の電極間隔xが異なるとともに、一方の発光
素子群の発光素子の電極間隔xと他方の発光素子群の発
光素子の電極間隔xとを同じにして、双方の共通電極5
に対し共通に成した電極パッド10を配設したことで、
電極パッド数が少なくなり、その配設面積が小さくな
り、これにより、発光素子の高密度化、ならびにLED
アレイの小型化が達成される。
Thus, according to the LED array of the present invention,
A common electrode pad 8 is provided for each light emitting element group 9 (groups G1, G2,... Gm...), And each light emission in the light emitting element group 9 (groups G1, G2,. The electrode spacing x of the light emitting elements of one light emitting element group and the electrode spacing x of the light emitting elements of the other light emitting element group are made the same while the electrode spacing x of the element is different.
By arranging the common electrode pad 10 for
The number of electrode pads is reduced, and the area for arranging the electrodes is reduced.
Array miniaturization is achieved.

【0059】また、本発明においては、保護膜12を表
面に形成すると同時に、少なくとも、外部回路との接続
用電極パッド8、12の一部ならびに逆導電型半導体層
3の発光領域Aの一部分を絶縁膜6にて被覆し、その露
出部に個別電極4を接続して設けている。
In the present invention, at the same time that the protective film 12 is formed on the surface, at least a part of the electrode pads 8 and 12 for connection to an external circuit and a part of the light emitting region A of the opposite conductivity type semiconductor layer 3 are formed. It is covered with an insulating film 6, and an individual electrode 4 is connected to an exposed portion thereof.

【0060】絶縁膜6については、反射を防止するよう
に膜厚dを設定するとよい。
The thickness d of the insulating film 6 is preferably set so as to prevent reflection.

【0061】このための条件は、下記のようにするとよ
い。
The conditions for this may be as follows.

【0062】N1:絶縁膜6の屈折率、d:絶縁膜6の膜
厚、m:整数、λ:発光素子の発光波長、N2:一導電型
半導体層2と逆導電型半導体層3を成すGaAs材の屈
折率において、反射防止の条件は、(N1)d=(1/4+m/
2)λ、さらには(N1)=√(N2)にするとよい。
N1: the refractive index of the insulating film 6, d: the thickness of the insulating film 6, m: an integer, λ: the emission wavelength of the light emitting element, N2: the one conductivity type semiconductor layer 2 and the opposite conductivity type semiconductor layer 3 With respect to the refractive index of the GaAs material, the condition for antireflection is (N1) d = (1/4 + m /
2) It is better to set λ and (N1) = √ (N2).

【0063】また、保護膜12については、遮光性とす
るために染料をポリイミドなどの合成樹脂材に含有させ
るとよく、このような染料として、黒色顔料を含有させ
るとよく、たとえば二硫化モリブデン、黒鉛、およびア
セチレンブラック、ケッチェンブラック、ファーネスブ
ラックなどのカーボンブラック類、マグネタイト酸化コ
バルト、酸化銅、酸化クロム等の金属酸化物類ならびに
酸化銅-酸化クロム−酸化鉄などの複合金属酸化物類、
チタンブラツクなどがある。
For the protective film 12, a dye may be contained in a synthetic resin material such as polyimide to make it light-shielding, and a black pigment may be contained as such a dye. For example, molybdenum disulfide, Graphite, carbon blacks such as acetylene black, Ketjen black, furnace black, magnetite cobalt oxide, metal oxides such as copper oxide and chromium oxide, and composite metal oxides such as copper oxide-chromium oxide-iron oxide,
There is a titanium black and the like.

【0064】このような絶縁膜6と保護膜12とを被覆
し、LEDアレイの波長に応じた最適な光学的透過率に
設計するとともに、保護膜12においては、LEDアレ
イの波長に対して光学的透過率をもっとも低いものに設
計することで、迷光を小さくし、その結果、MTFを向
上させたLEDアレイを実現できる。
The insulating film 6 and the protective film 12 are covered to design an optimal optical transmittance according to the wavelength of the LED array. By designing the optical transmittance to be the lowest, stray light can be reduced, and as a result, an LED array with an improved MTF can be realized.

【0065】たとえば、絶縁膜6をSiNx膜にてな
し、保護膜12を有機樹脂膜にて設け、LEDの波長を
740nmとした場合、最適な透過率は100%とな
る。一方、絶縁膜6については、光透過性が100%に
近くなるように、その厚みと屈折率を設計する。たとえ
ば、SiNx(屈折率=1.88)からなる絶縁膜6の
膜厚を約3100Aにするとよい。
For example, when the insulating film 6 is formed of a SiNx film and the protective film 12 is formed of an organic resin film and the wavelength of the LED is 740 nm, the optimum transmittance is 100%. On the other hand, the thickness and the refractive index of the insulating film 6 are designed so that the light transmittance is close to 100%. For example, the thickness of the insulating film 6 made of SiNx (refractive index = 1.88) may be set to about 3100A.

【0066】また、本例のLEDアレイによれば、上記
構成のように各発光素子群ごとに、それら発光素子の各
一方電極に対し共通に成した電極パッドを配設し、そし
て、発光素子群内における各発光素子の延在部における
他方電極に至る電極間隔が異なるとともに、一方の発光
素子群の発光素子の電極間隔と他方の発光素子群の発光
素子の電極間隔とを同じにして、双方の他方電極に対し
共通に成した他の電極パッドを配設している。
According to the LED array of this embodiment, an electrode pad common to one electrode of each of the light emitting elements is provided for each of the light emitting element groups as described above. The electrode spacing to the other electrode in the extending portion of each light emitting element in the group is different, and the electrode spacing of the light emitting element of one light emitting element group is the same as the electrode spacing of the light emitting element of the other light emitting element group, Another electrode pad common to both other electrodes is provided.

【0067】このように複数の一方電極に対し共通に成
した電極パッドを配設し、さらに複数の他方電極に対し
共通に成した他の電極パッドを配設したことで、電極パ
ッド数が少なくなり、その配設面積が小さくなり、これ
により、発光素子の高密度化、ならびにLEDアレイの
小型化が達成される。
As described above, by disposing the electrode pad commonly formed for a plurality of one electrodes and disposing another electrode pad commonly formed for a plurality of other electrodes, the number of electrode pads is reduced. As a result, the arrangement area of the LED array is reduced, and thereby, the density of the light emitting elements is increased and the size of the LED array is reduced.

【0068】また、特開平9−277592号や特開平
11−40842号にて提案されているような多層電極
構造のLEDアレイと比べても、工程数が少なくなり、
層間絶縁膜を介した多層電極構造を用いないことで、製
造コストが下がり、発光素子の高密度化や小型化を達成
したLEDアレイが得られる。さらに前記電極間隔を同
じにした各発光素子の他方電極を通電すべく、一導電型
半導体層の延在部に形成した絶縁膜をまたがるように、
接続線を発光素子の配列ラインと平行に形成している。
したがって、従来のLEDアレイにおいて、周知のとお
り形成されていた絶縁膜以外に、配線同士の電気的絶縁
の為に不可欠な層間絶縁膜を形成することもなく、これ
によって製造コストが下がり、低コストなLEDアレイ
が提供される。さらに一方の発光素子群と他方の発光素
子群に対し、発光素子群内にて個々の電極間隔を配列順
に違えることで、対称的な電極間隔パターンにしてお
り、そのように規則的なパターンにしたことで、LED
ヘッド搭載時の発光順番の信号処理を比較的容易にし、
延いては搭載基板の設計をも容易にできる。そして、そ
の規則的パターンをLEDアレイに整然と設けること
で、それ以外の領域に電極パッドを設けることが設計上
容易になる。対称的な電極間隔の最も短い部分でのスペ
ースが大きく取ることが可能となる。これにより、LE
Dアレイチップサイズの縮小化、ならびに、LEDアレ
イを搭載する際のワイヤーボンディングパッドを大きく
取ることが可能となる。延いては、LEDアレイのチッ
プ縮小化、ならびにLEDヘッド製造上の歩留りを向上
できる。また、上記のLEDアレイでは樹脂膜を表面に
形成すると同時に、少なくとも、外部回路との電極接続
部および逆導電型半導体層上部以外を覆った構造として
いるため、絶縁膜をLEDアレイの波長に応じた最適な
光学的透過率に設計すると共に、樹脂膜においては、L
EDアレイの波長に対して光学的透過率が最も低いのに
設計することで、迷光を小さくしMTFを向上させたL
EDアレイを実現できた。また、樹脂膜においては、染
料を含有した不透明膜とした場合には一層の改善が図
れ、MTFの向上した印画品質の高いLEDヘッドを提
供できる。
Further, Japanese Patent Application Laid-Open No. 9-277592 and Japanese Patent Application Laid-Open
The number of processes is smaller than that of the LED array having a multilayer electrode structure as proposed in JP 11-40842,
By not using a multilayer electrode structure with an interlayer insulating film interposed therebetween, manufacturing costs can be reduced, and an LED array in which a light-emitting element has a higher density and a smaller size can be obtained. Further, in order to energize the other electrode of each light emitting element with the same electrode spacing, so as to straddle the insulating film formed on the extending portion of the one conductivity type semiconductor layer,
The connection lines are formed in parallel with the arrangement lines of the light emitting elements.
Therefore, in the conventional LED array, an interlayer insulating film indispensable for electrical insulation between wirings is not formed other than the insulating film formed as is well known, thereby lowering the manufacturing cost and lowering the cost. LED array is provided. Further, for one light emitting element group and the other light emitting element group, by changing the arrangement of the individual electrodes in the light emitting element group in the arrangement order, a symmetrical electrode spacing pattern is obtained, and such a regular pattern is formed. By doing, LED
Signal processing of the light emission order when the head is mounted is relatively easy,
As a result, the design of the mounting substrate can be facilitated. Then, by providing the regular pattern on the LED array in an orderly manner, it becomes easy to design the electrode pads in other areas. A large space can be taken at the shortest part of the symmetric electrode interval. Thereby, LE
It is possible to reduce the size of the D array chip and to increase the size of the wire bonding pad when mounting the LED array. As a result, the chip size of the LED array can be reduced, and the yield in manufacturing the LED head can be improved. In addition, the above-mentioned LED array has a structure in which the resin film is formed on the surface and at the same time covers at least the portion other than the electrode connection portion with the external circuit and the upper portion of the reverse conductivity type semiconductor layer. In addition to designing the optical transmittance to be optimal,
By designing the optical transmittance to be the lowest with respect to the wavelength of the ED array, stray light is reduced and the MTF is improved.
An ED array was realized. Further, when the resin film is an opaque film containing a dye, further improvement can be achieved, and an LED head with improved MTF and high printing quality can be provided.

【0069】つぎに上述のようなLEDアレイの製造方
法を説明する。
Next, a method for manufacturing the above-described LED array will be described.

【0070】まず、高抵抗シリコン単結晶基板1上に、
一導電型半導体層2、逆導電型半導体層3をMOCVD
法などで順次積層して形成する。
First, on a high resistance silicon single crystal substrate 1,
MOCVD of one conductivity type semiconductor layer 2 and reverse conductivity type semiconductor layer 3
It is formed by sequentially laminating by a method or the like.

【0071】まず、これらの半導体層2、3を形成する
場合、基板温度を400〜500℃に設定し、これによ
って200〜2000Åの厚みでもってアモルファス状
のガリウム砒素膜を形成した後、基板温度を700〜9
00℃に上げて所望とおりの厚みの一導電型半導体層2
と逆導電型半導体層3とを形成する。
First, when these semiconductor layers 2 and 3 are formed, the substrate temperature is set to 400 to 500 ° C., whereby an amorphous gallium arsenide film having a thickness of 200 to 2000 ° is formed. From 700 to 9
One-conductivity-type semiconductor layer 2 having a desired thickness raised to 00 ° C.
And the opposite conductivity type semiconductor layer 3 are formed.

【0072】この成膜において、原料ガスとしてはTM
G((CH33 Ga)、TEG((C253
a)、アルシン(AsH3 )、TMA((CH33
l)、TEA((C253 Al)などが用いられ、
導電型を制御するためのガスとしては、シラン(SiH
4 )、セレン化水素(H2 Se)、DMZ((CH3
2 Zn)などが用いられ、キャリアガスとしては、H2
などが用いられる。
In this film formation, the source gas is TM
G ((CHThree )Three Ga), TEG ((CTwo HFive )Three G
a), arsine (AsH)Three ), TMA ((CHThree )Three A
l), TEA ((CTwo HFive )Three Al) is used,
As the gas for controlling the conductivity type, silane (SiH
Four ), Hydrogen selenide (HTwo Se), DMZ ((CHThree )
Two Zn) or the like, and H 2 is used as a carrier gas.Two
Are used.

【0073】つぎに、隣接する素子同志が電気的に分離
されるように、半導体層2、3が島状にパターニングさ
れる。そのためのエッチングは、硫酸過酸化水素系のエ
ッチング液を用いたウエットエッチングやCCl22
ガスを用いたドライエッチングなどで行われる。
Next, semiconductor layers 2 and 3 are patterned in an island shape so that adjacent elements are electrically separated from each other. For this purpose, wet etching using a sulfuric acid-hydrogen peroxide-based etchant or CCl 2 F 2
This is performed by dry etching using gas or the like.

【0074】しかる後に、一導電型半導体層2の一端部
側に延在部7を設け、この延在部7の上にその一部が露
出し、かつこの一導電型半導体層2の隣接する領域部分
が露出するようにエッチングする。また、逆導電型半導
体層3が一導電型半導体層2よりも幅狭に形成されるよ
うに逆導電型半導体層3をエッチングする。
Thereafter, an extension 7 is provided on one end side of the one conductivity type semiconductor layer 2, a part of the extension 7 is exposed on the extension 7, and is adjacent to the one conductivity type semiconductor layer 2. Etching is performed so that a region portion is exposed. The opposite conductivity type semiconductor layer 3 is etched so that the opposite conductivity type semiconductor layer 3 is formed narrower than the one conductivity type semiconductor layer 2.

【0075】このようなエッチングも硫酸過酸化水素系
のエッチング液を用いたウェットエッチングやCCl2
F2 ガスを用いたドライエッチングなどで行なわれる。
Such etching is also performed by wet etching using a sulfuric acid / hydrogen peroxide-based etching solution or CCl 2
This is performed by dry etching using F2 gas.

【0076】つぎに、隣接する発光素子が基板上でも電
気的に分離されるように、たとえばアルカリ性水溶液で
エッチングする。この時、一導電型半導体層2の延在部
7の一部が露出し、かつこの一導電型半導体層2の隣接
する領域部分が露出するように、そして、逆導電型半導
体層3が一導電型半導体層2よりも幅狭に形成されるよ
うに逆導電型半導体層3をエッチングした際に用いたパ
ターンを残したままで行ない、これによって逆導電型半
導体層3を一切おかすことなく電気的に分離する。
Next, etching is performed using, for example, an alkaline aqueous solution so that adjacent light emitting elements are electrically separated from each other even on the substrate. At this time, a part of the extension portion 7 of the one conductivity type semiconductor layer 2 is exposed, and a region adjacent to the one conductivity type semiconductor layer 2 is exposed. This is performed while leaving the pattern used when etching the opposite conductivity type semiconductor layer 3 so as to be formed narrower than the conductivity type semiconductor layer 2, thereby electrically connecting the opposite conductivity type semiconductor layer 3 without any damage. To separate.

【0077】つぎに有機系樹脂をスピンコート法で形成
した絶縁膜6を形成する。絶縁膜はプラズマCVD法
で、シランガス(SiH4 )とアンモニアガス(NH
3 )を用いて窒化シリコンから成る物でも良い。
Next, an insulating film 6 formed by spin coating an organic resin is formed. The insulating film is formed by a plasma CVD method using silane gas (SiH 4 ) and ammonia gas (NH).
A material made of silicon nitride by using 3 ) may be used.

【0078】クロムと金を蒸着法やスパッタリング法で
形成してパターニングすることで電極パッド9、10お
よび接続線11を形成する。最後に有機系樹脂をスピン
コート法で形成した保護膜12を形成する。
The electrode pads 9 and 10 and the connection lines 11 are formed by forming and patterning chromium and gold by a vapor deposition method or a sputtering method. Finally, a protective film 12 formed by spin coating an organic resin is formed.

【0079】[0079]

【発明の効果】以上のとおり、本発明のLEDアレイに
よれば、少なくとも逆導電型半導体層の発光領域の一部
分を光透過性の電気的絶縁膜にて被覆し、さらに当該逆
導電型半導体層の発光領域以外の部分を遮光性合成樹脂
層にて被覆してなることで、迷光を減少させたり、無く
し、これによってMTFを向上させた高品質かつ高信頼
性のLEDアレイが得られた。
As described above, according to the LED array of the present invention, at least a part of the light-emitting region of the opposite conductivity type semiconductor layer is covered with the light-transmitting electrical insulating film. By covering portions other than the light-emitting region with a light-shielding synthetic resin layer, stray light was reduced or eliminated, thereby obtaining a high-quality and highly reliable LED array with improved MTF.

【0080】また、本発明のLEDアレイにおいては、
単結晶基板上に一導電型半導体層と逆導電型半導体層と
一方電極とを順次積層し、この一導電型半導体層を引き
出した延在部の上に他方電極と絶縁膜とを並設して成る
発光素子を複数個配列し、さらにこれらの発光素子の各
一方電極に対し共通に成した電極パッドを配設して成る
発光素子群を、さらに複数個ライン状に配列せしめた構
成において、発光素子群内における各発光素子の延在部
における他方電極に至る電極間隔が異なるとともに、一
方の発光素子群の発光素子の電極間隔と他方の発光素子
群の発光素子の電極間隔とを同じにして、双方の他方電
極に対し共通に成した他の電極パッドを配設して成るこ
とで、電極パッド数が減少し、その配設面積が小さくな
り、これにより、発光素子の高密度化、ならびにLED
アレイの小型化が達成された。
In the LED array of the present invention,
A semiconductor layer of one conductivity type, a semiconductor layer of the opposite conductivity type, and one electrode are sequentially laminated on a single crystal substrate, and the other electrode and an insulating film are juxtaposed on an extending portion from which the semiconductor layer of one conductivity type is extended. A plurality of light-emitting elements comprising a plurality of light-emitting elements, and further, a plurality of light-emitting elements formed by arranging a common electrode pad for each one electrode of these light-emitting elements, further arranged in a line-like, The distance between the electrodes extending to the other electrode in the extending portion of each light emitting element in the light emitting element group is different, and the electrode distance between the light emitting elements in one light emitting element group and the electrode distance between the light emitting elements in the other light emitting element group are the same. Therefore, by arranging another electrode pad commonly formed for both of the other electrodes, the number of electrode pads is reduced, and the arranging area is reduced, thereby increasing the density of the light emitting element. And LED
Array miniaturization has been achieved.

【0081】また、従来の多層電極構造のLEDアレイ
と比べても、工程数が少なくなり、層間絶縁膜を介した
多層電極構造を用いないことで、製造コストが下がり、
発光素子の高密度化や小型化を達成したLEDアレイが
得られた。
Further, the number of steps is smaller than that of a conventional LED array having a multilayer electrode structure, and the manufacturing cost is reduced by not using a multilayer electrode structure with an interlayer insulating film interposed therebetween.
An LED array in which the density and the size of the light-emitting element were achieved was obtained.

【0082】また、上記のLEDアレイでは樹脂膜を表
面に形成すると同時に、少なくとも、外部回路との電極
接続部および逆導電型半導体層上部以外を覆った構造と
しているため、絶縁膜をLEDアレイの波長に応じた最
適な光学的透過率に設計すると共に、樹脂膜において
は、LEDアレイの波長に対して光学的透過率が最も低
いのに設計することで、迷光を小さくしMTFを向上さ
せたLEDアレイを実現できた。また、樹脂膜において
は、染料を含有した不透明膜とした場合には一層の改善
が図れ、MTFの向上した印画品質の高いLEDヘッド
を提供できた。
Further, since the above-mentioned LED array has a structure in which the resin film is formed on the surface and at least the portion other than the electrode connection portion with the external circuit and the upper portion of the reverse conductive type semiconductor layer is covered, the insulating film is formed on the LED array. The optical transmittance was designed to be optimal according to the wavelength, and the resin film was designed to have the lowest optical transmittance with respect to the wavelength of the LED array, thereby reducing stray light and improving the MTF. The LED array was realized. Further, when the resin film was an opaque film containing a dye, further improvement was achieved, and an LED head having high MTF and high printing quality could be provided.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明のLEDアレイの一実施形態を示す平面
図である。
FIG. 1 is a plan view showing one embodiment of an LED array of the present invention.

【図2】図1に示すV−V‘線による断面図である。FIG. 2 is a sectional view taken along line VV ′ shown in FIG.

【図3】図1に示すh−h’線による断面図である。FIG. 3 is a sectional view taken along the line h-h 'shown in FIG.

【図4】本発明のLEDアレイの一実施形態を示す平面
図である。
FIG. 4 is a plan view showing an embodiment of the LED array of the present invention.

【図5】従来のLEDアレイの一実施形態を示す平面図
である。
FIG. 5 is a plan view showing one embodiment of a conventional LED array.

【図6】従来のLEDアレイを示す断面図である。FIG. 6 is a sectional view showing a conventional LED array.

【図7】従来のLEDアレイを一実施形態を示す平面図
である。
FIG. 7 is a plan view showing one embodiment of a conventional LED array.

【符号の説明】[Explanation of symbols]

1・・・単結晶基板 2・・・一導電型半導体層 3・・・逆導電型半導体層 4・・・個別電極 5・・・共通電極 6・・・絶縁膜 7・・・延在部 8・・・電極パッド 9・・・発光素子群 10・・・電極パッド 11・・・接続線 x・・・電極間隔 A・・・発光領域 1 ... single crystal substrate 2 ... One conductivity type semiconductor layer 3 ... Reverse conductivity type semiconductor layer 4 ・ ・ ・ Individual electrode 5 Common electrode 6 ... Insulating film 7 ... Extended part 8 ... Electrode pad 9 ... Light-emitting element group 10 ... Electrode pad 11 Connection line x: Electrode spacing A: Light emitting area

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】少なくとも一導電型半導体層と逆導電型半
導体層と電極とを順次積層してなる発光素子を複数個配
列して成るLEDアレイであって、少なくとも逆導電型
半導体層の発光領域の一部分を光透過性の電気的絶縁膜
にて被覆し、さらに当該逆導電型半導体層の発光領域以
外の部分を遮光性合成樹脂層にて被覆してなることを特
徴とするLEDアレイ。
An LED array in which a plurality of light emitting elements each having at least one semiconductor layer of a first conductivity type, a semiconductor layer of a reverse conductivity type, and an electrode sequentially laminated are arranged, and at least a light emitting region of the semiconductor layer of the opposite conductivity type is provided. Characterized in that a part of the LED array is covered with a light-transmitting electrical insulating film, and a part other than the light-emitting region of the opposite conductive semiconductor layer is covered with a light-blocking synthetic resin layer.
【請求項2】単結晶基板上に一導電型半導体層と逆導電
型半導体層と一方電極とを順次積層し、この一導電型半
導体層を引き出した延在部の上に他方電極と絶縁膜とを
並設して成る発光素子を複数個配列し、これらの発光素
子の各一方電極に対し共通に成した電極パッドを配設し
て成る発光素子群を、複数個ライン状に配列せしめ、さ
らに発光素子群内における各発光素子の延在部における
他方電極に至る電極間隔が異なるとともに、一方の発光
素子群の発光素子の電極間隔と他方の発光素子群の発光
素子の電極間隔とを同じにして、双方の他方電極に対し
共通に成した他の電極パッドを配設して成るLEDアレ
イであって、少なくとも逆導電型半導体層の発光領域の
一部分を光透過性の電気的絶縁膜にて被覆し、さらに当
該逆導電型半導体層の発光領域以外の部分を遮光性合成
樹脂層にて被覆してなることを特徴とするLEDアレ
イ。
2. The semiconductor device according to claim 1, further comprising: a first conductive type semiconductor layer, a reverse conductive type semiconductor layer, and one electrode sequentially laminated on a single crystal substrate; A plurality of light emitting elements arranged side by side are arranged, and a plurality of light emitting element groups formed by arranging an electrode pad commonly formed for each one electrode of these light emitting elements are arranged in a line, Further, the electrode spacing to the other electrode in the extending portion of each light emitting element in the light emitting element group is different, and the electrode spacing of the light emitting element of one light emitting element group is the same as the electrode spacing of the light emitting element of the other light emitting element group. An LED array in which another electrode pad commonly formed for both of the other electrodes is provided, wherein at least a part of the light emitting region of the opposite conductivity type semiconductor layer is formed on a light transmitting electrically insulating film. Covered and then the reverse conductivity type semiconductor LED array characterized by being coated with light-shielding synthetic resin layer portions other than the light emitting region of the.
JP2002158228A 2002-05-30 2002-05-30 LED array Expired - Fee Related JP4126454B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002158228A JP4126454B2 (en) 2002-05-30 2002-05-30 LED array

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002158228A JP4126454B2 (en) 2002-05-30 2002-05-30 LED array

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2008012439A Division JP2008153681A (en) 2008-01-23 2008-01-23 Led array

Publications (2)

Publication Number Publication Date
JP2003347581A true JP2003347581A (en) 2003-12-05
JP4126454B2 JP4126454B2 (en) 2008-07-30

Family

ID=29773655

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002158228A Expired - Fee Related JP4126454B2 (en) 2002-05-30 2002-05-30 LED array

Country Status (1)

Country Link
JP (1) JP4126454B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009238893A (en) * 2008-03-26 2009-10-15 Oki Data Corp Semiconductor device, optical print head, and image forming apparatus
JP2010177224A (en) * 2009-01-27 2010-08-12 Oki Data Corp Light source device and head-up display including the same
US7995085B2 (en) 2007-07-04 2011-08-09 Seiko Epson Corporation Line head, and an image forming apparatus using the line head
JP2016012744A (en) * 2015-10-22 2016-01-21 株式会社東芝 Semiconductor light emitting device, semiconductor light emitting device manufacturing method and light emitting device manufacturing method
CN113745259A (en) * 2020-05-29 2021-12-03 成都辰显光电有限公司 Light emitting diode display panel and preparation method thereof

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7995085B2 (en) 2007-07-04 2011-08-09 Seiko Epson Corporation Line head, and an image forming apparatus using the line head
JP2009238893A (en) * 2008-03-26 2009-10-15 Oki Data Corp Semiconductor device, optical print head, and image forming apparatus
JP2010177224A (en) * 2009-01-27 2010-08-12 Oki Data Corp Light source device and head-up display including the same
JP2016012744A (en) * 2015-10-22 2016-01-21 株式会社東芝 Semiconductor light emitting device, semiconductor light emitting device manufacturing method and light emitting device manufacturing method
CN113745259A (en) * 2020-05-29 2021-12-03 成都辰显光电有限公司 Light emitting diode display panel and preparation method thereof
CN113745259B (en) * 2020-05-29 2024-02-27 成都辰显光电有限公司 Light-emitting diode display panel and preparation method thereof

Also Published As

Publication number Publication date
JP4126454B2 (en) 2008-07-30

Similar Documents

Publication Publication Date Title
TWI521737B (en) Light emitting device
US20160247972A1 (en) Light-emitting diode chip
US8274156B2 (en) Optoelectronic semiconductor device
US20100283070A1 (en) Nitride semiconductor light emitting device and method of manufacturing the same
KR101226706B1 (en) Semiconductor light emimitting device
KR101259969B1 (en) Light emitting device
KR20160046538A (en) Light emitting device and method of fabricating the same
KR101769078B1 (en) Light emitting diode chip having electrode pad
US8642994B2 (en) Light emitting diode array
JP4493153B2 (en) Nitride-based semiconductor light emitting device
US11616096B2 (en) Display device
KR20220043993A (en) Display device and method of fabricating the same
KR20030007061A (en) Light-emitting diode array
US11296258B2 (en) Light-emitting diode
KR20110053064A (en) Light emitting diode chip and light emitting diode package each having distributed bragg reflector
US20220037556A1 (en) Light-emitting device and display device having the same
JP4126454B2 (en) LED array
US10396248B2 (en) Semiconductor light emitting diode
KR20220091704A (en) Display device and manufacturing method thereof
JP2008153681A (en) Led array
TW202207491A (en) Light-emitting device and display device having the same
KR102501191B1 (en) light emitting device
JP4012716B2 (en) LED array and manufacturing method thereof
JP2005310937A (en) Light emitting diode array
JP2002064222A (en) Led array

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20041115

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20070810

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20070828

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20071024

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20071127

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080124

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080215

A911 Transfer of reconsideration by examiner before appeal (zenchi)

Free format text: JAPANESE INTERMEDIATE CODE: A911

Effective date: 20080229

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20080403

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20080426

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110523

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110523

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120523

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120523

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130523

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140523

Year of fee payment: 6

LAPS Cancellation because of no payment of annual fees