JP2002064222A - Led array - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an LED array that can increase the density of a light- emitting diode, and can miniaturize the light-emitting diode. SOLUTION: In this LED array there are provided in line form, one- conductivity-type and opposite-conductivity-type semiconductor layers 2 and 3 and an individual electrode 4 are laminated successively on a single crystal substrate 1, a plurality of light-emitting devices, where a common electrode 5 and an insulating film 6 are provided in parallel are arranged on an extension part 7 where the one conductivity-type semiconductor layer 2 is withdrawn, and a plurality of groups 9 of light-emitting devices where an electrode pad 8 which are common to each individual electrode 4 of the light-emitting devices are provided. In this case, an electrode interval x reaching up to the common electrode 5 at the extension part 7 of each light-emitting device in the group 9 of light-emitting devices differs, and at the same time, the electrode interval x of the light-emitting device of one group 9 of light-emitting devices is made equal to that of the other group of light-emitting devices; and another electrode pad 10 common to both the common electrodes 5 is provided.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an LED array, and more particularly, to an LED array used as an exposure light source for a photosensitive drum for a page printer.

[0002]

2. Description of the Related Art A conventional LED array is shown in FIGS. FIG. 5 is a plan view of the LED array, and FIG. 6 is a sectional view thereof.

[0003] Reference numeral 21 denotes a single crystal substrate.
In the above, 22 is a semiconductor layer of one conductivity type, 23 is a semiconductor layer of the opposite conductivity type, 24 is an individual electrode, 25 is a common electrode, and 26 is an insulating film as a protective film made of a silicon nitride film or the like.

On a single crystal substrate 21, a semiconductor layer 22 of one conductivity type and a semiconductor layer 23 of opposite conductivity type are sequentially formed for each light emitting element, and in the stack, the area of the semiconductor layer 22 of one conductivity type is reduced. The area is larger than the area of the opposite conductivity type semiconductor layer 23.

[0005] The insulating film 26 is coated on the one conductivity type semiconductor layer 22, and the common electrode 25 (25 a, 25 a
25b).

[0006] The opposite conductivity type semiconductor layer 23 also
The insulating film 26 is coated thereon, and the individual electrodes 24 are connected to the exposed portions.

[0007] Further, as shown in FIG.
(25a, 25b) are set to 2 so that they belong to different groups for each adjacent light emitting element (for each island-like semiconductor layer 22, 23).
Adjacent light emitting elements (island-shaped semiconductor layers 22 and 23) are connected to the same individual electrode 24.

In this light emitting diode array structure, each light emitting element can selectively emit light by selecting a combination of the individual electrode 24 and the common electrode 25 (25a, 25b) and flowing a current.

[0009]

In recent years, there has been a need in the market for light-emitting elements of high density and miniaturization of the LED array.
In the array, it has been difficult to further reduce the number of electrode pads, which are external connection points, to further reduce the size of connection electrodes to external circuits, and to further reduce the chip size.

[0010] Therefore, the density of the light emitting element is increased,
It has not been possible to sufficiently meet the needs of the market for miniaturization of D arrays.

In order to solve this problem, an LE of a multilayer electrode structure provided with a matrix wiring electrode via an interlayer insulating film is provided.
A D array has been proposed (JP-A-9-277592).
No., JP-A-11-40842).

However, also in the LED array of this proposal, the formation of individual electrodes of each light emitting diode and the formation of matrix wiring for dividing the light emitting diodes into groups and selecting one from each group one by one without overlapping are performed twice. In addition, a complicated process can be easily anticipated, including a process of electrically separating each of the devices through an insulating film or the like, and being able to be constituted only by a multilayer electrode structure.

The present invention has been completed in view of the above, and its object is to reduce the manufacturing cost without increasing the number of steps and using a multilayer electrode structure with an interlayer insulating film interposed therebetween. L that achieves high density and miniaturization of elements
An object of the present invention is to provide an ED array.

Another object of the present invention is to increase the density of the light emitting element by further reducing the area of the connection electrode at the connection point with the external circuit and reducing the number of connection points (the number of electrode pads). Another object of the present invention is to provide an LED array which has achieved miniaturization.

[0015]

According to the LED array of the present invention, one conductivity type semiconductor layer, opposite conductivity type semiconductor layer and one electrode are sequentially laminated on a single crystal substrate, and this one conductivity type semiconductor layer is drawn out. A plurality of light emitting elements each having the other electrode and an insulating film arranged side by side on the extending portion, and an electrode pad commonly formed for each one electrode of the light emitting elements is arranged. In a configuration in which the element groups are further arranged in a plurality of lines, the electrode spacing to the other electrode in the extending portion of each light emitting element in the light emitting element group is different, and the electrode spacing of the light emitting elements of one light emitting element group is different. And the other electrode pads common to both the other electrodes are disposed with the same electrode spacing between the light emitting elements of the other light emitting element group.

According to another LED array of the present invention, in the LED array of the present invention, the extended portion of the one-conductivity-type semiconductor layer is provided so that the other electrode of each light emitting element having the same electrode spacing is energized. The connection lines are formed in parallel with the arrangement lines of the light emitting elements so as to straddle the insulating film formed as described above.

In another LED array according to the present invention, in the LED array according to the present invention, an interval between individual electrodes in one light emitting element group and another light emitting element group in the light emitting element group is further increased. It is characterized in that a symmetrical electrode spacing pattern is provided by lengthening or shortening the arrangement order and making a difference.

According to the LED array of the present invention, an electrode pad common to one electrode of each light-emitting element is provided for each light-emitting element group as described above. The electrode interval to the other electrode in the extending portion of the light emitting element is different, and the electrode interval of the light emitting element of one light emitting element group is the same as the electrode interval of the light emitting element of the other light emitting element group, and both other electrodes are Are provided with other electrode pads commonly used.

By thus arranging the common electrode pad for a plurality of one electrodes and arranging another common electrode pad for a plurality of other electrodes, the number of electrode pads is reduced. As a result, the arrangement area of the LED array is reduced, and thereby, the density of the light emitting elements is increased and the size of the LED array is reduced.

Further, Japanese Patent Application Laid-Open No. 9-277592 and Japanese Patent Application Laid-Open
The number of processes is smaller than that of the LED array having a multilayer electrode structure as proposed in JP 11-40842,
By not using a multilayer electrode structure with an interlayer insulating film interposed therebetween, manufacturing costs can be reduced, and an LED array in which a light-emitting element has a higher density and a smaller size can be obtained.

In the LED array of the present invention, the connection is made so as to straddle the insulating film formed on the extending portion of the one conductivity type semiconductor layer so that the other electrode of each light emitting element having the same electrode interval is energized. The lines are formed parallel to the arrangement lines of the light emitting elements. Therefore, in the conventional LED array, an interlayer insulating film indispensable for electrical insulation between wirings is not formed other than the insulating film formed as is well known, thereby lowering the manufacturing cost and lowering the cost. LED array is provided.

Further, in the LED array of the present invention,
Further, for one light emitting element group and the other light emitting element group, by changing the arrangement of the individual electrodes in the light emitting element group in the arrangement order, a symmetrical electrode spacing pattern is obtained, and such a regular pattern is formed. By doing so, it is possible to relatively easily perform the signal processing of the light emission order when the LED head is mounted, and also to easily design the mounting substrate.

By providing the regular pattern on the LED array in an orderly manner, it becomes easier to design electrode pads in other areas. A large space can be taken at the shortest part of the symmetric electrode spacing.
As a result, the size of the LED array chip can be reduced, and the wire bonding pad for mounting the LED array can be increased. As a result, the chip size of the LED array can be reduced, and the yield in manufacturing the LED head can be improved.

[0023]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. 1 to 4 show one embodiment of the LED array of the present invention.

FIG. 1 is an enlarged plan view of a main part of the LED array, FIG. 2 is a sectional view taken along line VV 'shown in FIG.
FIG. 2 is a sectional view taken along line hh ′ shown in FIG. 1. FIGS. 2 and 3 show the directions of the cross-sectional views by clearly indicating V, V ′, h, and h ′ as reference numerals. Also,
FIG. 4 is a plan view of a main part of another LED array.

Reference numeral 1 denotes a single crystal substrate. On the single crystal substrate 1, reference numeral 2 denotes a semiconductor layer of one conductivity type, reference numeral 3 denotes a semiconductor layer of the opposite conductivity type, reference numeral 4 denotes an individual electrode serving as the one electrode, and reference numeral 5 denotes a counter electrode of the other electrode. A certain common electrode 6 is an insulating film as a protective film made of a silicon nitride film or the like.

On the single crystal substrate 1, a semiconductor layer 2 of one conductivity type and a semiconductor layer 3 of opposite conductivity type are sequentially formed for each light emitting element, and in the stack, the area of the semiconductor layer 2 of one conductivity type is By extending the one-conductivity-type semiconductor layer 2 so as to be larger than the area of the opposite-conductivity-type semiconductor layer 3, the extension part 7 made of the same material as the one-conductivity-type semiconductor layer 2 is provided.

Further, as shown in FIG. 2, the insulating film 6 is coated on the one conductivity type semiconductor layer 2, but the common electrode 5 (5a, 5b) is connected and provided on the exposed portion. By that
The insulating film 6 and the common electrode 5 are juxtaposed on the extension 7.

Further, the insulating film 6 is also coated on the semiconductor layer 3 of the opposite conductivity type, and the individual electrode 4 is connected to the exposed portion.

The single crystal substrate 1 is composed of a semiconductor substrate, and when it is constituted by a high resistance silicon single crystal, (10
A substrate or the like having the 0) plane turned off by 2 to 7 ° in the <011> direction is preferable.

The one conductivity type semiconductor layer 2 includes a buffer layer 2a,
It comprises an ohmic contact layer 2b and an electron injection layer 2c.

Buffer layer 2a and ohmic contact layer
2b is formed of gallium arsenide or the like, and has an electron injection layer 2c.
Is formed of aluminum gallium arsenide or the like. Ohmi
One contact type semiconductor such as silicon
1 × 10 body impurities¹⁶-10 ¹⁷atoms / cm^Three degree
And the electron injection layer 2c contains one conductivity type half of silicon or the like.
Contains some conductive impurities.

The buffer layer 2a is provided to prevent misfit dislocation due to mismatch of the lattice constant between the single crystal substrate 1 and the semiconductor layer.
¹⁶ to 10 ¹⁹ atoms / cm ^{3 are} contained.

The buffer layer 2a is formed to a thickness of about 2 to 4 μm, and the ohmic contact layer 2b is formed to a thickness of 0.1 to 3.
The electron injection layer 2c is formed to a thickness of about 0 μm.
It is formed to a thickness of about 0.4 μm.

The opposite conductivity type semiconductor layer 3 includes a light emitting layer 3a, a cladding layer 3b, and another ohmic contact layer 3c.

The light emitting layer 3a and the cladding layer 3b are made of aluminum gallium arsenide, and the ohmic contact layer 3c is made of gallium arsenide.

The light emitting layer 3a, the cladding layer 3b, and the ohmic contact layer 3c are provided between the respective layers in consideration of the effect of confining electrons and the effect of extracting light, with a mixture of aluminum arsenide (AlAs) and gallium arsenide (GaAs). Different crystal ratios.

The light emitting layer 3a and the cladding layer 3b are made of zinc (Z
n) or the like and 1 × 10 ¹⁶ to 10 ²¹
atoms / cm ³ , and the ohmic contact layer 3c contains 1 × 10 ^{19 of} a reverse conductivity type semiconductor impurity such as zinc.
About 10 ²¹ atoms / cm ³ .

The light emitting layer 3a and the cladding layer 3b have a thickness of 0.2 to
The thickness d of the ohmic contact layer 3c is about 0.4 μm, and the thickness d> (0.15 μm
-Ohmic contact layer thickness).

The insulating film 6 is made of, for example, silicon nitride and has a thickness of about 2000.degree.

The individual electrode 4 and the common electrode 5 (5a, 5b, 5
c, 5d) are made of gold / chrome (Au / Cr) or the like,
It is formed to a thickness of about 1 μm.

Each light emitting element has the above-described configuration. Next, FIGS. 1 and 3 show the electrode structure for each light emitting element.

An electrode pad 8 common to the individual electrodes 4 of each of these light emitting elements is provided, a light emitting element group 9 corresponding to each electrode pad 8 is provided, and the one light emitting element group and the other light emitting element group are provided. By alternately arranging the light emitting element groups, a plurality of light emitting element groups 9 are arranged in a line.

Further, the common electrode 5 (5a, 5b, 5c, 5c) in the extending portion 7 of each light emitting element in the light emitting element group 9
The electrode spacing x leading to d) is different, and the electrode spacing of the light emitting elements of one light emitting element group 9 is the same as the electrode spacing of the light emitting elements of the other light emitting element group 9, so that both electrodes are common. Another electrode pad 10 is provided.

Then, in order to energize the common electrode 5 of each light emitting element having the same electrode spacing x, the connection lines 11 (11 a, 11 a, 11
b, 11c, 11d) are formed in parallel with the arrangement lines of the light emitting elements.

Further, with respect to one of the light emitting element groups and the adjacent light emitting element groups 9 as the other light emitting element group, the distance x between the individual electrodes in the light emitting element group 9 is increased or shortened in the arrangement order. In this case, a symmetrical electrode spacing pattern is obtained.

Next, FIG. 4 shows a 128-bit (bit) LED array with four different electrode intervals x.

The electrode having the shortest electrode interval x is defined as X11, and this is defined as the light emitting element at the end.
31, X41,..., X4n, X3n, X2n, X1n,.

The 128 bits are divided into four groups of 32 groups (3
By dividing into two light emitting element groups 9), n = 1 to 32.

Each light emitting element group 9 is divided into groups G1, G2,.
Assuming that Gm is Gm, the light emitting elements having the electrode spacing X11 in the group G1 and the light emitting elements having the electrode spacing X12 in the group G2 are connected by the connection line 11a.
m is connected to the light emitting element at the electrode interval X1n.

The light emitting elements having the electrode spacing X21 in the group G1, the light emitting elements having the electrode spacing X22 in the group G2, and the light emitting elements having the electrode spacing X2n in the group Gm are connected by the connection line 11b.

Similarly, the electrode interval X in the group G1
31 light emitting elements and the electrode spacing X3 in group G2
2 light-emitting elements and the electrode spacing X3 in the group Gm
The n light-emitting elements are connected by a connection line 11c.

The light-emitting elements having the electrode spacing X41 in the group G1, the light-emitting elements having the electrode spacing X42 in the group G2, and the light-emitting elements having the electrode spacing X4n in the group Gm are connected by a connection line 11d.

Then, a current is caused to flow through a predetermined light emitting element by selectively applying a voltage between the electrode pads 8 provided in each light emitting element group and the other group of electrode pads 10. And cause the device to emit light.

Thus, according to the LED array of the present invention,
A common electrode pad 8 is provided for each light emitting element group 9 (groups G1, G2,... Gm...), And each light emission in the light emitting element group 9 (groups G1, G2,. The electrode spacing x of the light emitting elements of one light emitting element group and the electrode spacing x of the light emitting elements of the other light emitting element group are made the same while the electrode spacing x of the element is different.
By arranging the common electrode pad 10 for
The number of electrode pads is reduced, and the area for arranging the electrodes is reduced.
Array miniaturization has been achieved.

Further, in the present invention, in order to energize the common electrode 5 of each light emitting element having the same electrode spacing x, the connection line 1 is extended across the insulating film 6 on the extending portion 7.
By forming 1 in parallel with the arrangement line of the light emitting elements, there was no need to form another insulating film, thereby reducing the manufacturing cost and providing a low-cost LED array.

Further, in the present invention, the symmetrical electrode spacing pattern is obtained by changing the individual electrode spacings x in the light emitting element group in one light emitting element group and the other light emitting element group. Such a regular pattern facilitates design and simplifies manufacturing. Then, by providing the regular pattern on the LED array in an orderly manner, it becomes easy to design the electrode pads in other areas. For example, as shown in FIG. 4, the area of the electrode pad 10a connected to the connection line 11c can be increased by providing it between the divided connection lines 11d.

Next, a method for manufacturing the above-described LED array will be described. First, a one-conductivity-type semiconductor layer 2 and a reverse-conductivity-type semiconductor layer 3 are formed on a high-resistance silicon single crystal substrate 1 by MOC.
It is formed by sequentially laminating by a VD method or the like.

First, when forming these semiconductor layers 2 and 3, the substrate temperature is set at 400 to 500 ° C., thereby forming an amorphous gallium arsenide film having a thickness of 200 to 2000 ° C. From 700 to 9
One-conductivity-type semiconductor layer 2 having a desired thickness raised to 00 ° C.
And the opposite conductivity type semiconductor layer 3 are formed.

In this film formation, the source gas is TM
G ((CH_Three )_Three Ga), TEG ((C_Two H_Five )_Three G
a), arsine (AsH)_Three ), TMA ((CH_Three )_Three A
l), TEA ((C_Two H_Five )_Three Al) is used,
As the gas for controlling the conductivity type, silane (SiH
_Four ), Hydrogen selenide (H_Two Se), DMZ ((CH_Three )
_Two Zn) or the like, and H 2 is used as a carrier gas._Two
Are used.

Next, the semiconductor layers 2 and 3 are patterned in an island shape so that adjacent elements are electrically separated from each other. For this purpose, wet etching using a sulfuric acid-hydrogen peroxide-based etchant or CCl ₂ F ₂
This is performed by dry etching using gas or the like.

Thereafter, an extension 7 is provided on one end side of the one conductivity type semiconductor layer 2, a part of the extension 7 is exposed on the extension 7, and is adjacent to the one conductivity type semiconductor layer 2. Etching is performed so that a region portion is exposed. The opposite conductivity type semiconductor layer 3 is etched so that the opposite conductivity type semiconductor layer 3 is formed narrower than the one conductivity type semiconductor layer 2.

Such etching is also performed by wet etching using a sulfuric acid / hydrogen peroxide-based etchant or by using CCl 2
This is performed by dry etching using F2 gas.

Next, etching is performed with, for example, an alkaline aqueous solution so that adjacent light emitting elements are electrically separated from each other even on the substrate. At this time, a part of the extension portion 7 of the one conductivity type semiconductor layer 2 is exposed, and a region adjacent to the one conductivity type semiconductor layer 2 is exposed. This is performed while leaving the pattern used when etching the opposite conductivity type semiconductor layer 3 so as to be formed narrower than the conductivity type semiconductor layer 2, thereby electrically connecting the opposite conductivity type semiconductor layer 3 without any damage. To separate.

Next, a silane gas is
(SiH_Four ) And ammonia gas (NH _Three ) Using nitridation
Forming and patterning an insulating film 6 made of silicon
You.

Finally, chromium and gold are formed by vapor deposition or sputtering and patterned to form electrode pads 9 and 10 and connection lines 11.

[0066]

As described above, according to the LED array of the present invention, one conductivity type semiconductor layer, opposite conductivity type semiconductor layer and one electrode are sequentially laminated on a single crystal substrate, and this one conductivity type semiconductor layer is formed. A plurality of light emitting elements having the other electrode and the insulating film arranged side by side are arranged on the extended portion drawn out, and an electrode pad commonly formed for each one electrode of these light emitting elements is arranged. In a configuration in which a plurality of light emitting element groups are further arranged in a line shape, the electrode spacing to the other electrode in the extending portion of each light emitting element in the light emitting element group is different, and the light emitting element of one light emitting element group is By setting the electrode interval and the electrode interval of the light emitting element of the other light emitting element group to be the same and arranging another electrode pad common to both other electrodes, the number of electrode pads is reduced, The installation area is reduced, More, density of light-emitting elements, as well as downsizing of the LED array was achieved.

Also, as compared with the conventional LED array having a multilayer electrode structure, the number of steps is reduced, and the manufacturing cost is reduced by not using a multilayer electrode structure with an interlayer insulating film interposed therebetween.
An LED array in which the density and the size of the light-emitting element were achieved was obtained.

In the LED array of the present invention,
Further, a connection line is formed in parallel with the array line of the light emitting elements so as to cross the insulating film formed on the extending portion of the one conductivity type semiconductor layer so as to supply current to the other electrode of each light emitting element having the same electrode interval. As a result, no additional insulating film was formed, thereby reducing the manufacturing cost and providing a low-cost LED array.

In the LED array of the present invention,
Further, for one light emitting element group and the other light emitting element group, by changing the arrangement order of the individual electrodes in the light emitting element group, a symmetrical electrode spacing pattern is formed, and the pattern is regularly formed as such. As a result, the design becomes easy, the manufacturing is simplified, and by regularly providing the regular pattern on the LED array, it becomes easy in design to provide the electrode pads in other areas.

[Brief description of the drawings]

FIG. 1 is a plan view showing one embodiment of an LED array of the present invention.

FIG. 2 is a sectional view taken along line VV ′ shown in FIG.

FIG. 3 is a sectional view taken along the line h-h 'shown in FIG.

FIG. 4 is a plan view showing an embodiment of the LED array of the present invention.

FIG. 5 is a plan view showing one embodiment of a conventional LED array.

FIG. 6 is a sectional view showing a conventional LED array.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Single crystal substrate 2 ... One conductivity type semiconductor layer 3 ... Reverse conductivity type semiconductor layer 4 ... Individual electrode 5 ... Common electrode 6 ... Insulating film 7 ... Extension part 8 ... Electrode pad 9 ... Light emitting element group 10 ... Electrode pad 11 ... Connection line x ... Electrode spacing

Claims (3)

[Claims] 1. A semiconductor device according to claim 1, wherein a semiconductor layer of one conductivity type, a semiconductor layer of the opposite conductivity type, and one electrode are sequentially laminated on a single crystal substrate, and the other electrode and an insulating film are formed on an extending portion from which the semiconductor layer of one conductivity type is extended. A plurality of light emitting elements are arranged in parallel, and a plurality of light emitting element groups each having an electrode pad formed in common with one electrode of each of these light emitting elements are arranged in a line. In the LED array, the electrode spacing to the other electrode in the extending portion of each light emitting element in the light emitting element group is different, and the electrode spacing of the light emitting element of one light emitting element group and the electrode spacing of the other light emitting element group are different. An LED array comprising the same electrode spacing as the light emitting element and another electrode pad commonly provided for both other electrodes. 2. A light-emitting element array line, wherein a connection line extends across an insulating film formed on an extended portion of a one-conductivity-type semiconductor layer so that the other electrode of each light-emitting element having the same electrode spacing is energized. The LED array according to claim 1, wherein the LED array is formed in parallel with the LED array. 3. A symmetrical electrode spacing pattern in which one electrode spacing and another light emitting element group have different electrode spacings in the light emitting element group by lengthening or shortening the arrangement order. The LED array according to claim 1 or 2, wherein