JP2003318535A - Method of manufacturing printed wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a printed wiring board by which the conductor sections for via holes of an inner layer and via holes formed in an insulating layer on the outside of the inner layer can be aligned with each other with high accuracy. <P>SOLUTION: An insulating layer 27 is formed on the outside of a conductor layer having first reference marks 24 and first bottom lands 23 for via holes, and a conductor layer 26 is formed on the outside of the insulating layer 27. Then holes 215 are formed in the conductor layer 26 at the positions corresponding to the first reference marks 24 and other holes 218 are formed in insulating layer 27 for exposing the marks 24. In addition, first via holes 217 are formed in the insulating layer 27 for exposing the first bottom lands 23 by laser beam machining by using the first reference marks 24 exposed through the holes 218 as the positioning references, and plated layers 219 are formed. Finally, circuits, conductor sections for second via holes, and second reference marks 224 are formed by selectively removing the conductor layer 26 and plated layer 219. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a printed wiring board, and more particularly to a technology for manufacturing a multilayer printed wiring board by a build-up method, and in particular, a via is formed by a conformal mask method using a copper foil laminate. The present invention relates to a method for manufacturing a multilayer printed wiring board in which holes are formed.

[0002]

2. Description of the Related Art In recent years, the build-up method has been developed as one of the manufacturing technologies for multilayer printed wiring boards in response to the progress of lighter, thinner, smaller, and more sophisticated electronic devices such as information communication devices such as mobile phones and personal computers. The construction method called is rapidly spreading. This build-up method includes a conformal mask method that uses a laser processing machine to form a via hole in a multilayer printed wiring board.

In this conformal mask method, an outer layer of copper foil and a prepreg are laminated on a core material provided with an inner layer pattern such as a bottom land, and a part of copper of this copper foil is
The via hole is formed by removing the resin according to the position of the bottom land in the core material and irradiating the portion with laser to remove the resin. The portion where the copper foil of the portion to be laser processed is covered with a laser mask forming resist, and a laser mask film for marking the portion corresponding to the bottom land position is placed, and the laser mask forming resist is placed. It is made by exposing and developing. That is, unless the laser mask film is aligned with the position of the bottom land, the via hole cannot be formed by the laser.

The alignment of the laser mask film in the conformal mask method is generally performed by forming a through hole in a laminate of a copper foil, a prepreg and a core material by a high temperature press and using the through hole as a reference. ing.
In addition, for the through holes formed for alignment, an X-ray image processing type poza hole processing machine is used, or an NC boring machine is used with reference to the holes drilled by the poza hole processing machine. This is done by providing many holes separately.

Here, a concrete procedure of the conventional build-up method for performing laser processing by the conformal mask method will be described with reference to FIGS. 3 (A) to 3 (D) and FIG.
A description will be given with reference to (E) to (I).

First, as shown in FIGS. 3A and 3B, for example, a copper foil laminated on a glass epoxy material (interlayer insulating material) 1 is etched to form an inner layer pattern 2 and a bottom land for a via hole. 3 and a core material 5 provided with a reference land 4 in which copper remains in a circular shape is prepared. Then, the copper foil 6 and the prepreg 7 are laminated on the core material 5 by high temperature press molding.

Next, by confirming an X-ray image capable of detecting the reference land 4 through the copper foil 6,
A through hole 8 is formed at the position of the reference land 4 by a poza hole drilling machine (see FIG. 3C). Then, as shown in FIG. 3D, the surface thereof is covered with a laser mask forming resist 9, and a laser mask film 12 provided with a positioning portion 10 and a via hole forming portion 11 is provided with a through hole 8 It is placed on the resist 9 for forming a laser mask while irradiating it with transmitted light and checking it with the CCD camera 13.

Then, a resist 1 for forming a laser mask is formed.
2 is exposed and developed, and a copper etching process is performed to provide the through hole forming portion 18 and the via hole forming portion 111 (see FIG. 4E). The via hole 14 is formed by removing the resin in the via hole forming portion 111 with a laser processing machine (see FIG. 4F).

Subsequent to such hole processing, desmearing and plating are performed to form the copper plating layer 15 (see FIG. 4G). Then, the surface is covered with an etching resist 16 for forming a circuit, and a patterning film 17 for forming a circuit is placed.

Further, the etching resist 16 is exposed,
A predetermined circuit is formed by performing development processing and copper etching processing (see FIGS. 4H and 4I).
A multilayer printed wiring board is formed by repeating the procedure described above with reference to FIGS. 3A to 3D and 4E to 4I, using the multilayer board thus formed as the core material 5. Is.

[0011]

In the conventional conformal mask method, as described above, the position of the core material on the inner layer side cannot be directly confirmed by the presence of the copper foil when laminated. Therefore, as a method of confirming the position of the core material, a through hole is formed in the reference land portion using an X-ray image. Although the confirmation of the reference land by this X-ray image processing can be performed with a certain degree of accuracy, the position of the obtained through hole for positioning may be slightly shifted because the image confirmed by the X-ray passing through the copper foil is used. is there.
Therefore, it is difficult to accurately arrange the laser mask film on the bottom land of the core material, and there is a demand for a technique capable of aligning the laser mask film with higher accuracy.

Further, in the case where different patterns are formed on both surfaces of the core material, that is, on each one surface of the core material, it is necessary to provide more through holes for alignment. In this case, since poza hole processing or NC drilling processing increases,
The manufacturing process is complicated, through holes must be formed at different positions for each stack, the area occupied by the through holes in the printed wiring board becomes large, and high-density multilayer wiring boards are essential. However, it is not preferable as a manufacturing method of.

Therefore, a main object of the present invention is to provide a printed wiring in which a via hole conductor portion such as an inner bottom land and a via hole formed in an insulating layer such as a resin layer which is an outer layer thereof can be accurately aligned. It is to provide a method for manufacturing a plate.

[0014]

In order to solve the above problems, in a preferred embodiment of the present invention, in a method for manufacturing a multilayer printed wiring board by a build-up method using a copper foil and a prepreg, a first reference mark and a bottom are provided. A copper foil and a prepreg are laminated on both sides of a core material provided with lands by high temperature press molding to form a through hole, and the surface thereof is covered with a laser mask forming resist. The laser mask film provided with the positioning portion, the reference hole forming portion, and the via hole forming portion is positioned by detecting the transmitted light transmitted through the through hole and aligning with the positioning portion of the laser mask forming film. Then, the laser mask forming resist is exposed to light and developed, and the copper of the copper foil corresponding to the reference hole forming part and the via hole forming part is removed by etching. Next, the resin portion is removed by laser processing so that the first reference mark having the resin for covering the reference hole portion on the core can be sufficiently confirmed. The first fiducial mark on the core is confirmed by reflected light, and the first fiducial mark is used as a reference for alignment to form a via hole on the bottom land of the core by laser processing. Form a copper plating layer by plating, and further
A pattern film, which is coated with an etching resist for forming a circuit on the surface thereof and provided with a positioning portion, a reference mark forming portion for forming a second reference mark, a bottom land forming portion, and a circuit forming portion, Positioned by positioning the positioning portion by detecting the transmitted light transmitted through the through hole and placed on the etching resist, exposing and developing the etching resist,
The bottom land, the circuit, and the second reference mark are formed by etching, and the multilayer printed wiring board is formed by repeating the above steps using the multilayer board provided with the second reference mark as a core material. .

According to the present invention, the resin covering the first reference mark is removed by laser processing to form a portion where the reflected light can be recognized. Then, by irradiating this portion with reflected light, alignment for laser processing is performed using the first reference mark as a reference. Therefore, the core material and the via hole can be aligned with extremely high accuracy as compared with the case where the through-hole to be the reference is formed by the X-ray image processing.

When the second fiducial mark is formed on the first fiducial mark, that is, on the outer layer side, the second fiducial mark is located at a position corresponding to the first fiducial mark and has an area smaller than that of the first fiducial mark. Is formed and the stacking is further repeated by using the second reference mark, so that the positioning can be repeated with extremely high accuracy. Since such reference marks are formed at the same position in the plane direction of the core material and at the same point at that position, reference marks capable of detecting reflected light are sequentially provided. It is possible to perform positioning with much higher accuracy than the case where positioning is performed by providing a reference through hole at the position. This means that as the total number of layers increases,
Further, when the circuits are laminated on both surfaces of the core material while forming separate circuits, it is possible to manufacture the multilayer printed wiring board while positioning with high accuracy.

The present invention is based on the above knowledge. According to the present invention, the first conductor layer having at least the first fiducial mark and the first via-hole conductor portion is provided outside the first conductor layer. Forming a first insulating layer, forming a second conductor layer outside the first insulating layer, and forming a second conductor layer on the second conductor layer at a position corresponding to the first fiducial mark. 1
And forming a second hole at a position corresponding to the first via hole conductor portion, and forming a third hole in the first insulating layer to expose the first reference mark. And a step of forming the first via hole exposing the first via hole conductor portion in the first insulating layer using the first reference mark exposed in the third hole as a positioning reference. A method of manufacturing a printed wiring board, comprising: a step of forming by processing.

Preferably, after forming the first via hole, a step of forming a first plating layer by a plating process, and selectively removing the second conductor layer and the first plating layer. And forming at least the first circuit, the second via-hole conductor portion, and the second fiducial mark.

Further, preferably, a step of forming a second insulating layer outside the second conductor layer having at least the first circuit, the second via hole conductor portion and the second reference mark. And a step of forming a third conductor layer outside the second insulating layer, and forming a fourth hole in the third conductor layer at a position corresponding to the second reference mark, Second
Forming a fifth hole at a position corresponding to the via hole conductor portion, forming a sixth hole in the second insulating layer to expose the second reference mark, and Forming a second via hole exposing the second via hole conductor portion in the second insulating layer by laser processing using the second reference mark exposed in the hole as a positioning reference. Prepare

Preferably, the second reference mark is provided at a position corresponding to the first reference mark so as to overlap the first reference mark.

Preferably, the area of the second reference mark is smaller than the area of the first reference mark.

Further, according to the present invention, there is provided a method for manufacturing a multilayer printed wiring board by a build-up method using copper foil lamination, wherein the prepreg and the copper are provided on both surfaces of the inner core material provided with the first fiducial mark. The foil is pressure-bonded with a high-temperature press, the resist for forming a laser mask is exposed and developed, and the copper of the copper foil corresponding to the reference hole forming portion and the via hole forming portion is removed by etching. The resin part is removed by laser processing so that the mark can be confirmed, the reference mark is exposed, and the via hole is formed by laser processing with the reference mark as the positioning portion.
A print characterized in that a copper plating layer is formed by a plating treatment, an etching resist for forming a circuit is further covered on the surface, a second reference mark is formed together with the circuit formation, and then this step is repeated. A method for manufacturing a wiring board is provided.

[0023]

BEST MODE FOR CARRYING OUT THE INVENTION Preferred embodiments of the present invention will be described below. 1 (A) to (D) and FIG. 2 (E)
(I) shows the procedure of the manufacturing process according to one embodiment of the present invention in the order of the process by the schematic vertical sectional view.

First, as shown in FIG. 1 (A), a copper foil laminated on a polyimide material (BN300C manufactured by Mitsui Chemicals, Inc.) 21 is etched to form an inner layer pattern 22, a via hole bottom land 23, and a circle. The core material 25 provided with the first reference land 24 and the penetrating reference land 28 in which copper remains in the shape is prepared. This first reference land 24
Shows a state in which the copper foil is removed into a circle of φ0.20 mm, and this circular hole is used as a reference hole for alignment.

Next, as shown in FIGS. 1 (A) and 1 (B),
Copper foil 26 (Furukawa Circuit GTS-
STD18um) and prepreg 27 (BN300P manufactured by Mitsui Chemicals, Inc.) are laminated by high temperature press molding. The high temperature press is to sandwich it with SUS plates and perform hot compression press molding.

Next, the reference land 28 is transmitted through the copper foil 26.
The through hole 29 is formed in the reference land 28 portion by the Poser hole machine by using the X-ray image capable of detecting (see FIG. 1C). After that, as shown in FIG. 1D, the entire surface of the layered product was coated with a laser mask forming resist 210 (2536, manufactured by Asahi Kasei). The laser mask forming resist 210 is an ultraviolet curable resist called a dry film, and is covered by thermocompression bonding. Then, the positioning unit 211,
The laser mask film 214 provided with the reference hole forming part 212 and the via hole forming part 213 is formed in the through hole 29.
It was placed on the laser mask forming resist 210 while irradiating it with transmitted light and confirming it with the CCD camera 222. The via hole forming portion 213 is formed on the film 214 so as to correspond to the position of the bottom land 23 provided on the core material 25.

After placing the laser mask film 214 in this manner, the laser mask forming resist 2 is formed.
10 (exposure ACP600C manufactured by ADTEC), developed,
With the ferric chloride-based etching solution, the reference hole forming part 21
2 and the copper foil 26 corresponding to the via hole forming portion 213 was removed. Then, when the remaining laser mask forming resist 210 is peeled off, as shown in FIG. 2E, the reference hole forming portion mask 215 and the via hole forming portion mask 2 are formed.
16 is obtained.

Then, as shown in FIG. 2 (F), a carbon dioxide gas laser (MEL605 manufactured by Mitsubishi Electric Corp.) is applied to a portion where the resin 27 corresponding to the reference hole mask 215 is exposed.
GTX-II laser processing conditions: output 5600v, frequency 100Hz, pulse width 8μsec, for large diameter processing)
By irradiating the resin 27 to remove the resin 27,
8 is formed. The reference hole 218 in this case has a diameter of 8 mm.

The reference mark 24 on the core exposed by the above-mentioned processing is confirmed by a CCD camera 223 by reflected light, and a carbon dioxide gas laser (MEL605GT manufactured by Mitsubishi Electric Corp.)
X-II laser processing conditions: output 5600 v, frequency 100 Hz, pulse width 6 μsec), with the reference mark 24 as a reference for alignment, the via hole 2
Formed 17. This via hole 217 is φ0.1 m
m.

Then, in order to remove the smear in the holes 217, 218 formed by the irradiation of the carbon dioxide gas laser,
A desmear treatment was performed by immersing in a potassium permanganate solution, and then, as shown in FIG. 2G, an electroless copper plating treatment and an electrolytic plating treatment were performed to form a copper plating layer 219 having a predetermined thickness. . Prior to this electroless plating treatment, a so-called catalyzing treatment is performed to deposit palladium, which serves as a deposition nucleus for electroless plating. The conditions for electroless copper plating are 3 g of copper sulfate pentahydrate /
L, sodium hydroxide 5g / L, formaldehyde 9g
/ L solution for 20 minutes, and then electrolytic plating conditions are as follows: copper sulfate 50 g / L, sulfuric acid 220 g / L solution, plating at a current density of 1.5 A / dm ² for 60 minutes. is there.

Next, as shown in FIG. 2H, the plated product was coated with an etching resist 220 for forming a circuit. The same etching resist 220 as the laser mask forming resist 210 was used. The patterning film 221 provided with the positioning part 211, the second reference mark forming part 212, the bottom land forming part 230, and the circuit forming part 231 was placed on the one covered with the etching resist 220. The second fiducial mark forming portion 212 is
It is a position corresponding to the reference mark 24. The positioning of the pattern film 221 is performed by irradiating the through hole 29 with light and detecting the transmitted light by the CCD camera 223 to determine the position of the pattern film 221.
The film 221 was moved so that 1 exactly overlaps the through hole 29.

In this way, the pattern film 22
2 (I), the etching resist 220 is exposed and developed, and the second fiducial mark 224, the bottom land 232 and the circuit 233 are etched with a ferric chloride-based etching solution. Formed.

As described above, the second reference land 224
The multilayer board on which the core is formed is the core material 25 shown in FIG.
2 (A) to (D) and FIG. 3 (E) to
The process was repeated up to (I) to manufacture a multilayer printed wiring board.

In the multilayer printed wiring board obtained by the manufacturing method shown in this embodiment, the misalignment between the bottom land 23 and the via hole 217 caused by laser processing is
The via hole 217 could be formed with very high positional accuracy with almost no occurrence.

[0035]

According to the present invention, a printed wiring board can be accurately aligned with a via hole conductor such as an inner bottom land and a via hole formed in an outer insulating layer such as a resin layer. A manufacturing method is provided.

[Brief description of drawings]

FIG. 1 is a flowchart showing a manufacturing procedure of a multilayer printed wiring board by a build-up method according to an embodiment of the present invention.

FIG. 2 is a flowchart showing a manufacturing procedure of a multilayer printed wiring board by a build-up method according to an embodiment of the present invention.

FIG. 3 is a flowchart showing a procedure for manufacturing a multilayer printed wiring board by a conventional build-up method.

FIG. 4 is a flowchart showing a manufacturing procedure of a multilayer printed wiring board by a conventional build-up method.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Interlayer insulating material 2 ... Inner layer pattern 3 ... Via hole bottom land 4 ... First reference land 5 ... Core material 6 ... Copper foil 7 ... Prepreg 8 ... Through hole 9 ... Laser mask forming resist 10 ... Positioning part 11 ... Via-hole forming part 12 ... Laser mask forming film 13 ... Transmitted light CCD camera 14 ... Via holes (holes for interlayer connection formed by laser processing) 15 ... Copper plating 16 ... Pattern forming resist 17 ... Pattern forming film Reference numeral 18 ... Through hole forming portion 21 ... Interlayer insulating material 22 ... Inner layer pattern 23 ... Via hole bottom land 24 ... First reference land 25 ... Core material 26 ... Copper foil 27 ... Prepreg 28 ... Penetration reference land 29 ... Through hole 111 ... Via hole forming part 210 ... Laser mask forming resist 211 ... Positioning part 212 ... Reference hole forming part 2 13 ... Via hole forming part 215 ... Reference hole forming part mask: Copper is removed by etching 216 ... Via hole forming part mask: Copper is removed by etching 217 ... Via hole (interlayer formed by laser processing Connection hole) 218 ... Reference hole: In order to recognize the first reference land,
Hole 219 formed by laser processing ... Copper plating 220 ... Pattern forming resist 221 ... Pattern forming film 222 ... Transmitted light CCD camera 223 ... Reflected light CCD camera 224 ... Second reference land: Second reference land First
Has the same role as the first reference land, and the first reference land is L
The second reference land is L1 and L
It becomes a reference for laser processing when it is formed into four layers and further laminated. (See FIG. 2 (I)) 230 ... bottom land forming part 231 ... circuit forming part 232 ... bottom land 233 ... circuit

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Junsuke Tanaka             Mitsui 5-32, Tomuro, Atsugi City, Kanagawa Prefecture             Gaku Co., Ltd. F-term (reference) 5E338 AA03 DD21 EE42                 5E346 AA43 AA60 CC32 DD12 FF04                       GG15 HH32

Claims (6)

[Claims] 1. A first outside of a first conductor layer having at least a first fiducial mark and a first via-hole conductor portion.
Forming an insulating layer, forming a second conductor layer outside the first insulating layer, and forming a second conductor layer on the second conductor layer at a position corresponding to the first fiducial mark. And forming a second hole at a position corresponding to the first via hole conductor portion, and forming a third hole in the first insulating layer to expose the first reference mark. A step of forming the first via hole that exposes the first via hole conductor portion in the first insulating layer using the first reference mark exposed in the third hole as a positioning reference. A method of manufacturing a printed wiring board, comprising: a step of forming by processing. 2. A step of forming a first plating layer by plating after forming the first via hole, and selectively removing the second conductor layer and the first plating layer. The method for manufacturing a printed wiring board according to claim 1, further comprising: a step of forming at least a first circuit, a second via hole conductor portion, and a second fiducial mark. 3. The second circuit having the at least first circuit, second via hole conductor portion, and second reference mark.
Forming a second insulating layer on the outer side of the second conductive layer, forming a third conductive layer on the outer side of the second insulating layer, and forming a second reference layer on the third conductive layer. Forming a fourth hole at a position corresponding to the mark and forming a fifth hole at a position corresponding to the second via-hole conductor; and the second reference mark on the second insulating layer Forming a sixth hole exposing the second via hole, and exposing the second via hole conductor portion in the second insulating layer with the second reference mark exposed in the sixth hole as a positioning reference. The method for manufacturing a printed wiring board according to claim 2, further comprising a step of forming the second via hole by laser processing. 4. The method of manufacturing a printed wiring board according to claim 3, wherein the second reference mark is provided at a position corresponding to the first reference mark so as to overlap the first reference mark. 5. The method of manufacturing a printed wiring board according to claim 4, wherein the area of the second reference mark is smaller than the area of the first reference mark. 6. A method for manufacturing a multilayer printed wiring board by a build-up method using copper foil lamination, comprising: prepreg and copper foil are pressure-bonded to both sides of an inner core material provided with a first fiducial mark by high-temperature press. Then, the resist for laser mask formation is exposed and developed, and the copper of the copper foil corresponding to the reference hole forming part and the via hole forming part is removed by etching, and the reference mark on the inner core material can be confirmed. To remove the part by laser processing, expose the reference mark, form a via hole by laser processing using the reference mark as a positioning part, form a copper plating layer by plating, and further form a circuit on the surface The second fiducial mark is formed with the formation of the circuit, and then this step is repeated. Method for producing a printed wiring board.