JP2003250278A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce a manufacturing cost by miniaturizing a ceramics substrate while a terminal of a semiconductor element is easily soldered. <P>SOLUTION: A ceramics substrate 2 is jointed to a surface of a base plate 1 while an MOSFET 4 is mounted on the surface of the ceramics substrate 2. An insulating board 6 is so provided on the surface of the base plate 1 as to adjoin the ceramics substrate 2, while metal wirings 6A and 6B are formed on the surface of insulating board 6. A drain terminal D and a source terminal S of the MOSFET 4 are connected to the metal wirings 6A and 6B, respectively, and a bus bar electrode 8 is connected to the metal wiring 6A. Thus, a metal wiring can be omitted from the ceramics substrate 2 for miniaturization while the metal wirings 6A and 6B can be formed on the insulating board 6 of high heat resistance, and the terminal of MOSFET 4 is easily soldered to the metal wirings 6A and 6B. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a heat dissipation base plate having a MOS transistor (hereinafter referred to as MOSFET) and an insulated gate bipolar transistor (hereinafter referred to as I).
The present invention relates to a semiconductor device on which a semiconductor element such as GBT) is mounted, for example, a semiconductor device suitable for use in drive control of an electric motor.

[0002]

2. Description of the Related Art Generally, a power module such as an inverter used as a semiconductor device for controlling a motor is known (for example, Japanese Patent Laid-Open No. 8-32429). In such a conventional semiconductor device, a ceramic substrate made of aluminum nitride or the like having a low thermal resistance is mounted on a base plate made of a conductive metal material such as copper, and a semiconductor element such as an IGBT is mounted on the ceramic substrate. There is. Then, the terminals of the semiconductor element are connected to a wiring such as a metal thin film provided on the ceramic substrate, and are connected to another semiconductor element, an external power source or the like through the wiring.

[0003]

By the way, in the semiconductor device according to the prior art, since the wiring is provided on the ceramic substrate, the area of the expensive ceramic substrate for forming the wiring is increased and the manufacturing cost is increased. . In particular, a ceramic substrate having wiring for large current tends to be more expensive than one having other wiring, and there is a problem that the manufacturing cost is very high.

Further, the wiring of the ceramic substrate is joined to the terminals of the semiconductor element and the bus bar electrodes for external connection by soldering. On the other hand, since the thermal resistance of the ceramic substrate is low, it is difficult to heat the wiring when soldering. Therefore, when soldering the wiring, it is necessary to use, for example, a soldering caustic having a large heat capacity, which increases the production cost associated with the soldering, and at the same time, heat is transferred to the semiconductor element itself through the terminals, which increases the reliability of the semiconductor element. May decrease. Further, for example, when a power supply capacitor used for an inverter is joined near the wiring of a ceramic substrate, there is a problem that soldering is also difficult.

The present invention has been made in view of the above-mentioned problems of the prior art, and an object of the present invention is to reduce the size of the ceramic substrate and to easily solder the terminals and the like of the semiconductor element. It is to provide a semiconductor device capable of reducing

[0006]

In order to solve the above-mentioned problems, a semiconductor device according to the invention of claim 1 has a base plate made of a metal material, and a ceramic substrate and a metal wiring are provided on the surface of the base plate. An insulating substrate having a surface is provided, and on the surface of the ceramic substrate,
A semiconductor element mounted in a package is provided, terminals of the semiconductor element are connected to metal wiring of the insulating substrate, and the metal wiring is connected to a bus bar electrode.

With this structure, it is not necessary to provide metal wiring on the ceramic substrate, and the ceramic substrate can be miniaturized. Further, since the metal wiring can be formed on the insulating substrate having a high thermal resistance, the terminals of the semiconductor element and the bus bar electrodes can be easily soldered to the metal wiring.

A semiconductor device according to a second aspect of the present invention has a base plate made of a metal material, and a plurality of ceramic substrates are provided on the surface of the base plate.
An insulating substrate having a plurality of metal wirings on its surface is provided, and a semiconductor element mounted in a package is provided on the surface of each ceramic substrate, and terminals of each semiconductor element are respectively provided on the plurality of metal wirings of the insulating substrate. A bus bar electrode is connected to each of the metal wirings.

Thus, the semiconductor elements respectively provided on the plurality of ceramic substrates can be connected to each other by using the metal wiring on the insulating substrate or the bus bar electrode. Further, it is not necessary to provide metal wiring on the ceramic substrate, and the ceramic substrate can be downsized. Furthermore, since the metal wiring can be formed on the insulating substrate having high thermal resistance, the terminals of the semiconductor element and the bus bar electrodes can be easily soldered to the metal wiring.

In this case, as in the third aspect of the invention, the pair of bus bar electrodes among the plurality of bus bar electrodes may be arranged to face each other so that the directions of the currents are opposite.

As a result, the pair of bus bar electrodes can form magnetic fields in opposite directions, so that the mutual magnetic fields can be canceled to reduce the parasitic inductance of the bus bar electrodes, and the surge generated when the semiconductor element is driven. The voltage can be reduced.

Further, as in the invention of claim 4, a capacitor may be connected between the pair of bus bar electrodes directly or indirectly via the metal wiring.

As a result, compared to connecting the capacitor to an external circuit, the capacitor can be arranged in the vicinity of the semiconductor element, and a bus bar electrode or an external circuit wiring can be provided between the semiconductor element and the capacitor. The generated parasitic inductance can be reduced.

According to a fifth aspect of the present invention, a metal thin film is formed on the surface of the ceramic substrate, a semiconductor element is bonded to the metal thin film by soldering, or an adhesive is used on the surface of the ceramic substrate to form a semiconductor element. And a metal thin film is formed on the back surface of the ceramics substrate, the base plate is bonded to the metal thin film with solder, or the base plate is bonded to the back surface of the ceramics substrate with an adhesive. is there.

Thus, the semiconductor element can be fixed to the ceramic substrate by soldering or bonding, and the ceramic substrate can be fixed to the base plate by soldering or bonding.

According to the invention of claim 6, a metal plate is interposed between the ceramic substrate and the semiconductor element.

Since the semiconductor element can be bonded to the metal plate having high thermal conductivity, the metal plate can be used as a heat spreader. Therefore, the heat of the semiconductor element can be transferred to the ceramic plate and the base plate after being diffused by the metal plate, and the transient temperature rise of the semiconductor element can be absorbed by the metal plate.

According to a seventh aspect of the invention, the insulating substrate is formed of a resin material. Thus, the metal wiring can be formed on the insulating substrate made of a resin material that is inexpensive and has high thermal resistance, and can be easily soldered to the metal wiring.

As in the eighth aspect of the invention, the insulating substrate may be bonded to the base plate using an adhesive.

According to a ninth aspect of the invention, the metal wiring is formed using a metal wiring board made of a conductive metal material.

Since the metal wiring can be formed by using the metal wiring board having a large thickness, the resistance of the metal wiring can be reduced. Therefore, even when a large current flows through the metal wiring, it is possible to prevent excessive Joule heat generation in the metal wiring.

According to a tenth aspect of the present invention, the insulating substrate is provided with a terminal hole penetrating the metal substrate including the metal wiring for mounting a terminal of the semiconductor element, and the base plate is provided with the terminal of the semiconductor element at a position corresponding to the terminal hole. An escape hole for escape is provided, and the terminal of the semiconductor element is inserted into the terminal hole and the escape hole.

Thus, the terminals of the semiconductor element can be inserted into the terminal holes of the insulating substrate and the relief holes of the base plate, and the alignment can be facilitated when the semiconductor element is soldered and mounted on the ceramic substrate side.

According to an eleventh aspect of the present invention, the insulating substrate is provided with a terminal hole for penetrating the metal wiring including the metal wiring, and the terminal of the semiconductor element is attached to the terminal hole. The insulating substrate is inserted into the terminal hole and disposed at a position separated from the base plate.

As a result, the insulating substrate can be arranged on the ceramic substrate so that the semiconductor device as a whole can be miniaturized. Further, since the insulating substrate does not come into direct contact with the base plate, the metal wiring can be easily heated without radiating heat through the base plate when soldering to the metal wiring of the insulating substrate.

According to a twelfth aspect of the present invention, a plurality of semiconductor elements are electrically provided in parallel on the ceramic substrate, and the terminals of the plurality of semiconductor elements are connected to the plurality of terminal portions formed on the bus bar electrodes via metal wiring. It is configured to connect with each other.

Thus, a plurality of semiconductor elements can be easily connected from the metal wiring on the insulating substrate via the bus bar electrode. Since each semiconductor element can be connected in parallel via a sufficiently short path such as a bus bar electrode, for example, the length dimension of the current path to the power supply and each semiconductor element can be made substantially equal, and each current path can be It is possible to eliminate the current concentration due to the difference in parasitic inductance.

According to the thirteenth aspect of the present invention, the semiconductor element may form a part of a three-phase inverter circuit or an H bridge circuit.

According to the fourteenth aspect of the present invention, the semiconductor element may be composed of a MOS transistor or an insulated gate bipolar transistor.

[0030]

DETAILED DESCRIPTION OF THE INVENTION A semiconductor device according to an embodiment of the present invention will be described in detail below with reference to the accompanying drawings.

First, FIGS. 1 and 2 show a first embodiment of the present invention. In the drawings, reference numeral 1 is a base plate made of a conductive metal material such as copper, and the base plate 1 is a substantially rectangular flat plate. It is formed into a shape. A ceramic substrate 2, an insulating substrate 6 and the like, which will be described later, are attached to the surface 1A of the base plate 1. On the other hand, the back surface 1B of the base plate 1 is provided with a heat dissipation mechanism (not shown) such as a heat dissipation fin.

Reference numeral 2 denotes an insulative ceramic substrate provided on the surface 1A of the base plate 1. The ceramic substrate 2 is formed of a material having a low thermal resistance and a high thermal conductivity, such as aluminum nitride, into a substantially rectangular flat plate shape. ,
A metal thin film 2A made of a metal material on its front and back surfaces,
2B is formed over the entire surface, for example. Then, the ceramic substrate 2 has the metal thin film 2B on the back surface thereof solder 3
Is bonded to the surface 1A of the base plate 1 by using.

Reference numeral 4 denotes a MOSFET provided on the surface of the ceramic substrate 2 as a semiconductor element.
4 is integrally formed as, for example, a substantially quadrangular package, and the source terminal S, the drain terminal D, and
The gate terminal G extends. The MOSFET 4 is
The back surface side is joined to the metal thin film 2A on the surface of the ceramic substrate 2 by using the solder 5. And MOSFET
The heat generated from No. 4 is transferred to the base plate 1 from the back surface side through the ceramic substrate 2.

Reference numeral 6 denotes an insulating substrate which is provided in the vicinity of the ceramic substrate 2 and is provided on the surface 1A of the base plate 1.
The insulating substrate 6 is made of, for example, an insulating resin material having a high thermal resistance such as glass epoxy resin, and its surface is made of, for example, two metal wirings 6A and 6B.
Are formed. In addition, the back surface of the insulating substrate 6 is bonded to the base plate 1 using the adhesive 7, and
The source terminal S of the MOSFET 4 is soldered to the metal wiring 6A, and the drain terminal D is soldered to the metal wiring 6B.

Reference numeral 8 is a bus bar electrode provided on the surface of the insulating substrate 6. The bus bar electrode 8 is, for example, a conductive metal plate L.
It is formed by bending into a letter shape, and one end thereof is joined to the metal wiring 6A by soldering to form a MOSFET.
4 is connected to the drain terminal D.

The semiconductor device according to the present embodiment has the above-mentioned structure, and its operation will be described below.

First, a positive voltage is input to the gate terminal G of the MOSFET 4. At this time, if the gate voltage applied to the gate terminal G rises above a predetermined threshold value, MO
The SFET 4 is turned on, and a current flows between the source terminal S and the drain terminal D.

However, in this embodiment, the ceramic substrate 2 and the insulating substrate 6 are provided on the surface 1A of the base plate 1.
And a MOSFET is provided on the surface of the ceramic substrate 2.
4, the source terminal S and the drain terminal D of the MOSFET 4 are connected to the metal wirings 6A and 6B of the insulating substrate 6, and the bus bar electrode 8 is connected to the metal wirings 6A and 6B. Since it is not necessary to provide the metal wiring on the substrate 2, the ceramic substrate 2 can be downsized. Moreover, since the insulating substrate 6 is formed using the resin material, the metal wirings 6A and 6B can be formed on the insulating substrate 6 made of an inexpensive resin material, and the manufacturing cost can be reduced.

Since the metal wirings 6A and 6B are formed on the insulating substrate 6 having a higher thermal resistance than the ceramic substrate 2,
For example, heat applied to the metal wirings 6A and 6B during soldering can be suppressed from radiating to the base plate 1 side through the insulating substrate 6, and the metal wirings 6A and 6B can be easily heated. Therefore, the metal wiring 6A, 6B
On the other hand, the source terminal S, the drain terminal D and the bus bar electrode 8 of the MOSFET 4 can be easily soldered.

On the other hand, the MOSFET 4 is the base plate 1
Since it is surface-mounted on top, the distance of the heat flow flowing from the MOSFET 4 toward the base plate 1 is short, and in addition, heat easily spreads from the surface-mounted MOSFET 4 toward the entire base plate 1. Therefore, the thermal resistance between the MOSFET 4 and the base plate 1 can be sufficiently reduced, and the heat generated in the MOSFET 4 can be radiated from the base plate 1 through the ceramic substrate 2 with a sufficiently low thermal resistance.

Next, FIG. 3 shows a semiconductor device according to a second embodiment. The feature of the present embodiment is that a metal wiring board is provided as a metal wiring on the surface of an insulating substrate. In addition, in this embodiment, the same components as those in the first embodiment are designated by the same reference numerals, and the description thereof will be omitted.

Reference numeral 11 denotes a metal wiring board as metal wiring according to the present embodiment. The metal wiring board 11 is formed of a plate body made of a conductive metal material, and has a thickness of, for example, several hundred μm to 1 m.
It has a thickness of about m. And the metal wiring board 1
1 is attached to the surface of the insulating substrate 6 by using, for example, an adhesive, the drain terminal D of the MOSFET 4 and the like are connected, and the bus bar electrode 8 is connected.

Thus, in this embodiment, it is possible to obtain the same effect as that of the first embodiment.

Here, when the metal wiring is formed on the metal foil as in the first embodiment, the thickness is several tens of μm.
Therefore, when a large current of, for example, several tens of amperes or more is passed, heat generation due to Joule loss becomes remarkable, the temperature of the entire device easily rises, and power consumption increases.

On the other hand, the metal wiring provided on the insulating substrate 6 is MO.
It is used for connecting the SFET 4 and the bus bar electrode 8 and the like, and it is not necessary to form a fine pattern. For this reason,
In the present embodiment, the metal wiring is formed using the metal wiring board 11 having a large thickness dimension of, for example, several hundreds μm to 1 mm.

As a result, the resistance of the metal wiring board 11 can be reduced as compared with the first embodiment, and the metal wiring board 1
It is possible to prevent excessive Joule heat generation in the metal wiring board 11 even when a large current flows through the wiring board 1.

Next, FIG. 4 shows a semiconductor device according to a third embodiment. The feature of the present embodiment is that the terminal hole is formed through the insulating substrate and the base plate corresponds to the terminal hole. The escape holes are provided at the positions, and the terminals of the MOSFET are inserted into these terminal holes and the escape holes. In addition, in this embodiment, the same components as those in the first embodiment are designated by the same reference numerals, and the description thereof will be omitted.

Reference numeral 21 is a terminal hole provided in the insulating substrate 6,
The terminal hole 21 is provided so as to penetrate the insulating substrate 6 including the metal wiring 6A. Here, the drain terminal D of the MOSFET 4 is bent and extended in an L shape toward the base plate 1. The insulating substrate 6 is placed in the terminal hole 21.
The drain terminal D is inserted from the front surface side to the back surface side, and the drain terminal D and the metal wiring 6A are joined by soldering.

Reference numeral 22 denotes a relief hole provided at a position corresponding to the terminal hole 21 and penetrating the base plate 1, and the relief hole 2
In order to avoid contact with the drain terminal D, the reference numeral 2 is formed with an inner diameter larger than that of the terminal hole 21, communicates with the terminal hole 21, and the tip of the drain terminal D is inserted.

In this way, also in this embodiment, it is possible to obtain the same effect as that of the first embodiment.

However, in this embodiment, the insulating substrate 6 is provided with the terminal hole 21 penetrating therethrough, and the base plate 1 is provided with the escape hole 22 at a position corresponding to the terminal hole 21.
The terminals of the MOSFET 4 are these terminal holes 21 and the relief holes 2
Since the drain terminal D of the MOSFET 4 is inserted into the terminal hole 21 of the insulating substrate 6 and the escape hole 22 of the base plate 1,
Positioning can be facilitated when the 4 is soldered and mounted on the ceramic substrate 2 side.

Since the inner diameter of the relief hole 22 provided in the base plate 1 is larger than that of the terminal hole 21, the drain terminal D and the like do not come into contact with the base plate 1 and the terminals of the MOSFET 4 and the base plate 1 are not in contact with each other. It is possible to prevent electrical short circuit between and, and improve reliability.

Next, FIG. 5 shows a semiconductor device according to a fourth embodiment. The feature of the present embodiment is that the insulating substrate is provided with a terminal hole and the terminals of the MOSFET are directed in a direction away from the base plate. In this configuration, the terminal is inserted into the terminal hole and the insulating substrate is arranged at a position separated from the base plate. In addition, in this embodiment, the same components as those in the first embodiment are designated by the same reference numerals, and the description thereof will be omitted.

Reference numeral 31 is a terminal hole provided in the insulating substrate 6,
The terminal hole 31 is provided so as to penetrate the insulating substrate 6 including the metal wiring 6A. Here, the drain terminal D of the MOSFET 4 is bent and extends in an L shape in a direction away from the base plate 1. And the terminal hole 31
The drain terminal D is inserted from the rear surface side to the front surface side of the insulating substrate 6, and the drain terminal D and the metal wiring 6A are joined by soldering.

As a result, the insulating substrate 6 is arranged at a position separated from the base plate 1, and the insulating substrate 6 and the ceramics substrate 2 are in a state of partially overlapping each other. A spacer 32 that supports the insulating substrate 6 may be provided between the insulating substrate 6 and the base plate 1.

Thus, in this embodiment, it is possible to obtain the same effect as that of the first embodiment.

However, in the present embodiment, the insulating substrate 6 is provided with the terminal holes 31, the terminals of the MOSFET 4 are extended in the direction away from the base plate 1, and the terminals are inserted into the terminal holes 31 so that the insulating substrate 6 is inserted into the base plate. Since it is arranged at a position separated from 1, the insulating substrate 6 can be arranged so as to be superposed on the ceramic substrate 2, and the entire semiconductor device can be downsized.

Since the insulating substrate 6 does not come into direct contact with the base plate 1, the metal wiring 6A of the insulating substrate 6 is used.
When the terminals of the MOSFET 4 are soldered, the metal wiring 6A can be easily heated without radiating heat through the base plate 1, and the terminals of the MOSFET 4 can be easily soldered.

Next, FIGS. 6 to 8 show a semiconductor device according to a fifth embodiment. The feature of this embodiment is that two MOSFEs connected in series with each other are provided on a base plate.
It is a structure in which T is mounted and a pair of bus bar electrodes connected to each MOSFET are arranged so as to face each other so that currents in opposite directions may flow. In this embodiment, the same components as those in the first embodiment are designated by the same reference numerals,
The description will be omitted.

Reference numeral 41 is a base plate made of a conductive metal material, and the base plate 41 is formed in a substantially rectangular flat plate shape. In addition, the surface 41 of the base plate 41
Two ceramic substrates 2 and one insulating substrate 42 described later are attached to A, and MOSFETs 4 are attached to the two ceramic substrates 2, respectively. On the other hand, the back surface 41B of the base plate 41 is provided with a heat dissipation mechanism (not shown) such as a heat dissipation fin.

Reference numeral 42 denotes an insulating substrate located between the two ceramic substrates 2 and provided on the surface 41A of the base plate 41. The insulating substrate 42 is made of a resin material having a high thermal resistance such as glass epoxy resin. , Its surface is made of metal foil, for example, three metal wirings 42A,
42B and 42C are formed. And the metal wiring 4
2A and 42B are arranged separately from each other on the left and right, and the metal wiring 4
2C is separated from the metal wirings 42A and 42B in the front and rear directions and extends in the left and right directions.

The back surface of the insulating substrate 42 is bonded to the base plate 41 with an adhesive 43. The source terminal S of one MOSFET 4 is soldered to the metal wiring 42A, and the other M is connected to the metal wiring 42B.
The drain terminal D of the OSFET 4 is soldered, and the drain terminal D of one MOSFET 4 and the source terminal S of the other MOSFET 4 are soldered to the metal wiring 42C.

44 and 45 are a pair of bus bar electrodes provided on the surface of the insulating substrate 42. These bus bar electrodes 44 and 4 are provided.
5 is formed, for example, by bending a metal plate into an L shape, and one end thereof is joined to the metal wirings 42A and 42B by soldering. Further, the two bus bar electrodes 44 and 45 are arranged to face each other, and
They extend parallel to each other with a slight gap therebetween.

The bus bar electrodes 44 and 45 respectively constitute a high potential voltage side bus bar electrode connected to a driving power source (not shown) and a low potential voltage side bus bar electrode connected to the ground, respectively. The metal wiring 42C is connected to an output terminal (not shown). This allows the MOSFE
When T4 enters a transitional state in which switching is performed, currents flowing in opposite directions flow through the bus bar electrodes 44 and 45.

In this way, also in this embodiment, it is possible to obtain the same operational effects as in the first embodiment.

However, in the present embodiment, since the pair of bus bar electrodes 44 and 45 are arranged so as to face each other so that currents in opposite directions flow, the magnetic field formed around the bus bar electrode 44 and the bus bar electrode 45. Can be generated in the opposite direction to the magnetic field formed around the. Therefore, since the magnetic fields of the bus bar electrodes 44 and 45 can be canceled out, the parasitic inductance of the bus bar electrodes 44 and 45 can be reduced,
The surge voltage at the time of driving the MOSFET 4 can be reduced. As a result, damage to the MOSFET 4 and the like due to the surge voltage can be prevented and reliability can be improved.

Further, since the two MOSFETs 4 can be arranged at the positions opposed to each other with the insulating substrate 42 interposed therebetween without impairing the heat dissipation characteristic, the parasitic inductance can be further reduced.

In the fifth embodiment, the insulating substrate 4
2 is adhered to the surface 41A of the base plate 41, but as in the first modification shown in FIG. 9, the insulating substrate 42 is arranged apart from the base plate 41 as in the fourth embodiment. Good.

In this case, the insulating substrate 42 is provided with a penetrating terminal hole 46, and the insulating substrate 42 is formed in the terminal hole 46.
The terminals of the MOSFET 4 are inserted from the back surface side to the front surface side. As a result, it is possible to obtain the same effects as those of the fourth embodiment. The insulating substrate 42
A spacer 47 may be provided between the base plate 41 and the base plate 41.

Next, FIGS. 10 and 11 show a semiconductor device according to a sixth embodiment, and the features of this embodiment are as follows.
Two MOSs connected in series on the base plate
The FET is mounted, a pair of bus bar electrodes connected to each MOSFET are arranged so as to face each other so that currents in opposite directions flow, and a capacitor is connected to the pair of bus bar electrodes. . In addition, in this embodiment, the same components as those in the first embodiment are designated by the same reference numerals, and the description thereof will be omitted.

Reference numeral 51 is a base plate made of a conductive metal material, and the base plate 51 is formed in a substantially rectangular flat plate shape. In addition, the surface 51 of the base plate 51
Two ceramic substrates 2 and one insulating substrate 52 described later are attached to A, and MOSFETs 4 are attached to the two ceramic substrates 2 respectively. On the other hand, the back surface 51B of the base plate 51 is provided with a heat dissipation mechanism (not shown) such as a heat dissipation fin.

Reference numeral 52 denotes an insulating substrate located between the two ceramic substrates 2 and provided on the surface 51A of the base plate 51. The insulating substrate 52 is made of a resin material having a high thermal resistance such as glass epoxy resin. , Its surface is made of metal foil, for example, three metal wirings 52A,
52B and 52C are formed.

The back surface of the insulating substrate 52 is bonded to the base plate 51 with an adhesive 53. The source terminal S of one MOSFET 4 is soldered to the metal wiring 52A, and the other M is connected to the metal wiring 52B.
The drain terminal D of the OSFET 4 is soldered, and the drain terminal D of one MOSFET 4 and the source terminal S of the other MOSFET 4 are soldered to the metal wiring 52C. As a result, the two MOSFETs 4 are connected in series with each other.

54 and 55 are a pair of bus bar electrodes provided on the surface of the insulating substrate 52. These bus bar electrodes 54 and 5 are provided.
5 is formed, for example, by bending a metal plate into an L shape, and one end thereof is joined to the metal wirings 52A and 52B by soldering. Further, the two bus bar electrodes 54 and 55 are arranged to face each other, and
They extend parallel to each other with a slight gap therebetween.

The bus bar electrodes 54 and 55 respectively constitute a high potential voltage side bus bar electrode and a low potential voltage side bus bar electrode. The metal wiring 52C is connected to an output terminal (not shown). As a result, when the MOSFET 4 is in the transition state in which the switching operation is performed, currents flowing in opposite directions to each other flow in the bus bar electrodes 54 and 55.

Reference numeral 56 denotes a capacitor connected to the pair of bus bar electrodes 54 and 55. In the capacitor 56, the bus bar electrodes 54 and 55 stand up in an L shape and are connected to the site by soldering or the like. The capacitor 56 is a MOS
The FET 4 functions as a power supply capacitor when the FET 4 is switched between the ON state and the OFF state.

Thus, in this embodiment, the same effect as that of the first embodiment can be obtained, and the pair of bus bar electrodes 54, 55 are arranged so as to face each other so that currents in opposite directions flow. Therefore, the parasitic inductance of the bus bar electrodes 54 and 55 can be reduced as in the fifth embodiment.

Further, in this embodiment, since the capacitor 56 is connected to the pair of bus bar electrodes 54 and 55, the MOS
A capacitor 56 can be connected near the FET4. Therefore, the distance between the MOSFET 4 and the capacitor 56 can be shortened. For example, as compared with the case where the capacitor 57 is connected to the outside as in the comparative example shown by the broken line in FIG. It is possible to reduce the parasitic inductance generated in the.

Further, since the capacitor 56 is mounted on the portion where the bus bar electrodes 54, 55 rise, the capacitor 56 can be attached without impairing the integration degree of the semiconductor device. In particular, the capacitor 5 is previously attached to the bus bar electrodes 54 and 55.
6 is mounted, the bus bar electrodes 54 and 55 are attached to the insulating substrate 52.
By mounting on top, the capacitor 56 can be easily connected to the portion where the bus bar electrodes 54 and 55 stand.

Although the capacitor 56 is directly attached to the bus bar electrodes 54 and 55 in the sixth embodiment, the insulating substrate 52 is indicated by a chain double-dashed line in FIG.
The capacitor 56 'may be indirectly connected via the metal wirings 52A and 52B. As a result, the capacitor 56 'can be connected to a portion closer to the MOSFET 4, so that the parasitic inductance can be further reduced.

Next, FIGS. 12 and 13 show a semiconductor device according to the seventh embodiment, and the features of this embodiment are as follows.
The two ceramic substrates are mounted on the base plate, a plurality of MOSFETs connected in parallel are provided on each ceramic substrate, and the terminals of these MOSFETs are connected to a pair of bus bar electrodes. In addition, in this embodiment, the same components as those in the first embodiment are designated by the same reference numerals, and the description thereof will be omitted.

Reference numeral 61 is a base plate made of a conductive metal material, and the base plate 61 is formed in a substantially rectangular flat plate shape. Further, on the surface of the base plate 61, two ceramic substrates 62 and one insulating substrate 63 are provided.
Etc. are installed.

The two ceramic substrates 62 are
The left and right are spaced apart from each other, and are joined to the base plate 61 by soldering similarly to the ceramics substrate 2 of the first embodiment. Further, two MOSFETs 4 are attached to the surface of each of the ceramics substrates 62 so as to be spaced apart from each other at the front and the rear.

The insulating substrate 63 is located between the two ceramic substrates 62, and the base plate 6 is formed by using an adhesive.
1, and six metal wirings 63A to 63F made of a metal foil are formed on the surface thereof. here,
The metal wirings 63A, 63B, 63D, 63E are spaced apart from each other on the left and right sides, and the metal wirings 63C, 63F are arranged on the left and right sides, respectively.

MO is applied to the metal wirings 63A to 63F.
The source terminal S or the drain terminal D of the SFET4 is joined by soldering, and the four MOSFETs 4 in total are
As shown in FIG. 13, an H bridge circuit is configured as a whole.

Reference numerals 64 and 65 denote a pair of bus bar electrodes provided on the surface of the insulating substrate 63. These bus bar electrodes 64 and 6 are provided.
5 is formed by, for example, bending a metal plate into an L shape, extends forward and backward, and has terminal portions 64A and 65A branched leftward and rightward.
The terminal portions 64A and 65A are connected to the metal wirings 63A and 63A.
B, 63D, and 63E are joined by soldering, respectively. Further, the two bus bar electrodes 64, 65 are arranged so as to face each other, and extend in parallel in a state of being close to each other with a slight gap.

The bus bar electrodes 64 and 65 respectively constitute, for example, a high potential voltage side bus bar electrode connected to a driving power source (not shown) and a low potential voltage side bus bar electrode connected to ground. Also, the metal wiring 63C, 63F
Is connected to an output terminal (not shown). This makes M
When the OSFET 4 is in a transition state in which it performs a switching operation, currents flowing in opposite directions flow through the bus bar electrodes 64 and 65.

In this way, also in this embodiment, it is possible to obtain the same effects as those of the first embodiment. Further, since the pair of bus bar electrodes 64 and 65 are arranged so as to face each other so that currents in opposite directions flow to each other, the parasitic inductance of the bus bar electrodes 64 and 65 can be reduced as in the fifth embodiment, and the MOSFET 4 drive. The surge voltage at the time can be reduced.

Further, in the present embodiment, a plurality of MOSFETs 4 are provided on the ceramic substrate 62 and the plurality of M
The metal wiring 63A, the terminals of the OSFET 4 are connected to the plurality of terminal portions 64A, 65A formed on the bus bar electrodes 64, 65.
Since the connection is made via 63B, 63D, 63E, it is possible to easily connect the plurality of MOSFETs 4 via the bus bar electrodes 64, 65 on the insulating substrate 63. Each MOSFET 4 has a bus bar electrode 64, 65.
Since it can be connected via a sufficiently short path such as, for example, the length dimension of the current path to the power supply and each MOSFET 4 can be made substantially equal, and the current concentration due to the parasitic inductance difference for each current path can be eliminated. You can

Further, the MOSFE mounted on the package
The terminal arrangement of T4 is predetermined. On the other hand, in the present embodiment, the metal wirings 63A, 63B, 63D, 6
3E only connects the terminals of the MOSFET 4 and the bus bar electrodes 64 and 65 by the shortest path, and the parallel connection itself is made by the bus bar electrodes 64 and 65 extending in the front and rear directions. For this reason, MOSFETs whose terminal arrangement is defined
Even if 4 is used, parallel connection can be easily performed with low inductance.

Further, the bus bar electrodes 64 and 65 are made of metal wiring 6.
By being insulated from 3C and 63F, the bus bar electrode 6
Since the MOSFETs 4 and 65 are connected in parallel, the metal wirings 63A to 63F do not intersect each other. Therefore, it is not necessary to use a multilayer wiring board structure,
The manufacturing cost can be reduced.

In the seventh embodiment, the case where the H bridge circuit using the four MOSFETs 4 is configured as the semiconductor device has been described as an example, but in the second modification shown in FIG. Bus bar electrodes 64 'and 65' having terminal portions 64A 'and 65A'.
You may comprise the three-phase inverter connected by.

In this case, the corresponding terminals of the high-side arm and the low-side arm can also be connected in the shortest path by using the metal wiring. Therefore, the parasitic inductance around the terminals can be reduced, the surge voltage generated by the parasitic inductance during the operation of the inverter circuit can be further reduced, and the entire device can be stably operated.

Here, in the seventh embodiment, in the H-bridge circuit or the three-phase inverter circuit, one MOSFET 4 is connected to each arm. On the other hand, when a plurality of MOSFETs 4 are connected in parallel to each arm, for example, two MOSFETs 4 are connected in parallel, the configuration is as follows.

In FIG. 12, metal wirings 63C and 63F are provided.
Are connected to the same output terminal (not shown), the MOSFETs 4 which are spaced apart from each other are electrically connected in parallel. The MOSFETs 4 connected in parallel form each arm of the H-bridge circuit or the three-phase inverter circuit.

In this case, in addition to the effect described in the seventh embodiment, the following effect can be obtained. First, the terminals of the MOSFETs 4 connected in parallel have bus bar electrodes 64, 65.
And an output terminal (not shown). Further, since the metal wirings 63A to 63F formed by the parallel connection do not intersect with each other, it is not necessary to use an expensive multilayer substrate as the insulating substrate 63.

Second, the terminal 64 of the bus bar electrodes 64, 65
Since the currents are respectively supplied from A and 65A, the currents flowing through the plurality of MOSFETs 4 can be made substantially uniform. Therefore, it is possible to prevent damage to the device due to current concentration in the specific MOSFET 4 and the like, and to improve reliability.

In the first to seventh embodiments, the metal thin films 2A and 2B are formed on both surfaces of the ceramic substrate 2, and the ceramic substrate 2 and the base plate 1 or the MOSFET 4 are joined by soldering. And However, the present invention is not limited to this, and for example, FIG.
It is also possible to use a ceramics substrate 71 from which the metal thin film is omitted as in the third modified example shown in, and to bond the ceramics substrate 71 to the base plate 1 and the MOSFET 4 with an adhesive 72. As a result, the ceramic substrate 71, the base plate 1, the MO
The thermal strain between the SFET 4 and the SFET 4 can be absorbed, and the reliability and durability can be improved. It should be noted that one of the both surfaces of the ceramic substrate may be joined by soldering and the other surface may be bonded.

Further, in the first to seventh embodiments, the MOSFET 4 is directly joined to the surface of the ceramic substrate 2. However, the present invention is not limited to this, and a metal plate 82 is provided between the ceramic substrate 81 and the MOSFET 4 as in the fourth modification shown in FIG. 16, for example.
May be interposed.

In this case, the ceramics substrate 81, the base plate 1 and the metal plate 82 are joined by using an adhesive 83, for example, and the metal plate 82 and the MOSFET 4 are joined by solder 84.

With this, the MOSFET 4 can be joined to the metal plate 82 having high thermal conductivity, so that the metal plate 8
2 can be used as a heat spreader. Therefore, the heat of the MOSFET 4 can be diffused by the metal plate 82 and transferred to the ceramic plate 81 and the base plate 1, and the transient temperature rise of the MOSFET 4 can be absorbed by the metal plate 82.

Further, in each of the above-mentioned embodiments, the wiring connected to the gate terminal of the MOSFET 4 is not shown on the insulating substrates 6, 42, 52 and 63. On the other hand, on this insulating substrate, a wiring connected to the gate terminal of the MOSFET and a wiring connected to the source terminal as a reference of the gate potential are provided, and these two wirings are connected to the MOSF.
Even if the configuration is such that it is connected to the pre-drive circuit that drives ET, all the effects described above are produced.

In each of the above embodiments, the MOSFET 4 is used as the semiconductor element.
A structure using a T, a bipolar transistor, or a static induction transistor (SIT) may be used.

[0104]

As described in detail above, according to the invention of claim 1, a ceramic substrate and an insulating substrate are provided on the surface of the base plate, and the terminals of the semiconductor element provided on the surface of the ceramic substrate are insulated substrates. It is not necessary to provide the metal wiring on the ceramics substrate, because the metal wiring is connected to the bus bar electrode.
The ceramic substrate can be downsized, and the manufacturing cost can be reduced. Further, since the metal wiring can be formed on the insulating substrate having a high thermal resistance, the terminals of the semiconductor element and the bus bar electrodes can be easily soldered to the metal wiring, and the workability can be improved. further,
Since the semiconductor element is mounted on the base plate, the heat of the semiconductor element can be radiated with a sufficiently low thermal resistance.

According to the invention of claim 2, a plurality of ceramic substrates are provided on the surface of the base plate, and
An insulating substrate having a plurality of metal wirings on its surface is provided, and a semiconductor element mounted in a package is provided on the surface of each ceramic substrate, and terminals of each semiconductor element are respectively provided on the plurality of metal wirings of the insulating substrate. Since the bus bar electrodes are connected to the respective metal wirings in addition to the connection, the semiconductor elements respectively provided on the plurality of ceramic substrates can be connected using the metal wirings or the bus bar electrodes on the insulating substrate. Further, it is not necessary to provide metal wiring on the ceramic substrate, and the ceramic substrate can be downsized. Furthermore, since the metal wiring can be formed on the insulating substrate having high thermal resistance, the terminals of the semiconductor element and the bus bar electrodes can be easily soldered to the metal wiring.

According to the third aspect of the invention, the pair of bus bar electrodes among the plurality of bus bar electrodes are arranged so as to face each other so that the directions of the currents are opposite to each other. Therefore, they are formed on the respective bus bar electrodes. It is possible to cancel the magnetic field that occurs, reduce the parasitic inductance of the bus bar electrode, and reduce the surge voltage generated when the semiconductor element is driven.

According to the invention of claim 4, a capacitor is connected between the pair of bus bar electrodes either directly or indirectly via a metal wiring. Therefore, as compared with connecting the capacitor to an external circuit. The capacitor can be arranged near the semiconductor element, and the parasitic inductance generated by the bus bar electrode, the wiring of the external circuit, or the like can be reduced between the semiconductor element and the capacitor.

According to the invention of claim 5, the ceramic substrate and the semiconductor element are joined together by using solder or adhesive,
The ceramic substrate and the base plate may be joined together by using solder or an adhesive.

According to the invention of claim 6, since the metal plate is interposed between the ceramic substrate and the semiconductor element, the semiconductor element can be bonded to the metal plate having high thermal conductivity. The plate can be used as a heat spreader. Therefore, the heat of the semiconductor element can be diffused by the metal plate and transferred to the ceramic plate and the base plate, and the transient temperature rise of the semiconductor element can be absorbed by the metal plate.

According to the invention of claim 7, since the insulating substrate is formed by using the resin material, the metal wiring can be formed on the insulating substrate made of the inexpensive resin material, and the manufacturing cost can be reduced. . Further, since the insulating substrate can have a higher thermal resistance than the ceramic substrate, the metal wiring of the insulating substrate can be easily soldered.

As in the eighth aspect of the invention, the insulating substrate may be bonded to the base plate using an adhesive.

According to the ninth aspect of the invention, since the metal wiring provided on the surface of the insulating substrate is formed by using a metal wiring board made of a conductive metal material, a metal wiring board having a large thickness dimension is used. The metal wiring can be formed, and the resistance of the metal wiring can be reduced. Therefore, even when a large current flows through the metal wiring, it is possible to prevent excessive Joule heat generation in the metal wiring.

According to the tenth aspect of the present invention, the insulating substrate is provided with the terminal hole, and the base plate is provided with the escape hole at a position corresponding to the terminal hole so that the terminal of the semiconductor element is inserted into the terminal hole and the escape hole. With this configuration, the terminals of the semiconductor element can be inserted into the terminal holes of the insulating substrate and the relief holes of the base plate, and the alignment can be facilitated when the semiconductor element is soldered and mounted on the ceramic substrate side.

According to the eleventh aspect of the present invention, the insulating substrate is provided with the terminal holes, the terminals of the semiconductor element are inserted into the terminal holes, and the insulating substrate is arranged at a position separated from the base plate. The insulating substrate can be placed so as to be superposed on the substrate, and the entire semiconductor device can be downsized. Further, since the insulating substrate does not come into direct contact with the base plate, the metal wiring can be easily heated without radiating heat through the base plate when soldering to the metal wiring of the insulating substrate.

According to the twelfth aspect of the present invention, a plurality of semiconductor elements are electrically provided in parallel on the ceramic substrate, and terminals of the plurality of semiconductor elements are connected to the plurality of terminal portions formed on the bus bar electrodes with metal wiring. Since it is configured to be connected via the, it is possible to easily connect a plurality of semiconductor elements from the metal wiring on the insulating substrate via the bus bar electrode. Since each semiconductor element can be connected in parallel via a sufficiently short path such as a bus bar electrode, for example, the length dimension of the current path to the power supply and each semiconductor element can be made substantially equal, and each current path can be It is possible to eliminate the current concentration due to the difference in parasitic inductance.

According to the thirteenth aspect of the present invention, the semiconductor element may form a part of a three-phase inverter or an H bridge circuit.

According to the fourteenth aspect of the present invention, the semiconductor element may be composed of a MOS transistor or an insulated gate bipolar transistor.

[Brief description of drawings]

FIG. 1 is a plan view showing a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view of the semiconductor device as viewed in the direction of arrows II-II in FIG.

FIG. 3 is a sectional view of the semiconductor device according to the second embodiment seen from the same position as in FIG.

FIG. 4 is a sectional view of the semiconductor device according to the third embodiment seen from the same position as in FIG.

5 is a cross-sectional view of the semiconductor device according to the fourth embodiment seen from the same position as in FIG.

FIG. 6 is a plan view showing a semiconductor device according to a fifth embodiment.

7 is a cross-sectional view of the semiconductor device as seen from the direction of arrows VII-VII in FIG.

FIG. 8 is an electric circuit diagram showing a semiconductor device according to a fifth embodiment.

FIG. 9 is a cross-sectional view showing a semiconductor device according to a first modification, viewed from the same position as in FIG. 7.

FIG. 10 is a sectional view showing a semiconductor device according to a sixth embodiment as seen from the same position as in FIG.

FIG. 11 is an electric circuit diagram showing a semiconductor device according to a sixth embodiment.

FIG. 12 is a plan view showing a semiconductor device according to a seventh embodiment.

FIG. 13 is an electric circuit diagram showing a semiconductor device according to a seventh embodiment.

FIG. 14 is an electric circuit diagram showing a three-phase inverter as a semiconductor device according to a second modification.

FIG. 15 is a sectional view of a semiconductor device according to a third modification seen from the same position as in FIG.

16 is a cross-sectional view of a semiconductor device according to a fourth modification as seen from the same position as in FIG.

[Explanation of symbols]

1, 41, 51, 61 Base plates 2, 62, 71, 81 Ceramics substrate 4 MOSFET (semiconductor element) 6, 42, 52, 63 Insulating substrates 6A, 6B, 42A to 42C, 52A to 52C, 63A
~ 63F metal wiring 8,44,45,54,55,64,64 ', 65,6
5'Bus bar electrode 64A, 64A ', 65A, 65A' Terminal portion 11 Metal wiring board 21, 31, 46 Terminal hole 22 Relief hole 82 Metal plate

Claims (14)

[Claims] 1. A base plate made of a metal material is provided, a ceramic substrate and an insulating substrate having a metal wiring on the surface thereof are provided on the surface of the base plate, and a package is mounted on the surface of the ceramic substrate. A semiconductor device in which a semiconductor element is provided, a terminal of the semiconductor element is connected to a metal wiring of the insulating substrate, and the metal wiring is connected to a bus bar electrode. 2. A base plate made of a metal material is provided, and a plurality of ceramic substrates are provided on the surface of the base plate, and an insulating substrate having a plurality of metal wirings is provided on the surface of each of the ceramic substrates. A semiconductor device in which semiconductor elements mounted on a package are provided, terminals of the semiconductor elements are respectively connected to a plurality of metal wirings of the insulating substrate, and the metal wirings are respectively connected to bus bar electrodes. 3. The semiconductor device according to claim 2, wherein a pair of bus bar electrodes among the plurality of bus bar electrodes are arranged so as to face each other so that the directions of current flow are opposite to each other. 4. The semiconductor device according to claim 3, wherein a capacitor is connected between the pair of bus bar electrodes either directly or indirectly via the metal wiring. 5. A metal thin film is formed on the surface of the ceramic substrate, the semiconductor element is bonded to the metal thin film by soldering, or the semiconductor element is bonded to the surface of the ceramic substrate by using an adhesive. Bonding, forming a metal thin film on the back surface of the ceramic substrate, and bonding the base plate to the metal thin film using solder,
5. The semiconductor device according to claim 1, wherein the base plate is bonded to the back surface of the ceramic substrate with an adhesive. 6. A structure in which a metal plate is interposed between the ceramic substrate and the semiconductor element.
The semiconductor device according to 2, 3, 4 or 5. 7. The semiconductor device according to claim 1, wherein the insulating substrate is made of a resin material. 8. The structure according to claim 1, wherein the insulating substrate is bonded to the base plate with an adhesive.
The semiconductor device according to 2, 3, 4, 5, 6 or 7. 9. The metal wiring is formed by using a metal wiring board made of a conductive metal material.
The semiconductor device according to 4, 5, 6, 7 or 8. 10. A terminal hole for mounting a terminal of the semiconductor element is formed through the insulating substrate including the metal wiring, and a terminal of the semiconductor element is provided at a position corresponding to the terminal hole in the base plate. The escape hole for escape is provided, and the terminal of the semiconductor element is configured to be inserted into the terminal hole and the escape hole.
8. The semiconductor device according to 8 or 9. 11. A terminal hole for mounting a terminal of the semiconductor element is provided through the insulating substrate including the metal wiring, and the terminal of the semiconductor element extends in a direction away from the base plate, The structure in which the insulating substrate is inserted into the terminal hole and arranged at a position separated from the base plate.
Alternatively, the semiconductor device according to item 9. 12. A plurality of semiconductor elements are electrically provided in parallel on the ceramic substrate, and terminals of the plurality of semiconductor elements are connected to a plurality of terminal portions formed on the bus bar electrode via the metal wiring. Claims 1, 2, 3, 4, 5, 6, 7, 8, which are configured to
The semiconductor device according to 9, 10, or 11. 13. The semiconductor element constitutes a part of a three-phase inverter circuit or an H-bridge circuit, and the semiconductor element is provided in any one of claims 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, or 12. The semiconductor device according to item 12. 14. The semiconductor device is a MOS transistor or an insulated gate bipolar transistor, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 1.
The semiconductor device according to 1, 12, or 13.