JP2002093965A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the heat radiability of a semiconductor element and reduce the manufacturing cost. SOLUTION: A flexible board 2 is mounted on the surface of a first metal plate 1, a second metal plate 3 is mounted on the flexible board 2 surface, an IGBT 4 is mounted on the second metal plate 3 surface, and a gate resistance 7 connected to a metal foil 2B for forming a wiring pattern is mounted on the flexible board 2 surface. The IGBT 4 has a collector terminal connected to the second metal plate 3 on the backside, a gate terminal connected to the gate resistance 7 on the front side, and an emitter terminal connected to the first metal plate 1. Thus heat in the IGBT 4 transfers from the second metal plate 3 to the first metal plate 1 via the flexible board 2, thereby radiating heat.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an insulated gate bipolar transistor (hereinafter referred to as IGBT) formed on a metal plate for heat radiation.
) Or MOS transistor (hereinafter, MOSFE)
T) is mounted on a semiconductor device mounted with a semiconductor element which handles large power.

[0002]

2. Description of the Related Art In general, a power module such as an inverter used for motor control is known as a semiconductor device (for example, Japanese Patent Application Laid-Open No. 5-29492). And
In such a conventional semiconductor device, a ceramic substrate made of aluminum nitride or the like is mounted on a substrate made of a conductive metal material such as copper using a joining means such as soldering, and an IGBT or the like is mounted on the ceramic substrate. A semiconductor element is mounted.

When a semiconductor device operates,
The heat generated by the semiconductor element is transmitted to a substrate made of a metal material through a ceramic substrate having high thermal conductivity. At this time, heat from the semiconductor element is radiated by providing the substrate with a cooling fin or a cooling mechanism for flowing cooling water or the like.

[0004]

In the above-mentioned prior art, the ceramic substrate and the substrate made of a metal material have different coefficients of thermal expansion. For this reason, when the semiconductor element generates heat, thermal expansion mismatch occurs between the ceramic substrate and the substrate, so that a large thermal stress is applied to the solder or the like that joins them, and cracks may occur, There is a problem that the crack increases the thermal resistance of the heat radiation path.

Further, aluminum nitride or the like having high thermal conductivity is used for the ceramic substrate. However, since such a ceramic substrate is expensive, there is a problem that the manufacturing cost is increased.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems of the prior art, and an object of the present invention is to provide a semiconductor device capable of improving heat dissipation of a semiconductor element and reducing manufacturing costs. .

[0007]

In order to solve the above-mentioned problems, a first aspect of the present invention is to provide a flexible substrate made of an organic thin insulating layer on a first metal plate and a second metal on the flexible substrate. A semiconductor element that handles high power while electrically connected to the second metal plate is mounted on a surface of the second metal plate, and the first metal plate is connected to a high potential terminal or The second metal plate is connected to a high-potential terminal, a low-potential terminal, or an output terminal while being connected to a low-potential terminal.

[0008] With this configuration, the semiconductor element serving as a heat source can be directly joined to the second metal plate having a large area. For this reason, the heat dissipation of the semiconductor element can be improved, and the temperature rise of the semiconductor element can be suppressed even for transient heat generation due to a transient current or the like.

Further, since a collector, a drain and the like formed on the back surface of the semiconductor element can be directly connected to the second metal plate serving as a current path, it is not necessary to perform wire bonding, and the operation process is simplified. And the wiring can be reduced in inductance.

Further, since the first and second metal plates serving as a reciprocating current path are overlapped with a thin flexible board interposed therebetween, the mutual magnetic fields can be surely canceled by the current flowing in the opposite direction. And the inductance of the reciprocating current path can be reduced. Further, since a flexible substrate made of an organic thin insulating layer is provided between the first and second metal plates, a capacitance component is formed between the first and second metal plates connected to the high potential terminal and the low potential terminal, respectively. And the surge voltage can be suppressed by the capacitance component.

Further, since a flexible substrate which is less expensive than the ceramic substrate is used, the manufacturing cost can be reduced. Furthermore, since a flexible substrate having excellent flexibility is inserted between the first and second metal plates, even when thermal stress occurs, the thermal stress can be reduced by the flexible substrate. For this reason, cracks and the like do not occur at the joint between the first and second metal plates and the flexible substrate, and the thermal resistance between them can be maintained at a constant value, and the reliability and durability can be improved. Can be improved.

According to a second aspect of the present invention, a wiring pattern connected to the semiconductor element is formed on a portion of the flexible substrate other than a region where the second metal plate is provided, or mounting of the electronic element is performed. Configuration.

Thus, the electronic element can be mounted on the first metal plate at a constant potential via the thin flexible substrate. Therefore, the potential around the electronic element can be stabilized, the influence of switching noise of the semiconductor element can be prevented, and the operation can be stabilized.
In addition, since the wiring pattern is provided on the flexible substrate and the electronic element is provided on a portion of the flexible substrate other than the portion where the second metal plate is attached, the manufacturing process of the wiring pattern can be simplified, and additional wiring can be achieved. This eliminates the need for a mounting space such as that described above, and can reduce the size of the device.

According to a third aspect of the present invention, the flexible substrate between the first metal plate and the second metal plate has only a base film made of an organic thin insulating layer, or the base film in addition to the base film. Another flexible substrate having a configuration different from the flexible substrate is provided on a portion of the first metal plate other than the region where the flexible substrate is provided, wherein the flexible substrate has a configuration having a metal thin film on at least one of the front surface and the back surface of the film. Provided, on the other flexible substrate to form a wiring pattern connected to the semiconductor element,
Alternatively, the electronic device is mounted.

Thus, the thickness of the flexible substrate provided between the first and second metal plates can be reduced, so that the thermal resistance of the flexible substrate can be further reduced, and The heat dissipation of the provided semiconductor element can be improved. In addition, since the thickness of the flexible board inserted between the first and second metal plates is small, the first and second metal plates serving as two pairs of reciprocating current paths can be further brought into close contact with each other. The inductance decreases and the capacitance component increases. Therefore, the effect of suppressing the surge voltage can be further enhanced. Further, when a heat conductive metal thin film is provided on the front and back surfaces of the flexible substrate, the first and second metal plates and the flexible substrate can be joined using solder having excellent heat conductivity. it can. For this reason, the thermal resistance between the first and second metal plates can be further reduced, and the heat dissipation can be improved.

According to a fourth aspect of the present invention, the second metal plate provided on the flexible substrate is constituted by a plurality of metal bodies,
The semiconductor element is mounted as a separate semiconductor element on the surface of the plurality of metal bodies, and each of the metal bodies is a high potential terminal,
Connected to one of a low potential terminal and an output terminal, the collector or drain of each of the individual semiconductor elements is connected to a metal body on which the semiconductor element is mounted, and the emitter or source of each of the individual semiconductor elements is connected. Is electrically connected to any of the other corresponding metal bodies, and each of the separate semiconductor elements functions as an H-bridge circuit or a switching element of a three-phase inverter.

Thus, each semiconductor element can be easily connected, and the configuration of the entire circuit can be simplified. Further, since a flexible board having excellent flexibility is inserted between the plurality of metal plates serving as the first metal plate and the second metal plate, the heat generated by each semiconductor element causes the first and second metal plates to be interposed. Even if thermal stress occurs in the joint, the thermal stress can be absorbed by the flexible substrate.

According to a fifth aspect of the present invention, the first metal plate is connected to a high-potential terminal or a low-potential terminal, and the terminal electrically corresponding to the emitter or the source of each semiconductor element is connected to the first metal plate. That is, the connection is made.

Thus, the inductance between the first metal plate serving as the reciprocating current path and each metal body forming the second metal plate can be reduced, and the surge voltage can be suppressed. In addition, a plurality of metal bodies that become the second metal plate in a plane can be arranged on the first metal plate. Furthermore, since the first metal plate is connected to a low potential terminal or the like,
By using the metal plate described above, the heat dissipation base plate and the low potential electrode can be used together.

According to a sixth aspect of the present invention, an organic thin insulating layer is provided on the back surface of the first metal plate.

Thus, even when insulation with the cooling mechanism is required, the cooling mechanism can be attached to the first metal plate via the organic thin insulating layer.

Further, in the invention according to claim 7, the semiconductor element may be constituted by an insulated gate bipolar transistor or a MOS transistor.

[0023]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a semiconductor device according to an embodiment of the present invention will be described in detail with reference to FIGS.

FIGS. 1 to 4 show a first embodiment of the present invention. In the drawings, reference numeral 1 denotes a first metal plate having a substantially rectangular flat plate shape, and the metal plate 1 is made of, for example, copper or the like. Of the conductive metal material. Further, on the back surface of the first metal plate 1, a heat radiation mechanism (not shown) such as a heat radiation fin is provided.

Reference numeral 2 denotes a flexible substrate made of an organic thin insulating layer such as a polyimide resin provided on the surface of the first metal plate 1. The flexible substrate 2 has an area smaller than that of the first metal plate 1. The first metal plate 1 is formed in a substantially rectangular thin film shape, and is arranged on the center side. The flexible substrate 2 includes a base film 2A made of a polyimide resin or the like, metal foils 2B and 2C made of a conductive metal material such as copper provided on the front surface and the back surface of the base film 2A, respectively. Cover lay film 2D, 2 made of polyimide resin or the like covering foils 2B, 2C, respectively.
E.

Then, the cover lay film 2E located on the rearmost side of the flexible substrate 2 is first bonded by an adhesive.
To the metal plate 1. Also, base film 2
The metal foil 2B provided on the front surface side of A is formed in an elongated strip shape extending leftward and rightward, and forms a wiring pattern for connecting an IGBT 4 and a gate resistor 7 described later. On the other hand, the metal foil 2 provided on the back side of the base film 2A
C covers substantially the entire back surface of the base film 2A. The cover lay film 2D located on the outermost surface side of the flexible substrate 2 is provided with an opening 2F into which a gate resistor 7 to be described later is inserted corresponding to an intermediate position of the metal foil 2B extending in the left and right directions. ing.

Reference numeral 3 denotes a second metal plate disposed on the surface of the flexible substrate 2. The metal plate 3 is formed of a conductive metal material such as copper, for example, in the shape of a rectangular plate extending forward and backward. ing. The second metal plate 3 has a smaller area than the flexible substrate 2 and is attached to the surface of the flexible substrate 2 with an adhesive or the like.

Reference numeral 4 denotes an n-channel insulated gate bipolar transistor (hereinafter referred to as IGBT 4) as a semiconductor element provided on the surface of the second metal plate 3.
The IGBT 4 has one gate terminal G on its surface side.
And a plurality of emitter terminals E, and the back side thereof constitutes a collector terminal C over the entire surface. The gate terminal G of the IGBT 4 is connected to the metal foil 2B of the flexible substrate 2 via the bonding wire 5, and the emitter terminal E is connected to the first metal plate 1 via the bonding wire 6. Also, IGBT
4 is joined to the second metal plate 3 by soldering or the like.

Reference numeral 7 denotes a gate resistor as an electronic element provided on the surface of the flexible substrate 2.
Arranged in the opening 2F of the flexible substrate 2 and connected to a metal foil 2B forming wiring by soldering or the like.

The metal foil 2B has one end connected to the gate terminal G of the IGBT 4 via the gate resistor 7 and the other end connected to the input terminal. Also,
The first metal plate 1 is connected to an emitter terminal E of the IGBT 4 and to a low potential terminal such as a ground potential. Further, the second metal plate 3 is connected to the collector terminal C of the IGBT 4 and is connected to a high potential terminal having a predetermined potential or an output terminal.

The semiconductor device according to the present embodiment has the above-described configuration, and its operation will now be described.

First, a positive voltage is input to the gate terminal G of the IGBT 4 via the gate resistor 7. At this time, when the gate voltage applied to the gate terminal G rises above a predetermined threshold, the IGBT 4 is turned on and a current flows between the collector terminal C and the emitter terminal E. And
This collector current flows from the second metal plate 3 connected to the high potential terminal to the low potential terminal through the IGBT 4 and the first metal plate 1.

However, in this embodiment, since the IGBT 4 serving as a heat source is joined to the second metal plate 3 having a large area, the IGBT 4 is attached to the metal plate via a ceramic substrate or the like as in the prior art. In comparison with the above, since the heat spreads inside the second metal plate 3 and then is radiated to the radiating fins (first metal plate 1), the heat radiation of the IGBT 4 can be improved. In addition, since the IGBT 4 is directly mounted on the second metal plate 3 having a low thermal resistance and a large heat capacity, it is possible to suppress a rise in the temperature of the IGBT 4 against transient heat generation due to a transient current or the like.

Further, since the back surface of the IGBT 4 forming the collector electrode C is directly connected to the second metal plate 3 serving as a current path, it is not necessary to perform wire bonding, and the operation process can be simplified and the second process can be performed. Metal plate 3 and IGBT4
Can be reduced in inductance.

Further, while the thickness of the ceramic substrate is generally about 600 μm, the thickness of the flexible substrate 2 can be set to a small value of about 50 to 100 μm. As described above, the flexible substrate 2 whose thickness is thinner than the ceramic substrate according to the prior art.
And second metal plates 1 and 3 serving as a reciprocating current path across
Are overlapped with each other, the mutual magnetic fields can be surely canceled by the current flowing in the opposite direction, and the inductance of the reciprocating current path can be reduced.

Also, since the flexible substrate 2 made of an organic thin insulating layer is provided between the first and second metal plates 1 and 3, the first and second terminals connected to the high potential terminal and the low potential terminal, respectively. A capacitance component can be formed between the metal plates 1 and 3 described above, and the surge voltage can be suppressed by the capacitance component.

On the other hand, since the gate resistor 7 is mounted on the first metal plate 1 having a constant potential (earth potential) via the thin flexible substrate 2, the potential around the gate resistor 7 can be stabilized. Thus, the IGBT 4 is hardly affected by the switching noise, and the operation can be stabilized.

Further, in this embodiment, since an inexpensive flexible substrate 2 is used without using an expensive ceramic substrate, the manufacturing cost can be reduced. further,
Since the flexible substrate 2 having excellent flexibility is inserted between the first and second metal plates 1 and 3, the temperature of the IGBT 4 rises,
Even when the thermal stress due to the lowering occurs, the thermal stress can be reduced by the flexible substrate 2.
For this reason, cracks and the like do not occur at the joints between the first and second metal plates 1 and 3 and the flexible substrate 2, and the thermal resistance therebetween can be maintained at a constant value. Reliability and durability can be improved.

Further, the flexible substrate 2 is provided with a metal foil 2B serving as a wiring, and the gate resistance 7 is provided in a portion of the flexible substrate 2 other than the portion where the second metal plate 3 is mounted. In addition to simplifying the manufacturing process, the mounting space for additional wiring and the like is not required, and the device can be downsized. Further, since the gate resistor 7 can be easily provided in the vicinity of the gate terminal of the IGBT 4, malfunction due to switching noise can be further prevented.

FIGS. 5 to 7 show a semiconductor device according to a second embodiment. The feature of this embodiment is that a base film and a metal foil are provided between the first and second metal plates. A flexible substrate is provided, and another flexible substrate including a base film, a metal foil, and a coverlay film is provided between the gate resistor and the first metal plate. Note that, in the present embodiment, the same components as those in the first embodiment are denoted by the same reference numerals, and description thereof will be omitted.

Reference numeral 11 denotes a flexible substrate made of an organic thin insulating layer such as a polyimide resin provided on the surface of the first metal plate 1. The flexible substrate 11 has a substantially rectangular thin film extending in the front and rear directions. And is disposed on the left side of the first metal plate 1 in the left and right directions. The flexible substrate 11 includes a base film 11A made of a polyimide resin or the like, and metal foils 11B and 11C made of a conductive metal material such as copper provided on the front and back surfaces of the base film 11A. ing.

The metal foils 11B and 11C cover the front and back surfaces of the base film 11A over substantially the entire surface. The second metal plate 3 is provided on the metal foil 11B on the front side.
Are joined by soldering or the like, and the metal foil 11C on the back side is
Are joined to the first metal plate 1 by soldering or the like.

Reference numeral 12 denotes another flexible substrate provided on the surface of the first metal plate 1 at a position different from that of the first flexible substrate 11, and the flexible substrate 12 has a substantially rectangular shape extending forward and backward. And is disposed on the right side of the first metal plate 1 in the left and right directions while being separated from the first flexible substrate 11. The flexible substrate 12 is made of a base film 1 made of polyimide resin or the like.
2A and a metal foil 1 made of a conductive metal material such as copper provided on the front and back surfaces of the base film 12A, respectively.
2B and 12C, and cover lay films 12D and 12E as protective films made of polyimide resin or the like that cover the metal foils 12B and 12C, respectively.

The cover lay film 12E located on the rearmost side of the flexible substrate 12 is joined to the first metal plate 1 by an adhesive. On the other hand, the metal foil 12B provided on the front side of the base film 12A is formed in an elongated strip shape extending left and right, and forms a wiring pattern for connecting the IGBT 4 and the gate resistor 7. The metal foil 12C provided on the back surface side of the base film 12A covers substantially the entire back surface of the base film 12A. The cover lay film 12D located on the outermost surface side of the flexible substrate 12 is provided with an opening 12F into which the gate resistor 7 is inserted corresponding to an intermediate position of the metal foil 12B extending in the left and right directions. .

The metal foil 12B of the second flexible substrate 12 has one end connected to the gate terminal G of the IGBT 4 via the gate resistor 7 and the bonding wire 13 and the other end connected to the input terminal. . Further, the first metal plate 1 is connected to the emitter terminal E of the IGBT 4 via the bonding wire 6 and to a low potential terminal such as a ground potential. Further, the second metal plate 3 is connected to the collector terminal C of the IGBT 4 and to a high-potential terminal of a predetermined potential or an output terminal.

Thus, in the present embodiment, the same operation and effect as in the first embodiment can be obtained. However, in the present embodiment, the second metal plate 3 on which the IGBT 4 is mounted is
Flexible substrate 11 provided between the first metal plate 1 and
Has a three-layer structure by the base film 11A and the metal foils 11B and 11C, so that its thickness is smaller than that of another flexible substrate 12 having a five-layer structure or the flexible substrate 2 according to the first embodiment. be able to. Therefore, the thermal resistance of the flexible substrate 11 can be further reduced, and the heat dissipation can be improved.

Further, as compared with the first embodiment, the first,
Flexible substrate 11 inserted between second metal plates 1 and 3
Is small, the first and second metal plates 1 and 3 serving as two pairs of reciprocating current paths can be further brought into close contact with each other, and their inductance decreases and the capacitance component increases. Therefore, the effect of suppressing the surge voltage can be further enhanced.

Further, since the metal foils 11B and 11C having high heat conductivity are provided on the front and back surfaces of the flexible substrate 11, the first and second metal plates 1 and 3 and the flexible substrate 11 are provided.
Can be joined using solder having excellent thermal conductivity. Therefore, the thermal resistance between the first and second metal plates 1 and 3 can be further reduced, and the heat dissipation can be improved.

In this embodiment, the first flexible substrate 11 is made of a base film 11A and metal foils 11B, 1B.
1C, but the present invention is not limited to this. For example, the first flexible substrate may be constituted only by the base film. In this case, the first flexible substrate is bonded to the first and second metal plates 1 and 3 with an adhesive or the like.

Next, FIG. 8 to FIG. 11 show a semiconductor device according to a third embodiment.
A plurality of metal members serving as a second metal plate are mounted on a metal substrate forming a metal plate through a flexible substrate, and an IGBT is mounted on each of the metal members to form a three-phase inverter circuit.

Reference numeral 21 denotes a metal substrate as a first metal plate.
The metal substrate 21 has a substantially rectangular flat plate shape and is formed of a conductive metal material such as copper.

Reference numeral 22 denotes a flexible substrate made of an organic thin insulating layer such as a polyimide resin provided on the surface of the metal substrate 21. The flexible substrate 22 is located at the center of the metal substrate 21 and has a substantially square shape. In addition, it has a plurality (for example, five) of protruding portions 22A protruding in a belt shape for connection with the input terminal. And the flexible substrate 2
2 is joined to the metal substrate 21 by an adhesive or the like.

The flexible substrate 22 has a five-layer structure including a base film, a metal foil, and a cover film, for example, similarly to the flexible substrate 2 according to the first embodiment. The metal foil provided on the front surface side of the base film forms a wiring pattern 22B,
A extends toward the outer peripheral side along A.

Reference numeral 23 denotes a P-phase bus bar that forms a metal body as a second metal plate together with an N-phase bus bar 24, a U-phase bus bar 25, a V-phase bus bar 26, and a W-phase bus bar 27, and the P-phase bus bar 23 For example, it is formed in a rectangular plate shape extending in the front and rear directions by a conductive metal material such as copper, and is disposed on the right side in the left and right directions on the surface of the flexible substrate 22 and fixed by an adhesive or the like. Also, the P-phase bus bar 23 has
An L-shaped terminal portion 23A is provided at an intermediate portion in the rear direction. And, in the terminal portion 23A,
A high potential terminal having a predetermined potential is connected by a screw or the like.

Reference numeral 24 denotes an N-phase bus bar which is separated from the P-phase bus bar 23 and forms a metal body as a second metal plate disposed on the left side of the flexible board 22 in the left and right directions. For example, it is formed in a substantially E-shaped plate shape with copper or the like, and is fixed to the surface of the flexible substrate 22 with an adhesive or the like. The N-phase bus bar 24 is also provided with a terminal portion 24A that rises in an L-shape, and a low-potential terminal such as a ground potential is connected to the terminal portion 24A by a screw or the like.

Reference numerals 25, 26, and 27 denote a U-phase bus bar, a V-phase bus bar, and a W-phase bus bar which are located around the N-phase bus bar 24 and form a metal body as a second metal plate fixed to the surface of the flexible substrate 22. Each of the bus bars 25, 26, 27 is formed in an elongated plate shape extending in the left and right directions with copper or the like.
Terminal portions 25A, 2 rising in an L-shape are on the left end side.
6A and 27A are formed. In addition, each bus bar 25,
Reference numerals 26 and 27 are separated from the P-phase bus bar 23 and the N-phase bus bar 24, and are fixed to the surface of the flexible substrate 22 with an adhesive or the like. And each bus bar 25,26,27,
An output terminal of the inverter circuit is formed, and for example, an input terminal of the three-phase induction motor M is connected.

Reference numeral 28 denotes a first switching circuit provided on the U-phase bus bar 25. The switching circuit 28 includes an IGBT 28A provided on the surface of the U-phase bus bar 25,
The feedback diode 28B is fixed to the surface of the U-phase bus bar 25 adjacent to the GBT 28A.
The IGBT 28A has a collector terminal provided on the back side thereof connected to the U-phase bus bar 25 by soldering or the like, and an emitter terminal provided on the front side thereof is connected to the N-phase bus bar 24 via a bonding wire 28C. , The gate terminal is connected to the U via the bonding wire 28D.
It is connected to the wiring pattern 22B located near the phase bus bar 25.

The feedback diode 28B has a cathode terminal provided on the back side thereof connected to the U-phase bus bar 25 by soldering or the like, and an anode terminal provided on the front side thereof is connected to the N-phase bus bar 25 via a bonding wire 28E. 24
It is connected to the. Thereby, the feedback diode 28B
Are connected in parallel between the collector terminal and the emitter terminal of the IGBT 28A.

Reference numeral 29 denotes a second switching circuit connected in series to the first switching circuit 28. The second switching circuit 29 is composed of an IGBT 29A and a feedback diode 29B, like the first switching circuit 28. ing. The IGBT 29A and the feedback diode 29B are located near the U-phase bus bar 25 and are fixed to the surface of the P-phase bus bar 23. And IGBT29A
The collector terminal provided on the back side is connected to the P-phase bus bar 23 by soldering or the like, the emitter terminal provided on the front side is connected to the U-phase bus bar 25 via a bonding wire 29C, and the gate terminal is connected. It is connected to a wiring pattern 22B located near the P-phase bus bar 23 via a bonding wire 29D.

The feedback diode 29B has a cathode terminal provided on the back side thereof connected to the P-phase bus bar 23 by soldering or the like, and an anode terminal provided on the front side thereof is connected to the U-phase bus bar via a bonding wire 29E. 25
It is connected to the. Thereby, the feedback diode 29B
Are connected in parallel between the collector terminal and the emitter terminal of the IGBT 29A.

Reference numeral 30 denotes a third switching circuit provided in the V-phase bus bar 26.
IGBT 30A and feedback diode 30B as in the switching circuit 28 of FIG. Also, I
The GBT 30A and the feedback diode 30B are fixed to the surface of the V-phase bus bar 26 adjacent to each other, and the feedback diode 30B is connected in parallel to the IGBT 30A.

The IGBT 30A has a collector terminal connected to the V-phase bus bar 26 and an emitter terminal connected to the N-phase bus bar 24 via the bonding wire 30C, similarly to the IGBT 28A of the first switching circuit 28. Wiring pattern 22 whose gate terminal is located near V-phase bus bar 26 via bonding wire 30D
B. The feedback diode 30B is
The cathode terminal is connected to the V-phase bus bar 26, and the anode terminal is connected to the N-phase bus bar 24.

Reference numeral 31 denotes a fourth switching circuit connected in series to the third switching circuit 30. The fourth switching circuit 31 includes an IGBT 31A and a feedback diode 3.
1B. Also, IGBT31A
The feedback diode 31B is positioned near the V-phase bus bar 26 and is fixed adjacent to the surface of the P-phase bus bar 23, and the feedback diode 31B is connected in parallel to the IGBT 31A.

The IGBT 31A has a collector terminal connected to the P-phase bus bar 23, an emitter terminal connected to the V-phase bus bar 26 via a bonding wire 31C, and a gate terminal connected to the P-phase bus bar 23 via a bonding wire 31D. 23 is connected to the wiring pattern 22B located in the vicinity. The feedback diode 31B has a cathode terminal connected to the P-phase bus bar 23 and an anode terminal connected to the V-phase bus bar 26 via a bonding wire 31E.

Reference numeral 32 denotes a fifth switching circuit provided in the W-phase bus bar 27. The switching circuit 32
IGBT 32A and feedback diode 32B as in the switching circuit 28 of FIG. Also, I
The GBT 32A and the feedback diode 32B are adjacent to each other and fixed to the surface of the W-phase bus bar 27, and the feedback diode 32B is connected in parallel to the IGBT 32A.

The IGBT 32A has a collector terminal connected to the W-phase bus bar 27 and an emitter terminal connected to the N-phase bus bar 24 via the bonding wire 32C, similarly to the IGBT 28A of the first switching circuit 28. Wiring pattern 22 whose gate terminal is located near W-phase bus bar 27 via bonding wire 32D
B. The feedback diode 32B is
The cathode terminal is connected to the W-phase bus bar 27, and the anode terminal is connected to the N-phase bus bar 24.

Reference numeral 33 denotes a sixth switching circuit connected in series to the fifth switching circuit 32. The sixth switching circuit 33 includes an IGBT 33A and a feedback diode 3.
3B. In addition, IGBT33A
The feedback diode 33B is located near the W-phase bus bar 27 and is fixed adjacent to the surface of the P-phase bus bar 23, and the feedback diode 33B is connected in parallel to the IGBT 33A.

The IGBT 33A has a collector terminal connected to the P-phase bus bar 23, an emitter terminal connected to the W-phase bus bar 27 via a bonding wire 33C, and a gate terminal connected to the P-phase bus bar via a bonding wire 33D. 23 is connected to the wiring pattern 22B located in the vicinity. The feedback diode 33B has a cathode terminal connected to the P-phase bus bar 23 and an anode terminal connected to the W-phase bus bar 27 via a bonding wire 33E.

Then, the first and second switching circuits 2
8, 29, third and fourth switching circuits 30, 31,
The fifth and sixth switching circuits 32 and 33 are connected in parallel between the P-phase bus bar 23 and the N-phase bus bar 24 as shown in FIG. Thereby, the first to sixth switching circuits 28 to 33 constitute a three-phase inverter circuit.

Are gate resistances as electronic elements mounted on the flexible substrate 22 in the middle of each wiring pattern 22B.
Each IGBT 28A is connected to the wiring pattern 22B by soldering or the like, and is connected to the IGBT 28A via the wiring pattern 22B or the like.
33A in series.

The semiconductor device according to the present embodiment has the above-described configuration, and its operation will now be described.

First, a voltage command signal of a predetermined voltage is input to the gate terminals of the IGBTs 28A to 33A. At this time,
Each of the switching circuits 28 to 33 switches between an ON state and an OFF state according to the voltage command signal. As a result, the DC voltage signal applied between the P-phase bus bar 23 and the N-phase bus bar 24 is subjected to, for example, pulse width modulation (PWM), and the PWM signal is transmitted from the U-phase bus bar 25, the V-phase bus bar 26, and the W-phase bus bar 27.
A modulated signal can be output and the three-phase induction motor M
The rotation speed and the like can be controlled.

Thus, the present embodiment can provide the same functions and effects as those of the first embodiment. However, in the present embodiment, since the three-phase inverter circuit is configured by providing the plurality of bus bars 23 to 27 on the surface of the metal substrate 21 via the flexible substrate 22, the respective switching circuits 28 to 33 are easily connected. And the configuration of the entire circuit can be simplified. Therefore, 3
The manufacturing process of the phase inverter circuit can be simplified,
Manufacturing costs can be reduced.

In the three-phase inverter according to the prior art, an expensive composite material (for example, Al + Si) whose thermal expansion matches that of the ceramic substrate is provided on the base plate for heat radiation.
C, Cu + Mo, etc.). However, in the present embodiment, since the flexible board 22 having excellent flexibility is inserted between the metal board 21 and each of the bus bars 23 to 27, the metal board 21 and each of the IGBTs 28A to 33A are thermally stressed by heat generated by the IGBTs 28A to 33A. Even if thermal stress occurs at the joint between the bus bars 23 to 27 and the flexible substrate 22,
The thermal stress can be absorbed by the flexible substrate 22. For this reason, it is not necessary to use an expensive composite material for the base plate for heat radiation, and the inexpensive metal substrate 21 is used.
Can be used, and the manufacturing cost can be reduced.

FIGS. 12 to 14 show a semiconductor device according to a fourth embodiment, which is characterized by a metal substrate, a flexible substrate, a P-phase, a U-phase, a V-phase, and a W-phase. A three-phase inverter circuit is constituted by a bus bar, an IGBT and the like, and a metal substrate is used as an N-phase bus bar.

Reference numeral 41 denotes a metal substrate as a first metal plate.
The metal substrate 41 has a substantially rectangular flat plate shape and is formed of a conductive metal material such as copper. On the right side of the metal substrate 41 in the left and right directions, an L-shaped terminal portion 41A is provided so as to rise to the front side. A low voltage terminal such as a ground potential is connected to the terminal portion 41A by a screw or the like, and the metal substrate 41 functions as an N-phase bus bar.

Reference numeral 42 denotes a flexible substrate made of an organic thin insulating layer such as a polyimide resin provided on the surface of the metal substrate 41. The flexible substrate 42 is located at the center of the metal substrate 41 and has a substantially rectangular shape. In addition, it has a plurality of (for example, five) protruding portions 42A protruding in a strip shape for connection to the input terminal. In addition, the flexible substrate 42
Is located between a U-phase bus bar 44 and a V-phase bus bar 45, which will be described later, and has a substantially square cutout 42B.
Are provided, and the metal substrate 41 is exposed in the notch 42B. Then, the flexible substrate 42 is joined to the metal substrate 41 by an adhesive or the like.

The flexible substrate 42 has a five-layer structure with a base film, a metal foil, and a cover film, for example, like the flexible substrate 2 according to the first embodiment. The metal foil provided on the front side of the base film forms a wiring pattern 42C,
A extends toward the outer peripheral side along A.

Reference numeral 43 denotes a P-phase bus bar which forms a metal body as a second metal plate together with a U-phase bus bar 44, a V-phase bus bar 45, and a W-phase bus bar 46 which will be described later. It is formed in a rectangular plate shape extending in the front and rear directions by the conductive metal material.
It is arranged on the right side in the right direction and is fixed by an adhesive or the like. The P-phase bus bar 43 is provided with an L-shaped terminal portion 43A which is located at an intermediate portion between the front and rear directions. A high potential terminal having a predetermined potential is connected to the terminal portion 43A by a screw or the like.

Reference numerals 44, 45, and 46 denote U-phase busbars, V-phase busbars, and W-phase busbars which are located around the P-phase busbar 43 and form a metal body as a second metal plate fixed to the surface of the flexible substrate 42. Each of the bus bars 44, 45, 46 is formed in an elongated plate shape extending in the left and right directions with copper or the like.
On the left end side, terminal portions 44A, 4 rising in an L-shape
5A and 46A are formed.

The bus bars 44, 45, 46 are located on the left side of the flexible board 42 in the left and right directions, separated from the P phase bus bar 43, and are arranged in parallel in the front and rear directions. Further, the U-phase bus bar 44 and the V-phase bus bar 45
The bus bars 44, 45, and 46 are fixed to the flexible substrate 42 with an adhesive or the like while being arranged with the notch 42B of the flexible substrate 42 interposed therebetween. Each of the bus bars 44, 45, and 46 constitutes an output terminal of the inverter circuit, and is connected to, for example, an input terminal of the three-phase induction motor M.

Reference numeral 47 denotes a first switching circuit provided on the U-phase bus bar 44. The switching circuit 47 includes an IGBT 47A provided on the surface of the U-phase bus bar 44,
The feedback diode 47B is fixed to the surface of the U-phase bus bar 44 adjacent to the GBT 47A.
The IGBT 47A has a collector terminal provided on the back side thereof connected to the U-phase bus bar 44 by soldering or the like, and an emitter terminal provided on the front side thereof has a notch 42B.
Are connected to the metal substrate 41 via bonding wires 47C extending toward the wiring, and the gate terminals are connected to wiring patterns 42C located near the U-phase bus bar 44 via bonding wires 47D.

In the feedback diode 47B, a cathode terminal provided on the back side is connected to the U-phase bus bar 44 by soldering or the like, and an anode terminal provided on the front side is extended toward the notch 42B. It is connected to the metal substrate 41 via a wire 47E. Thereby, the feedback diode 47B is connected in parallel between the collector terminal and the emitter terminal of the IGBT 47A.

Reference numeral 48 denotes a second switching circuit connected in series to the first switching circuit 47. The second switching circuit 48 includes an IGBT 48A and a feedback diode 48B, like the first switching circuit 47. ing. The IGBT 48A and the feedback diode 48B are located near the U-phase bus bar 44 and fixed to the surface of the P-phase bus bar 43. And IGBT48A
The collector terminal provided on the back side is connected to the P-phase bus bar 43 by soldering or the like, the emitter terminal provided on the front side is connected to the U-phase bus bar 44 via a bonding wire 48C, and the gate terminal is connected. It is connected to a wiring pattern 42C located near the P-phase bus bar 43 via a bonding wire 48D.

The feedback diode 48B has a cathode terminal provided on the back side thereof connected to the P-phase bus bar 43 by soldering or the like, and an anode terminal provided on the front side thereof is connected to the U-phase bus bar via a bonding wire 48E. 44
It is connected to the. Thereby, the feedback diode 48B
Are connected in parallel between the collector terminal and the emitter terminal of the IGBT 48A.

Reference numeral 49 denotes a third switching circuit provided in the V-phase bus bar 45, and the switching circuit 49
IGBT 49A and feedback diode 49B as in the switching circuit 47 of FIG. Also, I
The GBT 49A and the feedback diode 49B are adjacent to each other and fixed to the surface of the V-phase bus bar 45, and the feedback diode 49B is connected in parallel to the IGBT 49A.

The IGBT 49A has a collector terminal connected to the V-phase bus bar 45, an emitter terminal connected to the metal substrate 41 via the bonding wire 49C, and a gate, similarly to the IGBT 47A of the first switching circuit 47. Wiring pattern 42C whose terminal is located near V-phase bus bar 45 via bonding wire 49D
It is connected to the. The feedback diode 49B has a cathode terminal connected to the V-phase bus bar 45 and an anode terminal connected to the metal substrate 41.

Reference numeral 50 denotes a fourth switching circuit connected in series to the third switching circuit 49. The fourth switching circuit 50 includes an IGBT 50A and a feedback diode 5.
0B. Also, IGBT50A
The feedback diode 50B is located near the V-phase bus bar 45 and is fixed adjacent to the surface of the P-phase bus bar 43, and the feedback diode 50B is connected in parallel to the IGBT 50A.

The IGBT 50A has a collector terminal connected to the P-phase bus bar 43, an emitter terminal connected to the V-phase bus bar 45 via the bonding wire 50C, and a gate terminal connected to the P-phase bus bar via the bonding wire 50D. It is connected to a wiring pattern 42C located near 43. The feedback diode 50B has a cathode terminal connected to the P-phase bus bar 43 and an anode terminal connected to the V-phase bus bar 45 via the bonding wire 31E.

Reference numeral 51 denotes a fifth switching circuit provided in the W-phase bus bar 46.
IGBT 51A and feedback diode 51B as in the switching circuit 47 of FIG. Also, I
The GBT 51A and the feedback diode 51B are fixed to the surface of the W-phase bus bar 46 adjacent to each other, and the feedback diode 51B is connected in parallel to the IGBT 51A.

The IGBT 51A has a collector terminal connected to the W-phase bus bar 46, an emitter terminal connected to the metal substrate 41 via the bonding wire 51C, and a gate, similarly to the IGBT 47A of the first switching circuit 47. Wiring pattern 42C whose terminal is located near W-phase bus bar 46 via bonding wire 51D
It is connected to the. The feedback diode 51B has a cathode terminal connected to the W-phase bus bar 46 and an anode terminal connected to the metal substrate 41.

Reference numeral 52 denotes a sixth switching circuit connected in series to the fifth switching circuit 51. The sixth switching circuit 52 includes an IGBT 52A and a feedback diode 5.
2B. In addition, IGBT52A
The feedback diode 52B is located near the W-phase bus bar 46 and is fixed adjacent to the surface of the P-phase bus bar 43, and the feedback diode 52B is connected in parallel to the IGBT 52A.

IGBT 52A has a collector terminal connected to P-phase bus bar 43, an emitter terminal connected to W-phase bus bar 46 via bonding wire 52C, and a gate terminal connected to P-phase bus bar via bonding wire 52D. It is connected to a wiring pattern 42C located near 43. The feedback diode 52B has a cathode terminal connected to the P-phase bus bar 43 and an anode terminal connected to the W-phase bus bar 46 via a bonding wire 52E.

Then, the first and second switching circuits 4
7, 48, third and fourth switching circuits 49, 50,
The fifth and sixth switching circuits 51 and 52 are connected in parallel between the P-phase bus bar 43 and the metal substrate 41, respectively. Thereby, the first to sixth switching circuits 47
52 constitute a three-phase inverter circuit.

Are gate resistors as electronic elements mounted on the flexible substrate 42 in the middle of each wiring pattern 42C.
Each of the IGBTs 47A is connected to the wiring pattern 42C by soldering or the like, and is connected to the wiring pattern 42C or the like.
５２52A are connected in series to the gate terminals.

Thus, the present embodiment can provide the same functions and effects as those of the third embodiment. However, in the present embodiment, each of the P-phase, U-phase, V-phase and W-phase bus bars 43 to 46 is mounted on the surface of the metal substrate 41 forming the N-phase bus bar. And the inductance between the bus bars 43 to 46 can be reduced, and the surge voltage can be suppressed.

Further, since the bus bars 43 to 46 are arranged two-dimensionally on the metal substrate 41, the height of the entire device constituting the inverter circuit can be reduced, and the size of the device can be reduced. it can.

Further, since the metal substrate 41 is used as an N-phase bus bar, the single metal substrate 41 can be used as both a base plate for heat radiation and an N-phase bus bar forming a low-potential electrode, thereby reducing the number of parts. In addition, the manufacturing cost can be reduced, and the size of the entire apparatus can be reduced.

In the fourth embodiment, the metal substrate 4
1, the N-phase bus bar and the base plate are used together. However, when the N-phase bus bar, the base plate, and the cooling mechanism need to be insulated from each other, as shown in a first modification shown in FIG. Organic thin insulating layer 6 on the back of substrate 41
1 and the base plate 62 for heat dissipation and various cooling mechanisms may be joined via the organic thin insulating layer 61. In this case, since the bonding area between the metal substrate 41 and the base plate 62 can be increased, the effect of the organic thin insulating layer 61 on the thermal resistance is small, and sufficient heat dissipation can be secured.

In the third and fourth embodiments, a three-phase inverter circuit is constituted by providing U-phase bus bars 25 and 44, V-phase bus bars 26 and 45, and W-phase bus bars 27 and 46. However, as in the second modified example shown in FIG. 16, an H-bridge circuit for connecting to, for example, a DC electric motor DCM may be configured by omitting one of the three phases (for example, the W phase). Good.

In each of the above embodiments, n-channel IGBTs 4, 28A to 33A and 47A to 52A are used. However, the present invention is not limited to this, and p-channel IGBTs may be used. In this case, in the first and second embodiments, the collector terminal (second metal plate 3) is connected to the low potential terminal, and the emitter terminal (first metal plate 1) is connected to the high potential terminal. . On the other hand, in the third and fourth embodiments, the P-phase bus bars 23 and 43 are connected to low potential terminals, and the N-phase bus bar 24 and the metal substrate 41 are connected to high potential terminals.

Further, in each of the above embodiments, IGBTs 4, 28A to 33A, 47A to 52A
However, a configuration using an n-channel type or p-channel type MOSFET may be used. In this case, the collector electrode may be replaced with the drain electrode, and the emitter electrode may be replaced with the source electrode. Further, although the gate resistors 7, 34, and 53 are used as the electronic elements, they may be amplification elements or the like.

Further, IGBT, MOS are used as semiconductor elements.
Regardless of which FET is used, the above embodiments have been described in the form of a bare chip. Even when these semiconductor elements are mounted inside the package, the same functions and effects as those of the above embodiments can be obtained. On this occasion,
The connection from each terminal of the semiconductor element is performed not by a bonding wire but by a terminal of a package.

Further, only the high side of the three-phase inverter or the H-bridge circuit may be of a p-channel type. At this time, for example, in the third and fourth embodiments,
The high-side p-channel semiconductor device is
It is configured to be mounted on a metal plate (bus bar) connected to each of the phase, V phase, and W phase, and to connect the source or emitter terminal to the P phase bus bar. In this case, the same operation and effect as those of the embodiments can be obtained.

[0105]

As described in detail above, according to the first aspect of the present invention, a flexible substrate made of an organic thin insulating layer is provided on a first metal plate, and a second substrate placed in contact with the flexible substrate is provided. Since a semiconductor element that handles large power is mounted on the surface of the metal plate while being electrically connected to the second metal plate, the semiconductor element serving as a heat source is directly connected to the second metal plate having a large area. Can be bonded together. For this reason, the heat dissipation of the semiconductor element can be improved, and the temperature rise of the semiconductor element can be suppressed even for transient heat generation due to a transient current or the like.

Further, since the collector, drain and the like formed on the back surface of the semiconductor element are directly connected to the second metal plate serving as the current path, it is not necessary to perform wire bonding, and the operation process can be simplified. In addition, the inductance of the wiring can be reduced.

Further, since the first and second metal plates serving as a reciprocating current path overlap each other with the flexible substrate 2 having a small thickness dimension interposed therebetween, the mutual magnetic fields are surely canceled by the current flowing in the opposite direction. And the inductance of the reciprocating current path can be reduced. In addition, the first
Since the flexible substrate made of the organic thin insulating layer is provided between the second metal plates, a capacitance component can be formed between the first and second metal plates connected to the high potential terminal and the low potential terminal, respectively. The surge voltage can be suppressed by the capacitance component.

In addition, since an inexpensive flexible substrate is used, manufacturing costs can be reduced. Furthermore, since a flexible substrate having excellent flexibility is inserted between the first and second metal plates, even when thermal stress occurs, the thermal stress can be reduced by the flexible substrate. Therefore, cracks and the like do not occur at the joint between the first and second metal plates and the flexible substrate, and the thermal resistance between them can be maintained at a constant value, and reliability and durability can be improved. Performance can be improved.

According to the second aspect of the present invention, a portion other than the region where the second metal plate is provided on the flexible substrate is provided.
Since the wiring pattern connected to the semiconductor element is formed, or the electronic element is mounted, the electronic element and the like are
The semiconductor device can be mounted on the first metal plate having a constant potential via a thin flexible substrate. For this reason, the potential around the electronic element can be stabilized, the influence of the switching noise of the semiconductor element can be reduced, and the operation can be stabilized.

Further, since the wiring pattern is provided on the flexible substrate, and the electronic elements are provided on the portion of the flexible substrate other than the portion where the second metal plate is attached, the manufacturing process of the wiring pattern can be simplified. In addition, a mounting space for additional wiring and the like is not required, and the device can be downsized.

According to the third aspect of the present invention, the flexible substrate between the first metal plate and the second metal plate has only the base film, or at least one of the front and back surfaces of the base film has metal. A structure having a thin film;
In a portion of the metal plate other than the region where the flexible substrate is provided, another flexible substrate having a configuration different from that of the flexible substrate is provided. Therefore, the portion is provided between the first and second metal plates. The thickness of the flexible substrate can be reduced. For this reason, the thermal resistance of the flexible substrate can be further reduced, and the heat dissipation of the semiconductor element provided on the second metal plate can be improved.

Further, since the thickness of the flexible board inserted between the first and second metal plates is small, the first and second metal plates serving as two pairs of reciprocating current paths can be further brought into close contact. , These inductances decrease, and the capacitance component increases. Therefore, the effect of suppressing the surge voltage can be further enhanced.

Further, when a metal thin film is provided on the front and back surfaces of the flexible substrate inserted between the first and second metal plates, the first and second metal plates and the flexible substrate are made to have thermal conductivity. It can be joined using excellent solder. For this reason, the thermal resistance between the first and second metal plates can be further reduced, and the heat dissipation can be improved.

According to the fourth aspect of the present invention, the second metal plate provided on the flexible substrate is composed of a plurality of metal members, and the semiconductor elements are mounted as separate semiconductor elements on the surfaces of the plurality of metal members. Since each of the separate semiconductor elements functions as an H bridge circuit or a switching element of a three-phase inverter, each semiconductor element can be easily connected to each other, and the configuration of the entire circuit can be simplified. Can be. Therefore, the H-bridge circuit,
The manufacturing process of the phase inverter circuit can be simplified,
Manufacturing costs can be reduced.

Further, since a flexible board having excellent flexibility is inserted between a plurality of metal members serving as the first metal plate and the second metal plate, the first metal plate and the metal are formed by the heat generated by each semiconductor element. Even if thermal stress occurs at the joint between the body and the body, the thermal stress can be absorbed by the flexible substrate. For this reason, it is not necessary to use an expensive composite material for the base plate for heat radiation, an inexpensive metal material can be used, and the manufacturing cost can be reduced.

According to the fifth aspect of the present invention, the first metal plate is connected to the high-potential terminal or the low-potential terminal, and the terminal electrically corresponding to the emitter or the source of the semiconductor element is connected to the first metal plate. , The inductance between the first and second metal plates serving as a reciprocating current path can be reduced, and the surge voltage can be suppressed.

Further, since a plurality of metal members which become the second metal plate in a plane can be arranged on the first metal plate,
The height of the entire device constituting the inverter circuit can be reduced, and the size of the device can be reduced.

Further, since the first metal plate is connected to the low-potential terminal or the like, the first metal plate can be used as both a heat-radiating base plate and a low-potential electrode, reducing the number of parts and reducing the manufacturing cost. Can be reduced, and the entire apparatus can be downsized.

According to the sixth aspect of the present invention, since the organic thin insulating layer is provided on the back surface of the first metal plate, even if insulation with the cooling mechanism is required, the organic thin insulating layer is interposed through the organic thin insulating layer. The cooling mechanism can be attached to one metal plate. Even in this case, since the bonding area between the first metal plate and the cooling mechanism can be increased, the effect of the insulating layer on the thermal resistance is small, and sufficient heat dissipation can be secured. .

According to the seventh aspect of the present invention, since the semiconductor element is constituted by an insulated gate bipolar transistor or a MOS transistor, a large power is handled, and the insulated gate bipolar transistor or the like serving as a heat source is formed of a high heat conductive type. 2 can be attached to the metal plate.

[Brief description of the drawings]

FIG. 1 is a plan view showing a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view of the semiconductor device as viewed from the direction of arrows II-II in FIG.

FIG. 3 is an electric circuit diagram showing the semiconductor device according to the first embodiment.

FIG. 4 is an enlarged sectional view showing a periphery of a gate resistor in an enlarged manner.

FIG. 5 is a plan view showing a semiconductor device according to a second embodiment.

FIG. 6 is a cross-sectional view of the semiconductor device as viewed from a direction indicated by arrows VI-VI in FIG. 5;

FIG. 7 is an electric circuit diagram showing a semiconductor device according to a second embodiment.

FIG. 8 is a perspective view showing a semiconductor device according to a third embodiment.

FIG. 9 is a front view showing a semiconductor device according to a third embodiment.

FIG. 10 is a plan view showing a semiconductor device according to a third embodiment.

FIG. 11 is an electric circuit diagram showing a semiconductor device according to a third embodiment.

FIG. 12 is a perspective view showing a semiconductor device according to a fourth embodiment.

FIG. 13 is a front view showing a semiconductor device according to a fourth embodiment.

FIG. 14 is a plan view showing a semiconductor device according to a fourth embodiment.

FIG. 15 is a front view showing a semiconductor device according to a first modification.

FIG. 16 is an electric circuit diagram showing a semiconductor device according to a second modification.

[Explanation of symbols]

1 First metal plate 2, 11, 22, 42 Flexible substrate 2A, 11A, 12A Base film 2B, 12B Metal foil (wiring pattern) 2C, 12C Metal foil 2D, 2E, 12D, 12E Coverlay film (protective film) 3 Second metal plate 4, 28A to 33A, 47A to 52A IGBT (semiconductor element) 7, 34, 53 Gate resistance (electronic element) 11B, 11C Metal foil (metal thin film) 12 Other flexible substrates 21, 41 Metal substrate (First metal plate) 23, 43 P-phase bus bar (metal body) 24 N-phase bus bar (metal body) 25, 44 U-phase bus bar (metal body) 26, 45 V-phase bus bar (metal body) 27, 46 W phase Bus bar (metal body) 22B, 42C Wiring pattern 61 Organic thin insulating layer

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Yutaka Tajima 1370 Onna, Atsugi-shi, Kanagawa Prefecture Inside Unisia Gex Co., Ltd. Term (reference) 5F036 AA01 BB05 BC05 BC06 BC23

Claims (7)

[Claims] 1. A flexible substrate made of an organic thin insulating layer is provided on a first metal plate, and a second substrate is provided on the flexible substrate.
A semiconductor element for handling a large amount of power is mounted on the surface of the second metal plate while being electrically connected to the second metal plate, and the first metal plate is placed at a high potential. A semiconductor device configured to be connected to a terminal or a low-potential terminal and to connect the second metal plate to one of a high-potential terminal, a low-potential terminal, and an output terminal. 2. A structure in which a wiring pattern connected to the semiconductor element is formed on a portion of the flexible substrate other than a region where the second metal plate is provided, or an electronic element is mounted. The semiconductor device according to claim 1. 3. The flexible substrate between the first metal plate and the second metal plate has only a base film made of an organic thin insulating layer, or has a surface of the base film in addition to the base film. And a structure having a metal thin film on at least one of the back surface and a portion of the first metal plate other than the region where the flexible substrate is provided, provided with another flexible substrate having a configuration different from that of the flexible substrate. 2. The semiconductor device according to claim 1, wherein a wiring pattern connected to the semiconductor element is formed on the other flexible substrate, or an electronic element is mounted. 4. The second substrate provided on the flexible substrate.
The metal plate is composed of a plurality of metal bodies, the semiconductor elements are mounted as separate semiconductor elements on the surfaces of the plurality of metal bodies, and each metal body has a high potential terminal, a low potential terminal, and an output terminal. The collector or drain of each of the individual semiconductor elements is connected to a metal body on which the semiconductor element is mounted, and the emitter or source of each of the individual semiconductor elements is electrically connected. And each of the separate semiconductor elements functions as an H-bridge circuit or a switching element of a three-phase inverter, respectively.
4. The semiconductor device according to 2 or 3. 5. A structure in which the first metal plate is connected to a high-potential terminal or a low-potential terminal, and an electrically corresponding terminal among emitters or sources of the semiconductor elements is connected to the first metal plate. The semiconductor device according to claim 4, wherein: 6. The semiconductor device according to claim 5, wherein an organic thin insulating layer is provided on a back surface of said first metal plate. 7. The semiconductor device according to claim 1, wherein said semiconductor element is an insulated gate bipolar transistor or a MOS transistor.