JP2003243406A - Heterojunction bipolar transistor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a heterojunction bipolar transistor having a base layer with a narrow bandgap. <P>SOLUTION: Since Ge is used for the base layer 1, the bandgap in a room temperature can be as small as approximately 0.66 eV. Further, unlike GaInNAs and GaAsSb, which have been used in a conventional heterojunction bipolar transistor, the base layer is a single element crystal, so that composition control is not required and a crystal manufacturing process is easy. For example, when InGaP is used for an emitter layer 2, since selective etching is conducted by hydrochloric acid to expose the base layer 1, a device manufacturing process becomes easy. As a result, the provision of the heterojunction bipolar transistor having the base layer 1 with a narrow bandgap can be achieved. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a heterojunction bipolar transistor.

[0002]

2. Description of the Related Art A device structure most frequently used in a current HBT (heterojunction bipolar transistor) is a p-type device structure.
Type AlGaAs (aluminum gallium arsenide) emitter layer or p type InGaP emitter layer, p type GaAs base layer and n type GaAs collector layer. Turn-on voltage of this HBT (hereinafter referred to as "turn-on voltage")
Say. ) Greatly depends on the bandgap of the base layer and the sheet resistance value, and the turn-on voltage was almost constant as long as GaAs (having a bandgap of 1.43 eV) was used as the base layer.

The power consumption of an IC using HBT is, for example, C
Power consumption is higher than that of an IC using -MOS, and a decrease in turn-on voltage is required to reduce this power consumption.

Since about 2000, Emcore (US) (Reference: Applied Physics Letters)
76, 2262 (2000)) and Hitachi (Reference: Applied Physics Letters).
78, 483 (2001)) to reduce the turn-on voltage, the base layer has a narrow bandgap material G
aInNAs (gallium indium nitrogen arsenide) and Ga
A technology using AsSb (gallium arsenide antimony) was announced.

[0005]

[Problems to be Solved by the Invention]
nNAs is a quaternary mixed crystal and has a problem that it is difficult to control the composition. GaAsSb has a lattice mismatch with the substrate, so that the base layer is limited to a critical film thickness or less. there were.

Therefore, an object of the present invention is to solve the above problems and provide a heterojunction bipolar transistor having a base layer with a narrow bandgap.

[0007]

In order to achieve the above object, a heterojunction bipolar transistor according to a first aspect of the present invention is an n-type emitter layer made of InGaP, a p-type base layer made of Ge, and an n-type made of GaAs. And a mold collector layer.

A heterojunction bipolar transistor according to a second aspect comprises an n-type emitter layer made of InGaP,
It is provided with a p-type base layer made of Ge and an n-type collector layer made of InGaP.

A heterojunction bipolar transistor according to a third aspect of the present invention is, in addition to the configuration of the first or second aspect,
Undoped G between the p-type base layer and the n-type collector layer
e may be formed.

A heterojunction bipolar transistor according to a fourth aspect is the same as the one according to the first or second aspect,
N-type Ge may be formed between the p-type base layer and the n-type collector layer.

According to the present invention, since Ge is used for the base layer, the band gap at room temperature can be reduced to about 0.66 eV. In addition, according to the present invention, the G used in the conventional heterojunction bipolar transistor
Unlike aInNAs and GaAsSb, since the base layer is a single element crystal, composition control is not required and the crystal manufacturing process is easy. For example, when InGaP is used as the emitter, the base layer can be exposed by selective etching with hydrochloric acid, which facilitates the device manufacturing process. As a result, provision of a heterojunction bipolar transistor having a base layer with a narrow bandgap can be realized.

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

FIG. 1 is a structural diagram showing an embodiment of a heterojunction bipolar transistor of the present invention.

A subcollector layer 8 made of n-type GaAs is formed on a semi-insulating substrate 9, and a collector electrode 7 and a collector layer 3 made of n-type GaAs are formed on the subcollector layer 8. The base layer 1 made of p-type Ge is formed on the collector layer 3, and the base electrode 6 and n are formed on the base layer 1.
An emitter layer 2 made of type InGaP is formed. An emitter contact layer 10 made of n-type InGaP is formed on the emitter layer 2, and the emitter contact layer 1
Emitter contact layer 1 made of n-type GaAs on 0
1 is formed. An emitter contact layer 12 made of n-type InGaAs is formed on the emitter contact layer 11, and an emitter electrode 5 is formed on the emitter contact layer 12.

FIG. 2 is a structural diagram showing another embodiment of the heterojunction bipolar transistor of the present invention.

The difference from the heterojunction bipolar transistor shown in FIG. 1 is that instead of the GaAs collector layer, I
The point is that it has an nGaP collector layer.

That is, n-type GaA is formed on the semi-insulating substrate 9.
The sub-collector layer 8 made of s is formed, and the collector electrode 7 and the collector layer 3a made of n-type InGaP are formed on the sub-collector layer 8. N on the collector layer 3a
The type Ge layer 4 is formed, the base layer 1 made of p type Ge is formed on the n type Ge layer 4, and the base electrode 6 and the emitter layer 2 made of n type InGaP are formed on the base layer 1. There is. An emitter contact layer 10 made of n-type InGaP is formed on the emitter layer 2, and an emitter contact layer 11 made of n-type GaAs is formed on the emitter contact layer 10. Emitter contact layer 11
An emitter contact layer 12 made of n-type InGaAs is formed on the above, and an emitter electrode 5 is formed on the emitter contact layer 12.

FIG. 3 is a structural diagram showing another embodiment of the heterojunction bipolar transistor of the present invention.

The difference from the heterojunction bipolar transistor shown in FIG. 1 is that an n-type Ge layer (or undoped Ge layer) 4a is formed between the base layer 1 and the collector layer 3.

That is, n-type GaA is formed on the semi-insulating substrate 9.
The sub-collector layer 8 made of s is formed, and the collector electrode 7 and the collector layer 3 made of n-type GaAs are formed on the sub-collector layer 8. N-type Ge on the collector layer 3
The layer (or undoped Ge layer) 4a is formed, and n-type G
A base layer 1 made of p-type Ge is formed on the e layer (or undoped Ge layer) 4a, and a base electrode 6 and an emitter layer 2 made of n-type InGaP are formed on the base layer 1. An emitter contact layer 10 made of n-type InGaP is formed on the emitter layer 2, and an emitter contact layer 11 made of n-type GaAs is formed on the emitter contact layer 10. Emitter contact layer 11
An emitter contact layer 12 made of n-type InGaAs is formed on the above, and an emitter electrode 5 is formed on the emitter contact layer 12.

Between the base layer 1 and the collector layer 3, an n-type G
The e layer (or undoped Ge layer) 4a is formed by
This is to lower the energy barrier that the electrons traveling from the base to the collector should cross at the heterojunction.

The emitter contact layer 10 made of n-type InGaP, the emitter contact layer 11 made of n-type GaAs and the emitter contact layer 12 made of n-type InGaAs are formed because the emitter electrode 5 has good ohmic contact characteristics. This is because. In addition, n-type I
The emitter contact layer 10 made of nGaP is n-type In
Care should be taken to dope more heavily than the GaP emitter layer 2.

InGa used as the emitter layer of the heterojunction bipolar transistor shown in FIG. 1 and the collector layer of the heterojunction bipolar transistor shown in FIG.
It is known that P is ordered by the atmosphere during crystal growth of P.

According to the present invention, even if one of the states of ordering / disordering is biased, the effect of lowering the turn-on voltage is not significantly affected. However, InG
If aP is ordered, the energy barrier felt when electrons move from the emitter layer to the base layer is lowered, and this is advantageous for the operation of the heterojunction bipolar transistor.

[0025]

EXAMPLES The production of a heterojunction bipolar transistor according to the present invention begins by growing an epitaxial wafer having a multilayer film formed on a semi-insulating substrate using a thin film crystal production apparatus. Specifically, for example, as shown in FIG. 1, a MOVPE (Me
tal Organic Vapor PhaseEp
or the GS-MBE (Gas Sou) method.
rc Molecular Beam Epitax
y) method or the like, the n-type GaAs subcollector layer 8, the n-type GaAs collector layer 3, the n-type Ge layer 4, and the p-type G are used.
e base layer 1, n-type InGaP emitter layer 2, n-type In
A GaP emitter contact layer 10, an n-type GaAs emitter contact layer 11, an n-type InGaAs emitter contact layer 11 and an n-type InGaAs emitter contact layer 12 are grown.

When the MOVPE method is used, TMGa
(Trimethylgallium), TEGa (triethylgallium), TMIn (trimethylindium), AsH
₃ (arsine), PH ₃ (phosphine), TBAs (tertiary butyl arsine), TBP (tertiary butyl phosphine), etc. as GaAs layer, InGaAs layer, In
Used as a raw material for the GaP layer, GeH ₄ (germane), G
A gas such as e ₂ H ₆ (digermane) or an organic metal such as TMGe (tetramethylgermanium) or TEGe (tetraethylgermanium) is used as a raw material for the Ge layer.

When the GS-MBE method is used, metal germanium, metal indium, solid arsenic, solid phosphorus, A
sH ₃ (arsine), PH ₃ (phosphine), etc. are made of GaAs
Layer, InGaAs layer, InGaP layer,
A gas such as GeH ₄ (germane) or Ge ₂ H ₆ (digermane) or solid germanium is used as a raw material for the Ge layer.

N-type GaAs layer, n-type InGaAs layer, n
An element such as Si, Te, or Se is used for doping the p-type InGaP layer, and Al or G is used for doping the p-type Ge layer.
n-type Ge using elements such as a, In, Be, Mg, and Zn
Elements such as P, As, Sb, Se and Te are used for doping the layers.

Next, the device process will be described.

The emitter electrode 5 is formed on the epitaxial layer grown by the above-mentioned method by using a usual photolithography method, metal vapor deposition method or the like. Emitter electrode 5
For this, a three-layer metal film of Ti (titanium) / Pt (platinum) / Au (gold) is used.

Using this emitter electrode as a mask,
The n-type InGaAs emitter contact layer 12 and n were formed using a mixed etchant of citric acid, hydrogen peroxide and pure water.
The type GaAs emitter contact layer 11 is etched. Since the above-mentioned etchant has selectivity, etching automatically stops at the surface of the InGaP layer 10.

Next, the n-type InGaP emitter contact layer 10 and the n-type emitter layer 2 are etched using hydrochloric acid. Since hydrochloric acid has a selectivity between InGaP and Ge, the etching automatically stops at the surface of the Ge base layer 1.

A base electrode 6 is formed on the Ge base layer 1 by a self-alignment method using a photoresist formed by a normal photolithography method and the emitter electrode 5 as a mask. For the base electrode 6, Ti /
A three-layer metal of Pt / Au is used and is formed by a vapor deposition method or the like.

Next, after protecting the formed emitter electrode 5 and the vicinity of the base electrode 6 with a photoresist, either a mixed etchant of sulfuric acid, hydrogen peroxide solution and pure water, or potassium hydroxide, hydrogen peroxide solution and pure water. P-type Ge base layer 1, n-type (or undoped) using mixed etchant with water
The Ge layer 4 and the n-type GaAs collector layer 3 are etched. The etching time is adjusted so that the n-type GaAs subcollector layer 8 appears on the surface when the etching is stopped.

On the surface of the n-type GaAs subcollector layer 8 exposed by etching, the collector electrode 7 is formed by using a usual photolithography method, metal vapor deposition method or the like. For the collector electrode 7, AuGe (gold germanium) /
By using Ni (nickel) / Au or the like and alloying at a temperature of about 320 ° C., an ohmic contact is obtained.

Finally, after protecting the device portion with a photoresist or the like, the n-type GaAs subcollector layer 8 is etched with a mixed etchant of sulfuric acid, hydrogen peroxide solution and pure water to isolate each device ( Device front-end fabrication completed). Next, the turn-on voltage Vto of the completed device is calculated.

Literature (IEEE Electron De
vice Letters 21, 554-556 (2
000)), the turn-on voltage Vto of the HBT is expressed by the equation (1).

[0038]

## EQU1 ## Vto =-(kT / q) ln [Rsb] + Eg
b / q- (kT / q) ln [q ² μNcNvDn / J
c] where k is Boltzmann's constant, T is temperature, q is electron content,
Rsb is the sheet resistance of the base layer, Egb is the band gap of the base layer, μ is the hole mobility in the base layer, Nc is the density of states in the conduction band, Nv is the density of states in the valence band, and Dn is the diffusion of electrons. Is a coefficient
In the formula, the state of the turn-on voltage Vto is defined by the magnitude of Jc.

According to the equation (1), the turn-on voltage Vto can be simply lowered by reducing the bandgap voltage Egb, that is, by selecting a material having a narrow bandgap Egb for the base layer.

However, although the hole mobility μ and the diffusion coefficient Dn, which are physical constants for changing the material of the base layer, are changed at the same time to change the magnitude of the turn-on voltage Vto, there is no great influence as much as the change of the bandgap voltage Egb.

FIG. 4 shows a conventional n-type In
GaP emitter layer / p-type GaAs base layer / n-type GaA
It is a figure which shows the Gummel plot by measurement and calculation of the s collector layer structure HBT and the n-type InGaP emitter layer / p-type Ge base layer / n-type GaAs collector layer structure HBT of this invention. In the figure, the horizontal axis represents the base-emitter voltage, and the vertical axis represents the collector current.

The emitter size is about 60 μm × 60 μm. From the figure, the n-type InGaP emitter layer and the p-type Ge
It can be seen that the structure of the present invention in combination with the base layer reduces the turn-on voltage by about 160 mV as compared with the conventional structure.

As a technique similar to the present invention, US Emc
ore (Reference: Applied Physics Le
tters 76, 2262 (2000)) and Kop.
in company (IEEE Electron Device
GaI of Letters 21, 554 (2000)).
nNAs-HBT and Hitachi, Ltd. (literature: Applie
d Physics Letters 78,483
(2001)) GaAsSb-HBT. These use a III-V group compound for the base layer,
Composition control is required when growing an epitaxial wafer for HBT.

On the other hand, the present invention is different from the prior art in that Ge is used for the base layer. Therefore, in the present invention, it is not necessary to control the composition when the base layer is epitaxially grown, and the manufacturing is easy.

As a technique similar to HBT using Ge, n-type AlGaAs emitter / p-type Ge base / n-type G
HBT called aAs collector is a university of Illinois (reference: IEEE Electron Device Le)
tters 11, 233 (1990)). In this report, AlGaAs is used for the emitter layer, while the technique of the present invention is different in that InGaP is used for the emitter layer. Therefore, in the present invention, the selective etching becomes easy in the device process, particularly in the emitter contact layer etching and the emitter layer etching.

[0046]

In summary, according to the present invention, it is possible to provide a heterojunction bipolar transistor having a base layer with a narrow bandgap.

[Brief description of drawings]

FIG. 1 is a structural diagram showing an embodiment of a heterojunction bipolar transistor of the present invention.

FIG. 2 is a structural diagram showing another embodiment of the heterojunction bipolar transistor of the present invention.

FIG. 3 is a structural diagram showing another embodiment of the heterojunction bipolar transistor of the present invention.

FIG. 4 is a conventional n-type InGaP emitter layer / p-type GaAs base layer / n-type GaAs collector layer structure HBT, and the n-type InGaP emitter layer / p of the present invention.
It is a figure which shows the Gummel plot by a measurement and a calculation with the type Ge base layer / n type GaAs collector layer structure HBT.

[Explanation of symbols]

1 base layer 2 Emitter layer 3,3a collector layer 4,4a n-type Ge layer 5 Emitter electrode 6 Base electrode 7 Collector electrode 8 Sub-collector layer 9 Semi-insulating substrate 10, 11, 12 Emitter contact layer

[Procedure amendment]

[Submission date] February 20, 2002 (2002.2.2)
0)

[Procedure Amendment 1]

[Document name to be corrected] Drawing

[Name of item to be corrected] Fig. 4

[Correction method] Change

[Correction content]

[Figure 4]

Claims (4)

[Claims] 1. An n-type emitter layer made of InGaP,
A heterojunction bipolar transistor comprising a p-type base layer made of Ge and an n-type collector layer made of GaAs. 2. An n-type emitter layer made of InGaP,
A heterojunction bipolar transistor comprising a p-type base layer made of Ge and an n-type collector layer made of InGaP. 3. The undoped Ge is formed between the p-type base layer and the n-type collector layer.
The heterojunction bipolar transistor described in. 4. The heterojunction bipolar transistor according to claim 1, wherein n-type Ge is formed between the p-type base layer and the n-type collector layer.