JP2003241683A - Display and electronic instrument - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display and an electronic instrument which can effectively utilize a substrate surface, and prevent or suppress a wrong operation in the display, by arranging a power supply line to a drive circuit, etc., on a predetermined part of the substrate. <P>SOLUTION: A bank layer 221 and a recessed compartment area 223 compartmentalized by the bank layer 221 are arranged in a predetermined matrix pattern on the substrate 20. A real pixel part 111 for display and a dummy pixel part 112 not for display are formed in a pixel part 110 to be a display part. A scanning line driving circuit 80 for controlling the output of scanning signals that pass through scanning lines and a driving voltage conducting part 310 through which a driving current passes to drive the scanning line driving circuit 80 are also provided to the substrate 20. In the plan view of the substrate 20, the driving voltage conducting part 310 is superimposed at least partly on the recessed compartment area 223 of the dummy pixel part 112. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device and electronic equipment.

[0002]

2. Description of the Related Art Conventionally, some optical display devices such as liquid crystal display devices and EL display devices have a structure in which a plurality of circuit elements, electrodes, liquid crystal or EL elements are laminated on a substrate. . For example, an EL display device has a structure in which a light emitting layer containing a light emitting substance is sandwiched between electrode layers of an anode and a cathode, and emits holes injected from the anode side and electrons injected from the cathode side. It utilizes the phenomenon that light is recombined in the light-emitting layer having the ability to emit light when the excited state is collapsed.

As a driving method of such an EL display device, scanning lines in the row direction and data lines in the column direction are arranged in a matrix, and an electrostatic capacitance element is provided for each pixel of the EL element at the intersection thereof. There is known a so-called active matrix driving method in which a transistor and the like are arranged, and light emission is continued until the next rewriting according to the voltage charged in the electrostatic capacitance element of each pixel during writing scanning (for example, Patent Document 1). ).

[Patent Document 1] International Publication No. WO98 / 3640 Pamphlet

[0004]

In the display device of the active matrix driving system as described above, as a driving circuit, a driving circuit for a scanning line for applying a scanning selection pulse for each scanning line, and a data for each data line. Some include a drive circuit for a data line that supplies a signal, and an inspection circuit that can inspect the quality and defects of a display device during manufacturing or at the time of shipping. In such a display device, the driving circuit and / or the control circuit must be provided on the substrate, the size of the substrate becomes large, or the region where these circuits are provided is difficult to use as a display region. There may be a problem that the upper part cannot be effectively used as the display area. In addition, a conductive line from a predetermined power source section to the drive circuit and / or the inspection circuit must be arranged on the substrate, and the display area may not be effectively used.

On the other hand, when the number of stages of the shift register, which is one of the general constituents of the drive circuit and / or the inspection circuit, increases in the display device, for example, when an attempt is made to increase the size of the panel, a large amount of power is generated. When consumed, the power supply voltage may decrease. In that case, the power supplied to the drive circuit and / or the inspection circuit may be reduced,
There may occur a problem that the display device does not operate normally.

An object of the present invention is to provide a power supply line for a driving circuit or the like at a predetermined portion of a board so that the board surface can be effectively used and malfunction of the device due to a drop in power supply voltage occurs. An object of the present invention is to provide a display device capable of preventing or suppressing the above, and an electronic device including the display device.

[0007]

In order to solve the above-mentioned problems, a display device of the present invention includes, on a substrate, a display region that contributes to display and a non-display region that does not contribute to display. In the area and the non-display area, partition walls and concave partition areas partitioned by the partition walls are arranged in a predetermined matrix pattern, and the display area is at least the concave bottom of the concave partition areas from the substrate side. A first electrode layer, a display main body layer containing a substance capable of switching display or non-display, and a second electrode layer, wherein the non-display region comprises:
At least the display main body layer and a second electrode layer are included in the concave bottom portion of the concave partition area from the substrate side, and further, the substrate is connected to the first electrode layer on the substrate and is connected to the first electrode layer. Switching means for controlling energization, operation control means connected to the switching means for controlling the operation of the switching means, and a drive voltage conducting section for supplying a drive current or a drive voltage for driving the operation control means. And the drive voltage conducting portion includes at least a portion arranged in the non-display area, and is further arranged so as to include a portion overlapping the concave partition area when the substrate is viewed in a plan view. It is characterized by

In such a display device, the concave partition areas defined by the partition wall are arranged in a matrix pattern to form pixels. For example, when pixels are arranged in such a matrix pattern. May not form all of the pixels as display regions (actual pixels) that contribute to display, and may form a part of them as non-display regions (dummy pixels) that do not contribute to display. This is a manufacturing problem. For example, when the display main body layer is formed in each of the concave divisional regions, it is possible to form a uniform layer thickness of the display main body layer particularly in the concave divisional regions at the peripheral edge of the substrate. In some cases, it may be difficult, and in such a case, by forming a region including a concave partition region where the layer thickness may be non-uniform as a non-display region, a display defect due to the non-uniform layer thickness of the display main layer Has been resolved. Such defects include, for example, a decrease in contrast, display unevenness, a decrease in pixel life, and the like. By the way, the non-display area does not substantially fulfill the display function of the display device, and the area is treated as a display-useless area on the substrate. Therefore, in order to positively and effectively utilize the non-display area, the inventor of the present invention has formed a drive voltage conducting portion to the operation control means for controlling the operation of the switching means in at least the non-display area. Therefore, as in the non-display area, the drive voltage conducting portion that does not substantially bear the display function is arranged in the non-display area, so that the area of the portion that does not bear the display function on the substrate is offset and the area on the substrate is canceled. It is possible to reduce the increase in the non-displayable area. Further, the driving voltage conducting portion is arranged below the concave partitioning area in the substrate thickness direction, that is, the concave partitioning area and the driving voltage conducting portion are arranged to overlap each other in the display direction.
In this case, when the substrate is viewed in a plan view, the drive voltage conducting portion is arranged so as to include a portion overlapping the concave partition region, and the insulating layer is provided between the second electrode layer in the non-display area and the drive voltage conducting portion. A capacitor is formed through the capacitor, and the capacitor can compensate at least the voltage drop in the drive voltage conducting portion. Here, the concave partition region has a bottom portion that is recessed on the drive voltage conducting portion side (substrate side) and includes the second electrode layer at the bottom portion, so that the capacitance is larger than that of the partition portion. Therefore, the effect of compensating for the decrease in the power supply voltage is greater than that in the case where the capacitor is formed by overlapping the barrier ribs. Therefore, such a display device of the present invention can reduce the non-displayable region and effectively use the substrate area as a display region, and prevent or suppress the occurrence of malfunction of the device due to the power supply voltage drop. It becomes possible. In the above display device, for example, an organic EL substance or the like can be used as the display substance in the display main layer, and a liquid crystal substance can also be used as the display substance.

Here, the partition wall portion includes two partition wall portions that are parallel to each other and are formed in an axial shape, and the drive voltage conducting portion is between the two partition wall portions and is parallel to the partition wall portions and axially shaped. If it is arranged so as to include the formed portion, the area of the portion where the drive voltage conducting portion and the concave partition region overlap with each other is further increased. In this case, the effective use of the substrate area and the compensating effect for the power supply voltage drop can be further improved. In addition, the non-display area includes a first electrode layer located between the substrate and the display main layer, and an insulating layer that blocks conduction between the first electrode layer and the second electrode layer. It can be provided. In this case, it is said that the non-display area is formed due to the insulating layer that makes it impossible to energize between the electrodes or relatively difficult to energize compared to the display area. It should be noted that, for example, when each electrode layer, display main layer, insulating layer, or the like is formed by photolithography during manufacturing, the insulating layer is formed over the entire area of the concave partition region or a part of the insulating layer is opened. It is possible to easily form either the display region or the non-display region depending on whether the insulating depletion layer is formed.

Further, the surface layer surface of the insulating layer may be made of a material having a relatively high affinity with the display main layer as compared with the surface layer surface of the partition wall portion.
In this case, problems such as an increase in the layer thickness of the display main layer in the vicinity of the partition wall are unlikely to occur, the layer thickness can be made more uniform, and problems such as reduction in contrast are less likely to occur.

Next, a plurality of scanning lines and a plurality of data lines are formed in a matrix on the substrate, and
The switching means may be connected to the scanning line and the data line, and the operation control means may include data control means for performing control regarding a signal for conducting the data line. On the other hand, the switching means may be connected to the scan line and the data line, and the operation control means may include a scan control means for controlling a signal for conducting the scan line. It is also possible to include each of the control means and the scanning control means. Further, a plurality of inspection lines are formed on the substrate, the switching means is connected to the inspection lines, and the operation control means includes inspection control means for performing control relating to a signal for conducting the inspection lines. Of course, the operation control means may include the data control means, the scan control means, and the inspection control means. In this case, the operation control means can efficiently control the signal for conducting the scanning line and / or the data line and / or the inspection line, and further, these scanning line and / or the data line and / or the inspection line, and the switching. Since the means etc. are arranged on the substrate,
Effective use of the substrate area is desired, but by adopting the configuration of the drive voltage conducting portion for the operation control means as in the present invention, the effective use and stable supply of drive current may be possible.

By the way, when an organic EL material or a liquid crystal material is used as the display material, for example, a light emitting material or a liquid crystal material constituting the display material is applied to each pixel (concave section area) by an inkjet method to form a display main layer. Can be formed. In the inkjet method, the non-display area may be formed in a predetermined area, for example, a peripheral portion of the substrate surface, in order to suppress the unevenness of the thickness of the display main layer described above. Therefore, when the display main layer is formed by using such an inkjet method, the non-display area on the substrate surface can be effectively used by adopting the configuration of the present invention.

The electronic equipment of the present invention is characterized by including the above display device as a display section. Examples of such electronic devices include mobile phones, watches, word processors,
An information processing device such as a personal computer can be exemplified.
Since each electronic device is often driven by a battery, it is possible to realize stable power supply by adopting the configuration of the present invention. In addition, although many of these electronic devices are small, the display device of the present invention can be used effectively, and a relatively large display region can be secured even though the entire device is small. It becomes possible.

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. This embodiment shows one aspect of the present invention, does not limit the present invention, and can be arbitrarily modified within the scope of the technical idea of the present invention. In each drawing shown below, the scales are different for each layer and each member in order to make each layer and each member recognizable in the drawing.

First, an embodiment will be described in which the structure of the present invention is applied to an EL display device using electroluminescence (hereinafter referred to as EL) as an example of an electro-optical material forming a display main layer. FIG. 1 and FIG. 2 are plan views and A schematically showing the configuration of the EL display device according to the present embodiment.
It is a -B sectional view. The EL display device 101 shown in FIG.
As a switching element, a thin film transistor (TFT: Th
It is an active matrix type EL display device using an in film transistor.

The EL display device 101 includes a TFT (a TFT 24 shown in FIG. 3 which is a TFT 24 shown in FIG. 3 and serves as a switching means for controlling whether or not a data signal is written in each pixel.
(Also referred to as “T”), and a TFT that is a driving unit of a switching unit that constitutes the scanning line driving circuit 80 and the inspection circuit 90
(Also referred to as a driving circuit TFT) is formed on the substrate 20. The pixel unit 110 of the display device 101 includes an actual pixel region 111 that contributes to panel display and a pixel unit 110.
And a dummy region 112 which is formed in a region excluding the actual pixel region 111 and does not contribute to normal display.

As shown in FIG. 2, the EL display device 101 includes an active matrix substrate 20 facing each other,
The sealing substrate (counter substrate) 30 is bonded via the sealing resin 40, and both the substrates 20 and 30 and the sealing resin 4 are attached.
A space between the substrates 20 and 30 is filled with a desiccant 45, and a space between the substrates 20 and 30 is filled with an inert gas such as nitrogen gas. 46 is formed. Further, on the active matrix substrate 20, an anode (pixel electrode) 23, a hole / injection / transport layer 70 (see FIG. 3) capable of injecting / transporting holes from the anode (pixel electrode) 23, and an electro-optical material. Organic E which is one of
L substance (hereinafter, also referred to as light emitting layer or organic EL layer) 6
Facilitating injection of electrons through 0 and, for example, calcium 2
22 and the cathode 50 are formed by, for example, vapor deposition. As the active matrix substrate 20 and the sealing substrate (counter substrate) 30, a light-transmissive insulating plate member such as glass, quartz, or plastic is used.

Here, a scanning line drive circuit 80 for driving the pixel TFT 24 (see FIG. 3) is provided on the active matrix substrate 20. On the other hand, the data line driving circuit 100 is externally provided as a data driver IC. Of course, the data line drive circuit 100 can be provided on the same active matrix substrate 20. In addition, the inspection circuit 90 is a circuit for inspecting the operation status or initial failure of the display device 101,
For example, an inspection information output means for outputting the inspection result to the outside is provided.

The scanning line driving circuit 80 and the data line driving circuit 100 are configured as a scanning control means and a data control means for controlling the output of a signal conducted to the scanning lines and the data lines, and these scanning lines and the data lines are described above. Pixel TFT
24 (see FIG. 3). That is, the pixel TFT 24 (see FIG. 3) operates based on the operation command signals from the scanning line drive circuit 80 and the data line drive circuit 100, and the pixel TFT 24 controls the energization of the pixel electrode 23.

The driving voltage of the scanning line driving circuit 80 and the inspection circuit 90 is applied from a predetermined power source section through the driving voltage conducting section 310 (see FIG. 2) and the driving voltage conducting section 340 (see FIG. 4). . The drive control signal and drive voltage to the scanning line drive circuit 80 and the inspection circuit 90 are supplied from a predetermined main driver or the like that controls the operation of the display device 101 to the drive control signal conducting section 320 (see FIG. 2) and drive. It is adapted to be transmitted and applied via the control signal conducting unit 350 (see FIG. 4). The drive control signal in this case is, for example, a signal for controlling the timing of signal output to the scanning line or the data line, the scanning line drive circuit 8
0 and command signals such as various control signals such as clock signals and enable signals related to control of the data line driving circuit 100.

Next, FIG. 3 shows a TFT (pixel TFT) 2 provided corresponding to the actual pixel portion 111 in the display area.
4 is a cross-sectional view showing a configuration near 4 of FIG. As shown in the figure, on the surface of the active matrix substrate 20, a base protective layer 281 mainly composed of silicon oxide is used as a base, and a silicon layer 241 is formed thereon. The surface of the silicon layer 241 is covered with a gate insulating layer 282 mainly containing silicon oxide and / or silicon nitride. A region of the silicon layer 241 that overlaps with the gate electrode 242 with the gate insulating layer 282 interposed therebetween is a channel region 241a. The gate electrode 242 is a part of the scanning line. On the other hand, the surface of the gate insulating layer 282 which covers the silicon layer 241 and on which the gate electrode 242 is formed is covered with the first interlayer insulating layer 283 mainly composed of silicon oxide. In addition, in this specification, the component which is "mainly" means the component with the highest content rate.

In the silicon layer 241, a low concentration source region 241b is formed on the source side of the channel region 241a.
While the high-concentration source region 241S is provided, the low-concentration drain region 241c and the high-concentration drain region 241D are provided on the drain side of the channel region 241a to form a so-called LDD (Light Doped Drain) structure. Of these, the high-concentration source region 241S is connected to the source electrode 243 through a contact hole that is opened over the gate insulating layer 282 and the first interlayer insulating layer 283. The source electrode 243 is configured as a part of the data line described above (extending in the direction perpendicular to the paper surface of FIG. 3). On the other hand, the high concentration drain region 241D
Is the source electrode 2 through the contact hole opened over the gate insulating layer 282 and the first interlayer insulating layer 283.
It is connected to the drain electrode 244 formed of the same layer as 43.

Source electrode 243 and drain electrode 244
The upper layer of the first interlayer insulating layer 283 on which is formed is, for example, a second interlayer insulating layer 284 mainly composed of an acrylic resin component.
Is covered by. In addition to the acrylic insulating film, an insulating film made of silicon nitride or silicon oxide can be formed. Then, the pixel electrode 23 made of ITO is formed on the surface of the second interlayer insulating layer 284, and is connected to the drain electrode 244 through the contact hole 23a provided in the second interlayer insulating layer 284. There is. That is, the pixel electrode 23 is connected to the high concentration drain electrode 241D of the silicon layer 241 via the drain electrode 244.

The scanning line drive circuit 80 and the inspection circuit 9
TFT included in 0 (TFT for drive circuit), that is,
For example, of these drive circuits, the N-channel type or P-channel type TFT which constitutes the inverter included in the shift register has the same structure as the TFT 24 except that it is not connected to the pixel electrode 23. .

The surface of the second interlayer insulating layer 284 on which the pixel electrodes 23 are formed is covered with a hydrophilic control layer 25 mainly composed of silicon oxide and an organic bank layer 221 composed of acrylic, polyimide or the like. The pixel electrode 23 has an opening 25 formed in the hydrophilic control layer 25.
a and an opening 221a provided in the organic bank 221
Inside, the hole injection / transport layer 70 and the organic EL layer 60 are stacked in this order from the pixel electrode 23 side.

Hole injecting / transporting layer 70 and organic EL layer 60
The upper layer of and is covered with a cathode 50 formed by laminating Ca222 and Al, for example. EL display device 101
Is basically formed by the above configuration, but in FIG. 2, the life is extended by using the desiccant 45 with the sealing substrate 30.

Returning to FIG. 2, in the display device 101 of the present embodiment, the scanning line side driving voltage conducting portion 310 is formed in the dummy area 112, and in particular, the concave partition area 223 defined by the organic bank layer 221. It is formed below. That is, the scanning line side drive voltage conducting portion 310 is arranged so as to avoid the organic bank layer 221, and the display device 1 is provided.
01 or the substrate 20 in a plan view, the dummy region 112 is formed at least at a position overlapping the concave partition region 223.

This is a non-display area in which the dummy area 112 does not contribute to display, and has a structure in which the non-display area and the driving voltage conducting portion 310 having substantially no display function are arranged in an overlapping manner. That is, as shown in FIG. 2, these are superposed in the displayable direction. As a result, the non-display pixel portion is effectively used. By forming the cathodes 50 and 222, the hydrophilicity control layer 25, the insulating layer 284, and the power supply wiring (driving voltage conducting portion) 310 in this order from the top in the recessed partition region 223, these are formed as a power supply wiring rather than a partition portion. The distance from the cathode can be reduced.
Therefore, by being able to secure a larger capacitance between the power supply wiring and the cathode, even if the voltage value in the power supply wiring section is reduced, the power supply reduction will be compensated by the capacitance. For example, it is possible to prevent or suppress the occurrence of a malfunction such as a malfunction of the display device due to a decrease in driving voltage.

Regarding the scanning line side drive control signal conducting section (circuit control signal line) 320, the dummy pixel section 112 is used.
And is formed below the organic bank layer 221. That is, the scanning line side drive control signal conducting section 320.
Are arranged corresponding to the organic bank layer 221, and are formed at least at positions overlapping the organic bank layer 221 of the dummy pixel portion 112 when the display device 101 or the substrate 20 is viewed in plan.

This is a non-display pixel portion in which the dummy region 112 does not contribute to the display, and the non-display pixel portion and the drive control signal conducting portion 320 are superposed in the displayable direction. As a result, the non-display pixel portion is effectively used. In addition, the drive control signal conducting portion 320 is formed below the organic bank layer 221, so that the drive control signal conducting portion 320 can be formed so as to overlap with the concave partition region 223. And cathode 222
Since the distance between and becomes relatively large, it is difficult to form a capacitor having a high capacitance as described above, and it is possible to reduce the influence on the signal conducted through the drive control signal conducting section 320. That is, the pulse signal conducted through the drive control signal conducting section 320 may have a problem such as a blunted pulse waveform due to the formation of the capacitor as described above. However, as in the present embodiment, it has a high capacitance. By disposing the drive control signal conducting section 350 at a position where it is difficult to provide, it is possible to prevent or suppress the occurrence of the defect.

On the other hand, FIG. 4 shows the CD shown in the plan view of FIG.
FIG. Also in this case, the inspection circuit-side drive voltage conducting portion 340 for driving the inspection circuit 90 is arranged in the dummy region 112 so as to be superposed below the concave partition region 223 defined by the organic bank layer 221. Is formed. Further, the data line side drive control signal conducting section 3
Reference numeral 50 is formed in the dummy region 112 so as to further overlap and be arranged below the organic bank layer 221. As a result, as in the case of the scanning line side drive voltage conducting section 310 and the scanning line side drive control signal conducting section 320, it is possible to effectively use the dummy region 112 that does not substantially have a display function, and to the inspection circuit 90. It is possible to stably supply the drive current and to transmit the data signal. When the data line driving circuit 100 is formed on the same substrate 20, the drive voltage conducting portion and the drive control signal conducting portion are respectively formed in the concave partition region 223 of the dummy region 112 and the organic bank layer 22.
The same effect can be obtained by arranging them in a superposition below 1.

Next, an example of a manufacturing process of the display device 101 according to this embodiment will be described. First, the manufacturing process of the display device 101, in particular, the manufacturing process of each component on the active matrix substrate 20 will be described with reference to FIGS. Each of the cross-sectional views shown in FIGS. 5 to 8 is a cross-section 115 of a region in which the scanning line drive circuit 80 is formed and the dummy region 112 is formed in the cross-section taken along the line AB in FIG. a)) and the actual pixel 111
A cross section 116 of the region where the (TFT 24) is formed (see FIG.
(See (a)). In the following description, all the impurity concentrations are expressed as impurities after activation annealing.

First, as shown in FIG. 5A, a base protective layer 281 made of a silicon oxide film or the like is formed on the surface of an active matrix substrate 20 which is an insulating substrate such as a quartz substrate or a glass substrate. Next, the amorphous silicon layer 501 is formed by using the ICVD method, the plasma CVD method, or the like.
After forming, the crystal grains are grown by a laser annealing method or a rapid heating method to form a polysilicon layer. Further, as shown in FIG. 5B, the polysilicon layer is patterned by photolithography to form island-shaped silicon layers 241, 251 and 261. Of these, the silicon layer 241 is formed in the display region, and the pixel electrode 23
And the silicon layers 251 and 261 are P-channel and N-channel TFs included in the scanning line driving circuit 80.
Ts (TFTs for drive circuits) are respectively configured.

Next, as shown in FIG. 5B, a gate insulating layer 282 made of a silicon oxide film having a thickness of about 30 nm to 200 nm is formed on the entire surface of the silicon layer by plasma CVD, thermal oxidation or the like. Form. Here, when the gate insulating layer 282 is formed by utilizing the thermal oxidation method, the silicon layers 241, 251 and 261 are also crystallized so that these silicon layers can be used as polysilicon layers. When channel doping is performed, for example, boron ions are implanted with a dose amount of about 1 × 10 ¹² cm ⁻² at this timing. As a result, the silicon layers 241, 251 and 261
Is a low-concentration P-type silicon layer having an impurity concentration of about 1 × 10 ¹⁷ cm ⁻³ .

Next, an ion implantation selection mask is formed on a part of the channel layers of the P-channel type TFT and the N-channel type TFT, and in this state, phosphorus ions are ion-implanted at a dose amount of about 1 × 10 ¹⁵ cm ^-2. . As a result, self-aligned high-concentration impurities are introduced into the patterning mask, and as shown in FIG. 5C, the high-concentration source regions 241S and 261S and the high-concentration drain regions are formed in the silicon layers 241 and 261. 241D and 261D are formed.

Next, as shown in FIG. 5C, on the entire surface of the gate insulating layer 282, for forming a gate electrode made of a doped silicon or silicide film, or a metal film such as an aluminum film, a chromium film, or a tantalum film. The conductive layer 502 is formed. The conductive layer 502 has a thickness of about 500 nm. Then, by a patterning method, FIG.
As shown in, a gate electrode 252 forming a P-channel drive circuit TFT, a gate electrode 242 forming a pixel TFT, and a gate electrode 262 forming an N-channel drive circuit TFT are formed. Further, the drive control signal conducting portion 320 (350) and the first layer 121 of the cathode power supply wiring are also formed at the same time. In this case, the drive control signal conducting section 320 (350) is arranged in the dummy area 112.

Then, as shown in FIG. 5D, using the gate electrodes 242, 252 and 262 as a mask, phosphorus ions are applied to the silicon layers 241, 251 and 261 at a dose of about 4 × 10 ¹³ cm ^-2 . Ion implantation in a quantity. As a result, the low-concentration impurities are introduced into the gate electrodes 242, 252, and 262 in a self-aligned manner.
As shown in (c) and (d), low concentration source regions 241b and 261b and low concentration drain regions 241c and 261c are formed in the silicon layers 241 and 261. In addition, in the silicon layer 251, the low concentration impurity region 2
51S and 251D are formed.

Next, as shown in FIG. 6E, an ion implantation selection mask 503 is formed to cover the parts other than the P-channel drive circuit TFT 252. Using this ion implantation selection mask 503, boron ions are ion-implanted into the silicon layer 251 at a dose of about 1.5 × 10 ¹⁵ cm ⁻² . As a result, the gate electrode 252 forming the TFT for the P-channel drive circuit also functions as a mask, so that the silicon layer 252 is self-aligned with high-concentration impurities. Therefore, 251S and 251D are counter-doped and become the source region and the drain region of the P-type channel type drive circuit TFT.

Next, as shown in FIG. 6F, a first interlayer insulating layer 283 is formed over the entire surface of the active matrix substrate 20, and the first interlayer insulating layer 283 is formed by photolithography. By patterning, the contact hole C is formed at a position corresponding to the source electrode and the drain electrode of each TFT.

Next, as shown in FIG. 6G, a conductive layer 504 made of a metal such as aluminum, chromium, or tantalum is formed so as to cover the first interlayer insulating layer 283. The thickness of this conductive layer 504 is approximately 200 nm to 800 nm.
It is a degree. After that, in the conductive layer 504, the regions 24 where the source and drain electrodes of each TFT are to be formed
0a, the region 310a in which the drive voltage conducting portion 310 (340) is to be formed, and the region 122a in which the second layer of the cathode power supply wiring is to be formed are patterned mask 50.
5 is formed, and the conductive layer 504 is patterned to form the source electrodes 243, 253, shown in FIG.
263 and drain electrodes 244, 254 and 264 are formed.

Next, as shown in FIG. 7I, a second interlayer insulating layer 284 covering the first interlayer insulating layer 283 on which they are formed is formed of a resin material such as acrylic resin. The second interlayer insulating layer 284 has a thickness of about 1 to 2 μm.
It is desirable to be formed to a thickness of a certain degree. The second interlayer insulating film can be formed of silicon nitride or silicon oxide, and the film thickness of silicon nitride is 200 n.
It is desirable that the thickness of m and the thickness of silicon oxide be 800 nm. Subsequently, as shown in FIG. 7J, a portion of the second interlayer insulating layer 284 corresponding to the drain electrode 244 of the pixel TFT is removed by etching to form a contact hole 23a.

After that, a thin film made of a transparent electrode material such as ITO is formed so as to cover the entire surface of the active matrix substrate 20. Then, by patterning the thin film, the second interlayer insulating layer 28 is formed as shown in FIG.
Drain electrode 24 through the contact hole 23a of No. 4
At the same time as forming the pixel electrode 23 that is electrically connected to the pixel electrode 4, the dummy pattern 26 in the dummy region is also formed (in FIG. 2, the pixel electrode 23 and the dummy pattern 26 are collectively referred to as the pixel electrode 23). The dummy pattern 26 is configured not to be connected to the underlying metal wiring via the second interlayer insulating layer 284. That is, the dummy patterns 26 are arranged in an island shape, and the pixel electrodes 23 formed in the display area are formed.
The shape is almost the same as the shape. Of course, the shape may be different from the shape of the pixel electrode 23 formed in the display area. In this case, the dummy pattern 2
6 includes at least those located above the drive voltage conducting portion 310 (340).

Next, as shown in FIG. 8L, a hydrophilic control layer 25 serving as an insulating layer is formed on the pixel electrode 23, the dummy pattern 26, and the second interlayer insulating film. An insulating layer (hydrophilicity control layer) 25 is formed in a part of the pixel electrode 23 so that holes can move from the pixel electrode 23 in the opening 25a (see also FIG. 3). Has been done. On the contrary, in the dummy pattern 26 having no opening 25a, the insulating layer (hydrophilicity control layer) 25 serves as a hole movement blocking layer and does not cause hole movement.

Next, an organic bank layer 221 is formed so as to cover a predetermined position of the insulating layer (hydrophilicity control layer) 25. As a specific method of forming the organic bank layer, for example, a resist such as an acrylic resin or a polyimide resin dissolved in a solvent is applied by spin coating, dip coating, or the like to form the organic layer. The constituent material of the organic layer may be any material as long as it does not dissolve in the solvent of the ink described later and is easily patterned by etching or the like. Further, the organic layer is simultaneously etched by a photolithography technique or the like to form a bank opening portion 221a of an organic material, and an organic bank layer (partition wall portion) 221 having a wall surface in the opening portion 221a is formed. In this case, the organic bank layer 221 is assumed to include at least one located above the drive control signal conducting portion 320 (350).

Subsequently, a region showing ink affinity and a region showing ink repellency are formed on the surface of the organic bank layer 221. In this embodiment, each region is formed by the plasma treatment process. Specifically, the plasma treatment step includes a preliminary heating step, an upper surface of the bank portion 221, a wall surface of the opening 221a, an electrode surface (surface of the pixel electrode) 23c of the pixel electrode 23, and an insulating layer (hydrophilic control layer) 25. An ink-repellent process for making the upper surface ink-philic, an ink-repellent process for making the upper surface of the organic bank layer and the wall surfaces of the openings ink-repellent, and a cooling process are provided.

That is, the base material (the substrate 2 including banks, etc.)
0) is heated to a predetermined temperature (for example, about 70 to 80 ° C.),
Next, as an ink-philic process, plasma treatment (oxygen plasma treatment) using oxygen as a reaction gas is performed in the atmosphere.
Subsequently, as an ink repellent process, plasma treatment (CF ₄ plasma treatment) using tetrafluoromethane as a reaction gas is performed in the air atmosphere, and the substrate heated for plasma treatment is cooled to room temperature, Ink affinity and ink repellency will be imparted to a predetermined location. The pixel electrode 23
The electrode surface 23c and the insulating layer (hydrophilicity control layer) 25 are also slightly affected by this CF ₄ plasma treatment,
ITO (Indium Tin Oxide) which is the material of the pixel electrode 23
As a result, the constituent materials of the insulating layer (hydrophilicity control layer) 25, such as silicon oxide and titanium oxide, maintain ink affinity.

Subsequently, a hole injecting / transporting layer forming step is performed to form the hole injecting / transporting layer 70 (see also FIG. 3) shown in FIG. In the hole injecting / transporting layer forming step, after the composition ink containing the hole injecting / transporting layer material is ejected onto the electrode surface 23c by an inkjet method, a drying process and a heat treatment are performed to inject the hole into the electrode 23. / Transport layer 70
To form. After the step of forming the hole injection / transport layer, the hole injection / transport layer 70 and the light emitting layer (organic EL layer) 6 are formed.
In order to prevent 0 oxidation, it is preferable to carry out in an inert gas atmosphere such as a nitrogen atmosphere or an argon atmosphere. For example, an ink jet head (not shown) is filled with a composition ink containing a hole injecting / transporting layer material, and a discharge nozzle of the ink jet head is placed in the opening 25a formed in the insulating layer (hydrophilic control layer) 25. While the ink jet head and the base material (substrate 20) are relatively moved so as to face the positioned electrode surface 23c, ink droplets whose liquid amount per droplet is controlled are ejected from the ejection nozzle to the electrode surface 23c. Next, the ejected ink droplets are dried to evaporate the polar solvent contained in the composition ink.
0 is formed (see FIG. 8 (l) and FIG. 3).

As the composition ink, for example, a mixture of a polythiophene derivative such as polyethylenedioxythiophene and polystyrene sulfonic acid dissolved in a polar solvent such as isopropyl alcohol can be used. Here, the ejected ink droplets spread on the electrode surface 23c subjected to the ink-philic treatment and fill the opening 25a of the insulating layer (hydrophilicity control layer) 25. On the other hand, ink drops are repelled and do not adhere to the upper surface of the organic bank layer 221 that has been subjected to the ink repellent treatment. Therefore, even if the ink droplet is ejected from the predetermined ejection position onto the upper surface of the organic bank layer 221, the upper surface is not wetted by the ink droplet, and the ejected ink droplet is an insulating layer (hydrophilic control layer). It is supposed to roll into the opening 25a of 25.

Subsequently, the light emitting layer (organic EL) shown in FIG.
The light emitting layer forming step is performed to form a layer 60 (see also FIG. 3). In the light emitting layer forming step, the composition ink containing the material for the light emitting layer is discharged onto the hole injecting / transporting layer 70 by the same inkjet method as described above, and then dried and heat-treated to form the organic bank layer 221. Opened part 22
The light emitting layer 60 is formed in 1a.

In the light emitting layer forming step, the hole injecting / transporting layer 7
In order to prevent redissolution of 0, a non-polar solvent that is insoluble in the hole injecting / transporting layer 70 is used as the solvent of the composition ink used when forming the light emitting layer. On the other hand, however, the hole injecting / transporting layer 70 has low wettability with respect to the nonpolar solvent, and therefore, even if the composition ink containing the nonpolar solvent is ejected onto the hole injecting / transporting layer 70. / The composition ink for the light emitting layer is repelled by the transport layer 70, and the hole injection / transport layer 7
0 and the light emitting layer 60 may not be able to be adhered to each other, and the light emitting layer 60 may not be uniformly applied. Therefore, the hole injection / transport layer 70 for the non-polar solvent
In order to improve the wettability of the surface of, the surface modification step is preferably performed before forming the light emitting layer. The surface modification process is
For example, the same solvent as the above non-polar solvent or a solvent similar thereto may be applied on the hole injecting / transporting layer 70 by an inkjet method, a spin coat method, a dip method or the like, and then dried. The surface-modifying solvent used here may be the same as the non-polar solvent for the composition ink, such as cyclohexylbenzene, dihydrobenzofuran, trimethylbenzene, tetramethylbenzene, and the like. Examples of the similar solvent include toluene and xylene.

In the light emitting layer forming step by the above-mentioned ink jet method subsequent to the surface modification step, for example, an ink jet head (not shown) is filled with a composition ink containing a blue (B) light emitting layer material, The ejection nozzle faces the hole injecting / transporting layer 70 located in the opening 25a of the insulating layer (hydrophilicity control layer) 25, and while the ink jet head and the base material are relatively moved, The liquid droplets are ejected as controlled ink droplets, and the ink droplets are ejected onto the hole injecting / transporting layer 70.

As the light emitting material forming the light emitting layer 60,
Fluorene polymers, (poly) paraphenylene vinylene derivatives, polyphenylene derivatives, polyfluorene derivatives, polyvinylcarbazole, polythiophene derivatives,
Perylene dye, coumarin dye, rhodamine dye,
In addition, a low molecular weight organic EL material, a high molecular weight organic EL material or the like which is soluble in a benzene derivative can also be used. For example, rubrene, perylene, 9,10-diphenylanthracene, tetraphenylbutadiene, Nile red, coumarin 6, quinacridone and the like can be used. On the other hand, the non-polar solvent is preferably one that is insoluble in the hole injecting / transporting layer 70, such as cyclohexylbenzene,
Dihydrobenzofuran, trimethylbenzene, tetramethylbenzene and the like can be used.

The ejected ink droplet spreads on the hole injecting / transporting layer 70 and fills the opening 25a of the hydrophilic control layer 25. On the other hand, ink drops are repelled and do not adhere to the upper surface of the organic bank layer 221 that has been subjected to the ink repellent treatment.
As a result, even if the ink droplet is ejected from the predetermined ejection position onto the upper surface of the organic bank layer 221, the upper surface is not wetted by the ink droplet, and the ink droplet is in the opening 25a of the hydrophilic control layer 25. Into the opening 221a of the organic bank layer 221 and is discharged and filled.
Then, the non-polar solvent contained in the composition ink is evaporated by subjecting the ejected ink droplets to a drying treatment to form a blue light emitting layer (light emitting layer 60).

Further, as in the case of the blue light emitting layer,
For example, a red light emitting layer (light emitting layer 60) is formed, and finally a green light emitting layer (light emitting layer 60) is formed. The light emitting layers 60 of the respective colors are preferably formed in order from the one having the smallest number of constituent components of the light emitting layer material. When a light-emitting layer with a large number of components is formed first, the composition of the light-emitting layer of a different color that is formed later causes solvent vapors evaporated from the ink to redissolve the previously formed light-emitting layer and cause component separation. It is not preferable because there is a fear. The hole injecting / transporting layer and the light emitting layer are formed by an ink jet process, and at this time, the ink jet head controls the tilt direction by the pitch between the light emitting dots. That is, since the pitch of the nozzles formed in the inkjet head and the pitch of the light emitting dots do not necessarily match, the head is tilted so that the pitch is adjusted to match the pitch of the light emitting dots.

Subsequently, the cathodes 222 and 50 shown in FIG.
A cathode forming step is performed to form the. In the cathode forming step, a lower cathode layer and an upper cathode layer to be the cathodes 222 and 50 are sequentially laminated on the entire surface of the light emitting layer 60 and the organic bank layer 221. The lower cathode layer preferably has a work function relatively smaller than that of the upper cathode layer,
For example, lithium fluoride, calcium, aluminum or the like can be used. The upper cathode layer protects the lower cathode layer, and it is preferable that the upper cathode layer has a work function relatively larger than that of the lower cathode layer. The manufacturing method is, for example, vapor deposition method, sputtering method, CVD method or the like. It is preferable that the light emitting layer 60 be formed by a vapor deposition method, because the light emitting layer 60 can be prevented from being damaged by heat. Here, 222 in FIG. 8 corresponds to calcium (lower cathode layer) and 50 corresponds to aluminum (upper cathode layer). Further, other than Al, an Ag film, a Mg / Ag laminated film, or the like can be used.

Finally, a sealing process is performed to form the sealing substrate 30 shown in FIG. 8 (m). In this sealing step, the sealing substrate 30 and the active matrix substrate 20 are sealed with the adhesive 40 while the desiccant 45 is inserted inside the sealing substrate 30. In addition, this sealing step is performed by nitrogen, argon,
It is preferable to carry out in an inert gas atmosphere such as helium.
When performed in the atmosphere, when a defect such as a pinhole is generated in the reflective layer 50, water, oxygen, etc., may come from the defect portion to the cathode 2.
There is a risk that the cathode 222 may be oxidized by entering the 22.

By the manufacturing process as described above, FIGS.
The display device 101 as shown in FIG. 3 is obtained.

Some examples of electronic equipment equipped with the display device of the present invention will be shown below. FIG. 9A is a perspective view showing a mobile phone. Reference numeral 1000 denotes a mobile phone main body, and 1001 of them is a display unit using the display device of the present invention. FIG. 9B is a diagram showing a wrist watch type electronic device. Reference numeral 1100 is a perspective view showing a watch body. 1101
Is a display unit using the display device of the present invention.

FIG. 9C is a diagram showing a portable information processing device such as a word processor or a personal computer. Reference numeral 1200 denotes an information processing device, and 1202 denotes an input unit such as a keyboard, 120
6 is a display unit using the display device of the present invention, and 1204 is an information processing apparatus main body. Since each electronic device is an electronic device driven by a battery, it is possible to realize stable power supply by adopting the configuration of the present invention.
In addition, although many of these electronic devices are small, by adopting the display device of the present invention, it is possible to secure a relatively large display area despite the small size of the entire device.

[0060]

With such a structure, it is possible to reduce the area where display is impossible on the substrate, increase the effective display area, and to increase the cathode layer and the drive voltage. Since a capacitor is formed between the conductive portion and the capacitor, it is possible to compensate at least the voltage drop in the drive voltage conductive portion, and prevent or suppress the occurrence of malfunction of the display device due to the power supply voltage drop. It becomes possible to do.

[Brief description of drawings]

FIG. 1 is a schematic plan view of an EL display device which is an embodiment of a display device of the present invention.

FIG. 2 is a schematic cross-sectional view taken along the line AB of FIG.

FIG. 3 is a schematic cross-sectional view showing an enlarged main part of FIG.

FIG. 4 is a schematic cross-sectional view taken along line CD of FIG.

5 is an explanatory view showing an example of a manufacturing process of the EL display device of FIG.

6 is an explanatory diagram showing an example of the manufacturing process of the EL display device following FIG.

7 is an explanatory diagram showing an example of the manufacturing process of the EL display device following FIG.

8 is an explanatory diagram showing an example of the manufacturing process of the EL display device following FIG. 7. FIG.

FIG. 9 is a schematic diagram showing an embodiment of an electronic device of the invention.

[Explanation of symbols]

20 Active matrix substrate 23 Anode layer TFT for 24 pixels (switching means) 60 organic EL layer (light emitting layer, display main layer) 80 scanning line drive circuit (operation control means) 90 data line drive circuit (operation control means) 111 Actual pixel section 112 dummy pixel unit 221 bank section 221a opening 222 cathode layer 310 Scan line side drive voltage conducting section 340 Data line side drive voltage conducting section

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) G09G 3/20 670 G09G 3/20 670E 670Q 680 680G 680H 3/30 3/30 Z H05B 33/12 H05B 33 / 12 B Z 33/14 33/14 A 33/22 33/22 Z F term (reference) 3K007 AB05 BA06 DB03 EA00 FA01 GA00 5C080 AA06 BB05 DD03 DD09 DD22 DD25 DD29 FF03 FF11 HH09 JJ02 JJ06 KK04 KK07 5C094 AA53 BA03 BA27 CA27 CA20 EA01 EA04 EA07

Claims (15)

[Claims] 1. A display region that contributes to display on a substrate,
In addition to including a non-display area that does not contribute to display, the display area and the non-display area are arranged with partition walls and concave partition areas partitioned by the partition wall in a predetermined matrix pattern, and the display area is The at least first electrode layer from the substrate side in the concave bottom portion of the concave partition area, a display main body layer containing a substance capable of switching display or non-display, and a second electrode layer, the non-display area, At least the display main body layer and a second electrode layer are included in the concave bottom portion of the concave partition region from the substrate side, and further, on the substrate, the display main body layer is connected to the first electrode layer, and is connected to the first electrode layer. Switching means for controlling the energization of the switching means, operation control means connected to the switching means for controlling the operation of the switching means, and driving means for applying a drive voltage for driving the operation control means. A voltage conducting portion is provided, and the drive voltage conducting portion includes at least a portion disposed in the non-display area, and further includes a portion that overlaps the concave partition area when the substrate is viewed in a plan view. A display device characterized by being arranged in. 2. The partition wall portion includes two partition wall portions that are parallel to each other and are formed in an axial line shape, and the drive voltage conducting portion is between the two partition wall portions and is substantially parallel to the partition wall portions and has an axial line shape. The display device according to claim 1, wherein the display device is arranged so as to include the formed portion. 3. A capacitor is formed between the drive voltage conducting portion and the second electrode layer with an insulating layer interposed therebetween, and the capacitor compensates at least a voltage drop in the drive voltage conducting portion. The display device according to claim 1 or 2. 4. The non-display area includes a first electrode layer located between the substrate and the display main layer, and further blocks electrical conduction between the first electrode layer and the second electrode layer. The display device according to claim 1, further comprising a shielding insulating layer. 5. The surface layer surface of the shielding insulating layer is made of a material having a relatively high affinity with the display main layer as compared with the surface layer surface of the partition wall portion. The display device according to claim 4. 6. A plurality of scanning lines and a plurality of data lines are formed on the substrate so as to intersect with each other, and the switching means is formed corresponding to an intersection of the scanning lines and the data lines. The display device according to any one of claims 1 to 5, wherein the operation control means includes a data control means for controlling a signal applied to the data line. 7. A plurality of scanning lines and a plurality of data lines are formed on the substrate so as to intersect with each other, and the switching means is formed corresponding to an intersection of the scanning lines and the data lines. 7. The display device according to claim 1, wherein the operation control unit includes a scan control unit that performs control regarding a signal applied to the scan line. 8. An inspection control in which a plurality of inspection lines are formed on the substrate, the switching means is connected to the inspection lines, and the operation control means controls a signal for conducting the inspection lines. The display device according to claim 1, further comprising means. 9. The display main layer comprises an organic EL material, according to any one of claims 1 to 5.
The display device according to item. 10. A plurality of recessed regions defined by partition walls are formed, and the plurality of recessed regions are formed in the recessed regions.
A display region and a non-display region formed adjacent to the display region are formed, and at least a light emitting layer is formed in the concave region,
A display device comprising a first electrode layer formed on one surface side of the light emitting layer and a second electrode layer formed on the other surface side, the display device being connected to the first electrode layer. A switching means for controlling energization of the first electrode layer, an operation control means connected to the switching means for controlling the operation of the switching means, and a drive current for driving the operation control means. And a drive voltage conducting portion for controlling the drive voltage conducting portion, the drive voltage conducting portion being disposed so as to planarly overlap at least the concave region disposed in the non-display region. 11. The driving voltage conducting portion is formed between the two partition portions.
Display device according to. 12. A light emitting layer is formed in a display region and a non-display region formed adjacent to the display region, and a first electrode layer is provided on one surface side of the light emitting layer. A display device having a second electrode layer formed on the other surface side, the switching device being connected to the first electrode layer and controlling energization to the first electrode layer. An operation control unit that is connected to the switching unit and that controls the operation of the switching unit; and a drive voltage conducting unit that supplies a drive current for driving the operation controlling unit, wherein the drive voltage conducting unit is A display device, wherein the display device is arranged so as to overlap at least the non-display area in a plane. 13. An insulating pattern made of the same material as an insulating film formed in the display region is formed in the non-display region, and the drive voltage conducting portion is arranged so as to overlap the insulating pattern in a plan view. The display device according to claim 12, wherein: 14. A pattern made of the same material as the pixel electrode formed in the display area is formed in the non-display area, and the drive voltage conducting portion is arranged so as to planarly overlap with the pattern. 13. The method according to claim 12, wherein
Display device according to. 15. An electronic apparatus comprising the display device according to claim 1. Description: