JP2003224228A5 - - Google Patents

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Publication number
JP2003224228A5
JP2003224228A5 JP2002023106A JP2002023106A JP2003224228A5 JP 2003224228 A5 JP2003224228 A5 JP 2003224228A5 JP 2002023106 A JP2002023106 A JP 2002023106A JP 2002023106 A JP2002023106 A JP 2002023106A JP 2003224228 A5 JP2003224228 A5 JP 2003224228A5
Authority
JP
Japan
Prior art keywords
conductor pattern
circuit board
forming layer
bonding
pattern formed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002023106A
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English (en)
Japanese (ja)
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JP2003224228A (ja
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Publication date
Application filed filed Critical
Priority to JP2002023106A priority Critical patent/JP2003224228A/ja
Priority claimed from JP2002023106A external-priority patent/JP2003224228A/ja
Publication of JP2003224228A publication Critical patent/JP2003224228A/ja
Publication of JP2003224228A5 publication Critical patent/JP2003224228A5/ja
Pending legal-status Critical Current

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JP2002023106A 2002-01-31 2002-01-31 半導体装置用パッケージ並びに半導体装置及びその製造方法 Pending JP2003224228A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002023106A JP2003224228A (ja) 2002-01-31 2002-01-31 半導体装置用パッケージ並びに半導体装置及びその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002023106A JP2003224228A (ja) 2002-01-31 2002-01-31 半導体装置用パッケージ並びに半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
JP2003224228A JP2003224228A (ja) 2003-08-08
JP2003224228A5 true JP2003224228A5 (enExample) 2005-06-16

Family

ID=27745908

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002023106A Pending JP2003224228A (ja) 2002-01-31 2002-01-31 半導体装置用パッケージ並びに半導体装置及びその製造方法

Country Status (1)

Country Link
JP (1) JP2003224228A (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3566957B2 (ja) 2002-12-24 2004-09-15 沖電気工業株式会社 半導体装置及びその製造方法
JP4511245B2 (ja) * 2004-05-28 2010-07-28 三洋電機株式会社 回路装置
CN100472776C (zh) * 2005-05-27 2009-03-25 环隆电气股份有限公司 小型化无线通讯模块及其制造方法
JP5100081B2 (ja) 2006-10-20 2012-12-19 新光電気工業株式会社 電子部品搭載多層配線基板及びその製造方法
US7608921B2 (en) * 2006-12-07 2009-10-27 Stats Chippac, Inc. Multi-layer semiconductor package
KR100907639B1 (ko) * 2007-12-20 2009-07-14 삼성전기주식회사 다층 인쇄회로기판의 제조방법 및 그것을 이용한 반도체플라스틱 패키지
KR101084252B1 (ko) * 2010-03-05 2011-11-17 삼성전기주식회사 전자소자 내장형 인쇄회로기판 및 그 제조방법
JP6136710B2 (ja) * 2013-07-29 2017-05-31 富士通株式会社 電子部品

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