JP2003218601A - High frequency wiring board - Google Patents

High frequency wiring board

Info

Publication number
JP2003218601A
JP2003218601A JP2002010613A JP2002010613A JP2003218601A JP 2003218601 A JP2003218601 A JP 2003218601A JP 2002010613 A JP2002010613 A JP 2002010613A JP 2002010613 A JP2002010613 A JP 2002010613A JP 2003218601 A JP2003218601 A JP 2003218601A
Authority
JP
Japan
Prior art keywords
conductor
frequency
line
ground conductor
inner layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002010613A
Other languages
Japanese (ja)
Inventor
Yoshinobu Sawa
義信 澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2002010613A priority Critical patent/JP2003218601A/en
Publication of JP2003218601A publication Critical patent/JP2003218601A/en
Pending legal-status Critical Current

Links

Abstract

<P>PROBLEM TO BE SOLVED: To provide a high frequency wiring board by decreasing an electric capacitance caused between an inner layer ground conductor and ground conductors at a lower side formed between both sides of a second coplanar line so as to suppress resonance and reflection of a high frequency signal between the inner layer ground conductor and the ground conductors at the lower side thereby realizing excellent transmission characteristics. <P>SOLUTION: A first coplanar line 5 formed on an upper side of a dielectric board 2 and the second coplanar line 8 formed in parallel with the first coplanar line 5 at the lower side of the dielectric board 2 are arranged across an inner layer ground conductor 9 formed inside of the dielectric board 2 while the tips of the coplanar lines are opposed to each other, the tips of line conductors 3, 6 are electrically connected with each other by a through-conductor 10 insulated from the inner layer ground conductor 9, and a high frequency input output section is constituted so that a plurality of independent conductor non-forming parts 15 is placed at a position apart by 0.3 to 1.5 mm from the through- conductor 10 of the inner layer ground conductor 9. <P>COPYRIGHT: (C)2003,JPO

Description

【発明の詳細な説明】 【0001】 【発明の属する技術分野】本発明は、電気特性を向上さ
せた高周波入出力部を具備する高周波用配線基板に関す
る。 【0002】 【従来の技術】従来、高周波回路用基板、高周波用半導
体素子収納用パッケージ、高周波用半導体素子搭載用チ
ップキャリアなどに用いられる高周波用配線基板(以
下、高周波基板ともいう)においては、その上面に搭載
される高周波用半導体素子などの高周波用部品とその高
周波基板が実装される外部電気回路基板の高周波回路と
を電気的に接続するために、高周波信号を伝送するため
の高周波用伝送線路を上面と下面とに形成し、それらを
貫通導体で電気的に接続して成る高周波入出力部が形成
される。そして、その高周波基板を外部電気回路基板に
搭載すると共に下面の高周波用伝送路を外部電気回路基
板の接続用線路導体に電気的に接続することにより、高
周波基板が実装されて使用されることとなる。 【0003】このような高周波基板を高周波用半導体装
置を実装するパッケージに適用した例として、例えば特
許第22605502号公報に記載されたパッケージがある。こ
のパッケージは、パッケージ基板と、このパッケージ基
板に装着されたパッケージ側壁と、パッケージ側壁によ
り囲まれて形成されたキャビティを封止する蓋と、キャ
ビティ内に設けられた半導体集積回路チップを実装する
ダイボンディング領域と、キャビティ内に設けられた誘
電体基板の表面上に金属薄膜からなる内部高周波伝送線
路を有し、パッケージ基板の底面部に金属薄膜により形
成したリード端子をなす外部コプレーナ線路と、内部高
周波伝送線路と外部コプレーナ線路を電気的に接続する
金属から成るビアホールとから構成されたパッケージに
おいて、キャビティ内に形成される内部高周波伝送線路
を、コプレーナ線路で構成し、内部高周波伝送線路と外
部コプレーナ線路のそれぞれの接地金属間を金属から成
る複数のビアホールにより接続したことを特徴とするも
のである。 【0004】これによれば、内部高周波伝送線路をコプ
レーナ線路として構成したので、その信号と接地金属と
の間隔を適切に選択することにより、信号線の線路幅を
ICチップ上のマイクロストリップ線路の線路幅と適合
させることが可能となり、損失を低く抑え、反射損失も
低下させることができるというものである。 【0005】また、外部コプレーナ線路と内部高周波伝
送線路を複数のビアホールや同軸構造のビアホールによ
り接続した場合には、高周波的な不整合も少なく、かつ
アイソレーションを高めることが可能であるというもの
である。 【0006】なお、このように高周波用伝送線路として
コプレーナ線路が用いられるのは、高周波基板に高周波
用部品が搭載される側(上面)の信号線路のパターン幅
と下面の外部電気回路基板に実装される側(下面)の信
号線路のパターン幅との不連続性を補償したり、信号線
間のアイソレーションを向上させる目的からは、マイク
ロストリップ線路に比べてコプレーナ線路同士の接続が
好ましいことによるものである。 【0007】しかし、上記特許第2605502号公報に記載
された高周波基板では、内部高周波伝送線路であるコプ
レーナ線路と貫通導体であるビアホールとの接続部にお
けるグランドの位相と、外部コプレーナ線路とビアホー
ルとの接続部におけるグランドの位相との間にビアホー
ルを介して表面と裏面のグランドが導通され、グランド
経路が長くなることからずれが発生していた。そのた
め、内部のコプレーナ線路と外部コプレーナ線路との接
続部において、伝送される高周波信号の反射が発生し、
反射損失が増大するという問題点があった。 【0008】そこで、上記の問題点を解消するために、
誘電体基板の上面に形成された高周波信号を伝送するた
めの第1のコプレーナ線路と、誘電体基板の下面に第1
のコプレーナ線路と平行に形成された第2のコプレーナ
線路とを、誘電体基板の内部に形成された内層接地導体
を挟んで対向配置するとともに、両コプレーナ線路の線
路導体の先端同士を内層接地導体と絶縁された貫通導体
で電気的に接続し、かつ貫通導体から両コプレーナ線路
に直交する方向の両側で0.2〜5mmの位置において、
両コプレーナ線路の接地導体同士を内層接地導体と電気
的に接続された接地貫通導体で電気的に接続して成る高
周波入出力部を具備するものが提案されている(特開20
01−177012公報参照)。 【0009】 【発明が解決しようとする課題】しかしながら、上記の
特開2001−177012公報に記載された高周波基板において
は、誘電体基板上面の第1のコプレーナ線路と内層接地
導体と誘電体基板下面の第2のコプレーナ線路とを貫通
導体によって接続しているが、内層接地導体と第2のコ
プレーナ線路の両側に形成された下面側の接地導体との
間の間隔が小さいため、内層接地導体と下面側の接地導
体との間で電気的な容量が増大し、高周波信号に対して
電磁的な干渉や結合が生じ易いという問題点があった。
その結果、内層接地導体と第2のコプレーナ線路との間
で伝送される高周波信号の共振、反射が発生し、反射損
失が増大するという問題点があった。 【0010】従って、本発明は上記従来の問題に鑑みて
完成されたものであり、その目的は、内層接地導体と第
2のコプレーナ線路の両側に形成された下面側の接地導
体との間の電気的な容量を小さくして、内層接地導体と
下面側の接地導体との間で高周波信号の共振や反射を抑
制して、良好な伝送特性を有するものとすることにあ
る。 【0011】 【課題を解決するための手段】本発明の高周波用配線基
板は、誘電体基板の上面に形成された高周波信号を伝送
するための第1のコプレーナ線路と、前記誘電体基板の
下面に前記第1のコプレーナ線路と平行に形成された第
2のコプレーナ線路とを、前記誘電体基板の内部に形成
された内層接地導体を挟んで先端同士を対向させて配置
するとともに、両コプレーナ線路の線路導体の前記先端
同士を前記内層接地導体と絶縁された貫通導体で電気的
に接続し、前記内層接地導体の前記貫通導体から0.3〜
1.5mm離れた部位に独立した複数の導体非形成部を設
けて成る高周波入出力部を具備したことを特徴とする。 【0012】本発明の高周波用配線基板は、内層接地導
体の貫通導体から0.3〜1.5mm離れた部位に独立した複
数の導体非形成部を設けたことから、内層接地導体と第
2のコプレーナ線路の両側に形成された下面側の接地導
体との間に生じる電気的な容量が低減されるとともに、
特に内層接地導体と下面側の接地導体との間で貫通導体
の周囲の電気的な容量を大幅に低減できるため、内層接
地導体と下面側の接地導体との間で貫通導体とその周囲
の導体との間に生じる電気的な容量を大幅に小さくする
ことができる。その結果、内層接地導体と下面側の接地
導体との間で貫通導体で伝送される高周波信号に電磁的
な干渉や結合が発生しにくくなり、高周波信号の共振や
反射を大幅に抑制して反射損失を抑えることができる。 【0013】また、内層接地導体と下面側の接地導体と
の間に生じる電気的な容量が低減されるので、内層接地
導体と下面側の接地導体との間の間隔を小さくすること
ができ、高周波基板が小型化される。 【0014】 【発明の実施の形態】本発明の高周波基板について以下
に詳細に説明する。図1は本発明の高周波基板について
実施の形態の一例を示し、図1の(a)は高周波基板の
高周波入出力部の上面図、(b)は(a)のA−A’線
における断面図、(c)は(a)のB−B’線における
断面図、(d)は内層接地導体の平面図、(e)は高周
波基板の高周波入出力部の下面図である。 【0015】図1において、1は高周波基板、2は誘電
体基板、3は誘電体基板2の上面に形成された高周波信
号を伝送するための第1の線路導体、4は第1の線路導
体3の両側に形成された第1の接地導体であり、第1の
線路導体3と第1の接地導体4とで第1のコプレーナ線
路5が構成されている。6は、誘電体基板2の下面にそ
の先端が第1の線路導体3の先端と対向するようにして
第1の線路導体3と平行に形成された第2の線路導体、
7は第2の線路導体6の両側に形成された第2の接地導
体であり、第2の線路導体6と第2の接地導体7とで第
2のコプレーナ線路8が構成されている。この例では、
第1,第2のコプレーナ線路5,8を2本ずつ形成して
いる。 【0016】また、9は、誘電体基板2の内部に第1の
コプレーナ線路5および第2のコプレーナ線路8と対向
するように形成された内層接地導体、10は第1の線路導
体3の先端と第2の線路導体6の先端とを電気的に接続
する貫通導体であり、貫通導体10は内層接地導体9とは
電気的に絶縁されている。 【0017】このようにして、誘電体基板2の上面に形
成された第1のコプレーナ線路5と、誘電体基板2の下
面に形成された第2のコプレーナ線路8とを、誘電体基
板2の内部に形成された内層接地導体9を挟んで先端同
士を対向させて配置すると共に、両コプレーナ線路5,
8の線路導体3,6の先端同士を貫通導体10で電気的に
接続し、高周波基板1の高周波入出力部を構成してい
る。この高周波入出力部では、第2の線路導体7は外部
電気回路基板との接続用の実装電極も兼ねている。 【0018】そして、本発明において、内層接地導体9
と電気的に接続されるとともに、貫通導体10から第1,
第2のコプレーナ線路5,8に直交する方向の両側で、
第1,第2のコプレーナ線路5,8の接地導体4,7同
士を電気的に接続する接地貫通導体11を設けることが好
適である。この構成により、第1,第2のコプレーナ線
路5,8の接続部を、貫通導体10と内層接地導体9と接
地貫通導体11とにより同軸構造に近い電気的特性を有す
るものとすることができ、高周波的な不整合を少なくし
て反射損失を低減することができる。また、内層接地導
体9と第1,第2のコプレーナ線路5,8の接地導体
4,7とを接地貫通導体11で接続したことから、第1,
第2の線路導体3,6と貫通導体10との接続部における
グランドの位相を等しくしてそのずれをなくすことがで
き、高周波信号の反射の発生を抑制して反射損失を抑え
ることができる。 【0019】なおこの例では、誘電体基板2の上面の第
1の接地導体4および下面の第2の接地導体7はそれぞ
れの線路導体3,6の先端を囲むように延設されてお
り、これにより、より良好な接地状態を得ることができ
る。 【0020】また、12は誘電体基板2の上面に接合され
た枠体であり、Mは誘電体基板2の上面に形成された半
導体素子などの電子部品の搭載部である。このように搭
載部Mおよび枠体12を備えることにより、高周波基板1
を高周波用電子部品を収容する電子部品収納用パッケー
ジとして使用できる。例えば、このような高周波基板1
は、セラミックグリーンシート積層法等により作製する
ことができ、その場合、誘電体基板2は複数の誘電体層
2a,2bを積層して形成される。このとき、誘電体層
2a,2bを適当な厚みに設定することにより、内層接
地導体9の位置即ち内層接地導体9と第1,第2のコプ
レーナ線路5,8との距離を、高周波入出力部の要求特
性に応じて所望の設定とすることができる。 【0021】特に、内層接地導体9を形成する位置を、
第1のコプレーナ線路5との距離が第2のコプレーナ線
路8との距離よりも小さくなるように設定すると、イン
ピーダンスマッチングができると共に第2のコプレーナ
線路8の線路導体6の幅を広くすることができ、リード
端子の取着強度が増加することとなり、好ましい。 【0022】本発明において、内層接地導体9の貫通導
体10から0.3〜1.5mm離れた部位に独立した複数の導体
非形成部15を設けている。貫通導体10と導体非形成部15
との距離が0.3mm未満では、貫通導体10と内層接地導
体9との電磁結合により、容量成分と誘導成分(自己誘
導成分)のうち容量成分が増加する。すると、インピー
ダンス整合に適する容量成分と誘導成分との整合が損な
われて、共振点が現れることとなりやすい。貫通導体10
と導体非形成部15との距離は1.5mm以下であり、1.5m
mを超えると、貫通導体10と内層接地導体9との電磁結
合により、容量成分と誘導成分(自己誘導成分)のうち
誘導成分が増加する。すると、インピーダンス整合に適
する容量成分と誘導成分との整合が損なわれて、共振点
が現れることとなりやすい。 【0023】導体非形成部15の形状は、円形、楕円形、
四角形等の多角形等の種々の形状とすることができる。
また、導体非形成部15の大きさは、円形の場合その直径
が0.05〜0.5mmであることがよい。0.05mm未満で
は、第2の線路導体6と内層接地導体9との電磁結合に
より、容量成分と誘導成分(自己誘導成分)のうち容量
成分が増加する。すると、インピーダンス整合に適する
容量成分と誘導成分との整合が損なわれて、共振点が現
れることとなりやすい。0.5mmを超えると、第2の線
路導体6と内層接地導体9との電磁結合により、容量成
分と誘導成分(自己誘導成分)のうち誘導成分が増加す
る。すると、インピーダンス整合に適する容量成分と誘
導成分との整合が損なわれて、共振点が現れることとな
りやすい。 【0024】そして、この高周波基板1を外部電気回路
基板の上面に搭載するとともに、第2の線路導体6を外
部電気回路基板の接続用線路導体に、また第2の接地導
体7を外部電気回路基板の接地導体にそれぞれ半田バン
プなどの導電性接続部材により、あるいは半田材を用い
たリフロープロセスにより電気的に接続することによっ
て、高周波基板1が外部電気回路基板に実装される。 【0025】次に、本発明の高周波基板について実施の
形態の他の例を図2に示す。図2の(a)は高周波基板
の高周波入出力部の上面図、(b)は(a)のA−A’
線における断面図、(c)は(a)のB−B’線におけ
る断面図、(d)は内層接地導体の平面図、(e)は高
周波基板の高周波入出力部の下面図である。また、図2
で図1と同様の箇所には同じ符号を付してあり、それら
の詳細な説明は省略する。 【0026】図2において、13は補助接地貫通導体であ
り、誘電体基板2上面の第1の接地導体4および下面の
第2の接地導体7を、第1,第2の線路導体3,6の先
端を囲むように設けられており、より良好な接地状態を
得ることができる。また、補助接地貫通導体13は、内層
接地導体9において貫通導体10とそれに最短距離の導体
非形成部15との距離と同程度の距離でもって貫通導体10
から離れた位置を通っており、第1の接地導体4と内層
接地導体9と第2の接地導体7とを電気的に接続してい
る。 【0027】このような本発明の高周波基板1によれ
ば、高周波入出力部において、第1,第2のコプレーナ
線路5,8の接続部を貫通導体10と内層接地導体9と接
地貫通導体11とにより同軸構造に近い電気特性を有する
ものとすることができ、高周波的な不整合を少なくして
反射損失を低減することができる。また、第1,第2の
線路導体3,6と貫通導体10との接続部におけるグラン
ドの位相を等しくしてそのズレを無くすことができ、高
周波信号の反射を抑制して反射損失を抑えることができ
る。そして、導体非形成部15を設けることにより、貫通
導体10の周囲の電気的な容量を大幅に低減でき、貫通導
体10で伝送される高周波信号に電磁的な干渉や結合が発
生しにくくなり、高周波信号の共振や反射を大幅に抑制
して反射損失を抑えることができる。また、誘電体基板
2内への高周波信号の電磁界の漏れを効果的に抑制する
ことができ、高周波入出力部における高周波信号の反射
損失をさらに抑制することができる。 【0028】また、第1,第2の接地導体4,7をそれ
ぞれ第1,第2の線路導体3,6の先端を囲むように延
設する場合、第1のコプレーナ線路5から貫通導体10を
介して第2のコプレーナ線路8へ、またはその逆方向に
高周波信号を伝送する際の損失を極小にするように容量
成分を調整し、第1,第2の接地導体4,7を形成し、
導体非形成部15を内層接地導体9に形成する。このと
き、抵抗,インダクタ,容量が信号線路全体でマッチン
グするように、第1,第2の接地導体4,7および導体
非形成部15を位置調整して形成することが好ましい。 【0029】そして、このような本発明の高周波基板1
を外部電気回路基板の上面に搭載するとともに、第2の
線路導体6を外部電気回路基板の接続用線路導体に、ま
た第2の接地導体7を外部電気回路基板の接地導体にそ
れぞれ半田バンプなどの導電性接続部材により、または
半田材を用いたリフロープロセスにより電気的に接続す
ることによって、高周波基板1が外部電気回路基板に実
装される。 【0030】次に、本発明の高周波基板について実施の
形態の他の例を図3に示す。図3の(a)は高周波基板
の高周波入出力部の上面図、(b)は(a)のA−A’
線における断面図、(c)は(a)のB−B’線におけ
る断面図、(d)は内層接地導体の平面図、(e)は高
周波基板の高周波入出力部の下面図である。また、図3
で図1と同様の箇所には同じ符号を付してあり、それら
の詳細な説明は省略する。 【0031】図3においては、内層接地導体9が内層接
地導体9a,9bの2層から成り、誘電体基板2は3層
の誘電体層2a,2b,2cから成る。内層接地導体9
aと内層接地導体9bとは中間接地貫通導体14により接
続されている。この構成により、貫通導体10の周囲の接
地電位の壁を強固に形成することができ、より同軸構造
に近い疑似同軸構造とすることで、高周波信号の伝送特
性を向上させて伝送損失を小さくできる。この構成にお
いて、内層接地導体9aと第1のコプレーナ線路5との
距離が、内層接地導体9bと第2のコプレーナ線路8と
の距離よりも小さくなるように設定するのがよく、この
場合インピーダンスマッチングが行いやすくなると共に
第2の線路導体6の幅を広くすることができ、リード端
子の取着強度が増大することとなる。 【0032】中間接地貫通導体14の長さは50μm〜0.5
mmがよく、50μm未満では短すぎて製造が困難とな
り、0.5mmを超えると内層接地導体9a,9b間の距
離が遠くなるため接地電位が不安定になり易い。 【0033】また、第1の接地導体4と上層側の内層接
地導体9aとを接続する接地貫通導体11の長さは50μm
〜0.5μmが良く、50μm未満では、第1の線路導体3
に内層接地導体9aが近接することにより、それらの間
で容量成分が発生し、インピーダンス整合のためには、
高周波基板1の配線導体の幅を細くする必要がある。そ
うすると、搭載する半導体素子と高周波基板1との接続
部で高周波信号の反射が増大し易くなる。0.5mmを超
えると、高周波基板1が大型化することになる。第2の
接地導体7と下層側の内層接地導体9bとを接続する接
地貫通導体11の長さは50μm〜0.5mmが良く、50μm
未満では上記と同様に高周波基板1の配線導体の幅が細
くなり、そのため外部接続用のリード端子の接合が困難
になる。0.5mmを超えると、高周波基板1の配線導体
の幅が広くなり、高周波基板1が大型化することにな
る。 【0034】また、図4は本発明の高周波基板1の実施
の形態の他の例を示すものであり、図3の構成において
図2の補助接地貫通導体13を設けたものである。図4の
(a)は高周波基板1の高周波入出力部の上面図、
(b)は(a)のA−A’線における断面図、(c)は
(a)のB−B’線における断面図、(d)は内層接地
導体の平面図、(e)は高周波基板の高周波入出力部の
下面図である。また、図4で図1と同様の箇所には同じ
符号を付してあり、それらの詳細な説明は省略する。 【0035】この構成により、貫通導体10とその周囲を
同軸構造に近い疑似同軸構造とすることで、高周波信号
の伝送特性を向上させ得ると共に第1,第2の線路導体
3,6の先端から伝送方向の延長方向に向かう誘電体基
板2内への高周波信号の漏れを効果的に抑制することが
でき、高周波入出力部における高周波信号の反射損失を
抑制することができる。補助接地貫通導体13の長さは、
図3の接地貫通導体11の場合と同様の理由で同様の範囲
が良い。 【0036】また、本発明でいう高周波帯域とは、1〜
100GHz程度の高周波帯域およびミリ波帯域であり、
従って本発明の高周波基板1は1〜100GHz程度の高
周波帯域およびミリ波帯域で使用されるものであるが、
1〜80GHz程度の比較的周波数の低い帯域で使用する
のが好ましい。それは、80GHzを超える高周波帯域で
は、高周波信号が外部磁場の影響を受けやすくなり、ノ
イズおよび損失の増大をもたらすからである。より好ま
しくは1〜65GHz程度で使用するのが良い。 【0037】なお、本発明は上記実施の形態に限定され
るものでなく、本発明の要旨を逸脱しない範囲内で種々
の変更、改良を施すことは何ら差し支えない。例えば、
上記の実施の形態では第1,第2のコプレーナ線路5,
8を2本ずつ設けた場合について示したが、コプレーナ
線路を1本設けた場合やさらに3本以上の複数本設けた
多ポートの場合であっても良い。内層接地導体9a,9
bについては、上記実施の形態では2層設けたものにつ
いて示したが、3層以上有っても良い。また、コプレー
ナ線路の線路導体にリード端子や導体バンプ(導体ボー
ル)などの接続用導電性部材を取り付けた構造としても
良い。 【0038】 【実施例】本発明の高周波用配線基板の実施例を以下に
詳細に説明する。 【0039】本発明の高周波用配線基板の実施例とし
て、図1の高周波用配線基板1を以下のように構成し
た。アルミナ(Al23)セラミックスから成る誘電体
層2a,2b,2cを積層した誘電体基板の上面に2つ
の第1のコプレーナ線路5を形成し、下面に第1のコプ
レーナ線路5に平行な2つの第2のコプレーナ線路8を
形成した。また、誘電体層2aと誘電体層2bとの間に
は内層接地導体9を形成した。第1のコプレーナ線路5
を成す第1の線路導体3の先端と第2のコプレーナ線路
8を成す第2の線路導体6の先端とを、ビアホールから
成る貫通導体10で電気的に接続した。また、第1のコプ
レーナ線路5を成す第1の接地導体4と第2のコプレー
ナ線路8を成す第2の接地導体7とを、接地貫通導体11
で電気的に接続した。この接地貫通導体11は、図1
(d)に示すように、貫通導体10の伝送方向に垂直な両
側に位置するように設けることにより擬似同軸構造を構
成するようにした。 【0040】これらの第1のコプレーナ線路5、第2の
コプレーナ線路8、貫通導体10、接地貫通導体11および
内層接地導体9は、金属成分としてMo−Mnを含む金
属ペーストを誘電体基板となるセラミックグリーンシー
トの所定の部位および貫通孔に塗布または充填し、セラ
ミックグリーンシートと同時焼成して形成した。 【0041】そして、図1(d)に示すように、内層接
地導体9の貫通導体10の近傍で貫通導体10からの距離が
0.3〜2.0mmの範囲で、貫通導体10から第2の線路導体
6の上方に位置する部位に、直径0.05mmの円形の導体
非形成部15を20個形成した。また、貫通導体10と接地貫
通導体11との間隔を約0.25mm、誘電体層2aの厚さを
約0.3mm、誘電体層2bの厚さを約0.3mm、誘電体層
2cの厚さを約0.3mmとした。 【0042】また、比較例として、導体非形成部15がな
い以外は上記実施例と同様に構成した従来のものを作製
した。 【0043】上記実施例のものについて1〜65GHzの
高周波信号を入力し、また比較例のものについて1〜40
GHzの高周波信号を入力して、それらのS11(反射特
性:反射損失)およびS21(透過特性:挿入損失)をシ
ミュレーションによって求めた結果を図5に示す。図5
より、比較例のものは、35GHzで共振が生じたためS
21が増大したが、実施例のものは共振点が高周波側の6
2.5GHzにシフトし、広帯域で良好な透過特性が得ら
れた。また、実施例のものはS11を最大33dB(15GH
z)改善するとともに広帯域で反射損失が小さくなった
のに対し、比較例のものはS11が最大29dB(1GH
z)であったものの、10〜40GHzの広い帯域でS11が
15dB以下となり反射損失が大きくなった。 【0044】なお、本発明は上記実施の形態および実施
例に限定されるものではなく、本発明の要旨を逸脱しな
い範囲内で種々の変更を施すことは何等差し支えない。 【0045】 【発明の効果】本発明の高周波用配線基板は、誘電体基
板の上面に形成された高周波信号を伝送するための第1
のコプレーナ線路と、誘電体基板の下面に第1のコプレ
ーナ線路と平行に形成された第2のコプレーナ線路と
を、誘電体基板の内部に形成された内層接地導体を挟ん
で先端同士を対向させて配置するとともに、両コプレー
ナ線路の線路導体の先端同士を内層接地導体と絶縁され
た貫通導体で電気的に接続し、内層接地導体の貫通導体
から0.3〜1.5mm以上離れた部位に独立した複数の導体
非形成部を設けて成る高周波入出力部を具備したことに
より、内層接地導体と第2のコプレーナ線路の両側に形
成された下面側の接地導体との間に生じる電気的な容量
が低減されるとともに、特に内層接地導体と下面側の接
地導体との間で貫通導体の周囲の電気的な容量を大幅に
低減できるため、内層接地導体と下面側の接地導体との
間で貫通導体とその周囲の導体との間に生じる電気的な
容量を大幅に小さくすることができる。その結果、内層
接地導体と下面側の接地導体との間で貫通導体で伝送さ
れる高周波信号に電磁的な干渉や結合が発生しにくくな
り、高周波信号の共振や反射を大幅に抑制して反射損失
を抑えることができる。 【0046】また、内層接地導体と下面側の接地導体と
の間に生じる電気的な容量が低減されるので、内層接地
導体と下面側の接地導体との間の間隔を小さくすること
ができ、高周波用配線基板が小型化される。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for improving electric characteristics.
High-frequency wiring board with a high-frequency input / output section
You. 2. Description of the Related Art Conventionally, high-frequency circuit boards and high-frequency semiconductors
Package for housing element elements, chip for mounting high frequency semiconductor elements
Wiring board for high frequency used for
Lower, also called high-frequency substrate)
High-frequency components such as high-frequency semiconductor devices and their height
The high-frequency circuit of the external electric circuit board on which the
To connect high frequency signal for transmitting high frequency signal
High-frequency transmission lines on the top and bottom
High-frequency input / output section electrically connected with through conductor
Is done. Then, the high-frequency board is used as an external electric circuit board.
The high-frequency transmission line on the bottom
By electrically connecting to the connecting line conductor of the board,
The frequency substrate is mounted and used. [0003] Such a high-frequency substrate is mounted on a high-frequency semiconductor device.
An example of application to a package that implements
There is a package described in Japanese Patent Publication No. 22605502. This
Package consists of a package substrate and this package base.
The package side wall mounted on the board
A lid for sealing the cavity formed by
Mount the semiconductor integrated circuit chip provided in the Viti
The die bonding area and the induction provided in the cavity
Internal high-frequency transmission line consisting of a metal thin film on the surface of an electrical substrate
With a metal thin film on the bottom of the package substrate.
The external coplanar line that forms the lead terminals and the internal height
Electrical connection between frequency transmission line and external coplanar line
Package consisting of via holes made of metal
The internal high-frequency transmission line formed in the cavity
Is composed of a coplanar line,
The metal between the grounded metal of the
Connected by multiple via holes.
It is. According to this, the internal high-frequency transmission line is
Since it was configured as a laner line, its signal and ground metal
By properly selecting the spacing between the lines, the line width of the signal line can be reduced.
Compatible with line width of microstrip line on IC chip
To reduce the loss and reduce the reflection loss.
It can be reduced. In addition, an external coplanar line and an internal high-frequency transmission
The transmission line is made up of multiple via holes and coaxial via holes.
Connection, there is little high-frequency mismatch, and
What can increase isolation
It is. As described above, as a transmission line for high frequency,
Coplanar lines are used because high-frequency substrates
Width of the signal line on the side (top surface) on which the components are mounted
On the side (lower surface) mounted on the external electric circuit board
To compensate for discontinuities with the line width
For the purpose of improving the isolation between
The connection between coplanar lines is more
It is by preference. However, as described in the above-mentioned Japanese Patent No. 2605502,
Of the internal high-frequency transmission line
At the connection between the Rainer line and the via hole
Phase, external coplanar line and via
Between the ground phase at the connection to
The ground between the front and back surfaces is conducted through the
A shift occurred because the route was long. That
Connection between the internal coplanar line and the external coplanar line.
At the connection, reflection of the transmitted high-frequency signal occurs,
There is a problem that reflection loss increases. Therefore, in order to solve the above problems,
For transmitting high-frequency signals formed on the upper surface of a dielectric substrate
And a first coplanar line for
Coplanar line formed in parallel with the coplanar line of
The line and the inner layer ground conductor formed inside the dielectric substrate
And the lines of both coplanar lines
Through conductor in which the ends of the path conductors are insulated from the inner layer ground conductor
And both coplanar lines from the through conductor
At a position of 0.2 to 5 mm on both sides in a direction orthogonal to
The ground conductors of both coplanar lines are
Electrically connected by electrically connected ground through conductors
A device having a frequency input / output unit has been proposed (Japanese Patent Laid-Open No.
01-177012). [0009] However, the above-mentioned problem is not solved.
In the high-frequency substrate described in JP 2001-177012 A
Is the first coplanar line on the upper surface of the dielectric substrate and the inner layer ground.
Penetrates the conductor and the second coplanar line on the lower surface of the dielectric substrate
Conductor, but the inner layer ground conductor and the second core
With the ground conductor on the lower surface side formed on both sides of the planar line
The gap between the inner layer ground conductor and the lower side ground conductor
Increases electrical capacity between the body and high-frequency signals
There has been a problem that electromagnetic interference and coupling are likely to occur.
As a result, between the inner-layer ground conductor and the second coplanar line,
The high frequency signal transmitted by the
There was a problem that loss increased. Accordingly, the present invention has been made in view of the above-mentioned conventional problems.
It is completed and its purpose is to
Grounding conductors on the lower side formed on both sides of the second coplanar line.
Reduce the electrical capacitance between the body and the inner layer ground conductor.
Suppresses resonance and reflection of high-frequency signals with the ground conductor on the bottom side
To have good transmission characteristics.
You. [0011] The high-frequency wiring base of the present invention
The plate transmits high-frequency signals formed on the upper surface of the dielectric substrate
A first coplanar line for performing
A second lower surface formed in parallel with the first coplanar line.
And forming two coplanar lines inside the dielectric substrate.
With the tips facing each other across the grounded inner conductor
And the tip of the line conductor of both coplanar lines
Are electrically connected to each other with a through conductor insulated from the inner layer ground conductor.
Connected to the through conductor of the inner layer ground conductor from 0.3 to
Multiple independent conductor-free parts are installed at 1.5 mm apart.
And a high-frequency input / output unit. The high-frequency wiring board of the present invention has an inner layer grounding conductor.
Independent multi-layers at a distance of 0.3 to 1.5 mm from the conductor
Because the number of conductor-free parts provided is
Grounding conductors on the lower side formed on both sides of the second coplanar line.
While reducing the electric capacity that occurs between the body and
In particular, a through conductor between the inner layer ground conductor and the ground conductor on the lower side
Can greatly reduce the electrical capacity around the
Between the ground conductor and the ground conductor on the lower side, the through conductor and its surroundings
Significantly reduce the electrical capacitance between the conductors
be able to. As a result, the inner layer ground conductor
Electromagnetically converts high-frequency signals transmitted through conductors between conductors
Interference and coupling are less likely to occur,
The reflection can be greatly suppressed, and the reflection loss can be suppressed. Further, the inner layer ground conductor and the lower surface side ground conductor
The internal capacitance is reduced because the electrical capacitance generated during
Reduce the spacing between the conductor and the ground conductor on the bottom side
The size of the high-frequency substrate can be reduced. DESCRIPTION OF THE PREFERRED EMBODIMENTS The high-frequency substrate of the present invention will be described below.
This will be described in detail. FIG. 1 shows the high-frequency substrate of the present invention.
FIG. 1A shows an example of an embodiment, and FIG.
Top view of high frequency input / output unit, (b) is AA 'line of (a)
(C) is a sectional view taken along line BB ′ of (a).
Sectional view, (d) is a plan view of the inner-layer ground conductor, (e) is a high circumference
It is a bottom view of the high frequency input / output part of a wave board. In FIG. 1, 1 is a high-frequency substrate, and 2 is a dielectric substrate.
The substrate 3 is a high-frequency signal formed on the upper surface of the dielectric substrate 2.
1 is a first line conductor for transmitting a signal, and 4 is a first line conductor.
A first ground conductor formed on both sides of the body 3;
A first coplanar line is formed by the line conductor 3 and the first ground conductor 4.
Road 5 is configured. 6 is provided on the lower surface of the dielectric substrate 2.
Of the first line conductor 3 so as to face the end of the first line conductor 3.
A second line conductor formed in parallel with the first line conductor 3,
Reference numeral 7 denotes second ground conductors formed on both sides of the second line conductor 6.
A second line conductor 6 and a second ground conductor 7
Two coplanar lines 8 are configured. In this example,
Forming two first and second coplanar lines 5, 8
I have. Reference numeral 9 designates a first inside of the dielectric substrate 2.
Facing the coplanar line 5 and the second coplanar line 8
Inner layer ground conductor formed so that the first line conductor
The tip of the body 3 and the tip of the second line conductor 6 are electrically connected.
And the through conductor 10 is different from the inner layer ground conductor 9.
It is electrically insulated. Thus, the shape is formed on the upper surface of the dielectric substrate 2.
The first coplanar line 5 thus formed and the lower part of the dielectric substrate 2
The second coplanar line 8 formed on the surface is
With the inner layer ground conductor 9 formed inside the plate 2 interposed,
And the coplanar lines 5,
The line conductors 3 and 6 of FIG.
Connected to form a high-frequency input / output unit of the high-frequency substrate 1.
You. In this high frequency input / output unit, the second line conductor 7 is
Also serves as a mounting electrode for connection to the electric circuit board. In the present invention, the inner layer ground conductor 9
And is electrically connected to the
On both sides in a direction orthogonal to the second coplanar lines 5, 8,
Ground conductors 4, 7 of the first and second coplanar lines 5, 8
It is preferable to provide a ground through conductor 11 for electrically connecting the conductor.
Suitable. With this configuration, the first and second coplanar wires
The connecting portions of the paths 5 and 8 are connected to the through conductor 10 and the inner layer grounding conductor 9.
Has electrical characteristics close to a coaxial structure due to the through conductor 11
To reduce high frequency mismatch
Thus, the reflection loss can be reduced. Also, the inner layer ground conductor
Ground conductor of body 9 and first and second coplanar lines 5 and 8
4 and 7 are connected by the ground through conductor 11,
At the connection between the second line conductors 3 and 6 and the through conductor 10
It is possible to equalize the phases of the ground to eliminate the deviation.
And suppresses reflection of high-frequency signals to reduce reflection loss
Can be In this example, the first upper surface of the dielectric substrate 2
The first ground conductor 4 and the second ground conductor 7 on the lower surface are respectively
Extending around the ends of these line conductors 3 and 6.
This allows for a better grounding condition
You. Reference numeral 12 is bonded to the upper surface of the dielectric substrate 2.
M is a half formed on the upper surface of the dielectric substrate 2.
It is a mounting part for electronic components such as conductor elements. Like this
By providing the mounting portion M and the frame 12, the high-frequency substrate 1
The package for electronic component storage that houses electronic components for high frequency
Can be used as di. For example, such a high-frequency substrate 1
Is manufactured by a ceramic green sheet laminating method or the like.
In this case, the dielectric substrate 2 may include a plurality of dielectric layers.
It is formed by laminating 2a and 2b. At this time, the dielectric layer
By setting 2a and 2b to an appropriate thickness, the inner layer
The position of the ground conductor 9, that is, the inner layer ground conductor 9 and the first and second cups
The distance from the laner lines 5 and 8 is determined by the required characteristics of the high frequency
Desired settings can be made according to the characteristics. In particular, the position where the inner-layer ground conductor 9 is formed is
The distance from the first coplanar line 5 is the second coplanar line
If it is set to be smaller than the distance to Road 8,
The second coplanar with the speedy matching
The width of the line conductor 6 of the line 8 can be increased,
This is preferable because the attachment strength of the terminal increases. In the present invention, the through conductor of the inner layer ground conductor 9 is used.
Multiple independent conductors 0.3 to 1.5 mm away from body 10
A non-formed portion 15 is provided. Through conductor 10 and conductor non-formed part 15
If the distance from the conductor is less than 0.3 mm,
Capacitive component and inductive component (self-inducing
Of the conductive component). Then, Impey
Loss of matching between capacitive and inductive components suitable for dance matching
Therefore, a resonance point is likely to appear. Through conductor 10
And the distance between the conductor non-formed portion 15 is 1.5 mm or less and 1.5 m
m, the electromagnetic coupling between the through conductor 10 and the inner layer ground conductor 9
Depending on the case, the capacitance component and the induction component (self-induction component)
The induction component increases. Then, it is suitable for impedance matching.
The matching between the inductive component and the capacitive component
Is likely to appear. The shape of the non-conductor-formed portion 15 is circular, elliptical,
Various shapes such as a polygon such as a quadrangle can be used.
In addition, the size of the conductor non-formed portion 15 is the diameter when the shape is circular.
Is preferably 0.05 to 0.5 mm. Less than 0.05mm
Is used for electromagnetic coupling between the second line conductor 6 and the inner layer ground conductor 9.
From the capacity component and the induction component (self-induction component),
Ingredients increase. Then, it is suitable for impedance matching
The matching between the capacitive component and the inductive component is impaired, and the resonance point
It is easy to be. If it exceeds 0.5 mm, the second line
Electromagnetic coupling between the path conductor 6 and the inner-layer ground conductor 9 causes capacitance
The induction component increases in the minutes and the induction component (self-induction component)
You. Then, a capacitance component suitable for impedance matching and induction
Matching with the conducting component is lost, and a resonance point appears.
Easy. The high-frequency substrate 1 is connected to an external electric circuit.
While mounted on the upper surface of the substrate, the second line conductor 6 is
To the connection line conductor of the external electric circuit board and the second grounding conductor.
The body 7 is connected to the ground conductor of the external electric circuit board with a solder bump.
Using conductive connecting members such as
Electrical connection by the reflow process
Thus, the high-frequency board 1 is mounted on the external electric circuit board. Next, an embodiment of the high-frequency substrate of the present invention will be described.
Another example of the configuration is shown in FIG. FIG. 2A shows a high-frequency substrate.
(B) is an AA ′ line in (a) of FIG.
(C) is a cross-sectional view taken along the line BB ′ of (a).
(D) is a plan view of the inner-layer ground conductor, and (e) is a high-level view.
It is a bottom view of the high frequency input / output part of a frequency substrate. FIG.
In FIG. 1, the same parts as those in FIG.
The detailed description of is omitted. In FIG. 2, reference numeral 13 denotes an auxiliary ground through conductor.
The first ground conductor 4 on the upper surface of the dielectric substrate 2 and the
The second ground conductor 7 is connected to the tip of the first and second line conductors 3 and 6.
It is provided so as to surround the edge, and a better grounding condition
Obtainable. In addition, the auxiliary ground through conductor 13 is
The through conductor 10 and the shortest distance conductor in the ground conductor 9
The through conductor 10 has a distance approximately equal to the distance from the non-formed portion 15.
From the first ground conductor 4 and the inner layer.
The ground conductor 9 and the second ground conductor 7 are electrically connected.
You. According to such a high-frequency substrate 1 of the present invention,
For example, in the high frequency input / output unit, the first and second coplanar
The connection between the lines 5 and 8 is connected to the through conductor 10 and the inner layer ground conductor 9.
Has electrical characteristics close to a coaxial structure due to the ground penetrating conductor 11
To reduce high frequency mismatch
The reflection loss can be reduced. Also, the first and second
The ground at the connection between the line conductors 3 and 6 and the through conductor 10
Can be eliminated by equalizing the phase of the
The reflection loss of the frequency signal can be suppressed by suppressing the reflection of the frequency signal.
You. And, by providing the conductor non-formed portion 15, the penetration
The electric capacity around the conductor 10 can be greatly reduced,
Electromagnetic interference or coupling occurs in the high-frequency signal transmitted by the body 10.
It is difficult to generate and greatly suppresses resonance and reflection of high frequency signals
Thus, reflection loss can be suppressed. Also, the dielectric substrate
2 effectively suppresses leakage of high-frequency signal electromagnetic fields
Can reflect the high frequency signal in the high frequency input / output section
Loss can be further suppressed. Further, the first and second ground conductors 4 and 7 are
Extending around the ends of the first and second line conductors 3 and 6, respectively.
In the case of providing, the through conductor 10 is formed from the first coplanar line 5.
Via the second coplanar line 8 or vice versa
Capacitance to minimize loss when transmitting high frequency signals
Adjusting the components to form the first and second ground conductors 4, 7;
The conductor non-formed portion 15 is formed on the inner-layer ground conductor 9. This and
And the resistance, inductor, and capacitance match all over the signal line.
And first and second ground conductors 4, 7 and conductors
It is preferable to form the non-formed portion 15 by adjusting the position. Then, such a high-frequency substrate 1 of the present invention
Is mounted on the upper surface of the external electric circuit board, and the second
The line conductor 6 is used as a connection line conductor of the external electric circuit board.
The second ground conductor 7 to the ground conductor of the external electric circuit board.
By conductive connection members such as solder bumps, respectively; or
Electrical connection by reflow process using solder material
As a result, the high-frequency board 1 is mounted on the external electric circuit board.
Be mounted. Next, an embodiment of the high-frequency substrate of the present invention will be described.
Another example of the configuration is shown in FIG. FIG. 3A shows a high-frequency substrate
(B) is an AA ′ line in (a) of FIG.
(C) is a cross-sectional view taken along the line BB ′ of (a).
(D) is a plan view of the inner-layer ground conductor, and (e) is a high-level view.
It is a bottom view of the high frequency input / output part of a frequency substrate. FIG.
In FIG. 1, the same parts as those in FIG.
The detailed description of is omitted. In FIG. 3, the inner-layer ground conductor 9 is connected to the inner layer.
The dielectric substrate 2 is composed of two layers, that is, the ground conductors 9a and 9b.
Of dielectric layers 2a, 2b, and 2c. Inner layer ground conductor 9
a and the inner-layer ground conductor 9b are connected by the intermediate ground through conductor 14.
Has been continued. With this configuration, the contact around the through conductor 10 is
Strongly formed earth potential wall, more coaxial structure
By adopting a pseudo-coaxial structure close to
The transmission performance can be improved to reduce the transmission loss. In this configuration
Between the inner-layer ground conductor 9 a and the first coplanar line 5.
The distance between the inner layer ground conductor 9b and the second coplanar line 8
It is good to set it to be smaller than the distance of
In this case, impedance matching becomes easier
The width of the second line conductor 6 can be increased, and the lead end
The attachment strength of the child will increase. The length of the intermediate ground through conductor 14 is 50 μm to 0.5
mm is good, and if it is less than 50 μm, it is too short and difficult to manufacture.
If it exceeds 0.5 mm, the distance between the inner-layer ground conductors 9a and 9b
Since the separation is long, the ground potential is likely to be unstable. Further, the first ground conductor 4 is connected to the inner layer on the upper layer side.
The length of the ground through conductor 11 that connects to the ground conductor 9a is 50 μm
0.5 μm is good, and if it is less than 50 μm, the first line conductor 3
The inner-layer ground conductor 9a comes close to the
, A capacitance component occurs, and for impedance matching,
It is necessary to reduce the width of the wiring conductor of the high-frequency substrate 1. So
Then, the connection between the mounted semiconductor element and the high-frequency substrate 1
The reflection of the high-frequency signal tends to increase in the section. More than 0.5mm
As a result, the size of the high-frequency substrate 1 increases. Second
A connection for connecting the ground conductor 7 to the lower inner-layer ground conductor 9b
The length of the ground through conductor 11 is preferably 50 μm to 0.5 mm, and 50 μm
If it is less than the above, the width of the wiring conductor of the high-frequency substrate 1 is narrow as in the above.
And it is difficult to join lead terminals for external connection
become. If it exceeds 0.5 mm, the wiring conductor of the high-frequency substrate 1
And the high-frequency substrate 1 becomes large.
You. FIG. 4 shows an embodiment of the high-frequency substrate 1 of the present invention.
FIG. 3 shows another example of the embodiment, and in the configuration of FIG.
The auxiliary ground through conductor 13 shown in FIG. 2 is provided. In FIG.
(A) is a top view of the high-frequency input / output unit of the high-frequency substrate 1,
(B) is a cross-sectional view taken along line AA ′ of (a), and (c) is
(A) is a cross-sectional view taken along the line BB ', (d) is an inner layer ground.
FIG. 5E is a plan view of a conductor, and FIG.
It is a bottom view. In FIG. 4, the same parts as those in FIG.
Reference numerals are used, and their detailed description is omitted. With this configuration, the through conductor 10 and its surroundings are
By using a pseudo-coaxial structure close to the coaxial structure, high-frequency signals
Transmission characteristics of the first and second line conductors.
Dielectric substrate extending from the tip of 3, 6 to the extension direction of the transmission direction
It is possible to effectively suppress the leakage of the high-frequency signal into the plate 2.
To reduce the reflection loss of high-frequency signals in the high-frequency input / output section.
Can be suppressed. The length of the auxiliary ground through conductor 13 is
The same range for the same reason as in the case of the ground through conductor 11 in FIG.
Is good. The high frequency band referred to in the present invention is 1 to
A high frequency band of about 100 GHz and a millimeter wave band,
Therefore, the high-frequency substrate 1 of the present invention has a high frequency of about 1 to 100 GHz.
It is used in frequency band and millimeter wave band,
Use in a relatively low frequency band of about 1 to 80 GHz
Is preferred. It is in the high frequency band over 80GHz
High frequency signals are more susceptible to external magnetic fields,
This leads to an increase in size and loss. More preferred
Preferably, it is used at about 1 to 65 GHz. The present invention is not limited to the above embodiment.
Without departing from the scope of the present invention.
It is not a problem to change or improve. For example,
In the above embodiment, the first and second coplanar lines 5,
8 is provided for each two, but the coplanar
When one line is provided or three or more lines are provided.
It may be a case of multiple ports. Inner layer ground conductors 9a, 9
Regarding b, in the above embodiment, two layers are provided.
However, three or more layers may be provided. Also, co-play
The lead conductors and conductor bumps (conductor conductors)
) With a conductive member for connection
good. Embodiments of the high-frequency wiring board of the present invention will be described below.
This will be described in detail. An embodiment of the high-frequency wiring board of the present invention will be described.
Therefore, the high-frequency wiring board 1 of FIG.
Was. Alumina (Al Two O Three ) Dielectric consisting of ceramics
Two layers are provided on the upper surface of the dielectric substrate on which the layers 2a, 2b, and 2c are stacked.
The first coplanar line 5 is formed, and the first
Two second coplanar lines 8 parallel to the Lener lines 5
Formed. Also, between the dielectric layer 2a and the dielectric layer 2b
Formed the inner-layer ground conductor 9. First coplanar line 5
Of the first line conductor 3 and the second coplanar line
8 and the tip of the second line conductor 6 from the via hole
Are electrically connected by the through conductor 10. Also, the first cup
The first ground conductor 4 and the second co-pres
And the second ground conductor 7 forming the transmission line 8 is connected to the ground through conductor 11.
Was electrically connected. This ground through conductor 11 is shown in FIG.
As shown in (d), the two conductors perpendicular to the transmission
The pseudo-coaxial structure is provided by
I made it. The first coplanar line 5, the second
Coplanar line 8, through conductor 10, ground through conductor 11, and
The inner-layer ground conductor 9 is made of gold containing Mo—Mn as a metal component.
Ceramic green sea as a dielectric substrate
Apply or fill the specified area and through hole of
It was formed by firing simultaneously with the Mick Green sheet. Then, as shown in FIG.
The distance from the through conductor 10 near the through conductor 10 of the ground conductor 9 is
From the through conductor 10 to the second line conductor in the range of 0.3 to 2.0 mm
A circular conductor with a diameter of 0.05 mm is placed on the part located above
Twenty non-formed portions 15 were formed. Also, the ground conductor and the through conductor 10
The distance from the conductor 11 is about 0.25 mm, and the thickness of the dielectric layer 2a is
About 0.3 mm, the thickness of the dielectric layer 2 b is about 0.3 mm,
The thickness of 2c was about 0.3 mm. As a comparative example, the conductor non-formed portion 15 is not provided.
Except for the above, a conventional one constructed in the same manner as the above
did. With respect to the above embodiment, the frequency range of 1 to 65 GHz
High frequency signal is input, and 1-40
High frequency signals of GHz are input and their S11 (reflection characteristics)
Characteristics: reflection loss) and S21 (transmission characteristics: insertion loss).
FIG. 5 shows the results obtained by the simulation. FIG.
Thus, in the case of the comparative example, since resonance occurred at 35 GHz, S
21 increased, but the resonance point of the embodiment was 6
Shifted to 2.5 GHz to obtain good transmission characteristics over a wide band
Was. In the embodiment, S11 has a maximum of 33 dB (15 GH).
z) Improved and reduced return loss over a wide band
On the other hand, in the comparative example, S11 has a maximum of 29 dB (1 GHz).
z), but S11 in a wide band of 10 to 40 GHz
The reflection loss was increased to 15 dB or less. The present invention is not limited to the above-described embodiment and embodiment.
The present invention is not limited to the example, and does not depart from the gist of the present invention.
Various changes can be made within the above range. The high frequency wiring board of the present invention has a dielectric substrate.
The first for transmitting the high frequency signal formed on the upper surface of the plate
And a first coplanar line on the lower surface of the dielectric substrate.
A second coplanar line formed parallel to the
Between the inner-layer ground conductor formed inside the dielectric substrate.
With both ends facing each other,
The ends of the line conductors are insulated from the inner layer ground conductor.
Electrically connected by the through conductor
Multiple conductors separated from each other by 0.3 to 1.5 mm or more
That it has a high-frequency input / output unit with a non-forming part
The inner ground conductor and the second coplanar line on both sides.
Electric capacity generated between the ground conductor on the lower side
In particular, and especially the contact between the inner layer ground conductor and the lower side
Significantly increases the electrical capacity around the through conductor between the ground conductor
Between the inner layer ground conductor and the ground conductor on the lower side.
Between the through conductor and the surrounding conductor
The capacity can be significantly reduced. As a result, the inner layer
Transmission between the ground conductor and the ground conductor on the bottom
Electromagnetic interference and coupling to high-frequency signals
Greatly reduces the resonance and reflection of high-frequency signals,
Can be suppressed. Also, the inner layer ground conductor and the lower surface side ground conductor
The internal capacitance is reduced because the electrical capacitance generated during
Reduce the spacing between the conductor and the ground conductor on the bottom side
And the size of the high-frequency wiring board is reduced.

【図面の簡単な説明】 【図1】本発明の高周波用配線基板について実施の形態
の一例を示し、(a)は高周波用配線基板の高周波入出
力部の上面図、(b)は(a)のA−A’線における断
面図、(c)は(a)のB−B’線における断面図、
(d)は内層接地導体の平面図、(e)は高周波用配線
基板の高周波入出力部の下面図である。 【図2】本発明の高周波用配線基板について実施の形態
の他の例を示し、(a)は高周波用配線基板の高周波入
出力部の上面図、(b)は(a)のA−A’線における
断面図、(c)は(a)のB−B’線における断面図、
(d)は内層接地導体の平面図、(e)は高周波用配線
基板の高周波入出力部の下面図である。 【図3】本発明の高周波用配線基板について実施の形態
の他の例を示し、(a)は高周波用配線基板の高周波入
出力部の上面図、(b)は(a)のA−A’線における
断面図、(c)は(a)のB−B’線における断面図、
(d)は内層接地導体の平面図、(e)は高周波用配線
基板の高周波入出力部の下面図である。 【図4】本発明の高周波用配線基板について実施の形態
の他の例を示し、(a)は高周波用配線基板の高周波入
出力部の上面図、(b)は(a)のA−A’線における
断面図、(c)は(a)のB−B’線における断面図、
(d)は内層接地導体の平面図、(e)は高周波用配線
基板の高周波入出力部の下面図である。 【図5】本発明の図1の高周波用配線基板について反射
損失(S11)および挿入損失(S21)をシミュレーショ
ンによって求めた結果のグラフである。 【符号の説明】 1:高周波用配線基板 2:誘電体基板 3:第1の線路導体 4:第1の接地導体 5:第1のコプレーナ線路 6:第2の線路導体 7:第2の接地導体 8:第2のコプレーナ線路 9,9a,9b:内層接地導体 10:貫通導体 11:接地貫通導体 15:導体非形成部
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 shows an example of an embodiment of a high-frequency wiring board according to the present invention, in which (a) is a top view of a high-frequency input / output unit of the high-frequency wiring board, and (b) is (a). ) Is a sectional view taken along line AA ′, (c) is a sectional view taken along line BB ′ in (a),
(D) is a plan view of the inner-layer ground conductor, and (e) is a bottom view of the high-frequency input / output unit of the high-frequency wiring board. FIGS. 2A and 2B show another example of the high-frequency wiring board according to the embodiment of the present invention, in which FIG. 2A is a top view of a high-frequency input / output unit of the high-frequency wiring board, and FIG. (C) is a cross-sectional view taken along line BB ′ of (a),
(D) is a plan view of the inner-layer ground conductor, and (e) is a bottom view of the high-frequency input / output unit of the high-frequency wiring board. 3A and 3B show another example of the embodiment of the high-frequency wiring board according to the present invention, wherein FIG. 3A is a top view of a high-frequency input / output unit of the high-frequency wiring board, and FIG. 3B is AA of FIG. (C) is a cross-sectional view taken along line BB ′ of (a),
(D) is a plan view of the inner-layer ground conductor, and (e) is a bottom view of the high-frequency input / output unit of the high-frequency wiring board. 4A and 4B show another example of the embodiment of the high-frequency wiring board according to the present invention, in which FIG. 4A is a top view of a high-frequency input / output section of the high-frequency wiring board, and FIG. (C) is a cross-sectional view taken along line BB ′ of (a),
(D) is a plan view of the inner-layer ground conductor, and (e) is a bottom view of the high-frequency input / output unit of the high-frequency wiring board. FIG. 5 is a graph showing a result obtained by simulating a reflection loss (S11) and an insertion loss (S21) for the high-frequency wiring board of FIG. 1 according to the present invention; [Description of Symbols] 1: Wiring board for high frequency 2: Dielectric substrate 3: First line conductor 4: First ground conductor 5: First coplanar line 6: Second line conductor 7: Second ground Conductor 8: Second coplanar line 9, 9a, 9b: Inner layer ground conductor 10: Through conductor 11: Ground through conductor 15: Conductor non-formed portion

Claims (1)

【特許請求の範囲】 【請求項1】 誘電体基板の上面に形成された高周波信
号を伝送するための第1のコプレーナ線路と、前記誘電
体基板の下面に前記第1のコプレーナ線路と平行に形成
された第2のコプレーナ線路とを、前記誘電体基板の内
部に形成された内層接地導体を挟んで先端同士を対向さ
せて配置するとともに、両コプレーナ線路の線路導体の
前記先端同士を前記内層接地導体と絶縁された貫通導体
で電気的に接続し、前記内層接地導体の前記貫通導体か
ら0.3〜1.5mm離れた部位に独立した複数の導体非形成
部を設けて成る高周波入出力部を具備したことを特徴と
する高周波用配線基板。
Claims: 1. A first coplanar line formed on an upper surface of a dielectric substrate for transmitting a high-frequency signal, and a lower surface of the dielectric substrate is formed in parallel with the first coplanar line. The formed second coplanar line is disposed with its ends facing each other across an inner layer ground conductor formed inside the dielectric substrate, and the ends of the line conductors of both coplanar lines are connected to the inner layer. A high-frequency input / output unit electrically connected by a through conductor insulated from a ground conductor and provided with a plurality of independent conductor non-forming portions at a portion of the inner layer ground conductor separated from the through conductor by 0.3 to 1.5 mm. A high-frequency wiring board, characterized in that:
JP2002010613A 2002-01-18 2002-01-18 High frequency wiring board Pending JP2003218601A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002010613A JP2003218601A (en) 2002-01-18 2002-01-18 High frequency wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002010613A JP2003218601A (en) 2002-01-18 2002-01-18 High frequency wiring board

Publications (1)

Publication Number Publication Date
JP2003218601A true JP2003218601A (en) 2003-07-31

Family

ID=27648303

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002010613A Pending JP2003218601A (en) 2002-01-18 2002-01-18 High frequency wiring board

Country Status (1)

Country Link
JP (1) JP2003218601A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010232313A (en) * 2009-03-26 2010-10-14 Tdk Corp Electronic part module

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010232313A (en) * 2009-03-26 2010-10-14 Tdk Corp Electronic part module

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