JP2003218403A - Composite light emitting device and its manufacturing method - Google Patents
Composite light emitting device and its manufacturing methodInfo
- Publication number
- JP2003218403A JP2003218403A JP2002009722A JP2002009722A JP2003218403A JP 2003218403 A JP2003218403 A JP 2003218403A JP 2002009722 A JP2002009722 A JP 2002009722A JP 2002009722 A JP2002009722 A JP 2002009722A JP 2003218403 A JP2003218403 A JP 2003218403A
- Authority
- JP
- Japan
- Prior art keywords
- light emitting
- emitting device
- semiconductor light
- electrodes
- bumps
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、フリップチップ型
の複合発光素子にかかり、特に半導体発光素子からサブ
マウント素子への放熱特性を向上させた複合発光素子及
びその製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flip-chip type composite light emitting device, and more particularly to a composite light emitting device having improved heat dissipation characteristics from a semiconductor light emitting device to a submount device and a method for manufacturing the same.
【０００２】[0002]
【従来の技術】従来、サブマウント素子上にバンプを介
してフリップチップ型の半導体発光素子を接合した複合
発光素子が多く使用されている。2. Description of the Related Art Conventionally, a composite light emitting device in which a flip-chip type semiconductor light emitting device is bonded onto a submount device via a bump has been widely used.
【０００３】図６（Ａ）、（Ｂ）に示すように、この複
合発光素子７０は、シリコンデバイスであるツェナーダ
イオード素子７１上にＧａＮ系ＬＥＤ素子７２をＡｕバ
ンプ７３，７４で接合した構造、すなわちフリップチッ
プ実装した構造である。ツェナーダイオード素子７１の
下面にはＡｕ電極７５が設けられ、上面にはＡｌ電極７
６ａ，７６ｂが設けられている。また、白色ＬＥＤとし
て使用するために、青色発光のＧａＮ系ＬＥＤをＹＡＧ
系蛍光体７７で覆う構造にしている。As shown in FIGS. 6 (A) and 6 (B), this composite light emitting device 70 has a structure in which a GaN LED device 72 is joined by Au bumps 73 and 74 on a Zener diode device 71 which is a silicon device. That is, the structure is flip-chip mounted. An Au electrode 75 is provided on the lower surface of the Zener diode element 71, and an Al electrode 7 is provided on the upper surface.
6a and 76b are provided. In order to use it as a white LED, a blue-emitting GaN-based LED is used as a YAG.
The structure is covered with the system phosphor 77.
【０００４】ＧａＮ系ＬＥＤを単独で使用する場合に比
べると、Ａｕバンプで接合することによりＬＥＤ素子の
静電保護を行うことができ、また、サファイア基板側か
ら光を取り出すことによる輝度が向上するという作用効
果があった。Compared with the case where a GaN-based LED is used alone, the LED element can be electrostatically protected by bonding with Au bumps, and the brightness can be improved by extracting light from the sapphire substrate side. There was a function effect.
【０００５】複合発光素子７０に流す電流は、現状では
ＩF＝２０ｍＡ程度であるが、近年では、これをＩF＝１
００ｍＡ程度まで増加させて複合発光素子の輝度を増加
させることが考えられている。The current flowing through the composite light emitting device 70 is about I F = 20 mA at present, but in recent years, this is I F = 1.
It has been considered to increase the brightness of the composite light emitting device by increasing it to about 00 mA.
【０００６】[0006]
【発明が解決しようとする課題】しかしながら、複合発
光素子７０は、放熱性に問題があり、電流をある程度以
上増やしても輝度が増加せずに、逆に下がる場合もあっ
た。However, the composite light emitting element 70 has a problem in heat dissipation, and even if the current is increased to a certain extent or more, the brightness does not increase but may decrease in reverse.
【０００７】すなわち、ＬＥＤ素子で発生する熱の流れ
やすさは、熱伝導率（ｋ）と面積（Ｓ）の積（ｋＳ）で
評価できる。例えば、ＧａＮ系ＬＥＤを単独で使用し、
リードフレームに接続した場合には、サファイア基板の
熱伝導率ｋ＝４２Ｗ／ｍ／Ｋに、サファイア基板の面積
Ｓ＝０．３２ｍｍ×０．３２ｍｍを乗じると、ｋＳ＝
４．３×１０-6Ｗ・ｍ／Ｋとなる。That is, the ease with which heat is generated in the LED element can be evaluated by the product (kS) of the thermal conductivity (k) and the area (S). For example, using a GaN-based LED alone,
When connected to a lead frame, multiplying the thermal conductivity k = 42 W / m / K of the sapphire substrate by the area S of the sapphire substrate S = 0.32 mm × 0.32 mm gives kS =
It becomes 4.3 × 10 −6 W · m / K.
【０００８】フリップチップ型の複合発光素子をリード
フレームに接続した場合には、ツェナーダイオードから
リードフレームへの熱の移動と、ＧａＮ系ＬＥＤ素子か
らツェナーダイオードへの熱の移動を考慮する必要があ
る。When the flip-chip type composite light emitting device is connected to the lead frame, it is necessary to consider the heat transfer from the Zener diode to the lead frame and the heat transfer from the GaN-based LED device to the Zener diode. .
【０００９】ツェナーダイオードのｋＳ値は、ｋＳ＝
４．４２×１０-5Ｗ・ｍ／Ｋとなり、ＧａＮ系ＬＥＤか
らリードフレームへの熱の流れより、熱の流れは１０倍
以上流れやすいと考えられる。The kS value of the Zener diode is kS =
It is 4.42 × 10 −5 W · m / K, and it is considered that the heat flow is 10 times or more easier than the heat flow from the GaN-based LED to the lead frame.
【００１０】一方、ＡｕバンプのｋＳ値を考えると、Ａ
ｕバンプの熱伝導率ｋ＝３１９Ｗ／ｍ／Ｋに、Ａｕバン
プ２つ分の面積０．０５ｍｍ×０．０５ｍｍ×π×２を
乗じると、ｋＳ＝５．０１×１０-6Ｗ・ｍ／Ｋとなり、
これはＧａＮ系ＬＥＤを単独で使用する場合に比べて少
しだけ大きいだけである。On the other hand, considering the kS value of the Au bump, A
Multiplying the thermal conductivity of the u bump by k = 319 W / m / K by the area of two Au bumps of 0.05 mm × 0.05 mm × π × 2, kS = 5.01 × 10 −6 W · m / K,
This is only slightly larger than when using a GaN-based LED alone.
【００１１】また、ＩF＝２０ｍＡのときにＧａＮ系Ｌ
ＥＤから発生する熱量に比べて、ＩF＝１００ｍＡのと
きの熱量は、消費電力Ｉ×Ｖに比例するとして、６．８
倍に増加する。これは、ＧａＮ系ＬＥＤのＶF値がＩF＝
２０ｍＡのときＶF＝３．５Ｖであるのに対し、ＩF＝１
００ｍＡではＶF＝４．８Ｖに増加するからである。し
たがって従来の複合発光素子は、ＩF＝２０ｍＡのとき
は十分信頼性が確保できるだけの放熱特性を持つが、そ
れ以上の電流に対しては、十分な放熱特性を持つことが
できない。そのネックとなっているのが、複合発光素子
の場合、Ａｕバンプの平断面積が小さいことである。従
来の複合発光素子のＡｕバンプの平断面積の合計は、半
導体発光素子の平断面積の１５％程度である。When I F = 20 mA, GaN-based L
Compared with the amount of heat generated from the ED, the amount of heat when I F = 100 mA is 6.8, which is proportional to the power consumption I × V.
Doubled. This is because the V F value of the GaN-based LED is I F =
While V F = 3.5V at 20 mA, I F = 1
This is because at 00 mA, V F increases to 4.8 V. Therefore, the conventional composite light emitting device has a heat dissipation characteristic that can secure sufficient reliability when I F = 20 mA, but cannot have a sufficient heat dissipation characteristic for a current higher than that. The bottleneck is that, in the case of the composite light emitting device, the Au bump has a small plane sectional area. The total plane sectional area of the Au bumps of the conventional composite light emitting element is about 15% of the plane sectional area of the semiconductor light emitting element.
【００１２】したがって、フリップチップ型の複合発光
素子は、Ａｕバンプを通過する熱の流れがＩF＝２０ｍ
Ａ以上のときには不十分であるため、ＧａＮ系ＬＥＤの
発熱を十分に放熱できずに大電流を流したときの信頼性
の確保が困難になるという問題がある。Therefore, in the flip-chip type composite light emitting device, the heat flow through the Au bump is I F = 20 m.
Since it is insufficient when the value is A or more, there is a problem in that it is difficult to secure the reliability when a large current is passed without sufficiently releasing the heat generated by the GaN-based LED.
【００１３】そこで本発明は、放熱性を向上させたフリ
ップチップ型の複合発光素子を提供することを目的とす
る。Therefore, an object of the present invention is to provide a flip-chip type composite light emitting device having improved heat dissipation.
【００１４】[0014]
【課題を解決するための手段】本発明の複合発光素子に
おいては、第１、第２の大型バンプの平断面積の合計
を、半導体発光素子の平断面積の３０％以上としたもの
である。In the composite light emitting device of the present invention, the total of the plane sectional areas of the first and second large bumps is 30% or more of the plane sectional area of the semiconductor light emitting device. .
【００１５】この発明によれば、放熱性を向上させたフ
リップチップ型の複合発光素子が得られる。According to the present invention, a flip-chip type composite light emitting device having improved heat dissipation can be obtained.
【００１６】[0016]
【発明の実施の形態】本発明の請求項１に記載の発明
は、透明基板上に積層した半導体薄膜層の一方の面に一
対の電極を形成した半導体発光素子と、２つの電極を有
し、この２つの電極に前記一対の電極がそれぞれ導通す
る状態に前記半導体発光素子を接合するサブマウント素
子と、前記半導体発光素子と前記サブマウント素子とを
接合した第１、第２の大型バンプとを有し、前記第１、
第２の大型バンプの平断面積の合計を、前記半導体発光
素子の平断面積の３０％以上としたことを特徴とする複
合発光素子としたものであり、半導体発光素子で発生し
た熱量が第１、第２の大型バンプにより効率よく放熱さ
れるので、増加させた電流量に応じた輝度を得ることが
できるという作用を有する。BEST MODE FOR CARRYING OUT THE INVENTION The invention according to claim 1 of the present invention has a semiconductor light emitting element in which a pair of electrodes are formed on one surface of a semiconductor thin film layer laminated on a transparent substrate, and two electrodes. A submount element for joining the semiconductor light emitting element to the two electrodes in a state where the pair of electrodes are electrically connected to each other, and first and second large bumps for joining the semiconductor light emitting element and the submount element And the first,
The present invention provides a composite light emitting device, characterized in that the total of the plane sectional areas of the second large-sized bumps is 30% or more of the plane sectional area of the semiconductor light emitting element. Since the first and second large-sized bumps radiate heat efficiently, there is an effect that the brightness corresponding to the increased current amount can be obtained.
【００１７】請求項２に記載の発明は、透明基板上に積
層した半導体薄膜層の一方の面に一対の電極を形成した
半導体発光素子と、２つの電極を有し、この２つの電極
に前記一対の電極がそれぞれ導通する状態に前記半導体
発光素子を接合するサブマウント素子とを、第１、第２
の大型バンプで接合する複合発光素子の製造方法におい
て、前記半導体発光素子と前記サブマウント素子とを、
第１、第２の小型バンプで接合する工程と、前記第１、
第２の小型バンプに金メッキを施して前記半導体発光素
子の平断面積の３０％以上に平断面積を拡大した第１、
第２の大型バンプを形成する工程とを有することを特徴
とする複合発光素子の製造方法であり、従来使用されて
いた第１、第２の小型バンプを用いて半導体発光素子と
サブマウント素子とを接合した後に第１、第２の小型バ
ンプの平断面積を大きくできるので、工程の変更を少な
くして、製造を容易に行うことができる。According to a second aspect of the present invention, there is provided a semiconductor light emitting device having a pair of electrodes formed on one surface of a semiconductor thin film layer laminated on a transparent substrate, and two electrodes. A submount element for joining the semiconductor light emitting element in a state in which a pair of electrodes are electrically connected to each other;
In the method for manufacturing a composite light-emitting element, which is joined with a large bump, the semiconductor light-emitting element and the submount element are
The step of joining with the first and second small bumps, and the first,
A first small bump having a flat cross-sectional area expanded to 30% or more of the flat cross-sectional area of the semiconductor light emitting device by gold plating;
And a step of forming a second large bump, which is a method for manufacturing a composite light emitting element, wherein a semiconductor light emitting element and a submount element are formed by using the first and second small bumps that have been conventionally used. Since the plane cross-sectional areas of the first and second small bumps can be increased after the joining, the manufacturing steps can be facilitated with few process changes.
【００１８】請求項３に記載の発明は、透明基板上に積
層した半導体薄膜層の一方の面に一対の電極を形成した
半導体発光素子と、２つの電極を有し、この２つの電極
に前記一対の電極がそれぞれ導通する状態に前記半導体
発光素子を接合するサブマウント素子とを、第１、第２
の大型バンプで接合する複合発光素子の製造方法におい
て、前記サブマウント素子上に前記半導体発光素子の平
断面積の３０％以上の平断面積を有する第１、第２の大
型バンプをめっきにより形成する工程と、前記第１、第
２の大型バンプに前記半導体発光素子を接合する工程と
を有することを特徴とする複合発光素子の製造方法であ
り、サブマウント素子上に大型バンプを形成してから半
導体発光素子を接合するので、工数を減らして作業を単
純化することができる。According to a third aspect of the present invention, there is provided a semiconductor light emitting device having a pair of electrodes formed on one surface of a semiconductor thin film layer laminated on a transparent substrate, and two electrodes. A submount element for joining the semiconductor light emitting element in a state in which a pair of electrodes are electrically connected to each other;
In the method for manufacturing a composite light-emitting device, which is joined with a large bump, the first and second large bumps having a plane cross-sectional area of 30% or more of the plane cross-sectional area of the semiconductor light-emitting device are formed on the submount element by plating. And a step of joining the semiconductor light emitting element to the first and second large-sized bumps, wherein a large bump is formed on the submount element. Since the semiconductor light emitting element is bonded to the semiconductor light emitting element, the number of steps can be reduced and the work can be simplified.
【００１９】以下、本発明の実施の形態について、図
１、図２を用いて説明する。Embodiments of the present invention will be described below with reference to FIGS. 1 and 2.
【００２０】（実施の形態１）図１（Ａ）は本発明の第
１の実施の形態にかかる複合発光素子の平面図、（Ｂ）
は同複合発光素子の正断面図を示す。図１において複合
発光素子１は、半導体発光素子２と、サブマウント素子
３と、半導体発光素子２及びサブマウント素子３を接合
する第１、第２の大型バンプ４，５を有している。(First Embodiment) FIG. 1A is a plan view of a composite light emitting device according to a first embodiment of the present invention, and FIG.
Shows a front sectional view of the same composite light emitting device. In FIG. 1, the composite light emitting element 1 has a semiconductor light emitting element 2, a submount element 3, and first and second large bumps 4 and 5 for joining the semiconductor light emitting element 2 and the submount element 3.
【００２１】サブマウント素子３は、ｎ型シリコン基板
を素材としたもので、一部からｐ型不純物イオンを注入
して拡散させて、ｐ型半導体領域を部分的に形成しツェ
ナーダイオードとしたものである。ｎ型半導体領域に相
当する部分にｎ側電極を、ｐ型半導体領域に相当する部
分にｐ側電極をそれぞれ形成している。The submount element 3 is made of an n-type silicon substrate, and is a Zener diode in which p-type impurity ions are partially implanted and diffused to partially form a p-type semiconductor region. Is. An n-side electrode is formed in a portion corresponding to the n-type semiconductor region, and a p-side electrode is formed in a portion corresponding to the p-type semiconductor region.
【００２２】半導体発光素子２は従来例と同様にＧａＮ
系化合物半導体を用いた青色発光のフリップチップ型の
ものであって、サファイアの基板にｐ型層及びｎ型層を
積層するとともに、これらの層の表面にｐ側電極及びｎ
側電極を蒸着法によって形成したものである。The semiconductor light emitting device 2 is made of GaN as in the conventional example.
It is a blue light emitting flip-chip type using a compound semiconductor, and a p-type layer and an n-type layer are laminated on a sapphire substrate, and a p-side electrode and an n-type layer are formed on the surface of these layers.
The side electrode is formed by a vapor deposition method.
【００２３】サブマウント素子３上に設けられ、半導体
発光素子２をサブマウント素子３上に搭載接合させる第
１、第２の大型バンプ４，５の平断面積の合計は、半導
体発光素子２の平断面積の３０％以上にしている。な
お、第１、第２の大型バンプ４，５は、両者が接触しな
い距離まで近接させて設けることができる。The total of the plane cross-sectional areas of the first and second large-sized bumps 4 and 5 provided on the sub-mount element 3 for mounting and bonding the semiconductor light-emitting element 2 on the sub-mount element 3 is the same as that of the semiconductor light-emitting element 2. The cross-sectional area is 30% or more. The first and second large-sized bumps 4 and 5 can be provided in close proximity to each other so that they do not contact each other.
【００２４】第１、第２の大型バンプ４，５の平断面積
の合計を半導体発光素子２の平断面積の３０％以上にす
ることにより、半導体発光素子２に流す電流を例えばＩ
F＝４０ｍＡ以上にして使用でき、輝度を１．５倍以上
に増加させることができる。第１、第２の大型バンプ
４，５の平断面積の合計が半導体発光素子２の平断面積
の３０％未満では、放熱効果がまだ不十分で輝度の増加
が１．５倍に達しない場合もあり好ましくない。By setting the total of the plane sectional areas of the first and second large-sized bumps 4 and 5 to be 30% or more of the plane sectional area of the semiconductor light emitting element 2, the current flowing through the semiconductor light emitting element 2 is, for example, I.
It can be used with F = 40 mA or more and the brightness can be increased by 1.5 times or more. If the total of the plane sectional areas of the first and second large-sized bumps 4 and 5 is less than 30% of the plane sectional area of the semiconductor light emitting element 2, the heat dissipation effect is still insufficient and the increase in brightness does not reach 1.5 times. In some cases, it is not preferable.
【００２５】なお、第１、第２の大型バンプの平断面積
の合計を６３％以上に設定してＩF＝８０ｍＡの電流を
流すこともでき、さらに半導体発光素子のチップサイズ
を現行の０．３２ｍｍ角から０．３４ｍｍ角に大きく
し、平断面積の合計を６８％以上に設定してＩF＝１０
０ｍＡの電流を流すことも可能である。It is also possible to set the total of the plane cross-sectional areas of the first and second large bumps to 63% or more and to flow a current of I F = 80 mA, and further to reduce the chip size of the semiconductor light emitting device to the current 0. I F = 10 by increasing from 0.32 mm square to 0.34 mm square and setting the total flat cross-sectional area to 68% or more.
It is also possible to pass a current of 0 mA.
【００２６】サブマウント素子３がツェナーダイオード
の場合、半導体発光素子２とツェナーダイオードとを逆
極性に接続することによって静電気保護の機能を付加す
ることができる。When the submount element 3 is a Zener diode, a static electricity protection function can be added by connecting the semiconductor light emitting element 2 and the Zener diode in opposite polarities.
【００２７】すなわち、このような逆極性の接続によっ
て、サブマウント素子３に高電圧による過電流が印加さ
れたときには、半導体発光素子２に印加される逆方向電
圧はサブマウント素子３の順方向電圧付近すなわち０．
９Ｖでバイパスが開く。また、半導体発光素子２に印加
される順方向電圧はサブマウント素子３のツェナー電圧
Ｖｚを１０Ｖ付近に設定することにより、その電圧でバ
イパスが開き、それぞれ過電流が逃がされる。したがっ
て、静電気による半導体発光素子２の破壊を確実に防ぐ
ことができる。That is, when an overcurrent due to a high voltage is applied to the submount element 3 by such a reverse polarity connection, the reverse voltage applied to the semiconductor light emitting element 2 is the forward voltage of the submount element 3. Near, that is, 0.
The bypass opens at 9V. Further, by setting the Zener voltage Vz of the submount element 3 to about 10V, the forward voltage applied to the semiconductor light emitting element 2 opens the bypass at that voltage, and the overcurrent is released. Therefore, it is possible to reliably prevent the semiconductor light emitting element 2 from being damaged by static electricity.
【００２８】次に、複合発光素子の製造方法について説
明する。Next, a method of manufacturing the composite light emitting device will be described.
【００２９】図２は、複合発光素子の製造手順を示す説
明図である。FIG. 2 is an explanatory view showing the manufacturing procedure of the composite light emitting device.
【００３０】（ＳＴＢ（スタッドバンプボンディング）
工程）切断される前の複数個連結されたサブマウント素
子３のそれぞれ２つの電極にＡｕからなる第１、第２の
小型バンプ６，７をボンディングする。(STB (stud bump bonding)
Step) The first and second small bumps 6 and 7 made of Au are bonded to the two electrodes of each of the sub-mount elements 3 connected to each other before being cut.
【００３１】（ＦＣＢ（フリップチップボンディング）
工程）各サブマウント素子３の第１、第２の小型バンプ
６，７上に半導体発光素子２をボンディングして接合す
る。このとき、サブマウント素子と半導体発光素子２の
間隔は１０μｍ以上、好ましくは１５μｍ以上になるよ
うに条件設定する。その理由は、次のＡｕメッキ工程で
Ａｕバンプの周囲にＡｕメッキ液が回り込みやすくする
ためである。(FCB (Flip Chip Bonding)
Process) The semiconductor light emitting element 2 is bonded and bonded onto the first and second small bumps 6 and 7 of each submount element 3. At this time, the condition is set so that the distance between the submount element and the semiconductor light emitting element 2 is 10 μm or more, preferably 15 μm or more. The reason is that the Au plating solution is likely to flow around the Au bumps in the next Au plating step.
【００３２】（Ａｕメッキ工程）連結されたサブマウン
ト素子３の所定箇所にマスキングを施し、その後メッキ
槽８内で電流を流して電解メッキ作業を行い、第１、第
２の小型バンプ６，７に金メッキを施し、半導体発光素
子２の平断面積の３０％以上に平断面積を拡大した第
１、第２の大型バンプ４，５をそれぞれ形成する。な
お、第１、第２の大型バンプ４，５の平断面積を等しく
する必要はなく、電極の電位の差によって第１、第２の
小型バンプ６，７の一方だけに金メッキを施すことも可
能である。(Au Plating Step) Masking is applied to predetermined portions of the connected submount elements 3, and then electric current is passed in the plating tank 8 to perform electrolytic plating work, and first and second small bumps 6, 7 are formed. Is plated with gold to form first and second large-sized bumps 4 and 5 each having a plane sectional area enlarged to 30% or more of the plane sectional area of the semiconductor light emitting element 2. The first and second large bumps 4 and 5 do not have to have the same plane cross-sectional area, and only one of the first and second small bumps 6 and 7 may be gold-plated due to the difference in the potential of the electrodes. It is possible.
【００３３】かかる方法によって、放熱特性のよい複合
発光素子が得られる。By such a method, a composite light emitting device having good heat dissipation characteristics can be obtained.
【００３４】（実施の形態２）図３（Ａ）は本発明の第
２の実施の形態にかかる複合発光素子の平面図、（Ｂ）
は同複合発光素子の正断面図を示す。複合発光素子１１
は、前述した複合発光素子１の第１、第２の大型バンプ
４，５の替わりに、これと異なる製造方法によって得ら
れた第１、第２の大型バンプ１３，１２を用いたもので
ある。(Second Embodiment) FIG. 3A is a plan view of a composite light emitting device according to a second embodiment of the present invention, and FIG.
Shows a front sectional view of the same composite light emitting device. Composite light emitting element 11
In the above, the first and second large-sized bumps 13 and 12 obtained by a different manufacturing method are used instead of the first and second large-sized bumps 4 and 5 of the composite light emitting device 1 described above. .
【００３５】次に、複合発光素子１１の製造方法につい
て説明する。Next, a method of manufacturing the composite light emitting device 11 will be described.
【００３６】図４は、複合発光素子の製造手順を示す説
明図である。FIG. 4 is an explanatory view showing the manufacturing procedure of the composite light emitting device.
【００３７】（メッキバンプ形成工程）切断される前の
複数個連結されたサブマウント素子３の所定箇所にマス
キングを施し、その後メッキ槽８内で電流を流して電解
メッキ作業を行い、サブマウント素子３の２つの電極に
金メッキを施し、半導体発光素子２の平断面積の３０％
以上の平断面積を有する第１、第２の大型バンプ１３，
１２をそれぞれ形成する。(Plating Bump Forming Step) Masking is applied to a predetermined portion of the connected submount elements 3 before being cut, and then an electric current is passed in the plating tank 8 to perform electroplating work. 30% of the plane cross-sectional area of the semiconductor light-emitting element 2 by applying gold plating to the two electrodes of 3
The first and second large-sized bumps 13 having the above flat cross-sectional areas,
12 are formed respectively.
【００３８】（ＦＣＢ（フリップチップボンディング）
工程）各サブマウント素子３の第１、第２の大型バンプ
１３，１２上に半導体発光素子２をボンディングして接
合する。(FCB (Flip Chip Bonding)
Step) The semiconductor light emitting element 2 is bonded and bonded onto the first and second large bumps 13 and 12 of each submount element 3.
【００３９】かかる方法によって、放熱特性のよい複合
発光素子が得られる。By such a method, a composite light emitting device having good heat dissipation characteristics can be obtained.
【００４０】（実施の形態３）図５（Ａ）は本発明の第
３の実施の形態にかかる複合発光素子の平面図、（Ｂ）
は同複合発光素子の正断面図を示す。(Third Embodiment) FIG. 5A is a plan view of a composite light emitting device according to a third embodiment of the present invention, and FIG.
Shows a front sectional view of the same composite light emitting device.
【００４１】上記の実施の形態１，２において半導体発
光素子は１つの単体の発光素子として説明したが、本発
明はこれに限定されるものではなく、１つのブロックサ
ブマウント素子２３上に例えば４つの半導体発光素子２
を１つのブロックとしたブロック発光素子２２を配置し
たブロック複合発光素子２１とした場合においても本発
明に含まれる。Although the semiconductor light emitting device has been described as a single light emitting device in the above-described first and second embodiments, the present invention is not limited to this, and for example, four semiconductor light emitting devices are provided on one block submount device 23. Two semiconductor light emitting devices
The present invention also includes a case where the block composite light emitting element 21 in which the block light emitting element 22 in which each of the blocks is arranged is arranged.
【００４２】[0042]
【発明の効果】以上のように本発明によれば、第１、第
２の大型バンプの断面積の合計を、半導体発光素子の平
断面積の３０％以上としたことにより、半導体発光素子
で発生した熱量が第１、第２の大型バンプで効率よく放
熱され、増加させた電流量に応じた輝度を得ることがで
き、製品の性能を向上させることができる。As described above, according to the present invention, the total cross-sectional area of the first and second large-sized bumps is 30% or more of the plane cross-sectional area of the semiconductor light-emitting element. The amount of heat generated is efficiently radiated by the first and second large bumps, the brightness corresponding to the increased current amount can be obtained, and the performance of the product can be improved.
【００４３】また、第１、第２の小型バンプに金メッキ
を施して、第１、第２の大型バンプを形成することによ
り、従来使用されていた第１、第２の小型バンプを用い
て半導体発光素子とサブマウント素子とを接合した後に
第１、第２の小型バンプの平断面積を大きくでき、工程
の変更を少なくして、製造を容易に行うことができる。Further, the first and second small bumps are gold-plated to form the first and second large bumps, and the semiconductor is formed by using the first and second small bumps which have been conventionally used. After the light emitting element and the submount element are bonded together, the plane sectional areas of the first and second small bumps can be increased, and the manufacturing process can be facilitated with few process changes.
【００４４】また、サブマウント素子上に大型バンプを
メッキにより形成してから半導体発光素子を接合するこ
とにより、工数を減らして作業を単純化することができ
るとともに、大型バンプを精度よく形成でき、半導体発
光素子の傾斜を防止して製品品質を向上させることがで
きる。By forming a large bump on the submount element by plating and then joining the semiconductor light emitting element, the number of steps can be reduced and the work can be simplified, and the large bump can be accurately formed. It is possible to prevent tilting of the semiconductor light emitting device and improve product quality.
【図１】（Ａ）は本発明の第１の実施の形態にかかる複
合発光素子の平面図
（Ｂ）は同複合発光素子の正断面図FIG. 1A is a plan view of a composite light emitting device according to a first embodiment of the present invention, and FIG. 1B is a front sectional view of the same composite light emitting device.
【図２】複合発光素子の製造手順を示す説明図FIG. 2 is an explanatory view showing a manufacturing procedure of a composite light emitting device.
【図３】（Ａ）は本発明の第２の実施の形態にかかる複
合発光素子の平面図
（Ｂ）は同複合発光素子の正断面図FIG. 3A is a plan view of a composite light emitting device according to a second embodiment of the present invention, and FIG. 3B is a front sectional view of the composite light emitting device.
【図４】複合発光素子の製造手順を示す説明図FIG. 4 is an explanatory view showing a manufacturing procedure of a composite light emitting device.
【図５】（Ａ）は本発明の第３の実施の形態にかかる複
合発光素子の平面図
（Ｂ）は同複合発光素子の正断面図FIG. 5A is a plan view of a composite light-emitting device according to a third embodiment of the present invention, and FIG. 5B is a front sectional view of the composite light-emitting device.
【図６】（Ａ）は従来例にかかる複合発光素子の平面図 （Ｂ）は同複合発光素子の正断面図FIG. 6A is a plan view of a composite light emitting device according to a conventional example. (B) is a front sectional view of the same composite light emitting device
１ 複合発光素子 ２ 半導体発光素子 ３ サブマウント素子 ４ 第１の大型バンプ ５ 第２の大型バンプ ６ 第１の小型バンプ ７ 第２の小型バンプ ８ メッキ槽 １１ 複合発光素子 １２ 第２の大型バンプ １３ 第１の大型バンプ ２１ ブロック複合発光素子 ２２ ブロック発光素子 ２３ ブロックサブマウント素子 1 Compound light emitting element 2 Semiconductor light emitting element 3 submount elements 4 First large bump 5 Second large bump 6 First small bump 7 Second small bump 8 plating tank 11 Composite light emitting device 12 Second large bump 13 First large bump 21 block compound light emitting device 22 Block light emitting element 23 Block submount element
Claims (3)
方の面に一対の電極を形成した半導体発光素子と、 ２つの電極を有し、この２つの電極に前記一対の電極が
それぞれ導通する状態に前記半導体発光素子を接合する
サブマウント素子と、 前記半導体発光素子と前記サブマウント素子とを接合し
た第１、第２の大型バンプとを有し、 前記第１、第２の大型バンプの平断面積の合計を、前記
半導体発光素子の平断面積の３０％以上としたことを特
徴とする複合発光素子。1. A semiconductor light emitting device having a pair of electrodes formed on one surface of a semiconductor thin film layer laminated on a transparent substrate, and two electrodes, and the two electrodes are electrically connected to the pair of electrodes, respectively. A submount element that joins the semiconductor light emitting element to each other, and first and second large bumps that join the semiconductor light emitting element and the submount element to each other. A composite light emitting device, wherein the total of the plane cross sectional areas is 30% or more of the plane cross sectional area of the semiconductor light emitting device.
方の面に一対の電極を形成した半導体発光素子と、２つ
の電極を有し、この２つの電極に前記一対の電極がそれ
ぞれ導通する状態に前記半導体発光素子を接合するサブ
マウント素子とを、第１、第２の大型バンプで接合する
複合発光素子の製造方法において、 前記半導体発光素子と前記サブマウント素子とを、第
１、第２の小型バンプで接合する工程と、 前記第１、第２の小型バンプに金メッキを施して前記半
導体発光素子の平断面積の３０％以上に平断面積を拡大
した第１、第２の大型バンプを形成する工程とを有する
ことを特徴とする複合発光素子の製造方法。2. A semiconductor light emitting device having a pair of electrodes formed on one surface of a semiconductor thin film layer laminated on a transparent substrate, and two electrodes, and the two electrodes are electrically connected to the pair of electrodes, respectively. In a method for manufacturing a composite light emitting device, wherein a submount device for joining the semiconductor light emitting device in a state is joined by first and second large bumps, the semiconductor light emitting device and the submount device are And a step of joining the first and second small bumps with gold to enlarge the flat cross sectional area to 30% or more of the flat cross sectional area of the semiconductor light emitting device. A method of manufacturing a composite light emitting device, comprising the step of forming bumps.
方の面に一対の電極を形成した半導体発光素子と、２つ
の電極を有し、この２つの電極に前記一対の電極がそれ
ぞれ導通する状態に前記半導体発光素子を接合するサブ
マウント素子とを、第１、第２の大型バンプで接合する
複合発光素子の製造方法において、 前記サブマウント素子上に前記半導体発光素子の平断面
積の３０％以上の平断面積を有する第１、第２の大型バ
ンプをメッキにより形成する工程と、 前記第１、第２の大型バンプに前記半導体発光素子を接
合する工程とを有することを特徴とする複合発光素子の
製造方法。3. A semiconductor light emitting device having a pair of electrodes formed on one surface of a semiconductor thin film layer laminated on a transparent substrate, and two electrodes, and the two electrodes are electrically connected to the pair of electrodes, respectively. A method for manufacturing a composite light-emitting device, comprising: joining a semiconductor light-emitting device to a sub-mount device with a first and a second large-sized bump; % Of the plane cross-sectional area of the first and second large bumps are formed by plating, and the semiconductor light emitting element is bonded to the first and second large bumps. Manufacturing method of composite light emitting device.
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|---|---|---|---|
| JP2002009722A JP4032752B2 (en) | 2002-01-18 | 2002-01-18 | Method for manufacturing composite light emitting device |
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|---|---|---|---|---|
| JP2006191052A (en) * | 2004-12-29 | 2006-07-20 | Samsung Electro Mech Co Ltd | Flip chip bonding structure of luminous element using metal column |
| JP2007081417A (en) * | 2005-09-13 | 2007-03-29 | Philips Lumileds Lightng Co Llc | Interconnection for semiconductor light emitting devices |
| WO2009063638A1 (en) | 2007-11-15 | 2009-05-22 | Panasonic Corporation | Semiconductor light emitting device |
| US7692259B2 (en) | 2005-09-07 | 2010-04-06 | Toyoda Gosei Co., Ltd. | Solid-state element device |
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| JPH10341040A (en) * | 1997-06-09 | 1998-12-22 | Nec Corp | Optical semiconductor module and fabrication thereof |
| JPH11191641A (en) * | 1997-10-14 | 1999-07-13 | Matsushita Electron Corp | Semiconductor light-emitting element, semiconductor light-emitting device using the same and manufacture thereof |
| JP2001203386A (en) * | 1999-12-22 | 2001-07-27 | Lumileds Lighting Us Llc | Group iii nitride ligh-emitting device with raised light generation capability |
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2002
- 2002-01-18 JP JP2002009722A patent/JP4032752B2/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10341040A (en) * | 1997-06-09 | 1998-12-22 | Nec Corp | Optical semiconductor module and fabrication thereof |
| JPH11191641A (en) * | 1997-10-14 | 1999-07-13 | Matsushita Electron Corp | Semiconductor light-emitting element, semiconductor light-emitting device using the same and manufacture thereof |
| JP2001203386A (en) * | 1999-12-22 | 2001-07-27 | Lumileds Lighting Us Llc | Group iii nitride ligh-emitting device with raised light generation capability |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006191052A (en) * | 2004-12-29 | 2006-07-20 | Samsung Electro Mech Co Ltd | Flip chip bonding structure of luminous element using metal column |
| KR100862457B1 (en) | 2004-12-29 | 2008-10-08 | 삼성전기주식회사 | Structure for flip-chip bonding a light emitting device using metal column |
| US7692259B2 (en) | 2005-09-07 | 2010-04-06 | Toyoda Gosei Co., Ltd. | Solid-state element device |
| JP2007081417A (en) * | 2005-09-13 | 2007-03-29 | Philips Lumileds Lightng Co Llc | Interconnection for semiconductor light emitting devices |
| WO2009063638A1 (en) | 2007-11-15 | 2009-05-22 | Panasonic Corporation | Semiconductor light emitting device |
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| Publication number | Publication date |
|---|---|
| JP4032752B2 (en) | 2008-01-16 |
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