JP4032752B2 - Method for manufacturing composite light emitting device - Google Patents

Method for manufacturing composite light emitting device Download PDF

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Publication number
JP4032752B2
JP4032752B2 JP2002009722A JP2002009722A JP4032752B2 JP 4032752 B2 JP4032752 B2 JP 4032752B2 JP 2002009722 A JP2002009722 A JP 2002009722A JP 2002009722 A JP2002009722 A JP 2002009722A JP 4032752 B2 JP4032752 B2 JP 4032752B2
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Japan
Prior art keywords
light emitting
emitting element
semiconductor light
emitting device
composite light
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Expired - Fee Related
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JP2002009722A
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JP2003218403A (en
Inventor
登美男 井上
邦彦 小原
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Panasonic Corp
Panasonic Holdings Corp
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Panasonic Corp
Matsushita Electric Industrial Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601Structure
    • H01L2224/0603Bonding areas having different sizes, e.g. different heights or widths

Description

【0001】
【発明の属する技術分野】
本発明は、フリップチップ型の複合発光素子にかかり、特に半導体発光素子からサブマウント素子への放熱特性を向上させた複合発光素子及びその製造方法に関する。
【0002】
【従来の技術】
従来、サブマウント素子上にバンプを介してフリップチップ型の半導体発光素子を接合した複合発光素子が多く使用されている。
【0003】
図6(A)、(B)に示すように、この複合発光素子70は、シリコンデバイスであるツェナーダイオード素子71上にGaN系LED素子72をAuバンプ73,74で接合した構造、すなわちフリップチップ実装した構造である。ツェナーダイオード素子71の下面にはAu電極75が設けられ、上面にはAl電極76a,76bが設けられている。また、白色LEDとして使用するために、青色発光のGaN系LEDをYAG系蛍光体77で覆う構造にしている。
【0004】
GaN系LEDを単独で使用する場合に比べると、Auバンプで接合することによりLED素子の静電保護を行うことができ、また、サファイア基板側から光を取り出すことによる輝度が向上するという作用効果があった。
【0005】
複合発光素子70に流す電流は、現状ではIF=20mA程度であるが、近年では、これをIF=100mA程度まで増加させて複合発光素子の輝度を増加させることが考えられている。
【0006】
【発明が解決しようとする課題】
しかしながら、複合発光素子70は、放熱性に問題があり、電流をある程度以上増やしても輝度が増加せずに、逆に下がる場合もあった。
【0007】
すなわち、LED素子で発生する熱の流れやすさは、熱伝導率(k)と面積(S)の積(kS)で評価できる。例えば、GaN系LEDを単独で使用し、リードフレームに接続した場合には、サファイア基板の熱伝導率k=42W/m/Kに、サファイア基板の面積S=0.32mm×0.32mmを乗じると、kS=4.3×10-6W・m/Kとなる。
【0008】
フリップチップ型の複合発光素子をリードフレームに接続した場合には、ツェナーダイオードからリードフレームへの熱の移動と、GaN系LED素子からツェナーダイオードへの熱の移動を考慮する必要がある。
【0009】
ツェナーダイオードのkS値は、kS=4.42×10-5W・m/Kとなり、GaN系LEDからリードフレームへの熱の流れより、熱の流れは10倍以上流れやすいと考えられる。
【0010】
一方、AuバンプのkS値を考えると、Auバンプの熱伝導率k=319W/m/Kに、Auバンプ2つ分の面積0.05mm×0.05mm×π×2を乗じると、kS=5.01×10-6W・m/Kとなり、これはGaN系LEDを単独で使用する場合に比べて少しだけ大きいだけである。
【0011】
また、IF=20mAのときにGaN系LEDから発生する熱量に比べて、IF=100mAのときの熱量は、消費電力I×Vに比例するとして、6.8倍に増加する。これは、GaN系LEDのVF値がIF=20mAのときVF=3.5Vであるのに対し、IF=100mAではVF=4.8Vに増加するからである。したがって従来の複合発光素子は、IF=20mAのときは十分信頼性が確保できるだけの放熱特性を持つが、それ以上の電流に対しては、十分な放熱特性を持つことができない。そのネックとなっているのが、複合発光素子の場合、Auバンプの平断面積が小さいことである。従来の複合発光素子のAuバンプの平断面積の合計は、半導体発光素子の平断面積の15%程度である。
【0012】
したがって、フリップチップ型の複合発光素子は、Auバンプを通過する熱の流れがIF=20mA以上のときには不十分であるため、GaN系LEDの発熱を十分に放熱できずに大電流を流したときの信頼性の確保が困難になるという問題がある。
【0013】
そこで本発明は、放熱性を向上させたフリップチップ型の複合発光素子を提供することを目的とする。
【0014】
【課題を解決するための手段】
本発明の複合発光素子においては、第1、第2の大型バンプの平断面積の合計を、半導体発光素子の平断面積の30%以上としたものである。
【0015】
この発明によれば、放熱性を向上させたフリップチップ型の複合発光素子が得られる。
【0016】
【発明の実施の形態】
本願第1の発明は、透明基板上に積層した半導体薄膜層の一方の面に一対の電極を形成した半導体発光素子と、2つの電極を有し、この2つの電極に前記一対の電極がそれぞれ導通する状態に前記半導体発光素子を接合するサブマウント素子と、前記半導体発光素子と前記サブマウント素子とを接合した第1、第2の大型バンプとを有し、
前記第1、第2の大型バンプは、金からなるスタッドバンプとその周囲に施した金メッキからなり、かつ前記第1、第2の大型バンプの平断面積の合計を、前記半導体発光素子の平断面積の30%以上としたことを特徴とする複合発光素子としたものであり、半導体発光素子で発生した熱量が第1、第2の大型バンプにより効率よく放熱されるので、増加させた電流量に応じた輝度を得ることができるという作用を有する。
【0017】
本願第2の発明は、透明基板上に積層した半導体薄膜層の一方の面に一対の電極を形成した半導体発光素子と、2つの電極を有し、この2つの電極に前記一対の電極がそれぞれ導通する状態に前記半導体発光素子を接合するサブマウント素子とを、第1、第2の大型バンプで接合する複合発光素子の製造方法において、前記半導体発光素子と前記サブマウント素子とを、スタッドバンプボンディングで形成した第1、第2の小型バンプで接合する工程と、前記半導体発光素子と前記サブマウント素子の接合に用いた前記第1、第2の小型バンプの周囲に金メッキを施して前記半導体発光素子の平断面積の30%以上に平断面積を拡大した第1、第2の大型バンプを形成する工程とを有することを特徴とする複合発光素子の製造方法であり、従来使用されていた第1、第2の小型バンプを用いて半導体発光素子とサブマウント素子とを接合した後に第1、第2の小型バンプの平断面積を大きくできるので、工程の変更を少なくして、製造を容易に行うことができる。
【0019】
以下、本発明の実施の形態について、図1、図2を用いて説明する。
【0020】
(実施の形態1)
図1(A)は本発明の第1の実施の形態にかかる複合発光素子の平面図、(B)は同複合発光素子の正断面図を示す。図1において複合発光素子1は、半導体発光素子2と、サブマウント素子3と、半導体発光素子2及びサブマウント素子3を接合する第1、第2の大型バンプ4,5を有している。
【0021】
サブマウント素子3は、n型シリコン基板を素材としたもので、一部からp型不純物イオンを注入して拡散させて、p型半導体領域を部分的に形成しツェナーダイオードとしたものである。n型半導体領域に相当する部分にn側電極を、p型半導体領域に相当する部分にp側電極をそれぞれ形成している。
【0022】
半導体発光素子2は従来例と同様にGaN系化合物半導体を用いた青色発光のフリップチップ型のものであって、サファイアの基板にp型層及びn型層を積層するとともに、これらの層の表面にp側電極及びn側電極を蒸着法によって形成したものである。
【0023】
サブマウント素子3上に設けられ、半導体発光素子2をサブマウント素子3上に搭載接合させる第1、第2の大型バンプ4,5の平断面積の合計は、半導体発光素子2の平断面積の30%以上にしている。なお、第1、第2の大型バンプ4,5は、両者が接触しない距離まで近接させて設けることができる。
【0024】
第1、第2の大型バンプ4,5の平断面積の合計を半導体発光素子2の平断面積の30%以上にすることにより、半導体発光素子2に流す電流を例えばIF=40mA以上にして使用でき、輝度を1.5倍以上に増加させることができる。第1、第2の大型バンプ4,5の平断面積の合計が半導体発光素子2の平断面積の30%未満では、放熱効果がまだ不十分で輝度の増加が1.5倍に達しない場合もあり好ましくない。
【0025】
なお、第1、第2の大型バンプの平断面積の合計を63%以上に設定してIF=80mAの電流を流すこともでき、さらに半導体発光素子のチップサイズを現行の0.32mm角から0.34mm角に大きくし、平断面積の合計を68%以上に設定してIF=100mAの電流を流すことも可能である。
【0026】
サブマウント素子3がツェナーダイオードの場合、半導体発光素子2とツェナーダイオードとを逆極性に接続することによって静電気保護の機能を付加することができる。
【0027】
すなわち、このような逆極性の接続によって、サブマウント素子3に高電圧による過電流が印加されたときには、半導体発光素子2に印加される逆方向電圧はサブマウント素子3の順方向電圧付近すなわち0.9Vでバイパスが開く。また、半導体発光素子2に印加される順方向電圧はサブマウント素子3のツェナー電圧Vzを10V付近に設定することにより、その電圧でバイパスが開き、それぞれ過電流が逃がされる。したがって、静電気による半導体発光素子2の破壊を確実に防ぐことができる。
【0028】
次に、複合発光素子の製造方法について説明する。
【0029】
図2は、複合発光素子の製造手順を示す説明図である。
【0030】
(STB(スタッドバンプボンディング)工程)
切断される前の複数個連結されたサブマウント素子3のそれぞれ2つの電極にAuからなる第1、第2の小型バンプ6,7をボンディングする。
【0031】
(FCB(フリップチップボンディング)工程)
各サブマウント素子3の第1、第2の小型バンプ6,7上に半導体発光素子2をボンディングして接合する。このとき、サブマウント素子と半導体発光素子2の間隔は10μm以上、好ましくは15μm以上になるように条件設定する。その理由は、次のAuメッキ工程でAuバンプの周囲にAuメッキ液が回り込みやすくするためである。
【0032】
(Auメッキ工程)
連結されたサブマウント素子3の所定箇所にマスキングを施し、その後メッキ槽8内で電流を流して電解メッキ作業を行い、第1、第2の小型バンプ6,7に金メッキを施し、半導体発光素子2の平断面積の30%以上に平断面積を拡大した第1、第2の大型バンプ4,5をそれぞれ形成する。なお、第1、第2の大型バンプ4,5の平断面積を等しくする必要はなく、電極の電位の差によって第1、第2の小型バンプ6,7の一方だけに金メッキを施すことも可能である。
【0033】
かかる方法によって、放熱特性のよい複合発光素子が得られる。
【0034】
(実施の形態2)
図3(A)は本発明の第2の実施の形態にかかる複合発光素子の平面図、(B)は同複合発光素子の正断面図を示す。複合発光素子11は、前述した複合発光素子1の第1、第2の大型バンプ4,5の替わりに、これと異なる製造方法によって得られた第1、第2の大型バンプ13,12を用いたものである。
【0035】
次に、複合発光素子11の製造方法について説明する。
【0036】
図4は、複合発光素子の製造手順を示す説明図である。
【0037】
(メッキバンプ形成工程)
切断される前の複数個連結されたサブマウント素子3の所定箇所にマスキングを施し、その後メッキ槽8内で電流を流して電解メッキ作業を行い、サブマウント素子3の2つの電極に金メッキを施し、半導体発光素子2の平断面積の30%以上の平断面積を有する第1、第2の大型バンプ13,12をそれぞれ形成する。
【0038】
(FCB(フリップチップボンディング)工程)
各サブマウント素子3の第1、第2の大型バンプ13,12上に半導体発光素子2をボンディングして接合する。
【0039】
かかる方法によって、放熱特性のよい複合発光素子が得られる。
【0040】
(実施の形態3)
図5(A)は本発明の第3の実施の形態にかかる複合発光素子の平面図、(B)は同複合発光素子の正断面図を示す。
【0041】
上記の実施の形態1,2において半導体発光素子は1つの単体の発光素子として説明したが、本発明はこれに限定されるものではなく、1つのブロックサブマウント素子23上に例えば4つの半導体発光素子2を1つのブロックとしたブロック発光素子22を配置したブロック複合発光素子21とした場合においても本発明に含まれる。
【0042】
【発明の効果】
以上のように本発明によれば、第1、第2の大型バンプの断面積の合計を、半導体発光素子の平断面積の30%以上としたことにより、半導体発光素子で発生した熱量が第1、第2の大型バンプで効率よく放熱され、増加させた電流量に応じた輝度を得ることができ、製品の性能を向上させることができる。
【0043】
また、第1、第2の小型バンプに金メッキを施して、第1、第2の大型バンプを形成することにより、従来使用されていた第1、第2の小型バンプを用いて半導体発光素子とサブマウント素子とを接合した後に第1、第2の小型バンプの平断面積を大きくでき、工程の変更を少なくして、製造を容易に行うことができる。
【0044】
また、サブマウント素子上に大型バンプをメッキにより形成してから半導体発光素子を接合することにより、工数を減らして作業を単純化することができるとともに、大型バンプを精度よく形成でき、半導体発光素子の傾斜を防止して製品品質を向上させることができる。
【図面の簡単な説明】
【図1】(A)は本発明の第1の実施の形態にかかる複合発光素子の平面図
(B)は同複合発光素子の正断面図
【図2】複合発光素子の製造手順を示す説明図
【図3】(A)は本発明の第2の実施の形態にかかる複合発光素子の平面図
(B)は同複合発光素子の正断面図
【図4】複合発光素子の製造手順を示す説明図
【図5】(A)は本発明の第3の実施の形態にかかる複合発光素子の平面図
(B)は同複合発光素子の正断面図
【図6】(A)は従来例にかかる複合発光素子の平面図
(B)は同複合発光素子の正断面図
【符号の説明】
1 複合発光素子
2 半導体発光素子
3 サブマウント素子
4 第1の大型バンプ
5 第2の大型バンプ
6 第1の小型バンプ
7 第2の小型バンプ
8 メッキ槽
11 複合発光素子
12 第2の大型バンプ
13 第1の大型バンプ
21 ブロック複合発光素子
22 ブロック発光素子
23 ブロックサブマウント素子
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a flip-chip type composite light emitting device, and more particularly to a composite light emitting device having improved heat dissipation characteristics from a semiconductor light emitting device to a submount device and a method for manufacturing the same.
[0002]
[Prior art]
Conventionally, a composite light-emitting element in which a flip-chip type semiconductor light-emitting element is bonded onto a submount element via a bump is often used.
[0003]
As shown in FIGS. 6A and 6B, this composite light-emitting element 70 has a structure in which a GaN-based LED element 72 is joined by Au bumps 73 and 74 on a Zener diode element 71 that is a silicon device, that is, a flip chip. It is an implemented structure. An Au electrode 75 is provided on the lower surface of the Zener diode element 71, and Al electrodes 76a and 76b are provided on the upper surface. Further, in order to use it as a white LED, a blue-emitting GaN LED is covered with a YAG phosphor 77.
[0004]
Compared to the case where a GaN-based LED is used alone, it is possible to perform electrostatic protection of the LED element by bonding with an Au bump, and the effect of improving luminance by taking out light from the sapphire substrate side. was there.
[0005]
The current flowing through the composite light emitting element 70 is currently about I F = 20 mA, but in recent years, it has been considered to increase the luminance of the composite light emitting element by increasing this to about I F = 100 mA.
[0006]
[Problems to be solved by the invention]
However, the composite light emitting element 70 has a problem in heat dissipation, and even if the current is increased to a certain extent, the luminance does not increase and may decrease.
[0007]
That is, the ease of flow of heat generated in the LED element can be evaluated by the product (kS) of thermal conductivity (k) and area (S). For example, when a GaN-based LED is used alone and connected to a lead frame, the thermal conductivity k = 42 W / m / K of the sapphire substrate is multiplied by the area S = 0.32 mm × 0.32 mm of the sapphire substrate. KS = 4.3 × 10 −6 W · m / K.
[0008]
When the flip-chip type composite light emitting element is connected to the lead frame, it is necessary to consider the heat transfer from the Zener diode to the lead frame and the heat transfer from the GaN-based LED element to the Zener diode.
[0009]
The kS value of the Zener diode is kS = 4.42 × 10 −5 W · m / K, and it is considered that the heat flow is more than ten times easier than the heat flow from the GaN-based LED to the lead frame.
[0010]
On the other hand, considering the kS value of the Au bump, if the thermal conductivity k = 319 W / m / K of the Au bump is multiplied by the area of 0.05 mm × 0.05 mm × π × 2 for two Au bumps, kS = 5.01 × 10 −6 W · m / K, which is only a little larger than when a GaN-based LED is used alone.
[0011]
Further, compared to the amount of heat generated from the GaN-based LED when I F = 20 mA, the amount of heat when I F = 100 mA increases 6.8 times as being proportional to the power consumption I × V. This is because V F = 3.5 V when the V F value of the GaN-based LED is I F = 20 mA, whereas V F = 4.8 V increases at I F = 100 mA. Therefore, the conventional composite light emitting device has a heat dissipation characteristic that can ensure sufficient reliability when I F = 20 mA, but cannot have a sufficient heat dissipation characteristic for a current higher than that. The bottleneck is that in the case of a composite light emitting device, the plane cross-sectional area of the Au bump is small. The total cross sectional area of the Au bumps of the conventional composite light emitting device is about 15% of the flat cross sectional area of the semiconductor light emitting device.
[0012]
Therefore, the flip-chip type composite light emitting element is insufficient when the heat flow through the Au bump is I F = 20 mA or more, and therefore, the heat generated by the GaN-based LED cannot be sufficiently dissipated and a large current is passed. There is a problem that it is difficult to ensure reliability.
[0013]
Therefore, an object of the present invention is to provide a flip-chip type composite light emitting device with improved heat dissipation.
[0014]
[Means for Solving the Problems]
In the composite light emitting device of the present invention, the total cross sectional area of the first and second large bumps is 30% or more of the cross sectional area of the semiconductor light emitting device.
[0015]
According to the present invention, a flip-chip type composite light emitting device with improved heat dissipation can be obtained.
[0016]
DETAILED DESCRIPTION OF THE INVENTION
The first invention of the present application has a semiconductor light emitting element in which a pair of electrodes are formed on one surface of a semiconductor thin film layer laminated on a transparent substrate, and two electrodes, and the pair of electrodes are respectively connected to the two electrodes. A submount element that joins the semiconductor light emitting element in a conductive state, and first and second large bumps that join the semiconductor light emitting element and the submount element;
The first and second large bumps are made of gold stud bumps and gold plating applied around the stud bumps, and the total cross-sectional area of the first and second large bumps is the flat area of the semiconductor light emitting device. The composite light emitting device is characterized by having a cross-sectional area of 30% or more, and the amount of heat generated in the semiconductor light emitting device is efficiently radiated by the first and second large bumps, so that the increased current It has the effect | action that the brightness | luminance according to quantity can be obtained.
[0017]
The second invention of the present application has a semiconductor light emitting element in which a pair of electrodes is formed on one surface of a semiconductor thin film layer laminated on a transparent substrate, and two electrodes, and the pair of electrodes are respectively connected to the two electrodes. In the method of manufacturing a composite light emitting element in which the submount element for joining the semiconductor light emitting element in a conductive state is joined with the first and second large bumps, the semiconductor light emitting element and the submount element are connected to the stud bump. Bonding the first and second small bumps formed by bonding; and applying gold plating to the periphery of the first and second small bumps used for bonding the semiconductor light emitting element and the submount element to form the semiconductor Forming a first and a second large-sized bump whose plane cross-sectional area is expanded to 30% or more of the plane cross-sectional area of the light-emitting element. Since the cross-sectional area of the first and second small bumps can be increased after the semiconductor light emitting element and the submount element are bonded using the first and second small bumps that have been used, the change in the process is reduced. Thus, manufacturing can be easily performed.
[0019]
Hereinafter, embodiments of the present invention will be described with reference to FIGS.
[0020]
(Embodiment 1)
FIG. 1A is a plan view of the composite light emitting device according to the first embodiment of the present invention, and FIG. 1B is a front sectional view of the composite light emitting device. In FIG. 1, the composite light emitting element 1 includes a semiconductor light emitting element 2, a submount element 3, and first and second large bumps 4 and 5 that join the semiconductor light emitting element 2 and the submount element 3.
[0021]
The submount element 3 is made of an n-type silicon substrate. A p-type semiconductor region is partially formed by implanting and diffusing p-type impurity ions from a part to form a Zener diode. An n-side electrode is formed in a portion corresponding to the n-type semiconductor region, and a p-side electrode is formed in a portion corresponding to the p-type semiconductor region.
[0022]
The semiconductor light emitting element 2 is a blue light emitting flip-chip type using a GaN-based compound semiconductor as in the conventional example, and a p-type layer and an n-type layer are laminated on a sapphire substrate, and the surfaces of these layers are The p-side electrode and the n-side electrode are formed by vapor deposition.
[0023]
The total cross-sectional area of the first and second large bumps 4, 5 provided on the submount element 3 and mounting and joining the semiconductor light emitting element 2 on the submount element 3 is the flat cross sectional area of the semiconductor light emitting element 2. 30% or more. The first and second large bumps 4 and 5 can be provided close to a distance where they do not contact each other.
[0024]
By making the sum of the cross-sectional areas of the first and second large bumps 4 and 5 30% or more of the flat cross-sectional area of the semiconductor light-emitting element 2, the current flowing through the semiconductor light-emitting element 2 is, for example, I F = 40 mA or more. The luminance can be increased to 1.5 times or more. If the total cross-sectional area of the first and second large bumps 4 and 5 is less than 30% of the flat cross-sectional area of the semiconductor light emitting device 2, the heat dissipation effect is still insufficient and the increase in luminance does not reach 1.5 times. In some cases, it is not preferable.
[0025]
Note that the total cross-sectional area of the first and second large bumps can be set to 63% or more to allow a current of I F = 80 mA to flow, and the chip size of the semiconductor light emitting element can be reduced to the current 0.32 mm square. It is also possible to increase the current to 0.34 mm square and to set the total cross-sectional area to 68% or more to pass a current of I F = 100 mA.
[0026]
When the submount element 3 is a Zener diode, an electrostatic protection function can be added by connecting the semiconductor light emitting element 2 and the Zener diode in reverse polarity.
[0027]
That is, with such reverse polarity connection, when an overcurrent due to a high voltage is applied to the submount element 3, the reverse voltage applied to the semiconductor light emitting element 2 is near the forward voltage of the submount element 3, that is, 0. .Bypass opens at 9V. Further, the forward voltage applied to the semiconductor light emitting element 2 sets the zener voltage Vz of the submount element 3 to around 10 V, whereby the bypass is opened at that voltage, and the overcurrent is released respectively. Therefore, destruction of the semiconductor light emitting element 2 due to static electricity can be reliably prevented.
[0028]
Next, a method for manufacturing a composite light emitting device will be described.
[0029]
FIG. 2 is an explanatory view showing a manufacturing procedure of the composite light emitting device.
[0030]
(STB (Stud Bump Bonding) process)
First and second small bumps 6 and 7 made of Au are bonded to two electrodes of each of the plurality of submount elements 3 connected before being cut.
[0031]
(FCB (flip chip bonding) process)
The semiconductor light emitting element 2 is bonded and bonded onto the first and second small bumps 6 and 7 of each submount element 3. At this time, the condition is set so that the distance between the submount element and the semiconductor light emitting element 2 is 10 μm or more, preferably 15 μm or more. The reason is that the Au plating solution easily flows around the Au bump in the next Au plating step.
[0032]
(Au plating process)
Masking is applied to predetermined portions of the connected submount elements 3, and then an electroplating operation is performed by passing an electric current in the plating tank 8, and gold plating is applied to the first and second small bumps 6, 7. First and second large bumps 4 and 5 having an enlarged plane cross-sectional area of 30% or more of the plane cross-sectional area of 2 are formed. The plane cross-sectional areas of the first and second large bumps 4 and 5 do not need to be equal, and only one of the first and second small bumps 6 and 7 may be plated with gold depending on the potential difference between the electrodes. Is possible.
[0033]
By such a method, a composite light emitting device having good heat dissipation characteristics can be obtained.
[0034]
(Embodiment 2)
FIG. 3A is a plan view of a composite light-emitting element according to the second embodiment of the present invention, and FIG. 3B is a front sectional view of the composite light-emitting element. The composite light emitting device 11 uses the first and second large bumps 13 and 12 obtained by a different manufacturing method instead of the first and second large bumps 4 and 5 of the composite light emitting device 1 described above. It was.
[0035]
Next, a method for manufacturing the composite light emitting element 11 will be described.
[0036]
FIG. 4 is an explanatory view showing a manufacturing procedure of the composite light emitting device.
[0037]
(Plating bump formation process)
Masking is applied to a predetermined portion of the plurality of submount elements 3 connected before being cut, and then an electroplating operation is performed by passing an electric current in the plating tank 8 so that two electrodes of the submount element 3 are plated with gold. First and second large bumps 13 and 12 having a plane cross-sectional area of 30% or more of the plane cross-sectional area of the semiconductor light emitting element 2 are formed.
[0038]
(FCB (flip chip bonding) process)
The semiconductor light emitting element 2 is bonded and bonded onto the first and second large bumps 13 and 12 of each submount element 3.
[0039]
By such a method, a composite light emitting device having good heat dissipation characteristics can be obtained.
[0040]
(Embodiment 3)
FIG. 5A is a plan view of a composite light emitting device according to the third embodiment of the present invention, and FIG. 5B is a front sectional view of the composite light emitting device.
[0041]
In the first and second embodiments, the semiconductor light emitting element is described as one single light emitting element. However, the present invention is not limited to this, and, for example, four semiconductor light emitting elements are formed on one block submount element 23. The case where the block light-emitting element 21 in which the block light-emitting element 22 having the element 2 as one block is arranged is also included in the present invention.
[0042]
【The invention's effect】
As described above, according to the present invention, the total cross-sectional area of the first and second large bumps is set to 30% or more of the plane cross-sectional area of the semiconductor light-emitting element, so that the amount of heat generated in the semiconductor light-emitting element can be reduced. The heat is efficiently dissipated by the first and second large bumps, the luminance corresponding to the increased current amount can be obtained, and the performance of the product can be improved.
[0043]
In addition, the first and second small bumps are plated with gold to form the first and second large bumps, so that the first and second small bumps conventionally used can be used to After joining the submount element, the plane cross-sectional area of the first and second small bumps can be increased, and the manufacturing process can be easily performed with fewer changes in the process.
[0044]
Also, by forming a large bump on the submount element by plating and then joining the semiconductor light emitting element, the work can be reduced and the work can be simplified, and the large bump can be accurately formed. It is possible to improve the product quality by preventing the inclination.
[Brief description of the drawings]
FIG. 1A is a plan view of a composite light emitting device according to a first embodiment of the present invention, and FIG. 2B is a front sectional view of the composite light emitting device. FIG. FIG. 3A is a plan view of a composite light emitting device according to a second embodiment of the present invention, and FIG. 4B is a front sectional view of the composite light emitting device. FIG. 4 shows a manufacturing procedure of the composite light emitting device. Explanatory drawing FIG. 5A is a plan view of a composite light emitting device according to a third embodiment of the present invention, FIG. 5B is a front sectional view of the composite light emitting device, and FIG. A plan view (B) of the composite light emitting device is a front sectional view of the composite light emitting device.
DESCRIPTION OF SYMBOLS 1 Composite light emitting element 2 Semiconductor light emitting element 3 Submount element 4 1st large bump 5 2nd large bump 6 1st small bump 7 2nd small bump 8 Plating tank 11 Composite light emitting element 12 2nd large bump 13 First large bump 21 Block composite light emitting element 22 Block light emitting element 23 Block submount element

Claims (1)

透明基板上に積層した半導体薄膜層の一方の面に一対の電極を形成した半導体発光素子と、
2つの電極を有し、この2つの電極に前記一対の電極がそれぞれ導通する状態に前記半導体発光素子を接合するサブマウント素子とを、第1、第2の大型バンプで接合する複合発光素子の製造方法において、
前記半導体発光素子と前記サブマウント素子とを、スタッドバンプボンディングで形成した第1、第2の小型バンプで接合する工程と、
前記半導体発光素子と前記サブマウント素子の接合に用いた前記第1、第2の小型バンプの周囲に金メッキを施して前記半導体発光素子の平断面積の30%以上に平断面積を拡大した第1、第2の大型バンプを形成する工程とを有することを特徴とする複合発光素子の製造方法。
A semiconductor light emitting device having a pair of electrodes formed on one surface of a semiconductor thin film layer laminated on a transparent substrate;
A composite light-emitting element having two electrodes and a submount element that joins the semiconductor light-emitting element to the two electrodes in a state where the pair of electrodes are electrically connected to each other by first and second large bumps. In the manufacturing method,
Bonding the semiconductor light emitting element and the submount element with first and second small bumps formed by stud bump bonding;
The first and second small bumps used for joining the semiconductor light emitting element and the submount element are plated with gold to enlarge the plane sectional area to 30% or more of the planar sectional area of the semiconductor light emitting element. And a step of forming a second large bump .
JP2002009722A 2002-01-18 2002-01-18 Method for manufacturing composite light emitting device Expired - Fee Related JP4032752B2 (en)

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