JP2003202832A - Method for driving light emitting device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for driving a light emitting device capable of preventing light emitting elements from dispersing in brightness due to the characteristics of TFTs for controlling currents to be supplied to the light emitting elements, preventing the light emitting elements from lowering in brightness due to deterioration of the organic light emitting layer, and also obtaining constant brightness without being influenced by the deterioration and temperature change of the organic light emitting layer. <P>SOLUTION: The current made to flow through a light emitting element is kept at a desired value without being influenced by the characteristic of the TFT by controlling the brightness of the light emitting element not by the voltage to be applied to the TFT but controlling the current flowing through the TFT by the signal line driving circuit. Further, a reverse bias voltage is applied to the light emitting element at regular intervals. The above two configurations bring a synergy effect, so that the brightness is prevented from farther lowering due to deterioration of the organic light emitting layer, and also keeping the current flowing through the light emitting element at a desired value without being influenced by the characteristic of the TFT. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting panel in which a light emitting element formed on a substrate is enclosed between the substrate and a cover material. Further, the present invention relates to a light emitting module in which an IC including a controller is mounted on the light emitting panel. In this specification, the light emitting panel and the light emitting module are collectively referred to as a light emitting device. The present invention further relates to a method for driving the light emitting device and an electronic device using the light emitting device.

[0002]

2. Description of the Related Art Since a light emitting element emits light by itself, it has high visibility, is not required to have a backlight required in a liquid crystal display (LCD), is suitable for thinning, and has no limitation in viewing angle. Therefore, in recent years, a light emitting device using a light emitting element has a CR
It is receiving attention as a display device that replaces the T and LCD.

In the present specification, the light emitting element means an element whose brightness is controlled by current or voltage, such as an OLED (Organic Light Emitting Diode) or an F
MI used for ED (Field Emission Display)
It includes an M type electron source element (electron emitting element) and the like.

The OLED has a layer containing an organic compound (organic light emitting material) that can obtain luminescence generated by applying an electric field (hereinafter referred to as an organic light emitting layer), an anode layer, and a cathode layer. is doing. Luminescence in an organic compound includes light emission (fluorescence) when returning from a singlet excited state to a ground state and light emission when returning to a ground state from a triplet excited state (phosphorescence). One of the above-mentioned light emissions may be used, or both of the light emissions may be used.

In this specification, all layers provided between the anode and the cathode of the OLED are defined as organic light emitting layers.
The organic light emitting layer specifically includes a light emitting layer, a hole injection layer, an electron injection layer, a hole transport layer, an electron transport layer, and the like. Basically, an OLED has a structure in which an anode, a light emitting layer, and a cathode are laminated in this order, and in addition to this structure, an anode / hole injection layer /
It may have a structure in which a light emitting layer / cathode or an anode / hole injection layer / light emitting layer / electron transport layer / cathode are laminated in this order.

[0006]

FIG. 23 shows a pixel configuration of a general light emitting device. The pixel shown in FIG.
It has FTs 50 and 51, a storage capacitor 52, and a light emitting element 53.

In the TFT 50, the gate is connected to the scanning line 55, one of the source and the drain is connected to the signal line 54, and the other is connected to the signal line 54.
The other side is connected to the gate of the TFT 51. TF
In T51, the source is connected to the power supply 56, and the drain is connected to the anode of the light emitting element 53. Light emitting element 5
The cathode of No. 3 is connected to the power supply 57. The storage capacitor 52 is provided so as to hold the voltage between the gate and the source of the TFT 51.

When the TFT 50 is turned on by the voltage of the scanning line 55, the video signal input to the signal line 54 is transferred to the TFT.
It is input to the gate of 51. When a video signal is input, the TFT 51 is turned on according to the voltage of the input video signal.
Gate voltage (voltage difference between the gate and the source) is determined.
Then, the drain current of the TFT 51 flowing by the gate voltage is supplied to the light emitting element 53, and the light emitting element 53 emits light by the supplied current.

By the way, TF formed of polysilicon
T has a higher field effect mobility and a larger on-current than a TFT formed of amorphous silicon, and thus is more suitable as a transistor of a light emitting element panel.

However, even if a TFT is formed by using polysilicon, its electrical characteristics are not comparable with the characteristics of a MOS transistor formed on a single crystal silicon substrate. For example, the field effect mobility is 1 for single crystal silicon.
/ 10 or less. Also, a TFT using polysilicon
Has a problem that its characteristics are likely to vary due to defects formed at the crystal grain boundaries.

In the pixel shown in FIG. 23, the TFT 51
If the characteristics such as the threshold value and the on-current vary among the pixels, the magnitude of the drain current of the TFT 51 differs among the pixels even if the voltage of the video signal is the same, and the luminance of the light emitting element 53 also varies.

Another problem in putting a light emitting device using an OLED into practical use is the short life of the OLED due to deterioration of the organic light emitting layer. Organic light-emitting materials are vulnerable to moisture, oxygen, light and heat, and their deterioration promotes them. Specifically, the speed of the deterioration depends on the structure of the device that drives the light emitting device, the characteristics of the organic light emitting material, the material of the electrode, the conditions in the manufacturing process, the driving method of the light emitting device, and the like.

Even if the voltage applied to the organic light emitting layer is constant, when the organic light emitting layer deteriorates, the brightness of the OLED decreases,
The displayed image becomes unclear.

The temperature of the organic light-emitting layer depends on the outside air temperature and OL.
Generally, the value of the current flowing in the OLED changes depending on the temperature, although it depends on the heat generated by the ED panel itself. Specifically, when the temperature of the organic light emitting layer rises when the voltage is constant, the current flowing through the OLED increases. And O
Since the current flowing through the LED and the brightness of the OLED are in a proportional relationship, the larger the current flowing through the OLED,
The brightness of the OLED is high. As described above, since the brightness of the OLED changes depending on the temperature of the organic light emitting layer, it is difficult to display a desired gradation, and the current consumption of the light emitting device increases as the temperature rises.

It has already been found that the deterioration of the current-voltage characteristic of the light emitting element is improved by applying a driving voltage of opposite polarity to the light emitting element at regular intervals (for example, Patent Document 1). reference).

[0016]

[Patent Document 1] Dechun ZOU, Masayuki YAHIRO and Tets
uo TSUTSUI, "JPN. J. Appl. Phys.", 15 November 199
8, Part 2 VOL.37, NO.11B pp. L1406-L1408

The above-mentioned document 1 introduces that deterioration of the light emitting element can be suppressed by applying a reverse bias voltage to the light emitting element at regular intervals. However, it does not describe a specific configuration and driving method of the active matrix light emitting device.

In view of the above problems, the present invention can prevent the brightness of the light emitting element from varying due to the characteristics of the TFT controlling the current supplied to the light emitting element, and the brightness of the light emitting element due to the deterioration of the organic light emitting layer. It is an object of the present invention to provide a light emitting device capable of preventing a decrease in luminance and obtaining a constant brightness without being influenced by deterioration of an organic light emitting layer or temperature change.

[0019]

SUMMARY OF THE INVENTION The present inventor has proposed that an OLED emits light while keeping a voltage applied to the OLED constant.
With respect to keeping the current flowing through D constant and causing light emission, the latter has been noted to have a smaller decrease in the luminance of the OLED due to deterioration. In this specification, a current flowing through the light emitting element is called a drive current, and a voltage applied to the light emitting element is called a drive voltage.

Then, the brightness of the light emitting element is not controlled by the voltage applied to the TFT, but the current flowing through the TFT is controlled by the signal line drive circuit, so that the current flowing through the light emitting element is not affected by the characteristics of the TFT. It is thought that the value can be maintained at a desired value and the change in the brightness of the OLED due to the deterioration of the OLED can be prevented.

Further, as introduced in the above-mentioned Document 1, it was found that the deterioration of the current-voltage characteristics of the light emitting element is improved by applying a driving voltage of opposite polarity to the light emitting element at regular intervals. Has been issued. Utilizing this property, the present invention applies a reverse bias voltage to the light emitting element at regular intervals in addition to the above-described configuration. Since the light emitting element is a diode, it emits light when a forward bias voltage is applied, and does not emit light when a reverse bias voltage is applied.

By using a driving method (AC drive) of applying a reverse bias driving voltage to the light emitting element at regular intervals as in the above structure, deterioration of the current-voltage characteristic of the light emitting element is improved, and It becomes possible to prolong the life of the element as compared with the conventional driving method.

The above two structures bring about a synergistic effect, can further prevent the deterioration of the brightness due to the deterioration of the organic light emitting layer, and keep the current flowing through the light emitting element at a desired value without being influenced by the characteristics of the TFT. You can

As described above, in AC drive,
When an image is displayed every one frame period, flicker may occur as flicker in the eyes of the observer. Therefore, in the case of AC driving, the light emitting device is driven at a frequency higher than the frequency at which flicker does not occur in the eyes of the observer in DC driving in which only forward bias voltage is applied, and flicker is prevented. Preferably.

According to the present invention, with the above-described structure, even if the characteristics of the TFT for controlling the current supplied to the light emitting element vary from pixel to pixel, the pixel can be compared with the general light emitting device shown in FIG. It is possible to prevent variations in the luminance of the light emitting element from occurring. Further, as compared with the case where the TFT 51 of the voltage input type pixel shown in FIG. 23 is operated in a linear region, it is possible to suppress a decrease in luminance due to deterioration of the light emitting element. Further, even if the temperature of the organic light emitting layer is influenced by the ambient temperature or the heat generated by the light emitting panel itself, the brightness of the light emitting element can be prevented from changing, and the current consumption increases as the temperature rises. Can be prevented.

In the light emitting device of the present invention, the transistor used for the pixel may be a transistor formed using single crystal silicon, or may be a thin film transistor using polycrystalline silicon or amorphous silicon. Alternatively, a transistor using an organic semiconductor may be used.

The transistor provided in the pixel of the light emitting device of the present invention may have a single gate structure, a double gate structure, or a multi-gate structure having more gate electrodes.

[0028]

1 is a block diagram showing the structure of a light emitting device of the present invention. A pixel portion 100 has a plurality of pixels 101 arranged in a matrix. Again 10
Reference numeral 2 is a signal line drive circuit, and 103 is a scanning line drive circuit.

Note that although the signal line driver circuit 102 and the scan line driver circuit 103 are formed over the same substrate as the pixel portion 100 in FIG. 1, the present invention is not limited to this structure. The signal line driving circuit 102 and the scanning line driving circuit 103 are the pixel unit 1.
It may be formed on a substrate different from 00 and may be connected to the pixel unit 100 via a connector such as an FPC. Further, in FIG. 1, the signal line driving circuit 102 and the scanning line driving circuit 1
03 are provided one by one, but the present invention is not limited to this configuration. The designer can arbitrarily set the numbers of the signal line driving circuits 102 and the scanning line driving circuits 103.

In this specification, connection means electrical connection unless otherwise specified. On the contrary, disconnecting means not connecting.

Although not shown in FIG. 1, the pixel unit 1
00, signal lines S1 to Sx, power supply lines V1 to Vx, and scanning lines G1 to Gy are provided. Note that the number of signal lines and the number of power lines are not always the same. Further, it is not always necessary to have all of these wirings, and different wirings may be provided in addition to these wirings.

The signal line drive circuit 102 supplies a current of a magnitude corresponding to the voltage of the input video signal to each of the signal lines S1 to S1.
Sx can be supplied to the light emitting element 104 and a reverse bias voltage can be applied to the light emitting element 104.
04 controlling the magnitude of the current or voltage supplied to 04
Any circuit that can apply a voltage that turns on the FT to the gate of the TFT may be used. Specifically, in this embodiment mode, the signal line driver circuit 102 has a shift register 102a, a memory circuit A 102b capable of storing a digital video signal, a memory circuit B 102c, and a size corresponding to a voltage of the digital video signal. Of the current or voltage supplied to the light-emitting element 104 only during the period in which the current conversion circuit 102d that generates the current of (1) using a constant current source is supplied to the signal line and the reverse bias is applied. The TF is applied to the gate of the TFT for controlling the size.
It has a switching circuit 102e that can apply a voltage that turns on T. Note that the signal line driver circuit 102 of the light emitting device of the present invention is not limited to the above structure. Further, although the signal line driver circuit corresponding to a digital video signal (digital video signal) is shown in FIG. 1, the signal line driver circuit of the present invention is not limited to this and corresponds to an analog video signal (analog video signal). You can do it.

In this specification, the voltage means a potential difference from the ground unless otherwise specified.

FIG. 2 shows a detailed structure of the pixel 101 shown in FIG. The pixel 101 shown in FIG. 2 has a signal line Si (S
1-Sx), scanning line Gj (one of G1-Gy) and power supply line Vi (one of V1-Vx).
have. In addition, the pixel 101 includes a transistor Tr
1, Tr2, Tr3, Tr4, the light emitting element 104, and the storage capacitor 105. The storage capacitor 105 is provided to more reliably hold the voltage (gate voltage) between the gate and the source of the transistors Tr1 and Tr2, but it is not necessarily provided.

The gate of the transistor Tr3 is the scanning line Gj.
It is connected to the. One of the source and the drain of the transistor Tr3 (one of which serves as a first terminal and the other of which serves as a second terminal) is connected to the signal line Si, and the other is connected to the second terminal of the transistor Tr1. There is.

The gate of the transistor Tr4 is the scanning line Gj.
It is connected to the. One of the first terminal and the second terminal of the transistor Tr4 is connected to the signal line Si, and the other is connected to the gates of the transistors Tr1 and Tr2.

The gates of the transistors Tr1 and Tr2 are
Connected to each other. The first terminals of the transistors Tr1 and Tr2 are both connected to the power supply line Vi. The second terminal of the transistor Tr2 is connected to the light emitting element 10
4 pixel electrodes. One of the two electrodes of the storage capacitor 105 is the transistors Tr1 and Tr2.
, And the other is connected to the power supply line Vi.

The light-emitting element 104 has an anode and a cathode. In this specification, when the anode is used as a pixel electrode, the cathode is called a counter electrode, and when the cathode is used as a pixel electrode, the anode is called a counter electrode. . The voltage of the counter electrode is kept at a constant height.

The transistors Tr1 and Tr2 are n
Either a channel transistor or a p-channel transistor may be used. However, the transistors Tr1 and Tr
The polarities of 2 are the same. When the anode is used as the pixel electrode and the cathode is used as the counter electrode, the transistors Tr1 and Tr2 are preferably p-channel type transistors. On the contrary, when the anode is used as the counter electrode and the cathode is used as the pixel electrode, the transistors Tr1 and T
It is desirable that r2 be an n-channel transistor.

The transistors Tr3 and Tr4 may be either n-channel transistors or p-channel transistors, but both have the same polarity.

Next, the operation of the light emitting device of this embodiment will be described with reference to FIG. The operation of the light emitting device of the present invention is as follows: the writing period Ta and the display period T for each pixel on each line.
d and the reverse bias period Ti can be described separately. FIG. 3 shows transistors Tr1 and T in each period.
FIG. 6 is a diagram simply showing the connection between r2 and the light emitting element 104,
Here, the case where Tr1 and Tr2 are p-channel TFTs and the anode of the light emitting element 104 is used as a pixel electrode is taken as an example.

First, when the writing period Ta is started in the pixels of each line, the voltage of the power supply lines V1 to Vx is set to a high level such that a forward bias current flows to the light emitting element when the transistor Tr2 is turned on. Keep it Figure 1
Although the configuration of the light emitting device that displays a monochrome image is shown in the above, the present invention may be a light emitting device that displays a color image. In that case, the heights of the voltages of the power supply lines V1 to Vx do not have to be kept the same, and may be changed for each corresponding color.

Then, the scanning line driving circuit 103 sequentially selects the scanning lines of the respective lines, and the transistors Tr3 and Tr4 are turned on. Note that the selected periods of the scanning lines do not overlap with each other. Then, based on the video signal input to the signal line driver circuit 102, currents (hereinafter, signal currents Ic) corresponding to the video signals respectively flow between the signal lines S1 to Sx and the power supply lines V1 to Vx.

FIG. 3A shows a schematic diagram of the pixel 101 when the signal current Ic corresponding to the video signal flows through the signal line Si in the writing period Ta. Reference numeral 106 denotes a terminal for connection with a power supply that applies a voltage to the counter electrode. Reference numeral 107 denotes a constant current source included in the signal line driver circuit 102.

The transistor Tr3 is in the on state
Then, the signal current Ic corresponding to the video signal flows through the signal line Si.
Then, the signal current Ic becomes the drain of the transistor Tr1.
Between the sauce and sauce. At this time, the transistor Tr1
Is in the saturation region because the gate and drain are connected
It is operating and operates according to Equation 1 below. In addition, V
_GSIs the gate voltage, μ is the mobility, C₀Per unit area
Gate capacitance, W / L is the channel width W of the channel formation region
To channel length L, V_THIs the threshold and the drain current is I
To do.

[Equation 1] _{I = μC 0 W / L (} V GS -V TH) 2/2

In Expression 1, μ, C ₀ , W / L, and V _TH are fixed values determined by individual transistors.
From Expression 1, it can be seen that the gate voltage V _GS of the transistor Tr1 is determined by the current value Ic.

The gate of the transistor Tr2 is connected to the gate of the transistor Tr1. The source of the transistor Tr2 is connected to the source of the transistor Tr1. Therefore, the transistor Tr
The gate voltage of 1 becomes the gate voltage of the transistor Tr2 as it is. Therefore, the drain current of the transistor Tr2 is proportional to the drain current of the transistor Tr1. In particular, when μC ₀ W / L and V _TH are equal to each other,
The drain currents of the transistors Tr1 and Tr2 are equal to each other, and I ₂ = Ic.

The drain current I ₂ of the transistor Tr2 flows through the light emitting element 104. The current flowing through the light emitting element is the signal current Ic determined by the constant current source 107.
The light emitting element 104 emits light with a brightness corresponding to the magnitude of the flowing current. The light emitting element 104 does not emit light when the current flowing through the light emitting element is extremely close to 0 or when the current flowing through the light emitting element flows in the reverse bias direction.

When the writing period Ta ends, the selection of the scanning line of each line ends. When the writing period Ta ends in the pixels of each line, the display period Td starts in the pixels of each line. FIG. 3B shows a schematic diagram of the pixel in the display period Td. The transistors Tr3 and Tr4 are off. In addition, the source regions of the transistors Tr3 and Tr4 are connected to the power supply line Vi and are maintained at a constant voltage (power supply voltage).

In the display period Td, the drain region of the transistor Tr1 is in a so-called floating state in which no electric potential is applied from other wirings, a power source, or the like. On the other hand, in the transistor Tr2, V _GS determined in the writing period Ta is maintained as it is. Therefore, the value of the drain current I ₂ of the transistor Tr2 is I
It remains maintained at c. Therefore, in the display period Td, the OLED 104 emits light with the brightness corresponding to the magnitude of the current determined in the writing period Ta.

The display period Td always appears immediately after the writing period Ta. Immediately after the display period Td, the next writing period Ta appears or the reverse bias period Ti appears.

When the reverse bias period is started, the power supply line V
The voltage of 1 to Vx is kept high enough to apply the reverse bias voltage to the light emitting element when the transistor Tr2 is turned on. Then, the scanning line driving circuit 103 sequentially selects the scanning lines of the respective lines, and the transistors Tr3 and Tr4 are turned on. Then, the signal line driving circuit 102 applies a voltage to each of the signal lines S1 to Sx so that the transistor Tr2 is turned on.

FIG. 3C shows a schematic view of the pixel 101 during the reverse bias period Ti. In the reverse bias period Ti, since Tr2 is turned on, the voltage of the power supply line Vi is applied to the pixel electrode of the light emitting element 104, so that the reverse bias voltage is applied to the light emitting element 104. The light emitting element 104 is in a state of not emitting light when a reverse bias voltage is applied.

The voltage of the power supply line is the transistor Tr.
It suffices that the voltage is such that a reverse bias voltage is applied to the light emitting element when 2 is turned on. Further, the length of the reverse bias period Ti can be appropriately set by the designer in consideration of the balance with the duty ratio (the ratio of the total length of the display period in one frame period).

In the case of the time gray scale driving method using a digital video signal (digital driving method), the writing period Ta and the display period Td corresponding to the digital video signal of each bit appear repeatedly during one frame period. It is possible to display one image. For example, when displaying an image with an n-bit video signal, at least n writing periods and n display periods are provided within one frame period. n writing periods (Ta1 to Ta)
n) and n display periods (Td1 to Tdn) correspond to each bit of the video signal.

For example, next to the writing period Tam (m is an arbitrary number from 1 to n), a display period corresponding to the same bit number, in this case Tdm, appears. The writing period Ta and the display period Td are collectively referred to as a subframe period SF.
The sub-frame period having the writing period Tam and the display period Tdm corresponding to the m-th bit is SFm.

When a digital video signal is used, the reverse bias period Ti may be provided immediately after the display periods Td1 to Tdn, or immediately after the display period that appears at the end of one frame period among Td1 to Tdn. You can
Further, the reverse bias period Ti does not necessarily have to be provided for each frame period, and may appear every several frame periods. The designer can appropriately set how many reverse bias periods Ti appear.

In FIG. 4, when the reverse bias period Ti appears at the end of one frame period, the voltage applied to the scanning line in the pixel (i, j), the voltage applied to the power source line, and the light emission. 7 shows a timing chart of a voltage applied to an element. In FIG. 4, Tr3 and Tr4 are both n-channel TFTs, and Tr1 and Tr2 are p-channel TFTs.
The case will be shown. In each of the writing periods Ta1 to Tan and the reverse bias period Ti, the scanning line Gj is selected,
Tr3 and Tr4 are turned on, and each display period Td1
The scanning line Gj is not selected in the range from to Tdn, and Tr
3, Tr4 is off. In addition, the voltage of the power supply line Vi is set in each of the writing periods Ta1 to Tan and each of the display periods T.
In d1 to Tdn, the height is maintained such that a forward bias current flows through the light emitting element 104 when Tr2 is on. Then, in the reverse bias period Ti, the voltage of the power supply line Vi is kept high enough to apply the reverse bias voltage to the light emitting element 104. The applied voltage of the light emitting element is kept in the forward bias in each of the writing periods Ta1 to Tan and each of the display periods Td1 to Tdn, and is kept in the reverse bias in the reverse bias period Ti.

Length of subframe periods SF1 to SFn
Is SF1: SF2: ...: SFn = 2 ⁰: 2¹:…: 2
^n-1Meet

In each sub-frame period, whether or not the light emitting element is caused to emit light is selected by each bit of the digital video signal. Then, by controlling the sum of the lengths of the light emitting display periods in one frame period,
The number of gradations can be controlled.

In order to improve the image quality on the display, the sub-frame period having a long display period may be divided into several parts.
Regarding the specific method of division, Japanese Patent Application No. 2000-267
No. 164, which can be referred to.

Further, gradation may be displayed in combination with area gradation.

In the case of displaying gradation using an analog video signal, one frame period ends when the writing period Ta and the display period Td end. One image is displayed in one frame period. Then, the next frame period is started, the writing period Ta is started again, and the above-described operation is repeated.

When an analog video signal is used, the reverse bias period Ti is provided immediately after the display period Td. Further, the reverse bias period Ti does not necessarily have to be provided for each frame period, and may appear every several frame periods. The designer can appropriately set when the reverse bias period Ti appears.

According to the present invention, even if the characteristic of the transistor Tr2 varies from pixel to pixel, it is possible to prevent the luminance of the light emitting element from varying between pixels as compared with the general light emitting device shown in FIG. . Further, as compared with the case where the TFT 51 of the voltage input type pixel shown in FIG. 23 is operated in a linear region, it is possible to suppress a decrease in luminance due to deterioration of the light emitting element. Further, even if the temperature of the organic light emitting layer is influenced by the ambient temperature or the heat generated by the light emitting panel itself, the brightness of the light emitting element can be prevented from changing, and the current consumption increases as the temperature rises. Can be prevented.

In this embodiment, one of the first terminal and the second terminal of the transistor Tr4 is the signal line S.
i is connected to the gate of the transistor Tr1 and the gate of the transistor Tr2. However, the present embodiment is not limited to this configuration. The pixel of the present invention is
The transistor Tr4 is connected to another element or wiring so that the gate of the transistor Tr1 and the second terminal can be connected in the writing period Ta and the gate and the second terminal of the transistor Tr1 can be disconnected in the display period Td. Just go. That is, Tr3 and Tr4 are connected as shown in FIG. 3A during the writing period Ta, as shown in FIG. 3B during the display period Td, and as shown in FIG. 3C during the reverse bias period Ti. It should be connected.

The light emitting element used in this embodiment is
The hole injecting layer, the electron injecting layer, the hole transporting layer, the electron transporting layer, and the like may be in the form of an inorganic compound alone or a material in which an inorganic compound is mixed with an organic compound. Further, these layers may be partially mixed with each other.

[0068]

EXAMPLES Examples of the present invention will be described below.

(Embodiment 1) In this embodiment, a case will be described in which the reverse bias period Ti appears in the pixel shown in FIG. 2 at a timing different from that in FIG. The driving method of this embodiment will be described with reference to FIG.

FIG. 5 shows a timing chart of the voltage applied to the scanning line, the voltage applied to the power supply line, and the voltage applied to the light emitting element in the pixel (i, j) of this embodiment. In FIG. 5, Tr3 and Tr4 are both n-channel TFTs, and Tr1 and Tr2 are p-channel TFTs.
The case will be shown.

The total length of the writing periods Ta1 to Tan and the display periods Td1 to Tdn is T_1, and the voltage difference between the power supply line Vi and the counter electrode of the light emitting element during this period is V_1. Then, the length of the reverse bias period Ti is T_2, and the voltage difference between the power supply line Vi and the counter electrode of the light emitting element is V_2 during the period. In this embodiment, the voltage of the power supply line Vi is maintained at a height such that T_1 × V_1 = T_2 × V_2. Further, the voltage of the power supply line Vi is kept high enough to apply a reverse bias voltage to the light emitting element 104.

The ionic impurities existing in the organic light emitting layer move toward one of the electrodes, so that a part having a lower resistance than the other part is formed in a part of the organic light emitting layer. It is considered that the deterioration of the organic light emitting layer is promoted by positively flowing the current. In the present invention, by using the inversion driving, it is possible to prevent the ionic impurities from coming close to one of the electrodes and suppress the deterioration of the organic light emitting layer. In particular, in the present embodiment, with the above configuration, it is possible to prevent the impurity ions from being biased toward one electrode more than to simply perform the inversion driving, and it is possible to further suppress the deterioration of the organic light emitting layer.

(Embodiment 2) In this embodiment, a case will be described in which a reverse bias period Ti appears in the pixel shown in FIG. 2 at a timing different from those in FIGS. The driving method of this embodiment will be described with reference to FIG.

FIG. 6 shows a timing chart of the voltage applied to the scanning line, the voltage applied to the power supply line, and the voltage applied to the light emitting element in the pixel (i, j) of this embodiment. In FIG. 6, Tr3 and Tr4 are both n-channel TFTs, and Tr1 and Tr2 are p-channel TFTs.
The case will be shown.

In the present embodiment, each display period Td1 to Tdn.
Immediately after, in other words, immediately after each sub-frame period, the reverse bias periods Ti1 to Tin respectively appear. For example, in the m-th (m = 1 to n) arbitrary sub-frame period SFm, the display period T immediately after the writing period Tam.
dm appears, and the reverse bias period Tim appears immediately after the display period Tdm.

In this embodiment, the reverse bias period Ti1
The lengths of to Tin are all the same, and the heights of the power supply lines Vi are also the same in each period. However, the present invention is not limited to this configuration. Each reverse bias period Ti1 to Ti
The length of n and its voltage can be appropriately set by the designer.

(Embodiment 3) In this embodiment, a case will be described in which the reverse bias period Ti appears in the pixel shown in FIG. 2 at a timing different from those in FIGS. 4, 5 and 6. The driving method of this embodiment will be described with reference to FIG.

FIG. 7 shows a timing chart of the voltage applied to the scanning line, the voltage applied to the power supply line, and the voltage applied to the light emitting element in the pixel (i, j) of this embodiment. In FIG. 7, Tr3 and Tr4 are both n-channel TFTs, and Tr1 and Tr2 are p-channel TFTs.
The case will be shown.

In the present embodiment, each display period Td1 to Tdn.
Immediately after, in other words, immediately after each sub-frame period, the reverse bias periods Ti1 to Tin respectively appear. For example, in the m-th (m = 1 to n) arbitrary sub-frame period SFm, the display period T immediately after the writing period Tam.
dm appears, and the reverse bias period Tim appears immediately after the display period Tdm.

Further, in this embodiment, the reverse bias period Ti
The length of 1 to Tin is longer as the length of the display period that appears immediately before is longer. The heights of the power supply lines Vi in each period are all the same. With the above structure, deterioration of the organic light emitting layer can be prevented more than in the driving method shown in FIGS.

(Embodiment 4) In this embodiment, a case will be described in which the reverse bias period Ti appears in the pixel shown in FIG. 2 at a timing different from those in FIGS. 4, 5, 6 and 7. The driving method of this embodiment will be described with reference to FIG.

FIG. 8 shows a timing chart of the voltage applied to the scanning line, the voltage applied to the power supply line, and the voltage applied to the light emitting element in the pixel (i, j) of this embodiment. In FIG. 8, Tr3 and Tr4 are both n-channel TFTs, and Tr1 and Tr2 are p-channel TFTs.
The case will be shown.

In the present embodiment, each display period Td1 to Tdn.
Immediately after, in other words, immediately after each sub-frame period, the reverse bias periods Ti1 to Tin respectively appear. For example, in the m-th (m = 1 to n) arbitrary sub-frame period SFm, the display period T immediately after the writing period Tam.
dm appears, and the reverse bias period Tim appears immediately after the display period Tdm.

Further, in this embodiment, the absolute value of the voltage difference between the voltage of the power supply line Vi and the counter electrode of the light emitting element in each reverse bias period becomes larger as the length of the display period appearing immediately before becomes longer. ing. Each reverse bias period Ti1
The lengths of ~ Tin are all the same. With the above configuration,
Deterioration of the organic light emitting layer can be prevented more than in the pixel shown in FIGS.

(Embodiment 5) In this embodiment, a structure of a signal line driver circuit and a scan line driver circuit which are driven by a digital video signal and which are included in a light emitting device of the present invention will be described.

FIG. 9 is a block diagram showing the configuration of the signal line drive circuit 102. 102a is a shift register, 102b is a memory circuit A, 102c is a memory circuit B, 102d is a current conversion circuit, and 102e is a switching circuit.

The clock signal CLK and the start pulse signal SP are input to the shift register 102a. In addition, a digital video signal (Digi
Tal Video Signals is input to the memory circuit B102c, and a latch signal (Latch Sig Signal) is input.
nals) is input. A switching signal (Select Signals) is input to the switching circuit 102e. The operation of each circuit will be described in detail below according to the flow of signals.

A timing signal is generated by inputting the clock signal CLK and the start pulse signal SP to the shift register 102a from a predetermined wiring. The timing signal is input to each of the plurality of latches A (LATA_1 to LATA_x) included in the memory circuit A102b. At this time, the timing signal generated in the shift register 102a is buffer-amplified by a buffer or the like, and then the plurality of latches A included in the memory circuit A 102b.
You may make it respectively input into (LATA_1-LATA_x).

When a timing signal is input to the memory circuit A 102b, a 1-bit digital video signal input to the video signal line 130 is sequentially output to a plurality of latches A (LATA_1 to LATA_) in synchronization with the timing signal.
x) is written and held in each.

In this embodiment, the memory circuit A (LATA
_1 to LATA_x) 102b are sequentially written with digital video signals, but the present invention is not limited to this structure. It is also possible to divide the latches of the plurality of stages included in the memory circuit A 102b into several groups and perform so-called divided driving in which digital video signals are input simultaneously in parallel to each group. The number of groups at this time is called the number of divisions. For example, when the latch is divided into groups for each of the four stages, it is said that the division driving is performed in four divisions.

The time required to complete the writing of the digital video signal into the latches of all the stages of the memory circuit A 102b is called a line period. In practice, the line period may include a period in which a horizontal blanking period is added to the line period.

When the one-line period ends, the memory circuit B1
02c has a plurality of latches B (LATB_1 to LAT
A latch signal (Latch Signal) is supplied to B_x) via the latch signal line 131. At this moment, the plurality of latches A (LATA_1 to LATA_L
The digital video signal held in ATA_x) is
A plurality of latches B (LATB included in the memory circuit B102c
_1 to LATB_x) are written and held all at once.

The storage circuit B102c stores the digital video signal.
The next 1-bit digital video signal is sequentially written to the memory circuit A 102b which has been sent to the memory circuit A in synchronization with the timing signal from the shift register 102a. During this one-line period of the second order, the memory circuit B1
The digital video signal written in 02c and held therein is input to the current conversion circuit 102d.

The current conversion circuit 102d has a plurality of current setting circuits (C1 to Cx). Current setting circuit (C1 ~
In each of Cx), the magnitude of the signal current Ic supplied to the switching circuit 102e in the subsequent stage is determined based on the information of 1 or 0 included in the input digital video signal. Specifically, the signal current Ic has such a magnitude that the light emitting element emits light or does not emit light.

In the switching circuit 102e, the switching signal (Se) input from the switching signal line 132 is input.
Lect Signals), the signal current Ic is supplied to the signal line or a voltage for turning on the transistor Tr2 is supplied to the signal line.

FIG. 10 shows an example of a specific configuration of the current setting circuit C1 and the switching circuit D1. The current setting circuits C2 to Cx also have the same configuration as the current setting circuit C1. The switching circuits D2 to Dx also have the same configuration as the switching circuit D1.

The current setting circuit C1 includes a constant current source 631 and 4
It has one transmission gate SW1 to SW4 and two inverters Inb1 and Inb2. The polarity of the transistor 650 included in the constant current source 631 is the same as the polarities of the transistors Tr1 and Tr2 included in the pixel.

LATB_1 included in the memory circuit B102c
Depending on the digital video signal output from SW1,
The switching of SW4 is controlled. SW1 and S
Digital video signal input to W3, SW2 and S
The digital video signal input to W4 is Inb1, I
Inverted by nb2. Therefore SW1 and SW
When 3 is on, SW2 and SW4 are off, and when SW1 and SW3 are off, SW2 and SW4 are on.

When SW1 and SW3 are ON, the constant current source 631 supplies a current Id of a predetermined value other than 0 to the switching circuit D1 as a signal current Ic via SW1 and SW3.
Entered in.

On the contrary, when SW2 and SW4 are on, the current Id from the constant current source 631 is grounded via SW2. In addition, power supply lines V1 to Vx via SW4
Is applied to the switching circuit D1 and Ic≈0.

The switching circuit D1 includes two transmission gates SW5 and SW6 and one inverter I.
nb3 and. Switching of SW5 and SW6 is controlled by a switching signal. And
Since the switching signals input to SW5 and SW6 have their polarities inverted by the inverter Inb3, when SW5 is on, SW6 is off and S
When W5 is off, SW6 is on. A signal current Ic is input to the signal line S1 when the SW5 is on, and a voltage for turning on the transistor Tr2 is applied to the signal line S1 when the SW6 is on.

Referring again to FIG. 9, the above operation is simultaneously performed in all the current setting circuits (C1 to Cx) included in the current conversion circuit 102d within one line period. Therefore, the value of the signal current Ic input to all the signal lines is selected by the digital video signal.

The drive circuit used in the present invention is not limited to the structure shown in this embodiment. Furthermore, the current conversion circuit shown in this embodiment is not limited to the configuration shown in FIG. What is the current conversion circuit used in the present invention as long as it is possible to select one of the two possible values of the signal current Ic by the digital video signal and supply the signal current having the selected value to the signal line? It may have a different configuration. Further, the switching circuit is not limited to the configuration shown in FIG. 10, and it is a circuit that can select whether to input the signal current Ic to the signal line or to input a voltage for turning on the transistor Tr2 to the signal line. I wish I had it.

Instead of the shift register, another circuit capable of selecting a signal line such as a decoder circuit may be used.

Next, the structure of the scanning line drive circuit will be described.

FIG. 11 is a block diagram showing the configuration of the scanning line driving circuit 641. The scan line driver circuit 641 includes a shift register 642 and a buffer 643, respectively. Further, in some cases, it may have a level shifter.

In the scanning line drive circuit 641, the timing signal is generated by inputting the clock CLK and the start pulse signal SP to the shift register 642. The generated timing signal is buffer-amplified in the buffer 643 and supplied to the corresponding scanning line.

Gates of transistors of pixels for one line are connected to the scanning line. Since the transistors of the pixels for one line must be turned on all at once, a buffer 643 that can pass a large current is used.

Note that the scan line driver circuit included in the light emitting device of the present invention is not limited to the structure shown in FIG. For example, instead of the shift register, another circuit capable of selecting a scan line such as a decoder circuit may be used.

The structure of this embodiment can be implemented by freely combining with Embodiments 1 to 4.

[Embodiment 6] In this embodiment, a structure of a signal line driver circuit included in a light emitting device of the present invention which is driven by an analog driving method will be described. Note that since the structure of the scan line driver circuit can be the same as that shown in Embodiment 5, description thereof is omitted here.

FIG. 12 shows the signal line drive circuit 401 of this embodiment.
The block diagram of is shown. 402 is a shift register, 403
Is a buffer, 404 is a sampling circuit, 405 is a current conversion circuit, and 406 is a switching circuit 406.

A clock signal (CLK) and a start pulse signal (SP) are input to the shift register 402. Clock signal (CLK) to the shift register 402
And a start pulse signal (SP) are input, a timing signal is generated.

The generated timing signal is transferred to the buffer 4
Amplification or buffer amplification is carried out in 03, and it is inputted into the sampling circuit 404. A level shifter may be provided instead of the buffer to amplify the timing signal. Further, both the buffer and the level shifter may be provided.

In the sampling circuit 404, the analog video signal input from the video signal line 430 is input to the current conversion circuit 405 in the subsequent stage in synchronization with the timing signal.

The current conversion circuit generates a signal current Ic having a magnitude corresponding to the voltage of the input analog video signal, and inputs the signal current Ic to the switching circuit 406 in the subsequent stage. The switching circuit 406 selects whether the signal current Ic is input to the signal line or a voltage for turning off the transistor Tr2 is input to the signal line.

FIG. 13 shows a specific configuration of the sampling circuit 404 and the current setting circuits (C1 to Cx) included in the current conversion circuit 405. The sampling circuit 404 is
It is connected to the buffer 403 at the terminal 410.

The sampling circuit 404 is provided with a plurality of switches 411. An analog video signal is input to the sampling circuit 404 from the video signal line 406, and the switch 411 samples the analog video signal in synchronization with the timing signal.
Input to the current setting circuit C1 in the subsequent stage. In addition, in FIG.
Although C1 which is one of the current setting circuits C1 to Cx shows only the current setting circuit C1 connected to one of the switches 411 included in the sampling circuit 404, it is shown in FIG. 13 after each switch 411. It is assumed that such a current setting circuit C1 is connected.

Although only one transistor is used for the switch 411 in this embodiment, the switch 411 may be any switch that can sample an analog video signal in synchronization with a timing signal, and is limited to the configuration of this embodiment. Not done.

The sampled analog video signal is input to the current output circuit 412 included in the current setting circuit C1. The current output circuit 412 outputs a current (signal current) having a value corresponding to the voltage of the input video signal.
Note that although the current output circuit is formed using the amplifier and the transistor in FIG. 12, the present invention is not limited to this structure and is a circuit capable of outputting a current having a value corresponding to the voltage of the input signal. I wish I had it.

The signal current is also input to the reset circuit 417 of the current setting circuit C1. The reset circuit 417 includes two transmission gates 413, 4 and
14 and an inverter 416.

The reset signal (Res) is input to the transmission gate 414, and the reset signal (Res) inverted by the inverter 416 is input to the transmission gate 413. The transmission gate 413 and the transmission gate 414 operate in synchronization with the inverted reset signal and the reset signal, respectively, and when one is on, one is off.

Then, the transmission gate 413
When is on, the signal current is input to the switching circuit D1 in the subsequent stage. On the contrary, when the transmission gate 414 is turned on, the voltage of the power supply 415 changes to the switching circuit D1 in the subsequent stage.
Given to. The signal line is preferably reset during the blanking period. However, if it is a period other than the period in which the image is displayed, the period can be reset to a period other than the blanking period as necessary.

The switching circuit D1 includes two transmission gates SW1 and SW2 and one inverter I.
nb and. Switching of SW1 and SW2 is controlled by a switching signal. And S
The switching signal input to each of W1 and SW2 is
Since the polarities are inverted by the inverter Inb, SW2 is off when SW1 is on, and SW2 is on when SW1 is off. When SW1 is on, the signal current Ic is input to the signal line S1, and when SW2 is on, a voltage that turns on the transistor Tr2 is applied to the signal line S1.

Instead of the shift register, another circuit capable of selecting a signal line such as a decoder circuit may be used.

The signal line driver circuit for driving the light emitting device of the present invention is not limited to the structure shown in this embodiment. The structure of this embodiment can be implemented by freely combining with the structures shown in Embodiments 1 to 4.

Example 7 In the present invention, by using an organic light emitting material capable of utilizing phosphorescence from triplet excitons for light emission, the external light emission quantum efficiency can be dramatically improved. As a result, it is possible to reduce the power consumption of the light emitting element, extend the life of the light emitting element, and reduce the weight thereof.

Here, a report will be presented in which triplet excitons are used to improve the external emission quantum efficiency. (T.Tsutsui, C.Adachi, S.Saito, Photochemical Proce
sses in Organized Molecular Systems, ed.K.Honda,
(Elsevier Sci.Pub., Tokyo, 1991) p.437.)

The molecular formula of the organic light-emitting material (coumarin dye) reported by the above paper is shown below.

[0130]

[Chemical 1]

(MA Baldo, DFO'Brien, Y.You, A.Shou
stikov, S. Sibley, METhompson, SRForrest, Nature
395 (1998) p.151.)

The molecular formula of the organic light emitting material (Pt complex) reported by the above paper is shown below.

[0133]

[Chemical 2]

(MA Baldo, S. Lamansky, PEBurrrows,
METhompson, SRForrest, Appl.Phys.Lett., 75 (199
9) p.4.) (T.Tsutsui, M.-J.Yang, M.Yahiro, K.Nakamu
ra, T.Watanabe, T.tsuji, Y.Fukuda, T.Wakimoto, S.Ma
yaguchi, Jpn.Appl.Phys., 38 (12B) (1999) L1502.)

The molecular formula of the organic light emitting material (Ir complex) reported by the above paper is shown below.

[0136]

[Chemical 3]

As described above, if phosphorescence emission from triplet excitons can be utilized, it is possible in principle to realize external emission quantum efficiency that is 3 to 4 times higher than that when fluorescence emission from singlet excitons is used. .

The constitution of this embodiment can be implemented by freely combining with any constitution of Embodiments 1 to 6.

(Embodiment 8) Organic light emitting materials used for OLEDs are roughly classified into low molecular weight materials and polymer materials. The light emitting device of the present invention can be used with a low molecular weight organic light emitting material or a high molecular weight organic light emitting material.

The low molecular weight organic light emitting material is formed by a vapor deposition method. Therefore, it is easy to have a laminated structure, and it is easy to improve efficiency by laminating films having different functions such as a hole transport layer and an electron transport layer.

Examples of the low molecular weight organic light emitting material include aluminum complex Alq ₃ having quinolinol as a ligand, triphenylamine derivative (TPD) and the like.

On the other hand, the high molecular organic light emitting material has a higher physical strength than the low molecular organic material and the durability of the device is high. Moreover, since it is possible to form a film by coating, it is relatively easy to manufacture the device.

The structure of the light emitting device using the high molecular organic light emitting material is basically the same as that when using the low molecular organic light emitting material, and is cathode / organic light emitting layer / anode. However, when forming an organic light-emitting layer using a high-molecular organic light-emitting material, it is difficult to form a laminated structure as when a low-molecular organic light-emitting material is used. Is famous for the two-layer laminated structure. Specifically, it has a structure of cathode / light emitting layer / hole transport layer / anode. In the case of a light emitting element using a polymer organic light emitting material, Ca can be used as the cathode material.

Since the emission color of the element is determined by the material forming the light emitting layer, it is possible to form a light emitting element exhibiting a desired light emission by selecting these materials. Examples of the polymer organic light emitting material that can be used for forming the light emitting layer include polyparaphenylene vinylene based, polyparaphenylene based, polythiophene based, and polyfluorene based.

The polyparaphenylene vinylene series includes poly (paraphenylene vinylene) [PPV] derivatives, poly (2,5-dialkoxy-1,4-phenylene vinylene) [RO-PPV] and poly (2- ( 2'-ethyl-hexoxy) -5-methoxy-1,4-phenylene vinylene) [MEH-PPV], poly (2- (dialkoxyphenyl) -1,4-phenylene vinylene) [ROPh-PP
V] and the like.

The polyparaphenylene series includes polyparaphenylene [PPP] derivatives, poly (2,5-dialkoxy-1,4-phenylene) [RO-PPP], poly (2,2).
5-dihexoxy-1,4-phenylene) and the like.

The polythiophene system includes poly (3-alkylthiophene), a derivative of polythiophene [PT].
[PAT], poly (3-hexylthiophene) [PH
T], poly (3-cyclohexylthiophene) [PCH
T], poly (3-cyclohexyl-4-methylthiophene) [PCHMT], poly (3,4-dicyclohexylthiophene) [PDCHT], poly [3- (4-octylphenyl) -thiophene] [POPT], poly [ 3-
(4-octylphenyl) -2,2 bithiophene] [P
TOPT] and the like.

Examples of the polyfluorene type include polyfluorene [PF] derivatives, poly (9,9-dialkylfluorene) [PDAF], poly (9,9-dioctylfluorene) [PDOF] and the like.

When the high molecular weight organic light emitting material having a hole transporting property is sandwiched between the anode and the light emitting high molecular weight organic light emitting material, the hole injection property from the anode can be improved. it can. Generally, an acceptor material dissolved in water is applied by a spin coating method or the like. Further, since it is insoluble in an organic solvent, it can be laminated with the above-mentioned organic light emitting material having a light emitting property.

As the hole-transporting polymer organic light-emitting material, a mixture of PEDOT and camphorsulfonic acid (CSA) as an acceptor material, polyaniline [PA] is used.
Examples include a mixture of NI] and polystyrene sulfonic acid [PSS] as an acceptor material.

The structure of this embodiment can be combined with Embodiments 1 to 7.

Example 9 In this example, a method for manufacturing the light emitting device of the present invention will be described. In this embodiment, a method for manufacturing the pixel shown in FIG. 2 will be described as an example. Further, in this embodiment, the transistor Tr included in the pixel is
Although only the sectional views of 2 and Tr3 are shown, the transistors Tr1 and Tr4 can also be manufactured by referring to the manufacturing method of this embodiment. Further, in this embodiment, an example is shown in which TFTs included in a driver circuit (a signal line driver circuit and a scan line driver circuit) provided in the periphery of the pixel portion are simultaneously formed on the same substrate as the pixel portion TFT.

First, as shown in FIG. 14A, oxidation is performed on a substrate 301 made of glass such as barium borosilicate glass typified by Corning # 7059 glass or # 1737 glass, or aluminoborosilicate glass. A base film 302 made of an insulating film such as a silicon film, a silicon nitride film, or a silicon oxynitride film is formed. For example, a silicon oxynitride film 302a made of SiH ₄ , NH ₃ , and N ₂ O by plasma CVD is used for 10 to 200 n.
m (preferably 50 to 100 nm), and similarly Si
Hydrogenated silicon oxynitride film 3 made of H ₄ and N ₂ O
02b to 50 to 200 nm (preferably 100 to 150 nm)
to have a thickness of (nm). In this embodiment, the base film 30
Although 2 is shown as a two-layer structure, it may be formed as a single layer film of the insulating film or a structure in which two or more layers are laminated.

The island-shaped semiconductor layers 303 to 306 are formed of a crystalline semiconductor film formed by using a laser crystallization method or a known thermal crystallization method for a semiconductor film having an amorphous structure. The thickness of the island-shaped semiconductor layers 303 to 306 is 25 to 80 nm.
It is formed with a thickness (preferably 30 to 60 nm). Although the material of the crystalline semiconductor film is not limited, it is preferably formed of silicon, a silicon germanium (SiGe) alloy, or the like.

When the crystalline semiconductor film is formed by the laser crystallization method, a pulse oscillation type or continuous emission type excimer laser, YAG laser, or YVO ₄ laser is used. When using these lasers, the laser light emitted from the laser oscillator is linearly condensed by an optical system,
It is preferable to use a method of irradiating the semiconductor film. The crystallization conditions are appropriately selected by the practitioner, but when an excimer laser is used, the pulse oscillation frequency is 300 Hz, and the laser energy density is 100 to 400 mJ / cm ² (typically 200 to 300 mJ / cm ² ). When a YAG laser is used, its second harmonic is used to set the pulse oscillation frequency to 30 to 300 kHz and the laser energy density to 300 to 600 mJ / cm ² (typically 350 to 500 mJ / cm
² ) is good. Then, laser light focused in a linear shape with a width of 100 to 1000 μm, for example 400 μm, is applied over the entire surface of the substrate, and the overlapping ratio (overlap ratio) of the linear laser light at this time is set to 50 to 90%.

As the laser, a continuous wave or pulsed gas laser or solid laser can be used. Gas lasers include excimer lasers, Ar lasers, and Kr lasers, and solid-state lasers include YAG.
Laser, YVO ₄ laser, YLF laser, YAlO ₃ laser, glass laser, ruby laser, alexandrite laser, Ti: sapphire laser and the like can be mentioned. Solid-state lasers include Cr, Nd, Er, Ho, Ce,
YAG, YVO doped with Co, Ti or Tm
A laser using a crystal such as ₄ , YLF or YAlO ₃ can also be used. The fundamental wave of the laser differs depending on the material to be doped, and laser light having a fundamental wave of about 1 μm can be obtained. The harmonic wave with respect to the fundamental wave can be obtained by using a non-linear optical element.

Furthermore, it is also possible to use an ultraviolet laser beam obtained by another nonlinear optical element after converting the infrared laser beam emitted from the solid-state laser into a green laser beam by the nonlinear optical element.

In order to obtain crystals with a large grain size when crystallizing the amorphous semiconductor film, a solid-state laser capable of continuous oscillation is used and the second to fourth harmonics of the fundamental wave are applied. Is preferred. Typically, Nd: YVO ₄ laser (fundamental wave 1
064nm) second harmonic (532nm) and third harmonic (3
55 nm) is preferably applied. Specifically, laser light emitted from a continuous oscillation YVO ₄ laser having an output of 10 W is converted into a harmonic by a non-linear optical element. Also,
Put YVO ₄ crystal and nonlinear optical element in the resonator,
There is also a method of emitting harmonics. Then, preferably, a rectangular or elliptical laser beam is formed on the irradiation surface by an optical system, and the object to be processed is irradiated. At this time, the energy density of approximately 0.01 to 100 MW / cm ² (preferably 0.1 to 10 MW / cm ²⁾ is required. And 1
The semiconductor film is moved and irradiated relative to the laser light at a speed of about 0 to 2000 cm / s.

Next, a gate insulating film 307 is formed to cover the island-shaped semiconductor layers 303 to 306. Gate insulating film 307
Is a plasma CVD method or a sputtering method, and the thickness is 4
It is formed of an insulating film containing silicon with a thickness of 0 to 150 nm. In this embodiment, the silicon oxynitride film is formed to a thickness of 120 nm. Of course, the gate insulating film is not limited to such a silicon oxynitride film, and another insulating film containing silicon may be used as a single layer or a laminated structure. For example, when a silicon oxide film is used, TEOS (Tetraethyl Orthosilicate) and O ₂ are mixed by a plasma CVD method, a reaction pressure of 40 Pa and a substrate temperature of 300 to
It can be formed by discharging at a high frequency (13.56 MHz) and a power density of 0.5 to 0.8 W / cm ² at 400 ° C. The silicon oxide film thus manufactured is
After that, good characteristics can be obtained as a gate insulating film by thermal annealing at 400 to 500 ° C.

Then, a first conductive film 308 and a second conductive film 309 for forming a gate electrode are formed over the gate insulating film 307. In this embodiment, the first conductive film 30
8 is formed with Ta to a thickness of 50 to 100 nm, and the second conductive film 309 is formed with W to a thickness of 100 to 300 nm.

The Ta film is formed by the sputtering method, and the Ta target is sputtered with Ar. in this case,
When an appropriate amount of Xe or Kr is added to Ar, the internal stress of the Ta film can be relaxed and the film peeling can be prevented. Also, α
The Ta film of the phase has a resistivity of about 20 μΩcm and can be used for the gate electrode, but the Ta film of the β phase has a resistivity of about 180 μΩcm and is not suitable for the gate electrode. In order to form an α-phase Ta film, a tantalum nitride having a crystal structure close to that of the α-phase of Ta is formed on a Ta underlayer with a thickness of about 10 to 50 nm to easily obtain an α-phase Ta film. You can

When the W film is formed, it is formed by the sputtering method using W as a target. Alternatively, it can be formed by a thermal CVD method using tungsten hexafluoride (WF ₆ ). In any case, it is necessary to reduce the resistance in order to use it as a gate electrode, and the resistivity of the W film is 20 μm.
It is desirable to be Ωcm or less. The W film can be made low in resistivity by enlarging the crystal grains, but when a large amount of an impurity element such as oxygen is contained in W, crystallization is hindered and the resistance becomes high. From this, when using the sputtering method,
A resistivity of 9 to 20 μΩcm is obtained by using a W target having a purity of 99.9999% or a purity of 99.99% and forming the W film with sufficient consideration so that impurities are not mixed from the gas phase during film formation. Can be realized.

Note that in this embodiment, the first conductive film 308 is used.
Was used as Ta, and the second conductive film 309 was used as W. However, there is no particular limitation, and any of them is an element selected from Ta, W, Ti, Mo, Al, Cu, or an alloy material containing the above element as a main component. Alternatively, it may be formed of a compound material. Alternatively, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus may be used. As a preferable example of another combination other than this embodiment, a combination in which the first conductive film 308 is formed of tantalum nitride (TaN) and the second conductive film 309 is W, and the first conductive film 308 is preferable.
Is formed of tantalum nitride (TaN), and the second conductive film 30 is formed.
9 is Al, the first conductive film 308 is formed of tantalum nitride (TaN), and the second conductive film 309 is formed of C.
An example is a combination of u. (Figure 14 (A))

Next, a mask 310 made of resist is formed, and a first etching process for forming electrodes and wirings is performed. In this embodiment, ICP (Inductively Coupled
Plasma: Inductively coupled plasma etching method is used, CF ₄ and Cl ₂ are mixed as an etching gas, and a coil-shaped electrode is RF of 500 W (13.56 MH) at a pressure of 1 Pa.
z) Power is supplied to generate plasma. 100 W RF (13.56 MH) on the substrate side (sample stage)
z) Apply power and apply a substantially negative self-bias voltage. When CF ₄ and Cl ₂ are mixed, W film and Ta
The film is etched to the same extent.

Under the above etching conditions, by appropriately adjusting the shape of the mask made of resist, the end portions of the first conductive layer and the second conductive layer are tapered due to the effect of the bias voltage applied to the substrate side. Become. The angle of the taper portion is 15 to 45 °. In order to perform etching without leaving a residue on the gate insulating film, the etching time may be increased at a rate of about 10 to 20%. Since the selection ratio of the silicon oxynitride film to the W film is 2 to 4 (typically 3), the surface where the silicon oxynitride film is exposed is etched by about 20 to 50 nm by the overetching treatment. Thus, the first shape conductive layers 311 to 314 (the first conductive layers 311a to 311a to
314a and second conductive layers 311b to 314b) are formed. At this time, in the gate insulating film 307, the area which is not covered with the first shape conductive layers 311 to 314 is 20 to
A thinned region is formed by etching about 50 nm. The surface of the mask 310 was also etched by the above etching.

Then, a first doping process is performed to add an impurity element imparting n-type. The doping method may be an ion doping method or an ion implantation method. The condition of the ion doping method is that the dose amount is 1 × 10 ^{13 to} 5 × 10 5.
¹⁴ atoms / cm ² and an acceleration voltage of 60 to 100 k
Perform as eV. 15 as an impurity element imparting n-type
Group elements, typically phosphorus (P) or arsenic (A
s) is used, but phosphorus (P) is used here. In this case, the conductive layers 311 to 314 serve as masks for the impurity element imparting n-type, and the first impurity regions 317 to 320 are formed in a self-aligned manner. First impurity region 317
1 to 320 to 1 × 10 ²⁰ to 1 × 10 ²¹ atoms / cm
An impurity element imparting n-type is added within the concentration range of ³ .
(Figure 14 (B))

Next, as shown in FIG. 14C, a second etching process is performed without removing the resist mask 310. CF ₄ , Cl _2, and O ₂ are used as an etching gas, and the W film is selectively etched. At this time, the second shape conductive layers 325 to 328 are formed by the second etching treatment.
(First conductive layers 325a to 328a and second conductive layer 32
5b-328b) are formed. At this time, in the gate insulating film 307, the second shape conductive layers 325 to 328 are formed.
The region not covered with is further etched by about 20 to 50 nm to form a thinned region.

The etching reaction of the W film or the Ta film by the mixed gas of CF ₄ and Cl ₂ can be estimated from the radical or ion species generated and the vapor pressure of the reaction product.
Comparing the vapor pressures of fluoride and chloride of W and Ta,
WF ₆ which is a fluoride of
l ₅ , TaF ₅ , and TaCl ₅ are in the same level. Therefore, C
Both the W film and the Ta film are etched by the mixed gas of F ₄ and Cl ₂ . However, when an appropriate amount of O ₂ is added to this mixed gas, CF ₄ and O ₂ react to form CO and F, and a large amount of F radicals or F ions are generated. As a result, the etching rate of the W film having a high fluoride vapor pressure is increased. On the other hand, Ta has a relatively small increase in etching rate even if F increases. Moreover, since Ta is more easily oxidized than W, the surface of Ta is oxidized by adding O ₂ .
Since Ta oxide does not react with fluorine or chlorine,
The etching rate of the a film decreases. Therefore, W film and Ta
It becomes possible to make a difference in the etching rate from the film, and the etching rate of the W film can be made higher than that of the Ta film.

Then, a second doping process is performed as shown in FIG. In this case, the dose amount is made lower than that in the first doping process and n
Doping with an impurity element that imparts a mold. For example, the acceleration voltage is 70 to 120 keV and 1 × 10 ¹³ atom
A new impurity region is formed inside the first impurity region formed in the island-shaped semiconductor layer in FIG. 14B by performing a dose amount of s / cm ² . In the doping, the second shape conductive layers 325 to 328 are used as masks for the impurity elements, and doping is performed so that the impurity elements are added to the regions under the first conductive layers 325a to 328a. Thus, the third impurity regions 332 to 335 are formed. The concentration of phosphorus (P) added to the third impurity regions 332 to 335 has a gradual concentration gradient according to the film thickness of the tapered portion of the first conductive layers 325a to 328a. Note that in the semiconductor layers overlapping with the tapered portions of the first conductive layers 325a to 328a, the first conductive layers 325a to 325a to
A little from the end of the tapered portion of 328a toward the inside,
Although the impurity concentration is low, it is almost the same.

As shown in FIG. 15B, a third etching process is performed. CHF ₆ is used as an etching gas and a reactive ion etching method (RIE method) is used. Third
Of the first conductive layers 325a to 32
The tapered portion of 8a is partially etched to reduce the region where the first conductive layer overlaps with the semiconductor layer. By the third etching process, the third shape conductive layers 336 to 33 are formed.
9 (first conductive layers 336a to 339a and second conductive layer 3
36b-339b). At this time, in the gate insulating film 307, the third shape conductive layers 336 to 33 are formed.
The region not covered with 9 is further etched by about 20 to 50 nm to form a thinned region.

By the third etching process, the first conductive layer 33 is formed in the third impurity regions 332 to 335.
Third impurity regions 332a to 332a overlapping with 6a to 339a
35a and second impurity regions 332b to 335b between the first impurity region and the third impurity region are formed.

Then, as shown in FIG. 15C, island-shaped semiconductor layers 303 and 306 forming a p-channel TFT.
And a fourth impurity region 34 having a conductivity type opposite to the first conductivity type.
3 to 348 are formed. A third shape conductive layer 336b,
An impurity region is formed in a self-aligned manner by using 339b as a mask for the impurity element. At this time, the island-shaped semiconductor layers 304 and 305 forming the n-channel TFT are entirely covered with a resist mask 350. Phosphorus is added to the impurity regions 343 to 348 at different concentrations, but they are formed by an ion doping method using diborane (B ₂ H ₆ ), and the impurity concentration in each region is 2 × 10 ²⁰ to. It is set to 2 × 10 ²¹ atoms / cm ³ .

Impurity regions are formed in the respective island-shaped semiconductor layers by the above steps. Third overlapping with island-shaped semiconductor layer
The conductive layers 336 to 339 in the shape of the above function as gate electrodes.

After removing the resist mask 350, a step of activating the impurity element added to each island-shaped semiconductor layer is performed for the purpose of controlling the conductivity type. This step is performed by a thermal annealing method using a furnace annealing furnace. Besides, a laser annealing method or a rapid thermal annealing method (RTA method) can be applied. In the thermal annealing method, the oxygen concentration is less than 1ppm, preferably 0.1p
The temperature is 400 to 700 ° C., typically 500 to 600 ° C. in a nitrogen atmosphere of pm or less, and is 50 in this embodiment.
Heat treatment is performed at 0 ° C. for 4 hours. However, when the wiring material used for the third shape conductive layers 336 to 339 is weak to heat, activation is performed after forming an interlayer insulating film (having silicon as a main component) to protect the wiring and the like. It is preferable to carry out.

When the laser annealing method is used, it is possible to use the laser used for crystallization. In the case of activation, the moving speed is the same as that of crystallization,
~ 100 MW / cm ² (preferably 0.01 to 10)
An energy density of MW / cm ² ) is required.

Further, a step of hydrogenating the island-shaped semiconductor layer is performed by performing heat treatment at 300 to 450 ° C. for 1 to 12 hours in an atmosphere containing hydrogen of 3 to 100%. This step is a step of terminating the dangling bond of the semiconductor layer by thermally excited hydrogen. As another means of hydrogenation,
Plasma hydrogenation (using hydrogen excited by plasma) may be performed.

Then, as shown in FIG. 16A, the first
Of the silicon oxynitride film from 100 to
It is formed with a thickness of 200 nm. After forming a second interlayer insulating film 356 made of an organic insulating material thereon, contact holes are formed in the first interlayer insulating film 355, the second interlayer insulating film 356, and the gate insulating film 307. ,
The connection wirings 357 to 362 and 380 are formed by patterning. 380 is a power supply line and 360 is a signal line.

As the second interlayer insulating film 356, a film made of an organic resin can be used, and as the organic resin, polyimide, polyamide, acrylic, BCB (benzocyclobutene) or the like can be used. In particular, since the second interlayer insulating film 356 has a strong implication of flattening, acrylic having excellent flatness is preferable. In this embodiment, the acrylic film is formed with a film thickness that can sufficiently flatten the step formed by the TFT. The thickness is preferably 1 to 5 μm (more preferably 2 to 4 μm).

The contact holes are formed by dry etching or wet etching, and n-type impurity regions 318 and 319 or p-type impurity regions 345 and 34 are formed.
A contact hole reaching 8 and a contact hole (not shown) reaching a capacitor wiring (not shown) are formed respectively.

As the connection wirings 357 to 362, 380, a Ti film having a thickness of 100 nm, a Ti-containing aluminum film having a thickness of 300 nm, and a Ti film having a thickness of 150 nm were continuously formed by a sputtering method to form a three-layered laminated film having a desired pattern. Use one. Of course, another conductive film may be used.

Next, the pixel electrode 365 in contact with the connection wiring (connection wiring) 362 is formed by patterning. The connection wiring includes the connection wiring and the connection wiring. The connection wiring means a wiring connected to the source region of the active layer, and the connection wiring means a wiring connected to the drain region.

Further, in this embodiment, an ITO film having a thickness of 110 nm is formed as the pixel electrode 365, and patterning is performed. Contact is made by disposing the pixel electrode 365 so as to be in contact with the connection wiring 362. Alternatively, a transparent conductive film in which indium oxide is mixed with 2 to 20% zinc oxide (ZnO) may be used. This pixel electrode 365 becomes the anode of the OLED. (Figure 16 (A))

FIG. 17 is a top view of the pixel at the time when the process of FIG. 16A is completed. The insulating film and the interlayer insulating film are omitted in order to clarify the position of the wiring and the position of the semiconductor layer. The cross-sectional view taken along the line AA ′ in FIG. 17 corresponds to the part shown in AA ′ in FIG. 16 is a cross-sectional view taken along line BB ′ of FIG.
It corresponds to the part shown in B '.

The transistor Tr3 has a gate electrode 338 which is a part of the scanning line 574.
38 is also connected to the gate electrode 520 of the transistor Tr4. Further, one of the impurity regions 317 of the semiconductor layer of the transistor Tr3 is connected to the connection wiring 360 which functions as the signal line Si, and the other is connected to the connection wiring 361.
It is connected to the.

The transistor Tr2 has a gate electrode 339 which is a part of the capacitance wiring 573, and the gate electrode 339 is also connected to the gate electrode 576 of the transistor Tr1. One of the impurity regions 348 in the semiconductor layer of the transistor Tr2 is connected to the connection wiring 362 and the other is connected to the connection wiring 3 which functions as a power supply line Vi.
It is connected to 61.

The connection wiring 361 is also connected to the impurity region (not shown) of the transistor Tr1. Also, 5
A storage capacitor 70 has a semiconductor layer 572, a gate insulating film 307, and a capacitor wiring 573. Semiconductor layer 5
The impurity region 72 (not shown) has a connection wiring 36.
Connected to 1.

Next, as shown in FIG. 16B, an insulating film containing silicon (a silicon oxide film in this embodiment) is formed to a thickness of 500 nm, and an opening is formed at a position corresponding to the pixel electrode 365. Third interlayer insulating film 3 which is formed and functions as a bank
66 is formed. By using a wet etching method when forming the opening, it is possible to easily form a tapered side wall. If the side wall of the opening is not sufficiently gentle, the deterioration of the organic light emitting layer due to the step difference becomes a significant problem, so caution is required.

Next, the organic light emitting layer 367 and the cathode (Mg
Ag electrode) 368 is continuously formed using a vacuum deposition method without exposing to the atmosphere. The thickness of the organic light emitting layer 367 is 8
0-200 nm (typically 100-120 nm), cathode 368 has a thickness of 180-300 nm (typically 20 nm).
0 to 250 nm).

In this step, the organic light emitting layer and the cathode are sequentially formed on the pixel corresponding to red, the pixel corresponding to green and the pixel corresponding to blue. However, since the organic light emitting layer has poor resistance to a solution, it must be formed for each color individually without using a photolithography technique. Therefore, it is preferable to use a metal mask to hide other than the desired pixel and selectively form the organic light emitting layer only in a necessary portion.

That is, first, a mask for covering all pixels other than the pixels corresponding to red color is set, and the organic light emitting layer for emitting red light is selectively formed using the mask. Next, a mask that hides all pixels other than the pixels corresponding to green is set, and the organic light emitting layer that emits green light is selectively formed using the mask. Next, similarly, a mask for hiding all the pixels other than the pixel corresponding to blue is set, and the blue organic light emitting layer is selectively formed using the mask. Note that although different masks are used here, the same mask may be used again.

Here, there are three types of OLEs corresponding to RGB.
Although the method of forming D is used, a method of combining a white light emitting OLED and a color filter, a method of combining a blue or blue-green light emitting OLED and a phosphor (fluorescent color conversion layer: CCM), a cathode ( A method of stacking OLEDs corresponding to RGB by using a transparent electrode as a counter electrode) may be used.

A known material can be used for the organic light emitting layer 367. As a known material, it is preferable to use an organic material in consideration of driving voltage. For example, a four-layer structure including a hole injection layer, a hole transport layer, a light emitting layer and an electron injection layer may be used as the organic light emitting layer.

Next, the cathode 368 is formed. Although MgAg is used as the cathode 368 in this embodiment, the present invention is not limited to this. Other known materials may be used as the cathode 368.

A pixel electrode 365, an organic light emitting layer 367,
The portion where the cathode 368 overlaps corresponds to the OLED 375.

Then, the protective electrode 369 is formed by vapor deposition. The protective electrode 369 is the cathode 36 without opening to the atmosphere.
8 may be formed continuously. The protective electrode 369 is effective in protecting the organic light emitting layer 367 from moisture and oxygen.

The protective electrode 369 is provided to prevent deterioration of the cathode 368, and is typically a metal film containing aluminum as its main component. Of course, other materials may be used. Also,
Since the organic light emitting layer 367 and the cathode 368 are very sensitive to moisture, it is desirable to protect the organic light emitting layer from the outside air by continuously forming the protective electrode 369 without exposing it to the atmosphere.

Finally, a passivation film 370 made of a silicon nitride film is formed to a thickness of 300 nm. The organic light emitting layer 36 is formed by forming the passivation film 370.
7 can be protected from moisture and the like, and the reliability of the OLED can be further enhanced. Note that the passivation film 370 does not necessarily have to be provided.

Thus, the light emitting device having the structure shown in FIG. 16B is completed. 371 is a p-channel TFT of the drive circuit section, 372 is an n-channel TFT of the drive circuit section,
373 is a transistor Tr3, 374 is a transistor T
Corresponds to r2.

By the way, in the light emitting device of the present embodiment, by arranging the TFT having the optimum structure not only in the pixel portion but also in the driving circuit, it is possible to exhibit extremely high reliability and improve the operating characteristics. It is also possible to add a metal catalyst such as Ni in the crystallization step to enhance the crystallinity. Thereby, the drive frequency of the signal line driver circuit can be set to 10 MHz or higher.

[0200] Actually, when the state shown in Fig. 16 (B) is completed, a protective film (laminate film, ultraviolet curable resin film, etc.) having high airtightness and little degassing and a transparent film are provided so as not to be further exposed to the outside air. It is preferable to perform packaging (encapsulation) with an optical sealing material. At that time, the reliability of the OLED is improved by making the inside of the sealing material an inert atmosphere or disposing a hygroscopic material (for example, barium oxide) inside the sealing material.

When the airtightness is improved by a process such as packaging, a connector for connecting a terminal routed from an element or a circuit formed on the substrate and an external signal terminal is attached.

Further, according to the steps shown in this embodiment, the number of photomasks required for manufacturing the light emitting device can be suppressed. As a result, the process can be shortened, the manufacturing cost can be reduced, and the yield can be improved.

This embodiment can be implemented by freely combining with Embodiments 1 to 8.

(Embodiment 10) In this embodiment, a configuration of a pixel of a light emitting device, which is one of the semiconductor devices of the present invention, different from that of Embodiment 9 will be described. FIG. 18 shows a cross-sectional view of a pixel of the light emitting device of this example. Although Tr1 and Tr4 are not shown in the present embodiment for the sake of simplicity,
It is possible to use the same configuration as Tr3 and Tr2.

Reference numeral 751 denotes an n-channel type TFT, which is shown in FIG.
Corresponding to Tr3. Also, 752 is a p-channel TF
T, which corresponds to Tr2 in FIG. n-channel type TF
T751 corresponds to the semiconductor film 753 and the first insulating film 770.
And the first electrodes 754 and 755 and the second insulating film 771.
And second electrodes 756 and 757. The semiconductor film 753 includes a first concentration one-conductivity type impurity region 758, a second concentration one-conductivity type impurity region 759, and channel formation regions 760 and 761.

In this embodiment, the first insulating film 770 has a structure in which two insulating films 770a and 770b are laminated, but the first insulating film 770 may be a single-layer insulating film. It may have a structure in which three or more insulating films are laminated.

The first electrodes 754 and 755 and the channel forming regions 760 and 761 are overlapped with each other with the first insulating film 770 interposed therebetween. In addition, the second electrodes 756 and 7
57 and the channel formation regions 760 and 761 overlap with each other with the second insulating film 771 interposed therebetween.

The p-channel TFT 752 is made up of the semiconductor film 7
80, a first insulating film 770, a first electrode 782,
It has a second insulating film 771 and a second electrode 781. The semiconductor film 780 has a third concentration one-conductivity-type impurity region 783 and a channel formation region 784.

[0209] The first electrode 782 and the channel formation region 78
4 overlap with each other with the first insulating film 770 interposed therebetween. Second electrode 781 and channel formation region 784
Are overlapped with each other with the second insulating film 771 interposed therebetween.

In this embodiment, although not shown, the first electrodes 754 and 755 and the second electrodes 756 and 75 are not shown.
7 is electrically connected. In addition, the first electrode 78
2 and the second electrode 781 are electrically connected. Note that the present invention is not limited to this structure, and the first electrode 75
4, 755 and the second electrodes 756, 757 may be electrically separated, and a constant voltage may be applied to the first electrodes 754, 755. Further, the first electrode 782 and the second electrode 781 may be electrically separated from each other, and a constant voltage may be applied to the first electrode 782.

By applying a constant voltage to the first electrode, it is possible to suppress the variation in threshold value and suppress the off-current as compared with the case where the number of electrodes is one.
Further, by applying the same voltage to the first electrode and the second electrode, the depletion layer spreads quickly in the same manner as when the thickness of the semiconductor film is made thin, so that the subthreshold coefficient should be made small. It is possible to further improve the field effect mobility. Therefore, the on-current can be increased as compared with the case where the number of electrodes is one. Therefore, by using the TFT having this structure in the drive circuit, the drive voltage can be lowered. Further, since the on-current can be increased, the size of the TFT (particularly the channel width) can be reduced. Therefore, the integration density can be improved.

This embodiment can be implemented in combination with any one of Embodiments 1 to 8.

(Embodiment 11) In this embodiment, a structure of a pixel of a light emitting device which is one of the semiconductor devices of the present invention, which is different from those of Embodiments 9 and 10, will be described. FIG. 19 shows a cross-sectional view of a pixel of the light emitting device of this example. Although Tr1 and Tr4 are not shown in the present embodiment for simplicity of description, the same configuration as Tr3 and Tr2 can be used.

In FIG. 19, reference numeral 911 is a substrate, and 912 is an insulating film serving as a base (hereinafter referred to as a base film). As the substrate 911, a light-transmitting substrate, typically a glass substrate, a quartz substrate, a glass ceramics substrate, or a crystallized glass substrate can be used. However, it must withstand the highest processing temperatures during the fabrication process.

Reference numeral 8201 denotes Tr3, and 8202 denotes Tr2, which are an n-channel TFT and a p-channel TFT, respectively.
Is formed by. When the light emitting direction of the organic light emitting layer is the lower surface of the substrate (the surface on which the TFT and the organic light emitting layer are not provided), the above configuration is preferable. But Tr3 and T
r2 may be either an n-channel TFT or a p-channel TFT.

Tr3 8201 is a source region 913,
An active layer including a drain region 914, LDD regions 915a to 915d, an isolation region 916, and channel formation regions 917a and 917b, a gate insulating film 918, and a gate electrode 91.
9a and 919b, the first interlayer insulating film 920, and the signal line 92.
1 and a connection wiring 922. Note that the gate insulating film 918 or the first interlayer insulating film 920 is formed on all the TF on the substrate.
It may be common to T or may be different depending on the circuit or element.

Further, in Tr3 8201 shown in FIG. 19, gate electrodes 917a and 917b are electrically connected,
It has a so-called double gate structure. Of course, not only the double gate structure but also a so-called multi-gate structure such as a triple gate structure (structure including an active layer having two or more channel forming regions connected in series) may be used.

The multi-gate structure is extremely effective in reducing the off-current, and if the off-current of Tr3 is made sufficiently low, the minimum capacitance required by the capacitor connected to the gate electrode of Tr2 8202 is reduced. Can be suppressed. That is, since the area of the capacitor can be reduced, the multi-gate structure is effective in expanding the effective light emitting area of the light emitting element.

Further, in Tr3 8201, L3
The DD regions 915a to 915d are provided so as not to overlap with the gate electrodes 919a and 919b with the gate insulating film 918 provided therebetween. Such a structure is very effective in reducing the off current. The LDD regions 915a to 915d have a length (width) of 0.5 to 3.5 μm, typically 2.0 to
It may be 2.5 μm. Note that in the case of a multi-gate structure having two or more gate electrodes, an isolation region 916 (a region to which the same impurity element is added at the same concentration as the source region or the drain region) provided between the channel formation regions is formed. It is effective in reducing the off current.

Next, Tr2 8202 is the source region 9
26, drain region 927, and channel formation region 929
Including an active layer, a gate insulating film 918, and a gate electrode 9
30, the first interlayer insulating film 920, the connection wiring 931 and the connection wiring 932. In this embodiment, Tr2 8202 is a p-channel TFT.

Although the gate electrode 930 has a single-gate structure, it may have a multi-gate structure. Further, the connection wiring 931 of the Tr2 8202 corresponds to a power supply line (not shown).

The structure of the TFT provided in the pixel has been described above, but at the same time, the driving circuit is also formed. FIG. 19 shows a CM which is a basic unit forming a drive circuit.
The OS circuit is shown.

In FIG. 19, a TFT having a structure for reducing hot carrier injection while keeping the operating speed as low as possible is an n-channel type TFT 82 of a CMOS circuit.
Used as 04. Note that the drive circuit here means a source signal side drive circuit and a gate signal side drive circuit. Of course, other logic circuits (level shifter, A / D converter, signal dividing circuit, etc.) can be formed.

N-channel TFT 820 of CMOS circuit
4 includes a source region 935 and a drain region 93.
6, the LDD region 937 and the channel formation region 938 are included, and the LDD region 937 overlaps with the gate electrode 939 through the gate insulating film 918.

The LDD region 9 is formed only on the drain region 936 side.
The reason why 37 is formed is to prevent the operation speed from decreasing. Further, the n-channel TFT 8204 does not need to be so concerned about the off current value, and it is better to give priority to the operation speed than that. Therefore, the LDD region 937
Is completely overlapped with the gate electrode, and it is desirable to reduce the resistance component as much as possible. That is, it is better to eliminate the so-called offset.

Further, a p-channel type TFT of a CMOS circuit
In 8205, since deterioration due to hot carrier injection is hardly noticed, it is not necessary to particularly provide the LDD region. Therefore, the active layer includes the source region 940, the drain region 941, and the channel formation region 942, and the gate insulating film 918 and the gate electrode 943 are provided thereover. Of course, n
An LDD region is provided similarly to the channel type TFT 8204,
It is also possible to take measures against hot carriers.

Reference numerals 961 to 965 are channel forming regions 9
42, 938, 917a, 917b, 929.

Further, the n-channel TFT 8204 and p
The channel type TFT 8205 has connection wirings 944 and 9 on the source region with a first interlayer insulating film 920 interposed therebetween.
Has 45. In addition, an n-channel TFT 8204 and a p-channel TFT 8205 are connected by the connection wiring 946.
The drain regions of and are electrically connected to each other.

The structure of this embodiment can be implemented by freely combining with Embodiments 1 to 8.

(Embodiment 12) In this embodiment, a pixel structure using a cathode as a pixel electrode will be described.

A cross-sectional view of the pixel of this example is shown in FIG.
20, Tr3 provided on the substrate 3501
3502 is manufactured using a known method. In this embodiment, a double gate structure is used. Although a double gate structure is used in this embodiment, a single gate structure may be used, a triple gate structure or a multi-gate structure having more gate electrodes may be used. Although Tr1 and Tr4 are not shown in the present embodiment for simplicity of description, the same configuration as Tr3 and Tr2 can be used.

Further, Tr2 3503 is an n-channel type T
FT, which is produced using a known method. Also, 3
The wiring indicated by 8 is the gate electrode 3 of Tr3 3502.
The scanning line electrically connects 9a and 39b.

In this embodiment, the Tr2 3503 is shown as having a single gate structure, but it may have a multi-gate structure in which a plurality of TFTs are connected in series. Furthermore, a structure may be adopted in which a plurality of TFTs are connected in parallel and the channel formation region is substantially divided into a plurality of portions so that heat radiation can be performed with high efficiency. Such a structure is effective as a measure against deterioration due to heat.

The connection wiring 40 is connected to a power supply line (not shown) so that a constant voltage is always applied.

A first interlayer insulating film 41 is provided on Tr3 3502 and Tr2 3503, and a second interlayer insulating film 42 made of a resin insulating film is formed thereon. It is very important to flatten the step due to the TFT by using the second interlayer insulating film 42. Since the organic light emitting layer to be formed later is very thin, the light emitting failure may occur due to the presence of the step. Therefore, it is desirable to flatten the organic light emitting layer before forming the pixel electrode so that it can be formed as flat as possible.

Reference numeral 43 denotes a pixel electrode (cathode of the light emitting element) formed of a conductive film having high reflectivity, which is electrically connected to the drain region of Tr2 3503. As the pixel electrode 43, it is preferable to use a low resistance conductive film such as an aluminum alloy film, a copper alloy film or a silver alloy film, or a laminated film thereof. Of course, a laminated structure with another conductive film may be used.

Further, the light emitting layer 45 is formed in the groove (corresponding to a pixel) formed by the banks 44a and 44b formed of an insulating film (preferably resin). Although only one pixel is shown here, R (red), G (green),
A light emitting layer corresponding to each color of B (blue) may be separately formed.
A π-conjugated polymer material is used as the organic / organic light emitting material for the light emitting layer. Typical polymer materials include polyparaphenylene vinylene (PPV) materials, polyvinylcarbazole (PVK) materials, polyfluorene materials, and the like.

There are various types of PPV organic light emitting materials. For example, “H. Shenk, H. Becker, O. Ge
lsen, E.Kluge, W.Kreuder, and H.Spreitzer, “Polymers
forLight Emitting Diodes ”, Euro Display, Proceeding
s, 1999, p.33-37 "and Japanese Patent Application Laid-Open No. 10-92576.

As specific light emitting layers, cyanopolyphenylene vinylene is used for the red light emitting layer, polyphenylene vinylene is used for the green light emitting layer, and polyphenylene vinylene or polyalkylphenylene is used for the blue light emitting layer. Good. Film thickness is 30-150n
It may be set to m (preferably 40 to 100 nm).

However, the above example is an example of an organic light emitting material that can be used as a light emitting layer, and it is not necessary to limit to this. The light emitting layer, the charge transport layer or the charge injection layer may be freely combined to form an organic light emitting layer (a layer for causing light emission and carrier movement for that purpose).

For example, in this embodiment, an example in which a polymer material is used for the light emitting layer is shown, but a low molecular weight organic light emitting material may be used. Further, it is also possible to use an inorganic material such as silicon carbide for the charge transport layer and the charge injection layer. Known materials can be used as these organic light emitting materials and inorganic materials.

In this embodiment, PEDOT is formed on the light emitting layer 45.
(Polythiophene) or PAni (polyaniline) is used as the organic light emitting layer having a laminated structure provided with the hole injection layer 46. An anode 47 made of a transparent conductive film is provided on the hole injection layer 46. In this example, the light emitting layer 4
Since the light generated in 5 is emitted toward the upper surface side (upward of the TFT), the anode must be transparent. As the transparent conductive film, a compound of indium oxide and tin oxide or a compound of indium oxide and zinc oxide can be used, but it is possible because it is formed after forming a light-emitting layer or a hole injection layer having low heat resistance. Those capable of forming a film at a temperature as low as possible are preferable.

Light-emitting element 3 when anode 47 is formed
505 is completed. Note that the light emitting element 3505 referred to here
Is the pixel electrode (cathode) 43, the light emitting layer 45, the hole injection layer 4
6 and the anode 47. Since the pixel electrode 43 substantially matches the area of the pixel, the entire pixel functions as a light emitting element. Therefore, the utilization efficiency of light emission is very high, and a bright image can be displayed.

By the way, in this embodiment, the second passivation film 48 is further provided on the anode 47. Second
As the passivation film 48, a silicon nitride film or a silicon nitride oxide film is preferable. The purpose is to shield the light emitting element from the outside, and has both a meaning of preventing deterioration of the organic light emitting material due to oxidation and a meaning of suppressing degassing from the organic light emitting material. This improves the reliability of the light emitting device.

As described above, the light emitting device of the present invention has the pixel portion composed of the pixel having the structure as shown in FIG. 20, and Tr3 having a sufficiently low off current value and Tr2 having a strong resistance to hot carrier injection.
Have and. Therefore, a light emitting device having high reliability and capable of displaying an excellent image can be obtained.

The constitution of this embodiment can be implemented by freely combining it with the constitutions of Embodiments 1-8.

(Embodiment 13) In this embodiment, the structure of the light emitting device of the present invention will be described with reference to FIG.

FIG. 21 is a top view of a light emitting device formed by sealing an element substrate on which a transistor is formed with a sealing material, and FIG.
21A is a cross-sectional view taken along the line AA ′ of FIG. 1A, and FIG. 21C is a cross-sectional view taken along the line BB ′ of FIG.

Pixel portion 400 provided on substrate 4001
2, the signal line driver circuit 4003, and the first and second scan line driver circuits 4004a and 4004b are provided so as to surround the sealant 4009. In addition, a pixel portion 4002,
A sealing material 4008 is provided over the signal line driver circuit 4003 and the first and second scan line driver circuits 4004a and 4004b. Therefore, the pixel portion 4002, the signal line driver circuit 4003, the first and second scan line driver circuits 4004
The a and b are sealed with a filling material 4210 by a substrate 4001, a sealing material 4009, and a sealing material 4008.

Further, the pixel portion 4 provided on the substrate 4001
002, the signal line driver circuit 4003, and the first and second scan line driver circuits 4004a and 4004b include a plurality of TFTs. In FIG. 21B, the base film 4010 is typically used.
A driving TFT (here, an n-channel TFT and a p-channel TFT are shown) 4201 and a pixel portion 4002 which are included in the signal line driver circuit 4003 and which are formed above.
The transistor Tr2 4202 included in FIG.

In this embodiment, a p-channel TFT or an n-channel TFT manufactured by a known method is used as the driving TFT 4201, and the transistor Tr2 420 is used.
For 2, a p-channel TFT manufactured by a known method is used.

Driving TFT 4201 and transistor Tr
An interlayer insulating film (planarizing film) 4301 is formed over the 2 4202, and a pixel electrode (anode) 4203 which is electrically connected to the drain of the transistor Tr2 4202 is formed thereover. A transparent conductive film having a high work function is used as the pixel electrode 4203. As the transparent conductive film, a compound of indium oxide and tin oxide, a compound of indium oxide and zinc oxide, zinc oxide, tin oxide or indium oxide can be used. Moreover, you may use what added gallium to the said transparent conductive film.

An insulating film 4302 is formed on the pixel electrode 4203, and the insulating film 4302 forms the pixel electrode 420.
3, an opening is formed on the upper part. In this opening, the organic light emitting layer 4204 is formed on the pixel electrode 4203. As the organic light emitting layer 4204, a known organic light emitting material or inorganic light emitting material can be used. The organic light emitting material includes a low molecular weight (monomer) material and a high molecular weight (polymer) material, and either of them may be used.

As a method of forming the organic light emitting layer 4204, a known vapor deposition technique or coating technique may be used. Further, the structure of the organic light emitting layer may be a laminated structure or a single layer structure by freely combining the hole injection layer, the hole transport layer, the light emitting layer, the electron transport layer or the electron injection layer.

A cathode 4205 made of a conductive film having a light-shielding property (typically, a conductive film containing aluminum, copper or silver as a main component or a laminated film of these and another conductive film) is formed on the organic light emitting layer 4204. Is formed. Also, the cathode 4
It is desirable to exclude water and oxygen existing at the interface between 205 and the organic light emitting layer 4204 as much as possible. Therefore, it is necessary to devise the organic light emitting layer 4204 in a nitrogen or rare gas atmosphere and to form the cathode 4205 without exposing it to oxygen or moisture. In the present embodiment, the above-described film formation is possible by using a multi-chamber type (cluster tool type) film forming apparatus. And the cathode 4205
Is given a predetermined voltage.

As described above, the pixel electrode (anode) 42
03, an organic light emitting layer 4204 and a cathode 4205 are formed to form a light emitting element 4303. And the light emitting element 4303
A protective film 4209 is formed over the insulating film 4302 so as to cover the insulating film 4302. The protective film 4209 is effective in preventing oxygen, moisture, and the like from entering the light-emitting element 4303.

Reference numeral 4005a is a lead wiring connected to the power supply line, and is electrically connected to the source of the transistor Tr24202. The lead wiring 4005a passes between the sealing material 4009 and the substrate 4001 and has an FP included in the FPC 4006 via the anisotropic conductive film 4300.
It is electrically connected to the C wiring 4301.

As the sealing material 4008, a glass material, a metal material (typically a stainless material), a ceramic material, and a plastic material (including a plastic film) can be used. As a plastic material, FRP
(Fiberglass-Reinforced Pl
astics) plate, PVF (polyvinyl fluoride)
A film, mylar film, polyester film or acrylic resin film can be used. Alternatively, a sheet having a structure in which an aluminum foil is sandwiched between PVF films or mylar films can be used.

However, when the light emission direction of the light emitting element is toward the cover material side, the cover material must be transparent. In that case, a transparent material such as a glass plate, a plastic plate, a polyester film or an acrylic film is used.

As the filler 4210, an ultraviolet curable resin or a thermosetting resin can be used in addition to an inert gas such as nitrogen or argon, and PVC (polyvinyl chloride), acrylic, polyimide, epoxy resin, silicone. Resin, PVB (polyvinyl butyral) or E
VA (ethylene vinyl acetate) can be used. In this example, nitrogen was used as the filler.

In order to expose the filler 4210 to a hygroscopic substance (preferably barium oxide) or a substance capable of adsorbing oxygen, the substrate 400 of the sealing material 4008 is used.
A concave portion 4007 is provided on the surface on the first side, and a hygroscopic substance or a substance 4207 capable of adsorbing oxygen is arranged. The hygroscopic substance or the substance 4207 capable of adsorbing oxygen is held by the recessed cover material 4208 in the recess 4007 so that the hygroscopic substance or the substance 4207 capable of adsorbing oxygen does not scatter. Note that the recess cover material 4208 has a fine mesh shape and has a structure in which air and moisture can pass through and a hygroscopic substance or a substance that can adsorb oxygen 4207 cannot pass through. By providing the hygroscopic substance or the substance 4207 capable of adsorbing oxygen, deterioration of the light-emitting element 4303 can be suppressed.

As shown in FIG. 21C, the pixel electrode 42
At the same time that 03 is formed, a conductive film 4203a is formed so as to be in contact with the lead wiring 4005a.

The anisotropic conductive film 4300 has a conductive filler 4300a. Substrate 4001 and F
By thermocompression bonding with PC 4006, the conductive film 4203a on the substrate 4001 and the FPC wiring 4301 on the FPC 4006 are electrically connected by the conductive filler 4300a.

The structure of this embodiment is the same as that of Embodiments 1 to 12.
It can be implemented by freely combining with the configuration shown in FIG.

Example 14 Since the light emitting device using the light emitting element is a self-luminous type, it has better visibility in a bright place and a wider viewing angle than a liquid crystal display. Therefore, it can be used for a display unit of various electronic devices.

As electronic equipment using the light emitting device of the present invention, video cameras, digital cameras, goggle type displays (head mount displays), navigation systems, sound reproducing devices (car audio systems, audio components, etc.), notebook type personal computers, A game device, a portable information terminal (a mobile computer, a mobile phone, a portable game machine or an electronic book, etc.), and an image reproducing device provided with a recording medium (specifically, a Digital Versatile Disc).
(A device equipped with a display capable of reproducing a recording medium such as (DVD) and displaying the image). In particular, for a portable information terminal that often sees the screen from an oblique direction, since a wide viewing angle is important, it is preferable to use a light emitting device. Specific examples of these electronic devices are shown in FIGS.

FIG. 22A shows a light emitting element display device.
A housing 2001, a support base 2002, a display unit 2003, a speaker unit 2004, a video input terminal 2005 and the like are included.
The light emitting device of the present invention can be used for the display portion 2003. Since the light-emitting device is a self-luminous type, it does not require a backlight and can have a thinner display portion than a liquid crystal display. In addition, the light emitting element display device is for a personal computer, a TV
It includes all display devices for displaying information such as broadcast reception and advertisement display.

FIG. 22B shows a digital still camera, which includes a main body 2101, a display portion 2102, an image receiving portion 2103,
An operation key 2104, an external connection port 2105, a shutter 2106 and the like are included. The light emitting device of the present invention includes a display unit 210.
2 can be used.

FIG. 22C shows a laptop personal computer, which has a main body 2201, a housing 2202, and a display section 2.
203, keyboard 2204, external connection port 220
5, including a pointing mouse 2206 and the like. The light emitting device of the present invention can be used for the display portion 2203.

FIG. 22D shows a mobile computer, which has a main body 2301, a display portion 2302, and a switch 230.
3, an operation key 2304, an infrared port 2305 and the like. The light emitting device of the present invention can be used for the display portion 2302.

FIG. 22E shows a portable image reproducing device (specifically, a DVD reproducing device) provided with a recording medium, which includes a main body 2401, a housing 2402, a display portion A2403, a display portion B2404, a recording medium ( DVD, etc.) reading unit 240
5, an operation key 2406, a speaker portion 2407, and the like. The display portion A2403 mainly displays image information, and the display portion B2404 mainly displays character information. However, the light emitting device of the present invention has these display portions A, B2403, and 2404.
Can be used for. Note that the image reproducing device provided with the recording medium includes a home game machine and the like.

FIG. 22F shows a goggle type display (head mounted display), which is a main body 250.
1, a display portion 2502 and an arm portion 2503 are included. The light emitting device of the present invention can be used for the display portion 2502.

FIG. 22G shows a video camera, which includes a main body 2601, a display portion 2602, a housing 2603, an external connection port 2604, a remote control receiving portion 2605, and an image receiving portion 260.
6, a battery 2607, a voice input unit 2608, operation keys 2609, an eyepiece unit 2610, and the like. The light emitting device of the present invention can be used for the display portion 2602.

[0274] Here, FIG. 22H shows a mobile phone, which includes a main body 2701, a housing 2702, a display portion 2703, a voice input portion 2704, a voice output portion 2705, operation keys 2706,
An external connection port 2707, an antenna 2708, and the like are included.
The light emitting device of the present invention can be used for the display portion 2703. Note that the display portion 2703 can suppress current consumption of the mobile phone by displaying white characters on a black background.

If the emission brightness of the organic light emitting material becomes higher in the future, it becomes possible to magnify and project the output light containing the image information with a lens or the like and use it for a front type or rear type projector.

[0276] Further, the above electronic devices are the Internet or C
Information distributed through electronic communication lines such as ATV (cable television) is often displayed, and in particular, opportunities for displaying moving image information are increasing. Since the response speed of the organic light emitting material is very high, the light emitting device is suitable for displaying moving images.

Since the light emitting device consumes power in the light emitting portion, it is desirable to display information so that the light emitting portion is reduced as much as possible. Therefore, when a light emitting device is used in a display unit mainly for character information such as a mobile information terminal, a mobile phone or a sound reproducing device, it is driven so that the character information is formed in the light emitting portion with the non-light emitting portion as the background. It is desirable to do.

As described above, the applicable range of the present invention is extremely wide, and the present invention can be applied to electronic devices in all fields. Further, the electronic apparatus of this embodiment may use the light emitting device having any of the configurations shown in Embodiments 1 to 9.

[0279]

In the light emitting device of the present invention, even if the TFT characteristics vary from pixel to pixel, it is possible to prevent the luminance of the light emitting element from varying between pixels as compared with the voltage input type light emitting device. . Further, as compared with the case where the TFT 51 of the voltage input type pixel shown in FIG. 23 is operated in a linear region, it is possible to suppress a decrease in luminance due to deterioration of the light emitting element.
Further, even if the temperature of the organic light emitting layer is influenced by the ambient temperature or the heat generated by the light emitting panel itself, the brightness of the light emitting element can be prevented from changing, and the current consumption increases as the temperature rises. Can be prevented.

Further, by using a driving method (AC driving) of applying a reverse bias driving voltage to the light emitting element at regular intervals, deterioration of the current-voltage characteristic of the light emitting element is improved and the life of the light emitting element is improved. It is possible to make it longer than the conventional driving method.

[Brief description of drawings]

FIG. 1 is a block diagram of a light emitting device of the present invention.

FIG. 2 is a pixel circuit diagram of a light emitting device of the invention.

FIG. 3 is a schematic diagram of pixels in driving.

FIG. 4 is a timing chart of voltages applied to scanning lines and power supply lines.

FIG. 5 is a timing chart of voltages applied to scanning lines and power supply lines.

FIG. 6 is a timing chart of voltages applied to scanning lines and power supply lines.

FIG. 7 is a timing chart of voltages applied to scanning lines and power supply lines.

FIG. 8 is a timing chart of voltages applied to scanning lines and power supply lines.

FIG. 9 is a block diagram of a signal line driver circuit of the present invention.

FIG. 10 is a circuit diagram of a current setting circuit and a switching circuit.

FIG. 11 is a block diagram of a scan line driver circuit.

FIG. 12 is a block diagram of a signal line driver circuit of the present invention.

FIG. 13 is a circuit diagram of a current setting circuit and a switching circuit.

FIG. 14 is a diagram showing a method for manufacturing a light emitting device of the present invention.

FIG. 15 is a diagram showing a method for manufacturing a light emitting device of the present invention.

16A to 16C are diagrams showing a method for manufacturing a light emitting device of the present invention.

FIG. 17 is a top view of a pixel of a light emitting device of the present invention.

FIG. 18 is a cross-sectional view of a pixel of a light emitting device of the present invention.

FIG. 19 is a cross-sectional view of a pixel of a light emitting device of the present invention.

FIG. 20 is a cross-sectional view of a pixel of a light emitting device of the present invention.

21A and 21B are an external view and a cross-sectional view of a light-emitting device of the present invention.

22A and 22B are diagrams of an electronic device including the light-emitting device of the present invention.

FIG. 23 is a circuit diagram of a general pixel.

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) G09G 3/20 641 G09G 3/20 641D 642 642A H05B 33/14 H05B 33/14 A F term (reference) 3K007 AB11 AB14 AB17 BA06 DB03 GA02 GA04 5C080 AA06 BB05 DD05 DD29 EE29 FF11 JJ03 JJ04 JJ06

Claims (7)

[Claims] 1. A method for driving a light-emitting device having a plurality of pixels each including a light-emitting element, the method including supplying a current determined by a video signal to the pixels in a first period, Means for converting the supplied current into a voltage, and supplying a current having a magnitude corresponding to the converted voltage by the second means included in the pixel to the light emitting element in the second period, In the period of 3, a predetermined voltage is supplied to the pixel,
A method for driving a light emitting device, wherein a reverse bias voltage is supplied to the light emitting element by the second means. 2. A method of driving a light emitting device having a plurality of pixels each including a light emitting element, wherein a first period, a second period, and a third period appear in one frame period, In the first period, a current defined by an analog video signal is supplied to the pixel, the supplied current is converted into a voltage by the first means included in the pixel, and in the second period, A current having a magnitude corresponding to the voltage converted by the second means included in the pixel is supplied to the light emitting element, and a predetermined voltage is supplied to the pixel in the third period, and the second means is provided. And a reverse bias voltage is supplied to the light emitting element by the method. 3. A driving method of a light emitting device having a plurality of pixels provided with a light emitting element, comprising n first periods and n first periods respectively corresponding to respective bits of an n-bit digital video signal. 2 periods and 1
And one or more third periods appear in one frame period, and each of the one or more third periods ends any one of the n second periods that is different. later,
Appearing respectively, supplying a current defined by each bit of the n-bit digital video signal to the pixel in each of the n first periods, and the current is supplied by the first means included in the pixel. Converting a current into a voltage, supplying a current having a magnitude corresponding to the converted voltage by the second means included in the pixel to the light emitting element in each of the n second periods; Alternatively, a predetermined voltage is supplied to the pixel in each of a plurality of third periods, and a reverse bias voltage is supplied to the light emitting element by the second means. Method. 4. A driving method of a light emitting device having a plurality of pixels provided with a light emitting element, comprising n first periods and n first periods respectively corresponding to respective bits of an n-bit digital video signal. 2 periods and 1
Third third periods appear in one frame period, and in each of the n first periods, supply a current determined by each bit of an n-bit digital video signal to the pixel, Converts the supplied current into a voltage by the first means included in, and a current having a magnitude corresponding to the voltage converted by the second means included in the pixel in each of the n second periods. Is supplied to the light emitting element, a predetermined voltage is supplied to the pixel in the one third period, and a reverse bias voltage is supplied to the light emitting element by the second means. A method for driving a light-emitting device, which is characterized. 5. A driving method of a light emitting device having a plurality of pixels provided with a light emitting element, comprising n first periods and n first periods respectively corresponding to respective bits of an n-bit digital video signal. 2 periods and 1
Third third periods appear in one frame period, and in each of the n first periods, supply a current determined by each bit of an n-bit digital video signal to the pixel, Converts the supplied current into a voltage by the first means included in, and a current having a magnitude corresponding to the voltage converted by the second means included in the pixel in each of the n second periods. Is supplied to the light emitting element, a predetermined voltage is supplied to the pixel in the one third period, and a reverse bias voltage is supplied to the light emitting element by the second means. Number of the first periods and the n second periods, and a voltage supplied to the light emitting element in the n first periods and the n second periods. The absolute value of the product of A method for driving a light emitting device, wherein the absolute value of the product of the length and the voltage supplied to the light emitting element in the third period is equal. 6. A method for driving a light emitting device, wherein a first period, a second period and a third period appear in one frame period, wherein the first, second and third periods are used. The gates of the first transistor and the second transistor of the light emitting device are connected to each other, and the second terminal of the second transistor is connected to the pixel electrode of the light emitting element. In the period, a current determined by each bit of the video signal flows between the first terminal and the second terminal of the first transistor, the gate of the first transistor and the second terminal are connected, Furthermore, a first voltage is applied to the first terminals of the first and second transistors, and the gate of the first transistor and the second terminal are electrically separated in the second period. Before Wherein the first and the first terminal of the second transistor first
Is applied, the gate of the first transistor is connected to the second terminal in the third period, and the second voltage is applied to the gates of the first and second transistors. The second transistor is turned on, a third voltage is applied to the first terminals of the first and second transistors, and the first voltage and the third voltage are applied to the light emitting element. A method for driving a light emitting device, wherein the polarities are opposite with respect to the voltage of the counter electrode. 7. The method for driving a light emitting device according to claim 6, wherein the first transistor and the second transistor have the same polarity.