JP2003197837A - Semiconductor device for electric power - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a power module in which the heat generated at a silicon chip, etc., is rapidly and effectively released outward. <P>SOLUTION: A copper base plate 3 is fitted to a bottom of a case 2 of a power module 1a. In a space of the case 2, an insulating substrate 6 that is made of ceramic, etc., and provided with a lower copper pattern 4 and an upper copper pattern 5 is bonded to the copper base plate 3 with solder 7. A Peltier effect element 8a is bonded to the upper surface of the upper copper pattern 5 with the solder 7. A silicon chip 9 is bonded to the upper surface of the Peltier effect element 8a with the solder 7. The heat that is generated at the silicon chip 9 when the power module 1a is operated is released to the outside of a device through the Peltier effect element 8a, the insulating substrate 6 and the copper base plate 3. At this time, the Peltier effect element 8a is energized in forward direction to lower its temperature, and heat release is accelerated. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an internal structure of a power semiconductor device having a Peltier element that absorbs heat generated by a semiconductor chip such as a silicon chip by the Peltier effect and discharges the heat to the outside of the device.

[0002]

2. Description of the Related Art Generally, in a power module (power semiconductor device), a considerably large amount of heat is generated in a semiconductor such as a silicon chip, which must be quickly and effectively released to the outside. Is. In the conventional power module, the heat generated in the silicon chip or the like is normally radiated to the outside through the insulating substrate and the base plate. Hereinafter, the mode of releasing heat generated by a silicon chip or the like in such a conventional power module will be specifically described.

FIG. 3 shows that the heat generated in the silicon chip is
It is sectional drawing which shows an example of the conventional power module which is made to discharge | release to the exterior of an apparatus through an insulating substrate, a base plate, etc. As shown in FIG. 3, in this conventional power module 101, an insulating substrate 106 having a lower surface copper pattern 104 and an upper surface copper pattern 105 is arranged on the upper surface of a copper base plate 103 in a case 102.
Here, the lower surface copper pattern 104 is joined to the copper base plate 103 by the solder 107. Further, a silicon chip 109 is bonded to the upper surface of the upper surface copper pattern 105 with solder 107. Then, the case 102 is filled with the gel 110, and the upper end of the gel 110 is closed by the resin 111 and the lid 112. In addition,
An electrode 113 is attached to the case 102.

In the conventional power module 101 shown in FIG. 3, most of the heat generated in the silicon chip 109 is solder 107 and both copper patterns 104, 1.
It is released to the outside of the device by heat conduction through the insulating substrate 106 accompanied by 05 and the copper base plate 103.

[0005]

However, in such a conventional power module 101, since heat is simply dissipated by heat conduction, heat cannot be dissipated quickly and effectively, and the silicon chip 109, Insulating substrate 1
06, the temperature of the copper base plate 103, etc. may rise. Then, the silicon chip 109, the insulating substrate 106, and the copper base plate 10 which constitute the power module 101.
Since Nos. 3 and 3 have different thermal expansion coefficients, when the temperature inside the power module 101 rises, the insulating substrate 106 is cracked or warped due to the difference in thermal expansion between them, and the solder 107 There is a problem in that cracks may occur in the metal and warpage may occur in the copper base plate 103.

The present invention has been made in order to solve the above-mentioned conventional problems, and the heat generated in a silicon chip or the like can be quickly and effectively released to the outside of the device.
It is an object to be solved to provide a power module or a power semiconductor device capable of effectively preventing the occurrence of cracks or warpage of an insulating substrate, cracks of solder, warpage of a base plate, and the like.

[0007]

SUMMARY OF THE INVENTION A power semiconductor device (power module) according to a first aspect of the present invention, which has been made to solve the above-mentioned problems, has a structure in which heat generated in a semiconductor chip (for example, a silicon chip) is used. , A power semiconductor device that is to be discharged to the outside of the device through an insulating substrate (for example, a ceramic substrate) and a heat radiating base plate (for example, a copper base plate) in that order, and a semiconductor chip Part of the heat that flows in from the semiconductor chip to the insulating substrate is absorbed (dissipated to the outside of the device) to reduce the amount of heat transfer from the semiconductor chip to the insulating substrate, and the heat between the semiconductor chip and the insulating substrate is reduced. An element having a Peltier effect (hereinafter, referred to as “Peltier effect element”) for relaxing (suppressing) a difference in expansion (or stress) is interposed.

In the power semiconductor device according to the second aspect of the present invention, the heat generated in the semiconductor chip is released to the outside of the device through the insulating substrate and the heat radiating base plate in order. A semiconductor device for electric power, which absorbs a part of the heat flowing from the insulating substrate between the insulating substrate and the base plate to reduce the amount of heat transfer from the insulating substrate to the base plate. It is characterized in that a Peltier effect element for relaxing a difference in thermal expansion between the plate and the plate is interposed.

Incidentally, JP-A-5-243437, JP-A-55-140257 and JP-A-1-25844.
No. 9, JP-A-4-303955, Japanese Utility Model Laid-Open No. 62
No. 60042, JP-A-3-116892, or JP-A-60-124955 discloses a semiconductor device, an integrated circuit package, a semiconductor package, and a metal in which a semiconductor chip or the like is cooled by using a Peltier effect element. A circuit board or a semiconductor element cooling device (hereinafter collectively referred to as "semiconductor device with Peltier effect element") is disclosed. However, in the semiconductor device with a Peltier effect element disclosed in each of these publications, the Peltier effect element causes a difference in thermal expansion between the semiconductor chip and the insulating substrate or a difference in thermal expansion between the insulating substrate and the base plate. It is not intended to alleviate or suppress, and the configuration is obviously different from that of the power semiconductor device according to the present invention.

[0010]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be specifically described below. Embodiment 1. First, a power module (power semiconductor device) according to the first embodiment of the present invention will be described.

As shown in FIG. 1, a power module 1a according to the first embodiment is provided with a case 2 (enclosed case), and a copper base plate 3 having a large thermal conductivity is provided at a lower end portion of the case 2. Is firmly attached. Here, the case 2 is formed of, for example, resin (plastic).
Then, in the space of the case 2, the insulating substrate 6 with the lower surface copper pattern 4 and the upper surface copper pattern 5 is joined to the upper surface of the copper base plate 3 by the solder 7. The insulating substrate 6 is made of, for example, ceramic.
Both copper patterns 4 and 5 are provided so that the insulating substrate 6 can be easily soldered to other components.

The Peltier effect element 8a (element having the Peltier effect) is formed on the upper surface of the upper surface copper pattern 5.
It is joined by solder 7. Further, a silicon chip 9 (semiconductor chip) is formed on the upper surface of the Peltier effect element 8a.
Are joined by solder 7. Although not shown in detail, the Peltier effect element 8a is a thermocouple composed of two types of semiconductors of P type and N type, and when it is energized in the forward direction, it is separated from the insulating substrate 6 by the Peltier effect. The temperature of the portion sandwiched between the silicon chip 9 and the silicon chip 9 is lowered (cooled).

The space inside the case 2 is filled with a gel 10, and the upper portion of the gel 10 is covered with a resin 11 and a lid 12.
Closed by and. The case 2 has electrodes 13 for connecting the silicon chip 9 and the like to an external device.
(External connection terminal) is attached.

In the power module 1a, a considerable amount of heat is generated in the silicon chip 9 during its operation. This heat is basically generated by the solder 7, the Peltier effect element 8a, and the insulating substrate 6 with both copper patterns 4 and 5.
Through the copper base plate 3 and is released to the outside of the device by heat conduction. At this time, the Peltier effect element 8a is energized in the forward direction, and the temperature of the portion sandwiched between the insulating substrate 6 and the silicon chip 9 decreases. As a result, part of the heat that flows in from the silicon chip 9 is absorbed or released to the outside of the device, and the amount of heat transfer from the silicon chip 9 to the insulating substrate 6 is reduced. As a result, the silicon chip 9 and the insulating substrate 6 are maintained at a low temperature, and the difference in thermal expansion (stress) between them is relaxed or suppressed. Along with this, the copper base plate 3 is also maintained at a low temperature.

As described above, the Peltier effect element 8a keeps the silicon chip 9 and the insulating substrate 6 at a low temperature and alleviates or suppresses the difference in thermal expansion between them, so that a large amount of heat is generated in the silicon chip 9. Even in this case, the silicon chip 9 or the insulating substrate 6 is not cracked or warped, and the solder 7 between the silicon chip 9 and the insulating substrate 6 is not cracked. Moreover, since the copper base plate 3 is also maintained at a low temperature, no warpage occurs in it. Furthermore, since it is not necessary to use an expensive material having a particularly high thermal conductivity as the material of the copper base plate 3, it is possible to reduce the cost of the power module 1a.

Embodiment 2. Hereinafter, referring to FIG.
A power module (power semiconductor device) according to a second embodiment of the present invention will be described. In FIG. 2, the same components as those of the power module 1a according to the first embodiment shown in FIG. 1 are designated by the same reference numerals as in the first embodiment.

As shown in FIG. 2, also in the power module 1b according to the second embodiment, as in the case of the power module 1a according to the first embodiment shown in FIG. 3 is firmly attached. However, unlike the case of the first embodiment,
A Peltier effect element 8b is provided on the upper surface of the copper base plate 3. The basic structure and function of the Peltier effect element 8b are similar to those of the Peltier effect element 8a in the first embodiment.

Here, an insulating substrate 6 made of ceramic or the like with a lower surface copper pattern 4 and an upper surface copper pattern 5 is joined to the upper surface of the Peltier effect element 8b by solder 7. Then, the silicon chip 9 (semiconductor chip) is joined to the upper surface of the upper surface copper pattern 5 by the solder 7. The space inside the case 2 is filled with the gel 10, and the upper portion of the gel 10 is closed by the resin 11 and the lid 12. Further, the case 2 has an electrode 13 for connecting the silicon chip 9 or the like to an external device.
(External connection terminal) is attached.

Also in the power module 1b according to the second embodiment, as in the case of the first embodiment, a considerable amount of heat is generated in the silicon chip 9 during its operation. This heat is basically caused by each solder 7, the insulating substrate 6 with both copper patterns 4, 5, and the Peltier effect element 8b.
Through the copper base plate 3 and is released to the outside of the device by heat conduction. At that time, the Peltier effect element 8b is energized in the forward direction, and the temperature of the portion sandwiched between the insulating substrate 6 and the copper base plate 3 is lowered. As a result, a part of the heat flowing from the insulating substrate 6 is absorbed or released to the outside of the device, and the amount of heat transfer from the insulating substrate 6 to the copper base plate 3 is reduced. As a result, the insulating substrate 6 and the copper base plate 3
Are maintained at a low temperature, and the difference in thermal expansion (stress) between them is relaxed or suppressed. As a result, the silicon chip 9
Is also accelerated, and the silicon chip 9 is also maintained at a low temperature.

As described above, the Peltier effect element 8b keeps the insulating substrate 6 and the copper base plate 3 at a low temperature and reduces or suppresses the difference in thermal expansion between them, so that a large amount of heat is generated in the silicon chip 9. Even if it occurs, the insulating substrate 6 is not cracked or warped, and the copper base plate 3 is not warped. Moreover, no cracks occur in the solder 7 between the insulating substrate 6 and the Peltier effect element 8b. In addition,
Since the silicon chip 9 is also kept at a low temperature, it does not crack. Furthermore, since it is not necessary to use an expensive material having a high thermal conductivity as the material of the copper base plate 3,
The cost of the power module 1b can be reduced.

In each of the power modules 1a and 1b according to the first and second embodiments, the Peltier effect elements 8a and 8b are bonded to the electrode 13 (external output terminal) and transmitted from the silicon chip 9 to the electrode 13. It is preferably adapted to absorb the heat generated. In this way, the power modules 1a and 1b can be cooled more quickly and effectively.

[0022]

In the power semiconductor device according to the first aspect of the present invention, between the semiconductor chip and the insulating substrate,
A Peltier effect element that reduces the amount of heat transfer from the semiconductor chip to the insulating substrate and reduces the difference in thermal expansion between the semiconductor chip and the insulating substrate is provided. Therefore, even if a large amount of heat is generated in the semiconductor chip, the semiconductor chip or the insulating substrate is not cracked or warped. Further, since the base plate is also maintained at a low temperature, no warpage occurs in it. Further, since it is not necessary to use an expensive material having a high thermal conductivity as the material of the base plate, the cost of the power semiconductor device can be reduced.

In the power semiconductor device according to the second aspect of the present invention, the amount of heat transfer from the insulating substrate to the base plate is reduced between the insulating substrate and the base plate, and the insulating substrate and the base plate are separated from each other. A Peltier effect element for reducing the difference in thermal expansion between the two is interposed. Therefore, even if a large amount of heat is generated in the semiconductor chip, the insulating substrate is not cracked or warped, and the base plate is not warped. Further, since the semiconductor chip is also kept at a low temperature, it does not crack.
Further, since it is not necessary to use an expensive material having a high thermal conductivity as the material of the base plate, the cost of the power semiconductor device can be reduced.

[Brief description of drawings]

FIG. 1 is an elevational sectional view of a power module according to a first embodiment of the present invention.

FIG. 2 is an elevation sectional view of a power module according to a second embodiment of the present invention.

FIG. 3 is an elevation sectional view of a conventional power module.

[Explanation of symbols]

1a power module, 1b power module,
2 cases, 3 copper base plate, 4 lower surface copper pattern, 5 upper surface copper pattern, 6 insulating substrate, 7 solder, 8a Peltier effect element, 8b Peltier effect element, 9 silicon chip, 10 gel, 11
Resin, 12 lids, 13 electrodes.

Claims (2)

[Claims] 1. A power semiconductor device in which heat generated in a semiconductor chip is radiated to the outside of the device through an insulating substrate and a heat radiating base plate in that order. A part of the heat flowing from the semiconductor chip is absorbed between the semiconductor chip and the insulating substrate to reduce the amount of heat transfer from the semiconductor chip to the insulating substrate, and the heat between the semiconductor chip and the insulating substrate is reduced. An electric power semiconductor device, wherein an element having a Peltier effect for relaxing a difference in expansion is provided. 2. A power semiconductor device in which heat generated in a semiconductor chip is radiated to the outside of the device through an insulating substrate and a heat radiating base plate in that order. A part of the heat flowing from the insulating substrate is absorbed between the insulating plate and the base plate to reduce the amount of heat transfer from the insulating substrate to the base plate, and the heat between the insulating substrate and the base plate is reduced. An electric power semiconductor device, wherein an element having a Peltier effect for relaxing a difference in expansion is provided.