JP2003193291A - Copper foil with resistance layer and production method therefor - Google Patents
Copper foil with resistance layer and production method thereforInfo
- Publication number
- JP2003193291A JP2003193291A JP2001401407A JP2001401407A JP2003193291A JP 2003193291 A JP2003193291 A JP 2003193291A JP 2001401407 A JP2001401407 A JP 2001401407A JP 2001401407 A JP2001401407 A JP 2001401407A JP 2003193291 A JP2003193291 A JP 2003193291A
- Authority
- JP
- Japan
- Prior art keywords
- copper foil
- resistance layer
- layer
- resistance
- base
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
- C23C28/30—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer
- C23C28/32—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one pure metallic layer
- C23C28/322—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one pure metallic layer only coatings of metal elements only
- C23C28/3225—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one pure metallic layer only coatings of metal elements only with at least one zinc-based layer
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
- C23C28/30—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer
- C23C28/32—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one pure metallic layer
- C23C28/321—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one pure metallic layer with at least one metal alloy layer
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
- C23C28/30—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer
- C23C28/34—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one inorganic non-metallic material layer, e.g. metal carbide, nitride, boride, silicide layer and their mixtures, enamels, phosphates and sulphates
- C23C28/345—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one inorganic non-metallic material layer, e.g. metal carbide, nitride, boride, silicide layer and their mixtures, enamels, phosphates and sulphates with at least one oxide layer
Landscapes
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Engineering & Computer Science (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
- Electroplating Methods And Accessories (AREA)
- Other Surface Treatments For Metallic Materials (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は抵抗層付き銅箔とそ
の製造方法に関し、更に詳しくは、絶縁基材にラミネー
トすることにより抵抗回路が内蔵されたプリント回路基
板を製造する際に用いて好適な抵抗層付き銅箔と、それ
を製造する方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a copper foil with a resistance layer and a method for manufacturing the same, and more specifically, it is suitable for use in manufacturing a printed circuit board having a resistance circuit built therein by laminating it on an insulating base material. And a method for producing the same.
【0002】[0002]
【従来の技術】携帯電話に代表されるように、各種の機
能を備えた電気・電子機器の軽薄短小化が急速に進んで
いる。その発展は、各種半導体部品の微小製造技術,半
導体部品を搭載するプリント回路基板の多層化技術、更
にはプリント回路基板への搭載部品の高密度実装技術な
どで裏付けられている。2. Description of the Related Art As represented by a mobile phone, electric / electronic devices having various functions have been rapidly reduced in size and weight. The development is supported by a technique for microfabrication of various semiconductor components, a technique for multilayering a printed circuit board on which semiconductor components are mounted, and a technique for mounting components mounted on the printed circuit board at high density.
【0003】そして、最近の消費者動向として、更なる
軽薄短小化への要求が強まっている。しかしながら、搭
載部品の微小化には限界があり、従来の表面実装技術を
前提にすると、それら部品の高密度実装化も限界に近づ
きつつある。このようなことから、プリント回路基板の
表面のうち、可成りの面積を占める搭載部品の面積を小
さくするために、搭載部品の実装点数を低減化すること
が求められている。As a recent consumer trend, there is an increasing demand for further reduction in size, weight, and size. However, there is a limit to miniaturization of mounted components, and given the conventional surface mounting technology, high density mounting of those components is approaching the limit. For this reason, in order to reduce the area of the mounted components that occupy a considerable area on the surface of the printed circuit board, it is required to reduce the number of mounted components.
【0004】このような要求に応える試みの1つとし
て、大きな実装面積を占める部品(例えば、インダク
タ,キャパシタ,抵抗器など)をプリント回路基板の内
層に内蔵して、実質的な高密度実装とコスト低減、およ
び性能向上を実現するための努力がなされている。この
部品内蔵化の技術に関しては、例えば多層構造のセラミ
ック回路基板において、その内層に厚膜ペーストなどの
導電性ペーストを焼き付けることにより抵抗回路のパタ
ーンを形成したものが知られている。As one of the attempts to meet such a demand, a component occupying a large mounting area (for example, an inductor, a capacitor, a resistor, etc.) is built in an inner layer of a printed circuit board to realize a high density mounting. Efforts are being made to reduce costs and improve performance. As a technique for embedding this component, for example, in a ceramic circuit board having a multilayer structure, a pattern of a resistance circuit is formed by baking a conductive paste such as a thick film paste on the inner layer thereof.
【0005】しかしながら、このセラミック回路基板の
場合、抵抗回路のパターンをトリミングして抵抗回路の
抵抗値を所定値に調整することができず、また内蔵され
ている抵抗回路の抵抗値の精度が低く、更には高価格で
もある。そのため、従来から汎用されている樹脂基材を
用いて製造されるプリント回路基板に対比すると、用途
は限定され、また、将来予想されるシステムLSIなど
の能動部品の内蔵化は不可能である。However, in the case of this ceramic circuit board, the resistance value of the resistance circuit cannot be adjusted to a predetermined value by trimming the pattern of the resistance circuit, and the accuracy of the resistance value of the built-in resistance circuit is low. It is also expensive. Therefore, compared with a printed circuit board manufactured using a resin base material that has been widely used in the past, its use is limited, and it is impossible to incorporate an active component such as a system LSI expected in the future.
【0006】一方、導体回路形成用の銅箔の片面または
両面に、抵抗回路を形成するための材料層(抵抗層とい
う)を形成して成る抵抗層付き銅箔を樹脂基材にラミネ
ートして製造する抵抗回路内蔵型のプリント回路基板が
知られている。このプリント回路基板は、概ね、次のよ
うにして製造される。まず、上記した銅箔の抵抗層側の
面と絶縁樹脂から成る基材とをラミネートして銅張り積
層板にする。ついで、所定のエッチャントで1次エッチ
ングを行って、銅箔と抵抗層が一体化した状態になって
いる所定の回路パターンを形成し、ついで、この回路パ
ターンの表面側に位置する導体回路(銅箔)に対して2
次エッチングを行って当該銅箔の必要箇所のみを選択的
にエッチング除去し、その箇所の抵抗層は残置させる。
その後、全体の上に更に絶縁基材を積層し、抵抗層を内
蔵する。On the other hand, a copper foil with a resistance layer formed by forming a material layer (referred to as a resistance layer) for forming a resistance circuit on one or both sides of a copper foil for forming a conductor circuit is laminated on a resin base material. A printed circuit board with a built-in resistance circuit is known. This printed circuit board is generally manufactured as follows. First, the surface of the copper foil on the resistance layer side and the base material made of an insulating resin are laminated to form a copper-clad laminate. Then, primary etching is performed with a predetermined etchant to form a predetermined circuit pattern in which the copper foil and the resistance layer are integrated, and then the conductor circuit (copper circuit) located on the surface side of this circuit pattern is formed. 2 for foil)
The next etching is performed to selectively remove only the necessary portion of the copper foil by etching, and the resistance layer at that portion is left.
After that, an insulating base material is further laminated on the entire surface to incorporate a resistance layer.
【0007】このようなプリント回路基板の例として
は、Ohmega Technologies, Inc.からOmega-plyの商品名
で抵抗層付き銅張り積層板が市販されている。しかしな
がら、この抵抗層付き銅張り積層板は、シート抵抗値の
最高値が250Ω/sq程度と低く、また価格も従来の銅
張り積層板の10倍以上であるため、可成り特殊な用途
に限定使用されるにとどまっている。[0007] As an example of such a printed circuit board, a copper clad laminate with a resistance layer is commercially available from Ohmega Technologies, Inc. under the trade name of Omega-ply. However, this copper-clad laminate with a resistance layer has a low maximum sheet resistance value of about 250Ω / sq, and the price is 10 times or more that of the conventional copper-clad laminate, so it is limited to special applications. Only used.
【0008】また、特公昭55−42510号公報に
は、Sn−Ni合金で抵抗回路パターンを配線した抵抗
層内蔵のプリント回路基板が開示され、特開昭58−2
20491号公報には、Sn−Ni−Sの3元合金で抵
抗回路パターンを形成したプリント回路基板が開示され
ている。しかしながら、これらのプリント回路基板は、
いずれも、抵抗層のSn成分が導体回路であるCu成分
と室温下においても反応してSn−Cu化合物を生成す
るので、時間経過とともに、または高温環境下にある
と、上記反応生成物の成長が進んで抵抗回路の抵抗値が
変化するという問題が生ずる。Further, Japanese Patent Publication No. 55-42510 discloses a printed circuit board having a resistor layer in which a resistor circuit pattern is made of an Sn-Ni alloy, and is disclosed in Japanese Patent Laid-Open No. 58-2.
Japanese Patent No. 20491 discloses a printed circuit board in which a resistance circuit pattern is formed of a Sn-Ni-S ternary alloy. However, these printed circuit boards
In both cases, the Sn component of the resistance layer reacts with the Cu component of the conductor circuit even at room temperature to form a Sn-Cu compound, so that the reaction product grows with the passage of time or in a high temperature environment. Occurs and the resistance value of the resistance circuit changes, which causes a problem.
【0009】また、後者のプリント回路基板の場合に
は、Cu成分がS成分で腐食されることもあるので、抵
抗回路の経時的な抵抗値の変化という問題だけではな
く、導体回路それ自体も変質するという問題が発生す
る。なお、抵抗層の構成材料としては、例えば特許第3
022969号に、金属CrにC成分とO成分を含む材
料が記載されている。この抵抗層は、導電性材料と絶縁
材料の積層箔であって、厚み0.1〜0.4μmで、その
シート抵抗値は15〜1000Ω/sqである。Further, in the latter printed circuit board, since the Cu component may be corroded by the S component, not only the problem that the resistance value of the resistance circuit changes with time, but also the conductor circuit itself. The problem of deterioration occurs. As a constituent material of the resistance layer, for example, Patent Document 3
No. 022969 describes a material containing a C component and an O component in metallic Cr. The resistance layer is a laminated foil of a conductive material and an insulating material, has a thickness of 0.1 to 0.4 μm, and has a sheet resistance value of 15 to 1000 Ω / sq.
【0010】[0010]
【発明が解決しようとする課題】ところで、現在汎用さ
れているプリント回路基板に実装されている抵抗器の抵
抗値は、概ね、10Ω/sq〜1MΩ/sqの範囲内にあ
る。しかしながら、前記した抵抗回路内蔵型の従来のプ
リント回路基板の場合、その抵抗層のシート抵抗値は高
々1kΩ/sq程度であり、上記した10Ω/sq〜1MΩ/
sqの範囲に比べれば非常に低い水準にある。By the way, the resistance value of a resistor mounted on a currently widely used printed circuit board is generally within the range of 10 Ω / sq to 1 MΩ / sq. However, in the case of the conventional printed circuit board with a built-in resistance circuit, the sheet resistance value of the resistance layer is at most about 1 kΩ / sq, and the above-mentioned 10 Ω / sq to 1 MΩ /
It is at a very low level compared to the range of sq.
【0011】したがって、このような抵抗回路内蔵型の
プリント回路基板において、その抵抗回路の抵抗値を現
行の水準にまで高めようとすると、抵抗回路パターンの
全長を長くしなければならない。しかしながら、そのよ
うな対策の場合、内蔵されている抵抗回路パターンの面
積を大きくすることが必要となり、その結果、他の実装
部品の搭載面積は小さくなり、その高密度実装が阻害さ
れてしまう。Therefore, in such a printed circuit board with a built-in resistance circuit, if the resistance value of the resistance circuit is to be increased to the current level, the total length of the resistance circuit pattern must be lengthened. However, in the case of such measures, it is necessary to increase the area of the built-in resistance circuit pattern, and as a result, the mounting area of other mounting components becomes small, which hinders high-density mounting.
【0012】また、特許第3022969号に記載され
ている抵抗層は、そのシート抵抗値が1kΩ/sq程度で
あり、確かに、前記した他の先行技術の場合に比べれば
高い水準にある。しかしながら、その構成材料は金属C
r系であって、いわば汎用材料とはいえないという問題
がある。例えば高価格である。また、前記した1次エッ
チング時に使用するエッチャントは抵抗層の金属Cr系
材料もエッチング除去できるものでなければならないの
で、特殊なものとなり、またエッチング条件も厳しくな
るという問題が生ずる。しかも、そのような過酷なエッ
チング条件に、既に形成されている導体回路(Cu)も
晒されるので、結局、形成された導体回路の信頼性は低
下し、同時に抵抗回路の抵抗値精度も低下することがあ
る。The resistance layer described in Japanese Patent No. 3022969 has a sheet resistance value of about 1 kΩ / sq, which is certainly higher than those of the other prior arts mentioned above. However, its constituent material is metal C
There is a problem that it is an r-based material and cannot be called a general-purpose material. For example, it is expensive. Further, since the etchant used in the above-mentioned primary etching must be capable of etching and removing the metal Cr-based material of the resistance layer, it becomes a special one and the etching condition becomes severe. Moreover, since the conductor circuit (Cu) already formed is also exposed to such harsh etching conditions, the reliability of the formed conductor circuit eventually decreases, and at the same time, the resistance value accuracy of the resistance circuit also decreases. Sometimes.
【0013】本発明は、従来の抵抗回路内蔵型のプリン
ト回路基板における上記した問題を解決することができ
る抵抗層付き銅箔とその製造方法の提供を目的とする。
具体的には、抵抗層が現行のチップ抵抗器の抵抗値と近
似した大きさの抵抗値を有し、しかも、1次エッチング
時や2次エッチング時には、現行のエッチャントを用い
ることにより、銅箔と抵抗層の同時溶解,銅箔のみの選
択的なエッチングのいずれもが可能である材料で構成さ
れている抵抗層付き銅箔の提供を目的とする。An object of the present invention is to provide a copper foil with a resistance layer and a method for manufacturing the same, which can solve the above-mentioned problems in a conventional printed circuit board with a built-in resistance circuit.
Specifically, the resistance layer has a resistance value similar to the resistance value of the current chip resistor, and, at the time of the primary etching and the secondary etching, by using the current etchant, the copper foil can be formed. It is an object of the present invention to provide a copper foil with a resistance layer, which is made of a material capable of simultaneously melting and the resistance layer and selectively etching only the copper foil.
【0014】[0014]
【課題を解決するための手段】上記した目的を達成する
ために、本発明においては、絶縁基材とラミネートして
使用される抵抗層付き銅箔であって、少なくとも一方の
片面がJIS B 0601で規定する10点平均粗さ
(Rz)で3〜6μmの表面粗さになっている基体銅箔の
前記片面または他方の片面に、温度298Kにおける電
気抵抗率が0.05〜2μΩ・mである導電性物質から
成る抵抗層が10〜300mg/m2の厚みで形成されて
いることを特徴とする抵抗層付き銅箔が提供される。In order to achieve the above-mentioned object, in the present invention, a copper foil with a resistance layer used by laminating it with an insulating base material, at least one side of which is JIS B 0601. When the electrical resistivity at a temperature of 298K is 0.05 to 2 μΩ · m on the one side or the other side of the base copper foil having a surface roughness of 3 to 6 μm in 10-point average roughness (Rz) There is provided a copper foil with a resistance layer, wherein the resistance layer made of a conductive material is formed to a thickness of 10 to 300 mg / m 2 .
【0015】また、本発明においては、基体銅箔の表面
に導電性物質から成る前記抵抗層を電析で形成する際
に、電解めっき液として、前記導電性物質のイオンを含
み、かつ、塩素イオン濃度が10ppm以下、Cuイオン
濃度が20ppm以下である水溶液を用いることを特徴と
する抵抗層付き銅箔が提供される。Further, in the present invention, when the resistance layer made of a conductive substance is formed on the surface of the base copper foil by electrodeposition, the electrolytic plating solution contains ions of the conductive substance and contains chlorine. Provided is a copper foil with a resistance layer, which uses an aqueous solution having an ion concentration of 10 ppm or less and a Cu ion concentration of 20 ppm or less.
【0016】[0016]
【発明の実施の形態】図1は本発明の抵抗層付き銅箔の
基本例Aを示し、図2は他の基本例Bを示す。銅箔A,
銅箔Bは、いずれも、基体銅箔1の片面に後述する抵抗
層2が形成されている点では同じであるが、銅箔Aの場
合は、基体銅箔1の粗面1a側に抵抗層2が形成されて
おり、銅箔Bの場合は、基体銅箔1の平滑面1b側に抵
抗層2が形成されている点で異なっている。DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows a basic example A of a copper foil with a resistance layer of the present invention, and FIG. 2 shows another basic example B. Copper foil A,
The copper foils B are the same in that the resistance layer 2 described later is formed on one surface of the base copper foil 1, but in the case of the copper foil A, the resistance is applied to the rough surface 1a side of the base copper foil 1. The layer 2 is formed, and the copper foil B is different in that the resistance layer 2 is formed on the smooth surface 1b side of the base copper foil 1.
【0017】ここで、基体銅箔1としては、一般のプリ
ント回路基板の製造時に用いられる電解銅箔または圧延
銅箔のいずれかであればよいが、そのいずれか一方の表
面(図では粗面1a)は、JIS B 0601で規定
する10点平均粗さ(Rz)で3〜6μmの表面粗さにな
っているものが使用される。銅箔A,Bは、いずれも、
上記抵抗層2側の表面を例えばガラスエポキシ樹脂から
成る絶縁基材(図示しない)とラミネートして使用され
る。したがって、ラミネート後に得られた積層板におい
ては、最外層が基体銅箔から成り、抵抗層は絶縁基材と
接合した状態で内蔵されることになる。Here, the base copper foil 1 may be either an electrolytic copper foil or a rolled copper foil used at the time of manufacturing a general printed circuit board, but one of the surfaces (a rough surface in the figure). 1a) has a 10-point average roughness (Rz) defined by JIS B 0601 and has a surface roughness of 3 to 6 μm. The copper foils A and B are both
The surface on the side of the resistance layer 2 is laminated with an insulating base material (not shown) made of, for example, glass epoxy resin for use. Therefore, in the laminated plate obtained after lamination, the outermost layer is made of the base copper foil, and the resistance layer is incorporated in a state of being bonded to the insulating base material.
【0018】その場合、抵抗層2(および基体銅箔1)
と絶縁基材との接合強度を高め、また、後述するように
厚みは同じであっても高抵抗の抵抗回路を形成したいと
きは、銅箔Aを用いることが好ましい。そして、ファイ
ンな導体回路と抵抗回路を形成したいときは、銅箔Bを
用いることが好ましい。なお、基体銅箔1の粗面1aに
おけるRz値を3〜6μmに設定した理由は、銅箔Aを使
用したときの絶縁基材との接合強度(例えばピール強
度)を高めるためであるが、その場合でも、Rz値が6μ
mより大きい粗面1aに抵抗層2を形成すると、前記し
た2次エッチング時における基体銅箔のみの選択的なエ
ッチング除去が円滑に進まず、形成される抵抗回路の抵
抗値がばらつくようになる。In that case, the resistance layer 2 (and the base copper foil 1)
It is preferable to use the copper foil A when it is desired to enhance the bonding strength between the insulating base material and the insulating base material and to form a high resistance resistance circuit even if the thickness is the same as described later. When it is desired to form fine conductor circuits and resistance circuits, it is preferable to use the copper foil B. The reason why the Rz value on the rough surface 1a of the base copper foil 1 is set to 3 to 6 μm is to increase the bonding strength (for example, peel strength) with the insulating base material when the copper foil A is used. Even in that case, the Rz value is 6μ
When the resistance layer 2 is formed on the rough surface 1a larger than m, the selective etching removal of only the base copper foil during the secondary etching does not proceed smoothly and the resistance value of the formed resistance circuit varies. .
【0019】また、Rz値を3μmより小さい粗面に抵抗
層2を形成すると、絶縁基材との間で適切な接合強度が
得られなくなる。次に抵抗層2について説明する。この
抵抗層2は、電気抵抗率が0.05〜2μΩ・mである
導電性物質で構成され、かつその厚みは10〜300mg
/m2に設定される。具体的には、上記導電性物質を基
体銅箔1の表面に電析で形成して抵抗層とすることが好
適である。なお、上記した電気抵抗率は温度298K近
辺における値である。Further, if the resistance layer 2 is formed on a rough surface having an Rz value smaller than 3 μm, it becomes impossible to obtain an appropriate bonding strength with the insulating base material. Next, the resistance layer 2 will be described. The resistance layer 2 is made of a conductive material having an electric resistivity of 0.05 to 2 μΩ · m and a thickness of 10 to 300 mg.
/ M 2 is set. Specifically, it is preferable that the conductive material is formed on the surface of the base copper foil 1 by electrodeposition to form a resistance layer. The above-mentioned electrical resistivity is a value near a temperature of 298K.
【0020】抵抗層2は、最終的には内蔵された抵抗回
路のパターンに転化するとはいえ、広い範囲の導電性を
備えていることが必要であり、また、高抵抗の抵抗回路
になるためには、薄く、しかも厚みのばらつきがない均
一な層として形成されることが必要である。このような
ことを勘案すると、抵抗層の形成方法としては、銅箔へ
の均一皮膜形成に最も好適である電析を適用することが
好ましい。Although the resistance layer 2 is eventually converted into the pattern of the built-in resistance circuit, it is necessary that it has a wide range of conductivity, and since it becomes a high resistance resistance circuit. It is necessary to form a thin, uniform layer having no variation in thickness. Taking this into consideration, it is preferable to apply electrodeposition, which is most suitable for forming a uniform film on the copper foil, as a method for forming the resistance layer.
【0021】その場合、電気抵抗率が0.05μΩ・m
より小さい導電性物質で抵抗層2を形成すると、高いシ
ート抵抗値の抵抗層を形成するためには、当該抵抗層の
厚みを非常に薄くすることが必要になる。しかし、その
ような薄い抵抗層では、2次エッチング(銅の選択エッ
チング)時に基体銅箔と共に溶解されやすくなり、結
局、厚みが均一な層形成が困難になる。また、電気抵抗
率が2μΩ・mより大きい導電性物質の抵抗層を電析で
形成することは極めて困難である。In that case, the electrical resistivity is 0.05 μΩ · m.
When the resistance layer 2 is formed of a smaller conductive material, it is necessary to make the resistance layer extremely thin in order to form a resistance layer having a high sheet resistance value. However, such a thin resistance layer is likely to be dissolved together with the base copper foil during the secondary etching (selective etching of copper), and eventually it becomes difficult to form a layer having a uniform thickness. Further, it is extremely difficult to form a resistance layer of a conductive substance having an electric resistivity of more than 2 μΩ · m by electrodeposition.
【0022】このようなことから、抵抗層の形成に際し
ては、電気抵抗率が0.05〜2μΩ・mである導電性
物質が使用される。なお、ここでいうシート抵抗値と
は、これら銅箔A,Bの抵抗層側を絶縁基材とラミネー
トしたのち、表面の基体銅箔のみを選択的にエッチング
除去し、残存する抵抗層について測定される抵抗値のこ
とである。For this reason, when forming the resistance layer, a conductive substance having an electric resistivity of 0.05 to 2 μΩ · m is used. The sheet resistance value referred to here means that after the resistance layer side of these copper foils A and B is laminated with an insulating base material, only the base copper foil on the surface is selectively removed by etching, and the remaining resistance layer is measured. It is the resistance value.
【0023】抵抗層は、用いる導電性物質の種類に応じ
て、次の2つのタイプのものになる。第1のタイプの抵
抗層は、98質量%以上の単一成分を主成分として含
み、残部は不可避的不純物または1質量%未満のCu成
分を含むものである。第2のタイプの抵抗層は、95質
量%以上の主成分と3質量%以下の副成分を含み、残部
は不可避的不純物または1質量%未満のCu成分を含む
ものである。The resistance layer is of the following two types, depending on the type of conductive material used. The first type resistance layer contains 98 mass% or more of a single component as a main component, and the balance contains inevitable impurities or less than 1 mass% of Cu component. The second type resistance layer contains 95% by mass or more of the main component and 3% by mass or less of the accessory component, and the balance contains inevitable impurities or less than 1% by mass of the Cu component.
【0024】第1のタイプの抵抗層における単一成分と
しては、例えば、Ni,Co,Pd,Biのいずれかを
あげることができる。また、Ni−Pd,Ni−Coの
ような共析相や、Pt単体も使用することができる。ま
た第2のタイプの抵抗層の場合、主成分としては上記し
た金属のいずれかを、副成分としては主成分の種類に応
じて例えばP,B,Pd,Bi,Wのいずれかをあげる
ことができる。As the single component in the first type resistance layer, for example, any one of Ni, Co, Pd and Bi can be cited. Further, a eutectoid phase such as Ni-Pd or Ni-Co, or Pt simple substance can also be used. In the case of the second type resistance layer, one of the above-mentioned metals is used as the main component, and any one of P, B, Pd, Bi and W is used as the sub-component depending on the type of the main component. You can
【0025】すなわち、第2のタイプの抵抗層の場合、
主成分と副成分を組み合わせた導電性物質としては、例
えば、前者を主成分、後者を副成分としたとき、Ni−
P,Ni−B,Co−P,Co−B,Ni−Bi,Ni
−W,Ni−Pdなどをあげることができる。第1のタ
イプの抵抗層,第2のタイプの抵抗層は、上記した導電
性物質を主体として構成されているが、更には、不可避
的不純物または1質量%未満のCu成分が含まれていて
もよい。That is, in the case of the second type resistance layer,
As the conductive material in which the main component and the subcomponent are combined, for example, when the former is the main component and the latter is the subcomponent, Ni-
P, Ni-B, Co-P, Co-B, Ni-Bi, Ni
-W, Ni-Pd, etc. can be mentioned. The first type resistance layer and the second type resistance layer are mainly composed of the above-mentioned conductive material, but further contain inevitable impurities or a Cu component of less than 1% by mass. Good.
【0026】これらのうち、Cu成分の含有量が規制さ
れる理由は以下のとおりである。まず、銅箔A,銅箔B
は、いずれも抵抗層側の面を絶縁基材にラミネートとし
たのち1次エッチングを行って、一旦、基体銅箔と抵抗
層2が積層された状態で所定パターンの回路を形成す
る。ついで、2次エッチングを行って、抵抗回路を形成
したい部分の基体銅箔部分を選択的にエッチング除去し
て所望するパターンの抵抗回路が形成される。Among these, the reason why the content of the Cu component is regulated is as follows. First, copper foil A, copper foil B
In each case, the surface on the resistance layer side is laminated on an insulating base material, and then primary etching is performed to once form a circuit having a predetermined pattern in a state where the base copper foil and the resistance layer 2 are laminated. Then, secondary etching is performed to selectively remove the base copper foil portion where the resistance circuit is to be formed by etching to form a resistance circuit having a desired pattern.
【0027】その場合、抵抗層にCu成分が含有されて
いると、上記したエッチングの過程で抵抗層のCu成分
が溶解除去されることになる。その結果、抵抗層の均一
性は劣化し、そのシート抵抗値のばらつきが大きくな
る。また、オーバーエッチングも起こりやすくなり、シ
ート抵抗値が設計値よりも大きくなるという事態が発生
する。更には、Cu成分を含有したままの状態で抵抗回
路がプリント回路基板に内蔵されていると、時間経過と
ともに、Cu成分の酸化や腐食などにより抵抗回路の抵
抗値が変動し、プリント回路基板の長期信頼性は低下す
る。In this case, if the resistance layer contains a Cu component, the Cu component of the resistance layer is dissolved and removed in the above-described etching process. As a result, the uniformity of the resistance layer deteriorates, and the variation in the sheet resistance value increases. Also, over-etching is likely to occur, and the sheet resistance value becomes larger than the design value. Furthermore, if the resistance circuit is contained in the printed circuit board while containing the Cu component, the resistance value of the resistance circuit fluctuates with the passage of time due to oxidation or corrosion of the Cu component, and Long-term reliability is reduced.
【0028】このような事態の発生を防止するために、
銅箔A,銅箔Bの抵抗層においては、Cu成分を含有し
ないことを最適とするが、含有されている場合であって
もその含有量は1質量%以下に規制される。なお、銅箔
A,銅箔Bのいずれにおいても、1次エッチング時に
は、回路パターン形成に従来から使用されている塩化第
二銅や塩化第二鉄の水溶液をエッチャントとして用いる
ことができる。これらのエッチャントは、基体銅箔と抵
抗層を所定の回路パターンで同時に形成することができ
る。In order to prevent such a situation from occurring,
In the resistance layers of the copper foil A and the copper foil B, it is optimal not to contain a Cu component, but even if it is contained, the content is regulated to 1% by mass or less. In both the copper foil A and the copper foil B, an aqueous solution of cupric chloride or ferric chloride conventionally used for forming a circuit pattern can be used as an etchant during the primary etching. These etchants can simultaneously form a base copper foil and a resistance layer with a predetermined circuit pattern.
【0029】基体銅箔のみを選択的にエッチング除去す
る2次エッチングにおいては、アルカリアンモニア系,
過酸化水素−硫酸系などの一般的なエッチャントを用い
ることができる。これらの抵抗層の厚みは10〜300
mg/m2に設定される。この厚みが10mg/m2より薄い
場合は、前記した2次エッチング時における銅箔の選択
的なエッチング除去が円滑に進まず、抵抗層も部分的に
エッチング除去されてしまうので、形成された抵抗回路
の抵抗値のばらつきが大きくなる。とくに第2のタイプ
の抵抗層の場合はその傾向が強く発現する。In the secondary etching in which only the base copper foil is selectively removed by etching, an alkali ammonia system,
A general etchant such as a hydrogen peroxide-sulfuric acid system can be used. The thickness of these resistance layers is 10 to 300.
It is set to mg / m 2 . If the thickness is less than 10 mg / m 2, the selective etching removal of the copper foil during the above-described secondary etching does not proceed smoothly, and the resistance layer is also partially removed by etching. The variation in the resistance value of the circuit becomes large. Especially in the case of the second type resistance layer, this tendency is strongly exhibited.
【0030】また、厚みが300mg/m2より厚くなる
と、そのシート抵抗値は50Ω/sqを大きく下回るよう
になり、高抵抗の抵抗回路の形成という本発明の目的に
そぐわなくなる。なお、第1のタイプの抵抗層の場合、
その厚みを薄くしていくと急激にシート抵抗値が高くな
っていく。すなわち、抵抗層が薄くなると、形成された
抵抗層の厚みによってシート抵抗値は大きく変動する。
そのため、抵抗値が所定の設計値となるように抵抗層の
厚みを制御することが困難になる。When the thickness is more than 300 mg / m 2 , the sheet resistance value becomes much lower than 50 Ω / sq, which defeats the purpose of the present invention to form a high resistance resistor circuit. In the case of the first type resistance layer,
The sheet resistance value rapidly increases as the thickness is reduced. That is, when the resistance layer becomes thin, the sheet resistance value greatly changes depending on the thickness of the formed resistance layer.
Therefore, it becomes difficult to control the thickness of the resistance layer so that the resistance value becomes a predetermined design value.
【0031】その点では、第2のタイプの抵抗層は、副
成分の配合量を調節することにより、高抵抗領域におい
て、その抵抗値を設計値にコントロールしやすいという
利点を備えている。例えば、Ni,Coを主成分とした
場合、副成分としてP,B,Pd,Bi,Wなどの配合
量を調節して抵抗値の制御が可能であり、Pdを主成分
とした場合には、Ni,P,B,Wを副成分とし、所定
の抵抗値となるようにそれらの配合量を調節すればよ
く、Bを主成分とした場合には、P,Wを副成分として
それらの配合量を調節すればよい。In this respect, the resistance layer of the second type has an advantage that the resistance value can be easily controlled to the design value in the high resistance region by adjusting the blending amount of the subcomponents. For example, when Ni and Co are the main components, the resistance value can be controlled by adjusting the compounding amounts of P, B, Pd, Bi, W, etc. as sub-components. , Ni, P, B and W as sub-components, and their blending amounts may be adjusted so as to obtain a predetermined resistance value. When B is the main component, P and W are sub-components. The blending amount may be adjusted.
【0032】これらの副成分は、いずれも、主成分の場
合と同様に、Cu成分に比べてマイグレーションを起こ
しづらく、低温域ではCu成分と化合物を生成しにく
く、また主成分との間では化学結合性が良好であるた
め、微量転化により、単一成分の量で抵抗値を制御しよ
うとする第1のタイプの抵抗層の場合に比べて、副成分
の配合量をわずかに変化させるだけで各種値の抵抗値を
発現させることができる。換言すれば、10kΩ/sq以
上の高いシート抵抗値の領域を想定した場合であって
も、副成分の配合量を微量変化させるだけで、その高抵
抗領域内でシート抵抗値の制御が可能となる。Similar to the case of the main component, each of these sub-components is less likely to cause migration than the Cu component, it is difficult to form a compound with the Cu component in the low temperature region, and a chemical compound is generated between the main component. Since the binding property is good, it is necessary to slightly change the compounding amount of the subcomponents as compared with the case of the first type resistance layer in which the resistance value is controlled by the amount of the single component due to the small amount conversion. It is possible to develop various resistance values. In other words, even when a high sheet resistance value region of 10 kΩ / sq or more is assumed, it is possible to control the sheet resistance value within the high resistance region by only slightly changing the compounding amount of the accessory component. Become.
【0033】しかしながら、他方では、多量の副成分を
配合すると、前記した銅箔の選択的エッチングを行う2
次エッチング時において、抵抗層は用いたエッチャント
に溶解しやすくなり、その結果、形成された抵抗回路の
抵抗値は設計値から外れやすくなる。そのため、第2の
タイプの抵抗層においては、主成分は95質量%以上と
し、この副成分の配合量は3質量%以下に設定される。On the other hand, however, when a large amount of subcomponents are mixed, the above-mentioned selective etching of the copper foil is performed.
At the time of the next etching, the resistance layer is easily dissolved in the used etchant, and as a result, the resistance value of the formed resistance circuit is likely to deviate from the designed value. Therefore, in the second type resistance layer, the main component is set to 95% by mass or more, and the content of the subcomponent is set to 3% by mass or less.
【0034】抵抗層の厚みは10〜50mg/m2である
ことが好ましい。抵抗層の厚みも均一に維持され、その
シート抵抗値は1kΩ/sq〜1MΩ/sqと高い値を示すよ
うになるからである。その場合、抵抗層の厚みが薄いと
きには、第1のタイプの抵抗層の方が第2のタイプの抵
抗層よりも高いシート抵抗値を示す傾向が認められる。
逆に抵抗層の厚みを厚くすると、第2のタイプの抵抗層
の方が第1のタイプの抵抗層よりも高いシート抵抗値を
示すようになる。The resistance layer preferably has a thickness of 10 to 50 mg / m 2 . This is because the thickness of the resistance layer is maintained uniform, and the sheet resistance value is as high as 1 kΩ / sq to 1 MΩ / sq. In that case, when the thickness of the resistance layer is thin, it is recognized that the resistance layer of the first type has a higher sheet resistance value than the resistance layer of the second type.
On the contrary, when the thickness of the resistance layer is increased, the resistance layer of the second type exhibits a higher sheet resistance value than the resistance layer of the first type.
【0035】銅箔A,銅箔Bの製造に際しては、前記し
たように、基体銅箔1に対して電析で抵抗層2を形成す
ることが好ましい。均一な薄膜形成が可能であり、また
その厚み制御が容易であるからである。その場合、用い
る電解めっき液としては、前記した所望の導電性物質の
イオンを含み、かつ、Cuイオンの濃度が20ppm以下
で、塩素イオンの濃度が10ppm以下に調整された水溶
液であることが好ましい。In producing the copper foils A and B, as described above, it is preferable to form the resistance layer 2 on the base copper foil 1 by electrodeposition. This is because a uniform thin film can be formed and its thickness can be easily controlled. In that case, the electrolytic plating solution used is preferably an aqueous solution containing the ions of the desired conductive substance described above, and having a Cu ion concentration of 20 ppm or less and a chlorine ion concentration of 10 ppm or less. .
【0036】Cuイオン濃度が20ppmより高い状態で
電析を行うと、形成される抵抗層におけるCu成分の含
有量は1質量%より多くなって、前記した不都合が発生
するようになるからである。基体銅箔1の表面に継続的
に電析を行っていると、基体銅箔から電解めっき液にC
u成分が溶解し、電解めっき液中にCuイオンが蓄積さ
れてくるので、本発明においては、例えば弱電解処理を
継続的に実施して電解めっき液中のCuイオンを強制的
に除去し、その濃度を上記した値に維持する。This is because if the electrodeposition is carried out in a state where the Cu ion concentration is higher than 20 ppm, the content of the Cu component in the resistance layer formed will be higher than 1% by mass, and the above-mentioned inconvenience will occur. . When electrodeposition is continuously performed on the surface of the base copper foil 1, the base copper foil is changed to C by electroplating solution.
Since the u component is dissolved and Cu ions are accumulated in the electrolytic plating solution, in the present invention, for example, weak electrolytic treatment is continuously performed to forcibly remove Cu ions in the electrolytic plating solution, The concentration is maintained at the value mentioned above.
【0037】また、電解めっき液中に塩素イオンが含有
されていると、電析終了後に抵抗層付き銅箔を水洗・乾
燥しても、塩素は完全に除去されずに残存し、製造した
プリント回路基板の抵抗回路や導体回路の塩素腐食が起
こるようになるので、本発明においては、電解めっき液
中の塩素イオン濃度を10ppm以下に規制する。銅箔
A,銅箔Bの実使用に際しては、保管過程における基体
銅箔の防錆のために、また絶縁基材とのラミネートを行
うこととの関係で、耐熱性,耐酸化性,耐薬品性,接合
強度の向上などの機能を付与するために、その両面に表
面処理が施されていることを好適とする。If the electrolytic plating solution contains chlorine ions, chlorine will not be completely removed even after washing and drying the copper foil with a resistance layer after the completion of electrodeposition. Since chlorine corrosion occurs in the resistance circuit and the conductor circuit of the circuit board, the chlorine ion concentration in the electrolytic plating solution is regulated to 10 ppm or less in the present invention. When actually using the copper foils A and B, in order to prevent rusting of the base copper foil in the storage process, and in relation to laminating with the insulating base material, heat resistance, oxidation resistance, chemical resistance It is preferable that both surfaces thereof are surface-treated in order to impart functions such as improvement of the adhesiveness and bonding strength.
【0038】具体的には、図3で示したように、銅箔A
の両面に表面処理層3が形成されている銅箔A1,図4
で示したように、銅箔Bの両面に表面処理層3が形成さ
れている銅箔B1にして実使用に供することが好まし
い。このような表面処理としては、Zn,Zn合金,C
u−Zn合金,Ni,Ni合金、Sn,Sn合金,C
o,Co合金,Sbなどのめっき処理,クロメート処
理,シランカップリング処理などをあげることができ
る。これらのうち、Znめっき処理,クロメート処理,
シランカップリング処理はとくに有効である。Specifically, as shown in FIG. 3, the copper foil A
A copper foil A 1 having surface treatment layers 3 formed on both surfaces of the same, FIG.
It is preferable that the copper foil B 1 in which the surface-treated layer 3 is formed on both surfaces of the copper foil B is used for practical use as shown in FIG. Such surface treatment includes Zn, Zn alloy, C
u-Zn alloy, Ni, Ni alloy, Sn, Sn alloy, C
O, Co alloy, Sb, etc. plating treatment, chromate treatment, silane coupling treatment, etc. can be mentioned. Among these, Zn plating treatment, chromate treatment,
Silane coupling treatment is particularly effective.
【0039】なお、以上説明した銅箔A(または銅箔
B)を外層材として用いる場合には、図5で示したよう
に、銅箔Aの抵抗層2側に、Bステージまたは半硬化状
態にある絶縁樹脂層4や、エポキシ系,アクリル系,ポ
リイミド系の接着剤層4を形成した抵抗層付き銅箔A2
にしてもよい。また、銅箔Aを内層材として使用するこ
とを考慮すると、基体銅箔1としては、その伸び率が4
%以上であるものを採用することが好ましい。フォイル
クラックの発生防止や層間接続の信頼性向上に資するか
らである。When the copper foil A (or the copper foil B) described above is used as the outer layer material, as shown in FIG. 5, the copper foil A is placed on the resistance layer 2 side in the B stage or semi-cured state. A copper foil A 2 with a resistance layer on which an insulating resin layer 4 and an epoxy-based, acrylic-based, or polyimide-based adhesive layer 4 are formed.
You may Further, considering that the copper foil A is used as the inner layer material, the base copper foil 1 has an elongation of 4%.
It is preferable to adopt the one whose content is at least%. This is because it contributes to preventing the occurrence of foil cracks and improving the reliability of interlayer connection.
【0040】次に、基体銅箔1について説明する。本発
明では、電解銅箔や圧延銅箔を使用することができる
が、それらに対しては次のような表面修飾を施したもの
であってもよい。まず、図6で示したように、基体銅箔
の粗面1aに粗面化処理を行って粗化層5を形成した基
体銅箔1Aを使用することができる。Next, the base copper foil 1 will be described. In the present invention, an electrolytic copper foil or a rolled copper foil can be used, but they may be subjected to the following surface modification. First, as shown in FIG. 6, it is possible to use the base copper foil 1A in which the roughened layer 5 is formed by subjecting the roughened surface 1a of the base copper foil to the roughening treatment.
【0041】この銅箔1Aは、通常の銅張り積層板で用
いられているタイプのものである。この銅箔1Aを用い
て図1で示した銅箔Aを製造すると、抵抗層のシート抵
抗値は高くなり、また絶縁基材との接合強度も高くなる
が、他方では、2次エッチング時における銅箔1Aの選
択エッチング性が悪くなり、形成した抵抗回路の抵抗値
のばらつきが大きくなるという傾向を示す。The copper foil 1A is of the type used in ordinary copper-clad laminates. When the copper foil A shown in FIG. 1 is manufactured by using this copper foil 1A, the sheet resistance value of the resistance layer is increased and the bonding strength with the insulating base material is also increased. There is a tendency that the selective etching property of the copper foil 1A is deteriorated and the resistance value of the formed resistance circuit varies greatly.
【0042】したがって、このタイプの銅箔1Aは、製
造目的のプリント回路基板への要求特性,絶縁基材との
接合強度,形成する回路パターンのファイン化の程度な
どとの関係で使用時の選択を図ればよい。図7は、基体
銅箔1の平滑面1b側に粗化層5を形成した銅箔1Bを
示す。この銅箔1Bは、ファインな導体回路と抵抗回路
の形成を目的とするときに用いて好適である。Therefore, the copper foil 1A of this type is selected at the time of use in consideration of the required characteristics of the printed circuit board for manufacturing, the bonding strength with the insulating base material, the degree of fineness of the circuit pattern to be formed, and the like. Should be planned. FIG. 7 shows a copper foil 1B in which a roughening layer 5 is formed on the smooth surface 1b side of the base copper foil 1. The copper foil 1B is suitable for use in forming fine conductor circuits and resistance circuits.
【0043】また、図8は、両面に粗化層5,5を形成
した基体銅箔1Cを示す。この銅箔1Cは、多層プリン
ト回路基板の製造に際し、内蔵基材との接合強度を高め
たいときに用いて好適である。ところで、基体銅箔1の
厚みは、製造した抵抗層付き銅箔の用途や求められる必
要特性、また内層材として用いるのか、外層材として用
いるのかなどの使用態様に応じて適切に決められる。例
えば内層材として用いる場合には、基体銅箔1の厚みは
18μm以上であることが好ましく、ファインな回路パ
ターンが要求される外層材として用いる場合には、9μ
mまたは12μmであることが好ましい。Further, FIG. 8 shows a base copper foil 1C having roughened layers 5 and 5 formed on both sides thereof. This copper foil 1C is suitable for use in manufacturing a multilayer printed circuit board when it is desired to increase the bonding strength with the built-in base material. By the way, the thickness of the base copper foil 1 is appropriately determined according to the application of the manufactured copper foil with a resistance layer, the required properties required, and the use mode such as whether it is used as an inner layer material or an outer layer material. For example, when used as an inner layer material, the thickness of the base copper foil 1 is preferably 18 μm or more, and when used as an outer layer material requiring a fine circuit pattern, it is 9 μm.
It is preferably m or 12 μm.
【0044】高度なファインパターンの導体(抵抗)回
路が要求される外層材用の抵抗層付き銅箔や、プリント
回路基板の製造過程で例えばレーザ穴あけ加工が施され
る抵抗層付き銅箔の場合、次のような基体銅箔を使用す
ることができる。その1つは、図9で示したように、キ
ャリア銅箔6を用いた銅箔1Dである。すなわち、この
銅箔1Dは、比較的厚いキャリア銅箔6の粗面6aに、
剥離層7を介して厚みが3μmまたは5μmの厚みの銅
箔層8が形成されている。In the case of a copper foil with a resistance layer for an outer layer material which requires a conductor (resistance) circuit with a high degree of fine pattern, or a copper foil with a resistance layer which is laser-drilled in the manufacturing process of a printed circuit board, for example. The following base copper foil can be used. One of them is a copper foil 1D using a carrier copper foil 6 as shown in FIG. That is, this copper foil 1D is formed on the rough surface 6a of the relatively thick carrier copper foil 6,
A copper foil layer 8 having a thickness of 3 μm or 5 μm is formed via the peeling layer 7.
【0045】この銅箔1Dの場合、上記した銅箔層8が
図1または図2で示した基体銅箔1として機能し、この
銅箔層8の表面に本発明の抵抗層2が形成されることに
なる。この銅箔1Dを用いて製造した抵抗層付き銅箔
は、絶縁基材とラミネートされたのち、キャリア銅箔6
が剥離または溶解除去される。そして、絶縁基材側に残
置する薄い銅箔層8(およびその下に位置する抵抗層)
に対して、エッチングやレーザ加工が施される。In the case of this copper foil 1D, the above-mentioned copper foil layer 8 functions as the base copper foil 1 shown in FIG. 1 or 2, and the resistance layer 2 of the present invention is formed on the surface of this copper foil layer 8. Will be. The copper foil with a resistance layer manufactured using this copper foil 1D is laminated with an insulating base material, and then the carrier copper foil 6
Are removed or dissolved and removed. Then, the thin copper foil layer 8 (and the resistance layer located thereunder) left on the insulating base material side
Are subjected to etching or laser processing.
【0046】図10は、別の基体銅箔1Eを示す。この
銅箔1Eは、図9で示したキャリア銅箔6の平滑面6b
に剥離層7を介して3μmまたは5μmの厚みの銅箔層
8が形成され、更にその銅箔層8の表面に粗化層5が形
成されているものである。この銅箔1Eは、銅箔1Dを
用いた場合よりも、更にファインな回路パターンの形成
やレーザ加工が可能である。FIG. 10 shows another base copper foil 1E. This copper foil 1E is a smooth surface 6b of the carrier copper foil 6 shown in FIG.
The copper foil layer 8 having a thickness of 3 μm or 5 μm is formed on the surface of the copper foil layer 8 via the peeling layer 7, and the roughening layer 5 is further formed on the surface of the copper foil layer 8. This copper foil 1E is capable of forming a finer circuit pattern and laser processing as compared with the case of using the copper foil 1D.
【0047】図11は、図10で示した銅箔1Eにおい
て、剥離層7と銅箔層8の間に耐熱剥離層9を介装した
銅箔1Fを示す。この銅箔1Fは、銅箔1Eと同じ機能
を発揮するとともに、耐熱性が向上していて、例えば温
度が300℃前後になってもキャリアピールは低温時に
比べて大きく上昇しないので、キャリア銅箔6の剥離性
が良好である。FIG. 11 shows a copper foil 1F shown in FIG. 10 in which a heat-resistant peeling layer 9 is interposed between a peeling layer 7 and a copper foil layer 8. This copper foil 1F has the same function as that of the copper foil 1E and has improved heat resistance. For example, even when the temperature is around 300 ° C., the carrier peel does not significantly increase as compared with the low temperature. The peelability of No. 6 is good.
【0048】また、銅箔1Fにおいて、耐熱剥離層9を
レーザ吸収層に置換すれば、その銅箔は、レーザ穴あけ
加工が容易となり、直接、銅箔層8に穴あけ加工が実現
可能な基体銅箔になる。なお、直接にレーザ穴あけ加工
が可能である銅箔としては、図12で示したように、図
6で示した銅箔1Aの平滑面1bにレーザ吸収層9が形
成されている銅箔1Gであってもよい。In the copper foil 1F, if the heat-resistant peeling layer 9 is replaced with a laser absorbing layer, the copper foil can be easily laser-drilled, and the copper base layer that can be directly drilled in the copper foil layer 8 can be realized. Become foil. As a copper foil that can be directly laser-drilled, as shown in FIG. 12, a copper foil 1G having a laser absorption layer 9 formed on the smooth surface 1b of the copper foil 1A shown in FIG. 6 is used. It may be.
【0049】[0049]
【実施例】実施例1〜40,比較例1〜5
(1)抵抗層付き銅箔の製造
各種の基体銅箔を用意した。これら基体銅箔の種類と厚
み,抵抗層を形成する側の表面粗さは表1,2に示した
とおりである。また、これら基体銅箔の一部にはその粗
面側または平滑面側に粗面化処理を行った。EXAMPLES Examples 1 to 40, Comparative Examples 1 to 5 (1) Production of Copper Foil with Resistance Layer Various base copper foils were prepared. Tables 1 and 2 show the types and thicknesses of these base copper foils and the surface roughness on the side on which the resistance layer is formed. Further, a part of these base copper foils was roughened on the rough surface side or the smooth surface side.
【0050】なお、粗面化処理は以下のとおりである。
まず、主に、Cu:30g/dm3,H2SO4:150g
/dm3から成る電解液中において、電流密度:280C
/dm2でカソード電解を行い、ついで、主に、Cu:7
0g/dm3,H2SO4:100g/dm3から成る電解液中
において、電流密度:280C/dm2のカソード電解を
行った。The roughening treatment is as follows.
First, mainly Cu: 30 g / dm 3 , H 2 SO 4 : 150 g
/ In the electrolytic solution consisting dm 3, the current density: 280C
Cathodic electrolysis with / dm 2 and then mainly Cu: 7
Cathodic electrolysis with a current density of 280 C / dm 2 was carried out in an electrolytic solution containing 0 g / dm 3 and H 2 SO 4 : 100 g / dm 3 .
【0051】[0051]
【表1】 [Table 1]
【0052】[0052]
【表2】 [Table 2]
【0053】次に、これら試料における表1,2で示し
た表面粗さの表面に、下記の条件で各種の導電性物質を
電析した。
Ni:NiSO4・6H2O 160g/dm3,H3BO3
30g/dm3,液温40℃,電流密度0.5A/dm2。
Co:CoSO4・6H2O 50g/dm3、H3BO3
30g/dm3,液温40℃,電流密度0.5A/dm2。
Ni−Co:Ni(NH2SO3)2・4H2O 160g/
dm3(主成分とする場合)、または50g/dm3(副成分
とする場合),Co(NH2SO3)・4H2O10g/dm3
(副成分とする場合)、または100g/dm3(主成分
とする場合),H3BO3 30g/dm3,液温40℃,
電流密度0.5A/dm2。Next, various conductive substances were electrodeposited on the surfaces of the surface roughness shown in Tables 1 and 2 of these samples under the following conditions. Ni: NiSO 4 · 6H 2 O 160g / dm 3, H 3 BO 3
30 g / dm 3 , liquid temperature 40 ° C., current density 0.5 A / dm 2 . Co: CoSO 4 · 6H 2 O 50g / dm 3, H 3 BO 3
30 g / dm 3 , liquid temperature 40 ° C., current density 0.5 A / dm 2 . Ni-Co: Ni (NH 2 SO 3) 2 · 4H 2 O 160g /
dm 3 (when it is the main component), or 50 g / dm 3 (when it is the secondary component), Co (NH 2 SO 3 ) .4H 2 O 10 g / dm 3
(When used as an accessory component), or 100 g / dm 3 (when used as a main component), H 3 BO 3 30 g / dm 3 , liquid temperature 40 ° C.,
Current density 0.5 A / dm 2 .
【0054】Ni−P:NiSO4・6H2O 175g
/dm3,H3PO3 10g/dm3,H 3PO3 1g/d
m3,液温25℃,電流密度0.5A/dm2。
Ni−B:NiSO4・6H2O 175g/dm3,(C
H3)3N・BH3 10g/dm3,液温55℃,電流密度
0.5A/dm2。
Co−P:CoSO4・6H2O 50g/dm3,H3PO
4 10g/dm3,H3PO3 1g/dm3,液温25℃,
電流密度0.5A/dm2。Ni-P: NiSOFour・ 6H2O 175g
/ Dm3, H3PO3 10 g / dm3, H 3PO3 1 g / d
m3, Liquid temperature 25 ℃, current density 0.5A / dm2.
Ni-B: NiSOFour・ 6H2O 175g / dm3, (C
H3)3N ・ BH3 10 g / dm3, Liquid temperature 55 ℃, current density
0.5 A / dm2.
Co-P: CoSOFour・ 6H2O 50g / dm3, H3PO
Four 10 g / dm3, H3PO3 1 g / dm3, Liquid temperature 25 ℃,
Current density 0.5A / dm2.
【0055】Co−B:CoSO4・6H2O 50g/
dm3,(CH3)3N・BH3 10g/dm3,液温55℃,
電流密度0.5A/dm2。
Ni−Bi:NiSO4・6H2O 175g/dm3,B
i2(SO4)3 40g/dm3,液温33℃,電流密度0.
5A/dm2。
Ni−W:NiSO4・6H2O 60g/dm3,Na2W
O4・2H2O 25g/dm3,液温30℃,電流密度0.
5A/dm2。Co-B: CoSO 4 .6H 2 O 50 g /
dm 3 , (CH 3 ) 3 N.BH 3 10 g / dm 3 , liquid temperature 55 ° C.,
Current density 0.5 A / dm 2 . Ni-Bi: NiSO 4 · 6H 2 O 175g / dm 3, B
i 2 (SO 4 ) 3 40 g / dm 3 , liquid temperature 33 ° C., current density 0.
5 A / dm 2 . Ni-W: NiSO 4 · 6H 2 O 60g / dm 3, Na 2 W
O 4 · 2H 2 O 25g / dm 3, a liquid temperature 30 ° C., a current density 0.
5 A / dm 2 .
【0056】Ni−Pd:パラブライト−TN20(日
本高純度化学社製),液温40℃,電流密度0.5A/d
m2。
Pd:パラブライト−SST−L(日本高純度化学社
製),液温55℃,電流密度0.5A/dm2。
Pd−Ni:PdNi466(デグサジャパン社製),
液温45°,電流密度0.5A/dm2。Ni-Pd: Parabright-TN20 (manufactured by Nippon Kojundo Chemical Co., Ltd.), liquid temperature 40 ° C., current density 0.5 A / d
m 2 . Pd: Parabright-SST-L (manufactured by Nippon Kojundo Chemical Co., Ltd.), liquid temperature 55 ° C., current density 0.5 A / dm 2 . Pd-Ni: PdNi466 (manufactured by Degussa Japan),
Liquid temperature 45 °, current density 0.5 A / dm 2 .
【0057】Bi:PF−B・ASID・05M(石原
薬品社製),液温40℃,電流密度0.5A/dm2。
Pt:プラタネックスIIILS(日本エレクトロプレー
ティング・エンジニヤーズ社製),液温65℃,電流密
度0.5A/dm2。
なお、Cu成分の含有量を多くする場合には、用いた電
解液に硫酸銅を添加することによって実施した。Bi: PF-B / ASID / 05M (manufactured by Ishihara Yakuhin), liquid temperature 40 ° C., current density 0.5 A / dm 2 . Pt: Platanex IIILS (manufactured by Japan Electroplating Engineers), liquid temperature 65 ° C., current density 0.5 A / dm 2 . When the content of the Cu component was increased, copper sulfate was added to the used electrolytic solution.
【0058】形成された抵抗層の元素分析は、5重量%
塩酸と20重量%硝酸の混合水溶液で抵抗層を溶解し、
その水溶液に対し、原子吸光分析(日立製作所社製の機
種Z−6100を使用)またはICP分析(堀場製作所
社製の機種JY238−ULTRACEを使用)で定量
した。また、Cu成分の定量は、EPMAによる定量分
析結果をZAF補正して求めた。The elemental analysis of the formed resistance layer was 5% by weight.
Dissolve the resistance layer with a mixed aqueous solution of hydrochloric acid and 20 wt% nitric acid,
The aqueous solution was quantified by atomic absorption analysis (using a model Z-6100 manufactured by Hitachi Ltd.) or ICP analysis (using a model JY238-ULTRACE manufactured by Horiba Ltd.). Further, the quantification of the Cu component was obtained by ZAF correction of the quantitative analysis result by EPMA.
【0059】なお、抵抗層の電気抵抗率は、金属データ
ブック改訂3版(日本金属学会編、1993年、丸善
(株))から試算した。その結果を表3,4に示した。
更に、抵抗層の表面に対し、下記の表面処理の一部また
は全部を順次行った。
処理1:Zn 10g/dm3,pH12の電解液を用い
て、室温下で1C/dm2のカソード電解処理。The electric resistivity of the resistance layer was calculated from the Metal Data Book Revised 3rd Edition (edited by The Japan Institute of Metals, 1993, Maruzen Co., Ltd.). The results are shown in Tables 3 and 4.
Furthermore, a part or all of the following surface treatments were sequentially performed on the surface of the resistance layer. Treatment 1: Cathodic electrolysis treatment of 1 C / dm 2 at room temperature using an electrolytic solution of Zn 10 g / dm 3 and pH 12.
【0060】処理2:CrO3 70g/dm3,pH12の
クロム酸液を用い、1C/dm2でカソード電解するクロ
メート処理。
処理3:サイラエース(チッソ社製のエポキシ系シラン
カップリング剤)の1g/dm3水溶液に浸漬するシラン
カップリング処理。
以上の結果を一括して表3,4に示した。Treatment 2: Chromate treatment using 70 g / dm 3 of CrO 3 , pH 12 chromic acid solution and cathodic electrolysis at 1 C / dm 2 . Treatment 3: Silane ace (epoxy silane coupling agent manufactured by Chisso Co.) is immersed in a 1 g / dm 3 aqueous solution of silane coupling treatment. The above results are collectively shown in Tables 3 and 4.
【0061】[0061]
【表3】 [Table 3]
【0062】[0062]
【表4】 [Table 4]
【0063】(2)特性の評価
各抵抗層付き銅箔を、常法に従ってFR基材4(ガラス
繊維強化エポキシ樹脂基板)に熱圧プレスしてラミネー
トした。キャリア付き銅箔の場合は、その後、キャリア
銅箔を剥離した。(2) Evaluation of characteristics Each of the copper foils with a resistance layer was laminated on the FR base material 4 (glass fiber reinforced epoxy resin substrate) by hot pressing according to a conventional method. In the case of a copper foil with a carrier, the carrier copper foil was then peeled off.
【0064】ついで、表面の基体銅箔にドライフィルム
レジストでマスクを形成し、1次エッチングを行って銅
箔と抵抗層の両者をエッチング除去して回路パターンを
形成した。エッチャントとしては、塩化第二銅水溶液を
用いた。なおこのとき、別に幅10mmのパターンを作成
し、引張試験機(テンシロンジャパン社製)でピール強
度を測定した。Next, a mask was formed on the base copper foil on the surface with a dry film resist, and primary etching was performed to remove both the copper foil and the resistance layer by etching to form a circuit pattern. A cupric chloride aqueous solution was used as the etchant. At this time, a pattern having a width of 10 mm was separately prepared, and the peel strength was measured with a tensile tester (manufactured by Tensilon Japan).
【0065】キャリア付き銅箔を用いた場合は、表出し
たキャリア銅箔の上に、Cu:70g/dm3、H2S
O4:100g/dm3から成る電解めっき液を用いて厚み
が18μm程度になるまでCuを電析したのちピール強
度を測定した。ついで、再度マスクを形成したのち、次
のような2次エッチングを行った。すなわち、角形形状
のシート状抵抗パターンを残し、かつその抵抗パターン
の両側にCuの電極部を残した状態にマスクを形成した
のち、エープロセス(メルテックス社製のエッチャン
ト)を用いて、表層部の基体銅箔のみを選択的にエッチ
ング除去した。When a copper foil with a carrier is used, Cu: 70 g / dm 3 , H 2 S is formed on the exposed carrier copper foil.
Cu was electrodeposited to a thickness of about 18 μm using an electrolytic plating solution containing O 4 : 100 g / dm 3 and then the peel strength was measured. Then, after forming a mask again, the following secondary etching was performed. That is, after forming a mask in a state where a rectangular sheet-like resistance pattern is left and Cu electrode parts are left on both sides of the resistance pattern, the surface layer part is formed by using an A process (an etchant manufactured by Meltex Co., Ltd.). Only the base copper foil of No. 1 was selectively removed by etching.
【0066】その後、ディジタルマルチメータ(松下電
器産業社製)を用いて抵抗測定した。測定点はn=5と
し、その平均値をもって抵抗層のシート抵抗値とした。
また、測定抵抗の最大値と平均値の差を求め、その値の
平均値に対する百分率を算出してばらつきとした。以上
の結果を一括して表5,6に示した。Then, the resistance was measured using a digital multimeter (Matsushita Electric Industrial Co., Ltd.). The number of measurement points was n = 5, and the average value was used as the sheet resistance value of the resistance layer.
Further, the difference between the maximum value and the average value of the measured resistance was obtained, and the percentage of the value with respect to the average value was calculated as the variation. The above results are collectively shown in Tables 5 and 6.
【0067】[0067]
【表5】 [Table 5]
【0068】[0068]
【表6】 [Table 6]
【0069】実施例41〜68 基体銅箔として表7で示した各種の材料を用意した。Examples 41 to 68 Various materials shown in Table 7 were prepared as the base copper foil.
【0070】[0070]
【表7】 [Table 7]
【0071】ついで、これら試料の表面に、表8,9で
示したように、Ni単体,Ni−3%P,Ni−5%
P、およびNi−15%Pから成る各種導電性物質の抵
抗層を形成し、更にその表面に表8,9で示した表面処
理を施して各種の抵抗層付き銅箔を製造した。Then, on the surfaces of these samples, as shown in Tables 8 and 9, simple Ni, Ni-3% P, Ni-5% were used.
Resistive layers of various conductive materials composed of P and Ni-15% P were formed, and the surface treatments shown in Tables 8 and 9 were applied to the surfaces thereof to produce various copper foils with resistive layers.
【0072】[0072]
【表8】 [Table 8]
【0073】[0073]
【表9】 [Table 9]
【0074】これらの抵抗層付き銅箔とFR4基材とを
ラミネートしたのち、実施例1〜40と同じようにして
シート抵抗値,ピール強度などの特性を測定した。その
結果を表10に示した。After laminating the copper foil with the resistance layer and the FR4 substrate, the properties such as sheet resistance and peel strength were measured in the same manner as in Examples 1-40. The results are shown in Table 10.
【0075】[0075]
【表10】 [Table 10]
【0076】また、4種類の導電性物質から成る抵抗層
のそれぞれにつき、抵抗層の厚みとシート抵抗値との関
係を図13に示した。表1〜10および図13から次の
ことが明らかである。FIG. 13 shows the relationship between the resistance layer thickness and the sheet resistance value for each of the resistance layers made of four kinds of conductive materials. The following is clear from Tables 1 to 10 and FIG.
【0077】(1)実施例1と比較例1を対比して明ら
かなように、基体銅箔の表面粗さ(Rz)が3μmを下回
るとピール強度が低くなり、プリント回路基板としての
基本的な特性が満たされなくなる。逆に、基体銅箔の粗
面粗さが6μmより大きい比較例2,4は、充分に大き
なピール強度を示すが、2次エッチング時においてCu
の選択的なエッチングが劣り、そのため抵抗層の材料の
同時溶解も進み、シート抵抗値が本来の値よりも高くな
っている。このようなことから、用いた基体銅箔の表面
粗さはRz値で3〜6μmに設定すべきであることがわか
る。(1) As is clear from comparison between Example 1 and Comparative Example 1, when the surface roughness (Rz) of the base copper foil is less than 3 μm, the peel strength becomes low, which is a basic matter for a printed circuit board. It is no longer possible to satisfy various characteristics. On the contrary, Comparative Examples 2 and 4 in which the rough surface roughness of the base copper foil is larger than 6 μm show a sufficiently large peel strength, but Cu is not removed during the secondary etching.
Inferior in selective etching, the simultaneous dissolution of the material of the resistance layer also progresses, and the sheet resistance value becomes higher than the original value. From this, it is understood that the surface roughness of the base copper foil used should be set to 3 to 6 μm in Rz value.
【0078】(2)抵抗層の厚みが10mg/m2より薄
い比較例3の場合も、2次エッチング時に基体銅箔と抵
抗層の同時溶解が起こっている。逆に、抵抗層の厚みが
極端に厚い比較例5の場合は、1次エッチング時に基体
銅箔と抵抗層の同時溶解を実現することができない。こ
のような場合は、残存する抵抗層を更にエッチング除去
する工程が必要となり、生産性の低下や、形成パターン
の信頼性を招く。(2) In the case of Comparative Example 3 in which the thickness of the resistance layer is less than 10 mg / m 2 , the base copper foil and the resistance layer are simultaneously dissolved during the secondary etching. On the contrary, in Comparative Example 5 in which the resistance layer is extremely thick, it is not possible to simultaneously dissolve the base copper foil and the resistance layer during the primary etching. In such a case, a step of further removing the remaining resistance layer by etching is required, resulting in a decrease in productivity and reliability of the formed pattern.
【0079】(3)実施例4と実施例5,実施例8と実
施例9,実施例10と実施例11,実施例12と実施例
13,実施例14と実施例15,実施例16と実施例1
7の群におけるそれぞれの実施例を対比すると、前者は
いずれも抵抗層が単一成分で構成されているものであ
り、後者は抵抗層が主成分と副成分で構成されているも
のである。(3) Example 4 and Example 5, Example 8 and Example 9, Example 10 and Example 11, Example 12 and Example 13, Example 14 and Example 15, and Example 16 Example 1
Comparing the respective examples in the group of 7 with each other, in the former, the resistance layer is composed of a single component, and in the latter, the resistance layer is composed of a main component and a sub-component.
【0080】そして、両者はいずれも抵抗層の厚みは同
じであるが、互いのシート抵抗値は異なっている。その
場合、抵抗層の厚みが50mg/m2以上のときは、後者
の主成分と副成分を含む抵抗層の方が高いシート抵抗値
を示しており、逆に、抵抗層の厚みが40mg/m2以下
のときは、前者の単一成分から成る抵抗層の方が高いシ
ート抵抗値を示している。そして、抵抗層の厚みが薄く
なるにつれて、シート抵抗値が高くなることは両者とも
同じであるが、単一成分から成る抵抗層の場合は上記し
た傾向が顕著にあらわれている。また、実施例15と実
施例17は、抵抗層が主成分と副生部から成り、しかも
抵抗層の厚みが薄いものであるが、いずれも、2次エッ
チング時におけるCuの選択的エッチングは悪い。これ
は、副成分を含む抵抗層はCuのエッチャントに溶解し
やすいためであると考えられる。In both cases, the resistance layers have the same thickness, but their sheet resistance values are different. In that case, when the thickness of the resistance layer is 50 mg / m 2 or more, the latter resistance layer containing a main component and a sub-component shows a higher sheet resistance value, and conversely, the resistance layer has a thickness of 40 mg / m 2. At m 2 or less, the former resistance layer composed of a single component exhibits a higher sheet resistance value. The sheet resistance value increases as the thickness of the resistance layer decreases, which is the same in both cases. However, in the case of a resistance layer composed of a single component, the above-mentioned tendency is conspicuous. Further, in each of Example 15 and Example 17, the resistance layer was composed of the main component and the by-product, and the thickness of the resistance layer was thin, but in both cases, the selective etching of Cu during the secondary etching is bad. . It is considered that this is because the resistance layer containing the subcomponent is easily dissolved in the Cu etchant.
【0081】(4)抵抗層が副成分を含まず、しかもそ
の厚みが50mg/m2を大きく上まわって300mg/m2
である実施例1〜3は、基体銅箔の表面粗さが大きくな
るにつれて、シート抵抗値は大きくなる傾向を示してい
る。(4) The resistance layer contains no sub-ingredients, and its thickness is far above 50 mg / m 2 and 300 mg / m 2.
In Examples 1 to 3, the sheet resistance value tends to increase as the surface roughness of the base copper foil increases.
【0082】(5)実施例18は、2次エッチング時に
抵抗層の一部も溶解し、その結果、シート抵抗値のばら
つきが非常に大きくなっている。これは、抵抗層にCu
成分が1.2質量%含有されているからであることがわ
かる。このようなことから、抵抗層を構成する導電性物
質におけるCu含有率は1質量%以下に規制することが
好ましいことがわかる。(5) In Example 18, a part of the resistance layer was also dissolved during the secondary etching, and as a result, the variation in the sheet resistance value was extremely large. This is Cu for the resistance layer
It is understood that this is because the content of the component is 1.2% by mass. From this, it is understood that it is preferable to regulate the Cu content rate in the conductive material forming the resistance layer to 1% by mass or less.
【0083】(6)抵抗層がNi単体から成る実施例1
0と、更に各種の副成分が含まれている抵抗層を有する
実施例19〜24とを対比して明らかなように、抵抗層
の厚みを30mg/m2近辺に設定した場合、副成分の種
類と含有量によってシート抵抗値を変化させることがで
きる。また、実施例25〜33の場合のように主成分の
種類を変えても上記と同様の傾向が認められる。そし
て、実施例31,32のように、抵抗層を構成する導電
性物質の電気抵抗率が1μΩ・mより高い場合であって
も、抵抗層の厚みを変えることにより、高いシート抵抗
値が得られている。(6) Example 1 in which the resistance layer is made of Ni alone
0 and Examples 19 to 24 having a resistance layer further containing various sub-components, it is clear that when the thickness of the resistance layer is set to around 30 mg / m 2 , the sub-component The sheet resistance value can be changed depending on the type and content. Even when the types of main components are changed as in Examples 25 to 33, the same tendency as above is observed. Then, as in Examples 31 and 32, even when the electric resistivity of the conductive material forming the resistance layer is higher than 1 μΩ · m, a high sheet resistance value can be obtained by changing the thickness of the resistance layer. Has been.
【0084】(7)用いる基体銅箔の種類が異なる実施
例34〜39の場合も、上記したと同様の結果が得ら
れ、また、実施例4の場合も同様である。
(8)抵抗層付き銅箔に樹脂を形成して樹脂付き・抵抗
層付き銅箔とした実施例40の場合も、高いシート抵抗
値を有する抵抗層が得られている。
(9)抵抗層がNi単体から成る実施例41〜47の
群,抵抗層がNi−3%Pから成る実施例48〜54の
群,抵抗層がNi−5%Pから成り、その基体銅箔が粗
面化処理されている実施例55〜61の群,抵抗層がN
i−15%Pから成る実施例62〜68の群のいずれに
おいても、抵抗層の厚みが薄くなるにつれてシート抵抗
値は高くなっていく。とくに、抵抗層がNi単体から成
る実施例41〜47の群の場合、抵抗層の厚みが40mg
/m2以下になると、そのシート抵抗値が極端に変化し
ている。(7) In the cases of Examples 34 to 39 in which the type of the base copper foil used is different, the same results as described above are obtained, and the case of Example 4 is also the same. (8) Also in the case of Example 40 in which a resin was formed on the copper foil with a resistance layer to form a resin-coated copper foil with a resistance layer, a resistance layer having a high sheet resistance value was obtained. (9) The group of Examples 41 to 47 in which the resistance layer is made of Ni alone, the group of Examples 48 to 54 in which the resistance layer is made of Ni-3% P, and the resistance layer is made of Ni-5% P. The group of Examples 55 to 61 in which the foil is roughened, and the resistance layer is N
In each of the groups of Examples 62 to 68 made of i-15% P, the sheet resistance value becomes higher as the resistance layer becomes thinner. Particularly, in the case of the groups of Examples 41 to 47 in which the resistance layer was made of Ni alone, the resistance layer had a thickness of 40 mg.
When it is less than / m 2 , the sheet resistance value changes extremely.
【0085】これに反し、副成分であるP成分を含む他
の群においては、実施例41〜47の群に比べると、シ
ート抵抗値は大幅に低くなっているが、抵抗層が薄くな
ってもシート抵抗値の変化量は少ない。この傾向はP成
分が増量するにつれて強くあらわれている。しかし、P
成分が多く成りすぎると、実施例62〜68の群で明ら
かなように、シート抵抗値は低くなり、高抵抗の抵抗層
を形成できなくなる。また、実施例67,68から明ら
かなように、これらの群の場合、抵抗層が薄くなると、
2次エッチング時にCuと同時溶解する傾向が認められ
る。On the contrary, in the other group containing the P component as the accessory component, the sheet resistance value was significantly lower than that of the groups of Examples 41 to 47, but the resistance layer was thin. However, the amount of change in sheet resistance is small. This tendency strongly appears as the amount of P component increases. But P
If the amount of the component is too large, as is clear from the groups of Examples 62 to 68, the sheet resistance value becomes low and it becomes impossible to form a high resistance layer. Further, as is clear from Examples 67 and 68, in the case of these groups, when the resistance layer becomes thin,
At the time of the secondary etching, the tendency of simultaneous dissolution with Cu is recognized.
【0086】このように、設計目的のシート抵抗値の大
小によっては、主成分と副成分を含む導電性物質で抵抗
層を形成する方が、当該抵抗値の制御が可能であるとい
う利点がある。ただし、厳しいエッチング条件下ではC
uとの同時溶解を防ぐために、副成分の含有量は微量に
とどめるということが必要になる。そして、図13から
も明らかなようにシート抵抗値を1kΩ/sq以上の高抵
抗にするためには、P成分の量を、3質量%以下におい
て調節して高い抵抗値で制御することも可能である。As described above, depending on the size of the sheet resistance value for design purposes, it is advantageous to form the resistance layer with a conductive material containing a main component and a subcomponent because the resistance value can be controlled. . However, under severe etching conditions, C
In order to prevent simultaneous dissolution with u, it is necessary to keep the content of subcomponents to a very small amount. Then, as is clear from FIG. 13, in order to make the sheet resistance value as high as 1 kΩ / sq or more, the amount of the P component can be adjusted to 3% by mass or less and controlled at a high resistance value. Is.
【0087】(10)実施例3,34,41,45,4
8,50,59,63,67からも明らかなように、表
面処理は、製造した抵抗層付き銅箔に影響を与えていな
い。(10) Examples 3, 34, 41, 45, 4
As is clear from 8, 50, 59, 63 and 67, the surface treatment does not affect the produced copper foil with a resistance layer.
【0088】[0088]
【発明の効果】以上の説明で明らかなように、本発明の
抵抗層付き銅箔は、そのシート抵抗値が従来に比べて大
幅に高く、しかも広範囲の値となっていて、かつ2次エ
ッチング時においても導体回路になる基体銅箔と同時溶
解することが起こりづらい。したがって、この抵抗層付
き銅箔と絶縁基材をラミネートすることにより、高抵抗
の抵抗回路を内蔵するプリント回路基板を製造すること
ができる。As is apparent from the above description, the copper foil with a resistance layer of the present invention has a sheet resistance value which is much higher than that of the conventional one, and has a wide range of values, and the secondary etching. Even at times, it is unlikely that it will melt simultaneously with the base copper foil that will become the conductor circuit. Therefore, by laminating the copper foil with the resistance layer and the insulating base material, it is possible to manufacture a printed circuit board having a built-in resistance circuit of high resistance.
【0089】そして、抵抗層の形成に際しては、電気抵
抗率が0.05〜2μΩ・mの電析可能な導電性物質の
1種または2種を設計目的のシート抵抗値との関係で用
い、しかも2種類を用いる場合には、その副成分の量を
調整することにより、抵抗値制御が可能となる。したが
って、この抵抗層付き銅箔を用いて製造したプリント回
路基板では、実装部品の面積の多くを占めるチップ抵抗
器などの使用を大幅に低減することができ、高密度実装
とその信頼性の向上を実現することができる。When forming the resistance layer, one or two kinds of electro-depositable conductive substances having an electric resistivity of 0.05 to 2 μΩ · m are used in relation to the sheet resistance value for design purposes. Moreover, when two types are used, the resistance value can be controlled by adjusting the amount of the subcomponent. Therefore, in a printed circuit board manufactured using this copper foil with a resistance layer, it is possible to significantly reduce the use of chip resistors, which occupy most of the area of mounted components, and to improve high-density mounting and its reliability. Can be realized.
【0090】しかも、この抵抗層付き銅箔は、従来から
使用されているプリント回路用銅箔の表面に抵抗層を形
成したものであるため、低コストであり、また高い生産
性の下で製造することができ、その工業的価値は極めて
大である。Moreover, since the copper foil with a resistance layer has a resistance layer formed on the surface of a conventionally used copper foil for a printed circuit, it is low in cost and manufactured under high productivity. Can be done, and its industrial value is extremely high.
【図1】本発明の抵抗層付き銅箔の一例Aを示す断面図
である。FIG. 1 is a cross-sectional view showing an example A of a copper foil with a resistance layer of the present invention.
【図2】本発明の抵抗層付き銅箔の一例Bを示す断面図
である。FIG. 2 is a cross-sectional view showing an example B of a copper foil with a resistance layer of the present invention.
【図3】本発明の抵抗層付き銅箔の一例A1を示す断面
図である。FIG. 3 is a cross-sectional view showing an example A 1 of the copper foil with a resistance layer of the present invention.
【図4】本発明の抵抗層付き銅箔の一例B1を示す断面
図である。FIG. 4 is a sectional view showing an example B 1 of the copper foil with a resistance layer of the present invention.
【図5】本発明の抵抗層付き銅箔の一例A2を示す断面
図である。FIG. 5 is a cross-sectional view showing an example A 2 of the copper foil with a resistance layer of the present invention.
【図6】本発明の抵抗層付き銅箔で用いる基体銅箔の一
例1Aを示す断面図である。FIG. 6 is a cross-sectional view showing an example 1A of a base copper foil used in the copper foil with a resistance layer of the present invention.
【図7】本発明の抵抗層付き銅箔で用いる基体銅箔の一
例1Bを示す断面図である。FIG. 7 is a cross-sectional view showing an example 1B of a base copper foil used in the copper foil with a resistance layer of the present invention.
【図8】本発明の抵抗層付き銅箔で用いる基体銅箔の一
例1Cを示す断面図である。FIG. 8 is a cross-sectional view showing an example 1C of a base copper foil used in the copper foil with a resistance layer of the present invention.
【図9】本発明の抵抗層付き銅箔で用いる基体銅箔の一
例1Dを示す断面図である。FIG. 9 is a sectional view showing an example 1D of a base copper foil used in the copper foil with a resistance layer of the present invention.
【図10】本発明の抵抗層付き銅箔で用いる基体銅箔の
一例1Eを示す断面図である。FIG. 10 is a cross-sectional view showing an example 1E of a base copper foil used in the copper foil with a resistance layer of the present invention.
【図11】本発明の抵抗層付き銅箔で用いる基体銅箔の
一例1Fを示す断面図である。FIG. 11 is a cross-sectional view showing an example 1F of a base copper foil used in the copper foil with a resistance layer of the present invention.
【図12】本発明の抵抗層付き銅箔で用いる基体銅箔の
一例1Gを示す断面図である。FIG. 12 is a cross-sectional view showing an example 1G of a base copper foil used in the copper foil with a resistance layer of the present invention.
【図13】抵抗層の厚みとシート抵抗値との関係を示す
グラフである。FIG. 13 is a graph showing the relationship between the resistance layer thickness and the sheet resistance value.
【符号の説明】 1,8 基体銅箔または回路形成用のCu導体層 1a 基体銅箔1の粗面 1b 基体銅箔1の平滑面 2 抵抗層 3 表面処理層 4 絶縁樹脂層または接着剤層 5 粗化層 6 キャリア銅箔 6a キャリア銅箔6の粗面 6b キャリア銅箔6の平滑面 7 剥離層 9 耐熱剥離層またはレーザ吸収層[Explanation of symbols] 1,8 Base copper foil or Cu conductor layer for circuit formation 1a Rough surface of base copper foil 1 1b Smooth surface of base copper foil 1 2 Resistance layer 3 Surface treatment layer 4 Insulating resin layer or adhesive layer 5 roughening layer 6 Carrier copper foil 6a Carrier copper foil 6 rough surface 6b Carrier copper foil 6 smooth surface 7 Release layer 9 Heat-resistant release layer or laser absorption layer
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Claims (16)
抗層付き銅箔であって、少なくとも一方の片面がJIS
B 0601で規定する10点平均粗さ(Rz)で3〜
6μmの表面粗さになっている基体銅箔の前記片面また
は他方の片面に、電気抵抗率が0.05〜2μΩ・mで
ある導電性物質から成る抵抗層が10〜300mg/m2
の厚みで形成されていることを特徴とする抵抗層付き銅
箔。1. A copper foil with a resistance layer, which is used by laminating it with an insulating base material, at least one surface of which is JIS
10 point average roughness (Rz) specified by B 0601 is 3 to
On one or the other surface of the base copper foil having a surface roughness of 6 μm, a resistance layer made of a conductive material having an electric resistivity of 0.05 to 2 μΩ · m is provided in an amount of 10 to 300 mg / m 2.
A copper foil with a resistance layer, which is formed with the thickness of.
一成分を含み、残部は不可避的不純物または1質量%未
満のCu成分を含んでいる請求項1の抵抗層付き銅箔。2. The copper foil with a resistance layer according to claim 1, wherein the conductive material contains 98% by mass or more of a single component, and the balance contains inevitable impurities or less than 1% by mass of a Cu component.
はBiのいずれか1種である請求項2の抵抗層付き銅
箔。3. The copper foil with a resistance layer according to claim 2, wherein the single component is any one of Ni, Co, Pd and Bi.
成分と3質量%以下の副成分を含み、残部は不可避的不
純物と1質量%未満のCu成分を含んでいる請求項1の
抵抗層付き銅箔。4. The conductive material according to claim 1, wherein the conductive material contains 95% by mass or more of a main component and 3% by mass or less of a secondary component, and the balance contains unavoidable impurities and less than 1% by mass of a Cu component. Copper foil with resistance layer.
はWのいずれか1種である請求項4の抵抗層付き銅箔。5. The copper foil with a resistance layer according to claim 4, wherein the subcomponent is any one of P, B, Pd, Bi and W.
であり、絶縁基材にラミネートしたのちに前記基体銅箔
のみを選択的にエッチング除去して残存する前記抵抗層
のシート抵抗値が1kΩ/sq〜1MΩ/sqである請求項1
〜5のいずれかの抵抗層付き銅箔。6. The resistance layer has a thickness of 10 to 50 mg / m 2.
The sheet resistance value of the resistance layer remaining after selective etching and removal of only the base copper foil after being laminated on an insulating base material is 1 kΩ / sq to 1 MΩ / sq.
Copper foil with a resistance layer according to any one of ~ 5.
に対して±5%の範囲内にある請求項1〜6のいずれか
の抵抗層付き銅箔。7. The copper foil with a resistance layer according to claim 1, wherein the variation of the sheet resistance value is within ± 5% with respect to the average value.
〜7のいずれかの抵抗層付き銅箔。8. The resistance layer is formed by electrodeposition.
Copper foil with a resistance layer according to any one of to 7.
される表面は、粗面化処理が施されていない表面である
請求項1〜8のいずれかの抵抗層付き銅箔。9. The copper foil with a resistance layer according to claim 1, wherein the surface of the base copper foil on which the resistance layer is formed is a surface that has not been roughened.
り、回路形成用のCu導体層の上に前記抵抗層が形成さ
れている請求項1〜9のいずれかの抵抗層付き銅箔。10. The copper foil with a resistance layer according to claim 1, wherein the base copper foil is a copper foil with a carrier, and the resistance layer is formed on a Cu conductor layer for forming a circuit.
ている請求項1〜10のいずれかの抵抗層付き銅箔。11. The copper foil with a resistance layer according to claim 1, wherein the base copper foil comprises a laser absorption layer.
り、回路形成用のCu導体層の上に前記抵抗層が形成さ
れ、かつ、前記キャリアと前記Cu導体層の間には、剥
離層とレーザ吸収層が介装されている請求項1〜11の
いずれかの抵抗層付き銅箔。12. The base copper foil is a copper foil with a carrier, the resistance layer is formed on a Cu conductor layer for forming a circuit, and a peeling layer is provided between the carrier and the Cu conductor layer. A copper foil with a resistance layer according to any one of claims 1 to 11, wherein a laser absorption layer is interposed.
ミネート用の表面処理層が形成されている請求項1〜1
2のいずれかの抵抗層付き銅箔。13. A surface treatment layer for rust prevention or laminating with an insulating substrate is formed on both surfaces.
Copper foil with a resistance layer of any one of 2.
ロメート処理層,シランカップリング処理層の1種また
は2種以上の層である請求項13の抵抗層付き銅箔。14. The copper foil with a resistance layer according to claim 13, wherein the surface treatment layer is one or more layers of a Zn plating layer, a chromate treatment layer, and a silane coupling treatment layer.
ジもしくは半硬化状態の絶縁樹脂層、または接着剤層が
形成されている請求項1〜14のいずれかの抵抗層付き
銅箔。15. The copper foil with a resistance layer according to claim 1, further comprising a B-stage or semi-cured insulating resin layer or an adhesive layer formed on the resistance layer.
抵抗層を電析で形成する際に、電解めっき液として、前
記導電性物質のイオンを含み、かつ、塩素イオン濃度が
10ppm以下、Cuイオン濃度が20ppm以下である水溶
液を用いることを特徴とする抵抗層付き銅箔の製造方
法。16. When forming a resistance layer made of a conductive substance on the surface of a base copper foil by electrodeposition, the electrolytic plating solution contains ions of the conductive substance and has a chlorine ion concentration of 10 ppm or less, A method for producing a copper foil with a resistance layer, which comprises using an aqueous solution having a Cu ion concentration of 20 ppm or less.
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JP2001401407A JP4257632B2 (en) | 2001-12-28 | 2001-12-28 | Copper foil with resistance layer and manufacturing method thereof |
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JP2001401407A JP4257632B2 (en) | 2001-12-28 | 2001-12-28 | Copper foil with resistance layer and manufacturing method thereof |
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JP4257632B2 JP4257632B2 (en) | 2009-04-22 |
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Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009177180A (en) * | 2008-01-25 | 2009-08-06 | Ls Mtron Ltd | Resistor lamination conductor for print circuit board and its production method, and printed circuit board |
JP2010006071A (en) * | 2009-08-21 | 2010-01-14 | Furukawa Electric Co Ltd:The | Surface treatment copper foil, extremely thin copper foil with carrier, flexible copper clad laminate, and polyimide based flexible printed wiring board |
JP2011119611A (en) * | 2009-12-07 | 2011-06-16 | Furukawa Electric Co Ltd:The | Injection-molded substrate and injection-molded component |
JP2011162860A (en) * | 2010-02-12 | 2011-08-25 | Furukawa Electric Co Ltd:The | Surface-roughened copper foil, method of producing the same and copper-clad laminate plate |
KR101224034B1 (en) * | 2010-05-03 | 2013-01-18 | 엘에스엠트론 주식회사 | Copper foil for printed circuit and Fabrication method thereof |
-
2001
- 2001-12-28 JP JP2001401407A patent/JP4257632B2/en not_active Expired - Fee Related
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009177180A (en) * | 2008-01-25 | 2009-08-06 | Ls Mtron Ltd | Resistor lamination conductor for print circuit board and its production method, and printed circuit board |
JP2010006071A (en) * | 2009-08-21 | 2010-01-14 | Furukawa Electric Co Ltd:The | Surface treatment copper foil, extremely thin copper foil with carrier, flexible copper clad laminate, and polyimide based flexible printed wiring board |
JP2011119611A (en) * | 2009-12-07 | 2011-06-16 | Furukawa Electric Co Ltd:The | Injection-molded substrate and injection-molded component |
JP2011162860A (en) * | 2010-02-12 | 2011-08-25 | Furukawa Electric Co Ltd:The | Surface-roughened copper foil, method of producing the same and copper-clad laminate plate |
KR101224034B1 (en) * | 2010-05-03 | 2013-01-18 | 엘에스엠트론 주식회사 | Copper foil for printed circuit and Fabrication method thereof |
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