JP2009177180A - Resistor lamination conductor for print circuit board and its production method, and printed circuit board - Google Patents
Resistor lamination conductor for print circuit board and its production method, and printed circuit board Download PDFInfo
- Publication number
- JP2009177180A JP2009177180A JP2009012139A JP2009012139A JP2009177180A JP 2009177180 A JP2009177180 A JP 2009177180A JP 2009012139 A JP2009012139 A JP 2009012139A JP 2009012139 A JP2009012139 A JP 2009012139A JP 2009177180 A JP2009177180 A JP 2009177180A
- Authority
- JP
- Japan
- Prior art keywords
- resistance
- printed circuit
- circuit board
- chromium
- laminated conductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
- H05K1/167—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed resistors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10196—Variable component, e.g. variable resistor
Abstract
Description
本発明は、印刷回路基板(PCB)用導電体に関し、より詳しくは、印刷回路基板に埋め込み(embedded)抵抗を形成するために、銅箔に薄膜の抵抗層が設けられた構造を持つ印刷回路基板用抵抗積層導電体及びその製造方法、並びに印刷回路基板に関する。 The present invention relates to a printed circuit board (PCB) conductor, and more particularly, to a printed circuit having a structure in which a thin-film resistance layer is provided on a copper foil in order to form an embedded resistance in the printed circuit board. The present invention relates to a resistance laminated conductor for a substrate, a manufacturing method thereof, and a printed circuit board.
近年、各種携帯用電子機器などに使われる印刷回路基板は、素子の高速動作や高密度化、機器の小型化などを実現するために回路配線や部品が埋込型で構成される傾向を見せている。 In recent years, printed circuit boards used in various portable electronic devices have a tendency to be embedded in circuit wiring and components in order to realize high-speed operation and high density of elements and downsizing of devices. ing.
埋込型の印刷回路基板は、抵抗やキャパシタなど受動部品と集積回路(IC)などが基板自体に内蔵されて占有面積と信号干渉などを低減できる長所を持つ次世代製品であり、軽薄短小化されるIT関連製品に有用に適用することができる。特に、印刷回路基板に埋め込み抵抗が形成された場合には、従来の表面実装型の抵抗が実装される位置に他の部品を配置できるため、基板の利用効率を高めることができるという長所がある。 Embedded printed circuit boards are next-generation products that have the advantage that passive components such as resistors and capacitors and integrated circuits (ICs) are built into the board itself, reducing the occupied area and signal interference. It can be usefully applied to IT related products. In particular, when an embedded resistor is formed on a printed circuit board, other components can be arranged at a position where a conventional surface-mount resistor is mounted, so that the use efficiency of the substrate can be improved. .
印刷回路基板に埋め込み抵抗を形成するための技術として、従来は旭化学工業の炭素系埋め込みペーストを塗布する方法が広く使われた。これに関する技術としては、韓国特許公開第2007‐77823号(埋め込み抵抗を備える印刷回路基板及びその製造方法)()公報が挙げられる。 As a technique for forming an embedded resistor on a printed circuit board, a method of applying a carbon-based embedded paste of Asahi Chemical Industry has been widely used. As a technique related to this, Korean Patent Publication No. 2007-77823 (a printed circuit board having embedded resistors and a method for manufacturing the same) () is cited.
ところが、埋め込みペーストを使う場合には、抵抗偏差と抵抗変化率が大きく、適用可能な印刷回路基板製品の仕様が制限的であるという短所がある。埋め込み抵抗の抵抗偏差が大きくなり過ぎると、局所的に抵抗値が小さくなり過ぎるか又は大きくなり過ぎ、所望の製品特性を具現することができず、抵抗変化率が大きければ、製品設計が困難である。 However, when the embedded paste is used, there is a disadvantage that the resistance deviation and the resistance change rate are large, and the specification of the applicable printed circuit board product is limited. If the resistance deviation of the embedded resistor becomes too large, the resistance value will be too small or too large locally, and the desired product characteristics cannot be realized, and if the resistance change rate is large, product design will be difficult. is there.
近年、米国のGould社から抵抗偏差と抵抗変化率が小さい薄膜型導電体が市販され、これを用いた埋め込みPCBが量産されている。しかし、この製品の場合には、表面抵抗が数十Ω/sqare(以下、「Ω/sq」と記載する)程度に過ぎない低抵抗を持つように構成された特性上、モバイル機器などに必須に使われる高低抗体の形成が不可能であるという短所がある。このように抵抗値が小さ過ぎれば、抵抗層がその役割を十分果たすことができない。一方、埋め込み抵抗の抵抗値が大き過ぎる場合には、発熱量が大きく回路損傷の危険があるため、適正抵抗値以内で表面抵抗の設計が行われねばならない。 In recent years, a thin-film conductor with a small resistance deviation and resistance change rate is commercially available from Gould, Inc. of the United States, and embedded PCBs using this are mass-produced. However, in the case of this product, the surface resistance is indispensable for mobile devices due to the characteristic that it has a low resistance that is only about several tens of Ω / square (hereinafter referred to as “Ω / sq”). However, there is a disadvantage that it is impossible to form high and low antibodies. Thus, if the resistance value is too small, the resistance layer cannot sufficiently fulfill its role. On the other hand, if the resistance value of the embedded resistor is too large, the amount of heat generation is large and there is a risk of circuit damage. Therefore, the surface resistance must be designed within an appropriate resistance value.
本発明は、前述したような問題点に鑑みて創案されたものであり、汎用的に埋め込み抵抗値を設計できるように抵抗層の表面抵抗、抵抗偏差、及び抵抗変化率などが最適化された印刷回路基板用抵抗積層導電体及びその製造方法、並びに印刷回路基板を提供することを目的とある。 The present invention was devised in view of the above-mentioned problems, and the surface resistance, resistance deviation, resistance change rate, etc. of the resistance layer were optimized so that the embedded resistance value can be designed for general use. An object of the present invention is to provide a resistance laminated conductor for a printed circuit board, a manufacturing method thereof, and a printed circuit board.
前述したような目的を達成するために、本発明は、銅箔と、該銅箔の一面に備えられた抵抗層とを含む印刷回路基板用抵抗積層導電体において、前記抵抗層は、熱処理後の表面抵抗が20〜200Ω/sq、熱処理後の表面抵抗の偏差が5%以下、熱処理前後の抵抗変化率が3%以下であり、不純物として硫黄(S)、炭素(C)、酸素(O)、及び鉄(Fe)のうち選択されたいずれか1つまたは2つ以上を原子総量基準で5000ppm以下含み、前記不純物の偏差が20%未満であり、厚さ偏差が5%以下であることを特徴とする印刷回路基板用抵抗積層導電体を開示する。 In order to achieve the above-described object, the present invention provides a resistance laminated conductor for a printed circuit board including a copper foil and a resistance layer provided on one surface of the copper foil. The surface resistance is 20 to 200Ω / sq, the deviation of the surface resistance after heat treatment is 5% or less, the rate of change in resistance before and after heat treatment is 3% or less, and sulfur (S), carbon (C), oxygen (O ) And any one or more selected from iron (Fe) in an amount of 5000 ppm or less based on the total atomic amount, the deviation of the impurities is less than 20%, and the thickness deviation is 5% or less. A resistive laminated conductor for printed circuit boards is disclosed.
前記抵抗層は、ニッケル(Ni)、クロム(Cr)、アルミニウム(Al)、及びケイ素(Si)のうち選択されたいずれか1つまたは2つ以上からなり得る。 The resistance layer may be made of any one or more selected from nickel (Ni), chromium (Cr), aluminum (Al), and silicon (Si).
代案として、前記抵抗層はニッケル(Ni)‐クロム(Cr)、ニッケル(Ni)‐クロム(Cr)‐アルミニウム(Al)‐ケイ素(Si)、またはクロム(Cr)‐酸化ケイ素(SiO2)合金層からなり得る。 Alternatively, the resistive layer may be nickel (Ni) -chromium (Cr), nickel (Ni) -chromium (Cr) -aluminum (Al) -silicon (Si), or chromium (Cr) -silicon oxide (SiO 2 ) alloy. It can consist of layers.
前記印刷回路基板用抵抗積層導電体には、シラン層がさらに備えられることが望ましい。 The resistive laminated conductor for a printed circuit board may further include a silane layer.
本発明の他の態様によれば、電解銅箔を用意するステップと、真空スパッタリングを用いて前記電解銅箔の一面に抵抗物質を蒸着して抵抗層を設けるステップと、を含む印刷回路基板用抵抗積層導電体の製造方法が提供される。 According to another aspect of the present invention, for a printed circuit board, comprising: preparing an electrolytic copper foil; and depositing a resistive layer on one surface of the electrolytic copper foil using vacuum sputtering. A method of manufacturing a resistive laminated conductor is provided.
本発明のさらに他の態様によれば、ベース基板と、該ベース基板に埋め込まれ、銅箔及び該銅箔に積層された抵抗層を備えた抵抗積層導電体と、を含む印刷回路基板において、前記抵抗層は、熱処理後の表面抵抗が20〜200Ω/sq、熱処理後の表面抵抗の偏差が5%以下、熱処理前後の抵抗変化率が3%以下であり、不純物として硫黄(S)、炭素(C)、酸素(O)、及び鉄(Fe)のうち選択されたいずれか1つまたは2つ以上を原子総量基準で5000ppm以下含み、前記不純物の偏差が20%未満であり、厚さ偏差が5%以下であることを特徴とする印刷回路基板が提供される。 According to still another aspect of the present invention, in a printed circuit board comprising: a base substrate; and a resistance laminated conductor that is embedded in the base substrate and includes a copper foil and a resistance layer laminated on the copper foil. The resistance layer has a surface resistance after heat treatment of 20 to 200Ω / sq, a deviation of surface resistance after heat treatment of 5% or less, a rate of change in resistance before and after heat treatment of 3% or less, and sulfur (S), carbon as impurities One or more selected from (C), oxygen (O), and iron (Fe) are contained in an amount of 5000 ppm or less based on the total atomic amount, the deviation of the impurities is less than 20%, and the thickness deviation Is 5% or less, a printed circuit board is provided.
本発明によれば、抵抗層のエッチング性、抵抗加工性、及びクラック発生防止性に優れた印刷回路基板用抵抗積層導電体が提供される。よって、設計が自在であって幅広い仕様の印刷回路基板製品に適用可能な埋め込み抵抗を実現することができる。 ADVANTAGE OF THE INVENTION According to this invention, the resistance laminated conductor for printed circuit boards excellent in the etching property of a resistance layer, resistance workability, and crack generation prevention property is provided. Therefore, it is possible to realize an embedded resistor that can be designed and applied to printed circuit board products having a wide range of specifications.
本明細書に添付される次の図面は、本発明の望ましい実施例を例示するものであり、発明の詳細な説明とともに本発明の技術的な思想をさらに理解させる役割をするため、本発明は図面に記載された事項だけに限定されて解釈されてはならない。
以下、添付された図面を参照して本発明の望ましい実施例を詳しく説明する。これに先立ち、本明細書及び請求範囲に使われた用語や単語は通常的や辞書的な意味に限定して解釈されてはならず、発明者自らは発明を最善の方法で説明するために用語の概念を適切に定義できるという原則に則して本発明の技術的な思想に応ずる意味及び概念で解釈されねばならない。 Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. Prior to this, the terms and words used in this specification and claims should not be construed to be limited to ordinary or lexicographic meanings, and the inventor himself should explain the invention in the best possible manner. It must be interpreted with the meaning and concept corresponding to the technical idea of the present invention in accordance with the principle that the term concept can be appropriately defined.
したがって、本明細書に記載された実施例及び図面に示された構成は、本発明のもっとも望ましい一実施例に過ぎず、本発明の技術的な思想のすべてを代弁するものではないため、本出願の時点においてこれらに代替できる多様な均等物及び変形例があり得ることを理解せねばならない。 Therefore, the configuration described in the embodiments and drawings described in this specification is only the most preferable embodiment of the present invention, and does not represent all of the technical idea of the present invention. It should be understood that there are various equivalents and variations that can be substituted at the time of filing.
図1は、本発明の望ましい実施例による印刷回路基板用抵抗積層導電体の構成を示した斜視図である。 FIG. 1 is a perspective view illustrating a configuration of a resistive laminated conductor for a printed circuit board according to a preferred embodiment of the present invention.
図1を参照すれば、印刷回路基板用抵抗積層導電体は、銅箔101と、銅箔101の一面に設けられた抵抗層102とを含む。図示されてはいないが、銅箔101上には銅箔101に接着される所定フィルムとの接着力を向上させるためにシラン層がさらに設けられ得る。
Referring to FIG. 1, the resistive laminated conductor for a printed circuit board includes a
銅箔101は、一般的な電解銅箔の製造工程で製造された電解銅箔の形態で提供され、その厚さは12〜70μmであることが望ましい。
The
抵抗層102は、銅箔101の一面に抵抗物質が蒸着されることで形成される。ここで、抵抗物質としてはニッケル(Ni)、クロム(Cr)、アルミニウム(Al)、及びケイ素(Si)のうち選択されたいずれか1つまたは2つ以上が採択されることができ、より望ましくはニッケル(Ni)‐クロム(Cr)、ニッケル(Ni)‐クロム(Cr)‐アルミニウム(Al)‐ケイ素(Si)、またはクロム(Cr)‐酸化ケイ素(SiO2)合金が採択され得る。銅箔101の厚さを考慮すると、抵抗層102の厚さは100〜2000Åであることが望ましい。
The
抵抗層102は、所定熱処理後の表面抵抗が20〜200Ω/sqであり、熱処理後の表面抵抗の偏差が5%以下であり、熱処理前後の抵抗変化率が3%以下である物性を持つ。ここで、熱処理条件としては、温度85°C、相対湿度85RH%で1000時間保持することで定められ得る。
The
抵抗層102の表面抵抗は、通常の表面抵抗測定用4ポイントプローブ(4point probe)を用いて、40ポイント以上表面抵抗値を測定した平均値で決められることが望ましい。抵抗偏差は、40ポイント以上表面抵抗値を測定したデータのうち、最大値をMax、最小値をMinとしたとき、算式((Max−Min)/(Max+Min))×100によって算出される。また、抵抗変化率は抵抗層102に対する熱処理の前と後の表面抵抗をそれぞれRS1、RS2とするとき、算式((R S2−RS1)/RS1)×100によって算出される。
The surface resistance of the
抵抗層102には、不純物として硫黄(S)、炭素(C)、酸素(O)、及び鉄(Fe)のうち選択されたいずれか1つまたは2つ以上が原子総量基準で5000ppm以下含まれ、このときの不純物偏差は20%未満になる。ここで、不純物の含量は通常のICP M/S機器を用いて5ポイントを測定した後、その平均値を求めて決められる。また、不純物偏差はICP M/S機器を用いた定量分析時に、測定したデータのうち最大値をMax、最小値をMinとしたとき、算式((Max−Min)/(Max+Min))×100によって算出される。
The
なお、抵抗層102の厚さ偏差は5%以下である。ここで、厚さ偏差は抵抗積層導電体の断面を研磨(polishing)した後、厚さを測定することで算出される。
The thickness deviation of the
以上のような数値範囲を満たす抵抗積層導電体は、抵抗層102のエッチング性、抵抗加工性、クラック発生防止性などに優れ、埋め込み抵抗値の設計が自在であって加工中不良発生率を減らすことができる。
The resistance laminated conductor satisfying the numerical range as described above is excellent in the etching property, resistance workability, crack generation prevention property, etc. of the
前述したような構成を持つ印刷回路基板用抵抗積層導電体は、ニッケル(Ni)‐クロム(Cr)ターゲットなどを備えた真空スパッタを用いて電解銅箔の一面にニッケル(Ni)‐クロム(Cr)物質を蒸着することで製造される。 The resistive laminated conductor for printed circuit boards having the above-described configuration is obtained by using nickel (Ni) -chromium (Cr) on one surface of an electrolytic copper foil using vacuum sputtering including a nickel (Ni) -chromium (Cr) target. ) Manufactured by vapor deposition of material.
蒸着工程において、ターゲットの種類や真空度、スパッタに印加される電圧及び電流条件を制御すれば、抵抗層物質の蒸着比率、表面抵抗値、抵抗偏差、抵抗変化率、厚さ偏差、不純物含量、不純物偏差などを調節することができる。 In the deposition process, if the target type and degree of vacuum, the voltage and current conditions applied to the sputtering are controlled, the deposition ratio of the resistance layer material, surface resistance, resistance deviation, resistance change rate, thickness deviation, impurity content, Impurity deviation can be adjusted.
前記抵抗層物質は、ニッケル(Ni)、クロム(Cr)、アルミニウム(Al)、及びケイ素(Si)のうち選択されたいずれか1つまたは2つ以上が採用されるか、あるいはニッケル(Ni)‐クロム(Cr)、ニッケル(Ni)‐クロム(Cr)‐アルミニウム(Al)‐ケイ素(Si)、またはクロム(Cr)‐酸化ケイ素(SiO2)合金が採用され得る。 The resistance layer material may be one or more selected from nickel (Ni), chromium (Cr), aluminum (Al), and silicon (Si), or nickel (Ni). -Chromium (Cr), nickel (Ni) -chromium (Cr) -aluminum (Al) -silicon (Si), or chromium (Cr) -silicon oxide (SiO2) alloys may be employed.
電解銅箔に抵抗層を形成した後には、前記抵抗層または電解銅箔の他面にシラン層を形成する工程がさらに行われ得る。 After the resistance layer is formed on the electrolytic copper foil, a step of forming a silane layer on the other surface of the resistance layer or the electrolytic copper foil may be further performed.
本発明によって製造された抵抗積層導電体は、例えば図2に示されたような形態で加工されて印刷回路基板に適用される。すなわち、抵抗積層導電体は、その抵抗層102がベース基板100上に付着され、後続工程で埋め込まれることで印刷回路基板の埋め込み抵抗及び回路配線を提供する。なお、抵抗積層導電体の形態が図面に示されたものに限定されず、多様なパターンに設計できることは勿論である。
The resistance laminated conductor manufactured by the present invention is processed in the form as shown in FIG. 2 and applied to a printed circuit board. That is, the resistive laminated conductor provides the embedded resistance and circuit wiring of the printed circuit board by having the
表1は、本発明の実施例及び比較例による印刷回路基板用抵抗積層導電体の抵抗層特性を測定した結果を示した表である。 表1には、本発明の実施例及び比較例に対して印刷回路基板用抵抗積層導電体の抵抗層特性を測定した結果が示されている。表1において、エッチング性の判断は、印刷回路基板を製作するときに必須に行われるエッチング工程以後に、ニッケル(Ni)‐クロム(Cr)抵抗層のエッチングが円滑に行われず、プリプレグ基板上に残渣があるか否かをもって行った。また、抵抗加工性は抵抗値を精密調整するためにレーザー加工工程を適用できるか否かで判断し、抵抗層クラック発生防止特性は印刷回路基板の製造工程中に高温、高圧に露出したニッケル(Ni)‐クロム(Cr)薄膜抵抗層の表面に発生するクラックを抑制できるか否かで判断した。 Table 1 is a table showing the results of measuring the resistance layer characteristics of the resistive laminated conductor for printed circuit boards according to the examples and comparative examples of the present invention. Table 1 shows the results of measuring the resistance layer characteristics of the resistive laminated conductor for printed circuit boards with respect to Examples and Comparative Examples of the present invention. In Table 1, the determination of the etching property is that the nickel (Ni) -chromium (Cr) resistance layer is not smoothly etched after the etching process which is essential when the printed circuit board is manufactured, and the etching is performed on the prepreg substrate. This was done with or without residue. The resistance processability is judged by whether or not a laser processing process can be applied to precisely adjust the resistance value. The resistance layer cracking prevention characteristic is nickel (exposed to high temperature and high pressure during the manufacturing process of the printed circuit board). The judgment was made based on whether or not cracks generated on the surface of the Ni) -chromium (Cr) thin film resistance layer could be suppressed.
表1を参照すれば、本発明の実施例1ないし実施例13による印刷回路基板用抵抗積層導電体は、前述した抵抗層の要件を全て満たすことでエッチング性、抵抗加工性、及びクラック発生防止性が良好な特性を提供することを確認することができる。 Referring to Table 1, the resistance laminated conductor for a printed circuit board according to the first to thirteenth embodiments of the present invention satisfies all the requirements of the resistance layer described above, thereby preventing etching, resistance workability, and crack generation. It can be confirmed that the property provides good characteristics.
一方、表1において、比較例1ないし比較例16による印刷回路基板用抵抗積層導電体は、前述した抵抗層の要件のうち少なくとも1つを満たしていないため、エッチング性、抵抗加工性、あるいはクラック発生防止性が良くない結果を示している。 On the other hand, in Table 1, since the resistance laminated conductors for printed circuit boards according to Comparative Examples 1 to 16 do not satisfy at least one of the requirements for the resistance layer described above, etching resistance, resistance workability, or crack The results show that the prevention of occurrence is not good.
以下、比較例を説明するが、熱処理が完了した抵抗層の表面抵抗が20〜200Ω/sqの上限又は下限から外れる比較例4、5、10及び12の場合には、抵抗加工性またはクラック発生防止性が低下することが確認できる。 Hereinafter, although a comparative example will be described, in the case of Comparative Examples 4, 5, 10 and 12 where the surface resistance of the resistance layer after the heat treatment is completed is out of the upper limit or lower limit of 20 to 200 Ω / sq, resistance workability or generation of cracks It can be confirmed that the prevention property is lowered.
抵抗層の熱処理後の抵抗偏差が5%を超過する比較例1、7及び13の場合には、エッチング性が低下することが確認できる。 In the case of Comparative Examples 1, 7, and 13 in which the resistance deviation after the heat treatment of the resistance layer exceeds 5%, it can be confirmed that the etching property is lowered.
抵抗層の熱処理後の厚さ偏差が5%を超過する比較例2及び9の場合には、エッチング性またはクラック発生防止性が低下することが確認できる。 In the case of Comparative Examples 2 and 9 in which the thickness deviation after the heat treatment of the resistance layer exceeds 5%, it can be confirmed that the etching property or cracking prevention property is lowered.
抵抗層の熱処理前後の抵抗変化率が3%を超過する比較例6、11及び15の場合には、抵抗加工性またはクラック発生防止性が低下することが確認できる。 In the case of Comparative Examples 6, 11, and 15 in which the resistance change rate before and after the heat treatment of the resistance layer exceeds 3%, it can be confirmed that the resistance workability or the crack generation prevention property decreases.
また、不純物の含量が5000ppmを超過する比較例14の場合には、エッチング性が悪く、不純物偏差が20%以上である比較例3、8及び16の場合には、抵抗加工性またはクラック発生防止性が低下することが確認できる。 Further, in the case of Comparative Example 14 in which the impurity content exceeds 5000 ppm, the etching property is poor, and in the case of Comparative Examples 3, 8 and 16 in which the impurity deviation is 20% or more, resistance workability or prevention of cracking is caused. It can be confirmed that the property is lowered.
本発明による印刷回路基板用抵抗積層導電体は、表面抵抗、抵抗偏差、厚さ偏差、抵抗変化率、不純物含量、不純物偏差などの条件のうちいずれか1つのみを満たしてもエッチング性や抵抗加工性、抵抗層クラック発生防止性などが向上し得る。但し、比較例1ないし比較例16に示されたように、本発明で提示した数値範囲から外れる因子が1つでもある場合には、最終的に抵抗層特性の低下をもたらすようになるため、全ての条件を満たすことが最も望ましい。
以上のように、本発明がたとえ限定された実施例及び図面によって説明されたが、本発明はこれに限定されるものではく、本発明が属する技術分野で通常の知識を持つ者によって本発明の技術思想と特許請求の範囲の均等範囲内で多様な修正及び変形が可能であることは言うまでもない。
The resistive laminated conductor for a printed circuit board according to the present invention has an etching property and resistance even if only one of conditions such as surface resistance, resistance deviation, thickness deviation, resistance change rate, impurity content, impurity deviation is satisfied. Workability, resistance layer cracking prevention properties, and the like can be improved. However, as shown in Comparative Example 1 to Comparative Example 16, when there is even one factor that deviates from the numerical range presented in the present invention, the resistance layer characteristics are eventually lowered. It is most desirable to satisfy all conditions.
As described above, the present invention has been described with reference to the limited embodiments and drawings. However, the present invention is not limited thereto, and the present invention can be obtained by those having ordinary knowledge in the technical field to which the present invention belongs. It goes without saying that various modifications and variations can be made within the scope of the technical idea and the scope of claims.
100 ベース基板
101 銅箔
102 抵抗層
100
Claims (19)
前記抵抗層は、
熱処理後の表面抵抗が20〜200Ω/sq、熱処理後の表面抵抗の偏差が5%以下、熱処理前後の抵抗変化率が3%以下であり、
不純物として硫黄(S)、炭素(C)、酸素(O)、及び鉄(Fe)のうち選択されたいずれか1つまたは2つ以上が原子総量基準で5000ppm以下含まれ、前記不純物の偏差が20%未満であり、
厚さ偏差が5%以下であることを特徴とする印刷回路基板用抵抗積層導電体。 In a resistance laminated conductor for a printed circuit board comprising a copper foil and a resistance layer provided on one surface of the copper foil,
The resistance layer is
The surface resistance after heat treatment is 20 to 200 Ω / sq, the deviation of the surface resistance after heat treatment is 5% or less, the rate of change in resistance before and after heat treatment is 3% or less,
Any one or two or more selected from sulfur (S), carbon (C), oxygen (O), and iron (Fe) are included as impurities in an amount of 5000 ppm or less based on the total amount of atoms, and the deviation of the impurities is Less than 20%,
A resistance laminated conductor for a printed circuit board, wherein the thickness deviation is 5% or less.
前記抵抗層が、熱処理後の表面抵抗が20〜200Ω/sq、熱処理後の表面抵抗の偏差が5%以下、熱処理前後の抵抗変化率が3%以下であることを特徴とする印刷回路基板用抵抗積層導電体。 In a resistance laminated conductor for a printed circuit board comprising a copper foil and a resistance layer provided on one surface of the copper foil,
For the printed circuit board, wherein the resistance layer has a surface resistance after heat treatment of 20 to 200 Ω / sq, a deviation of surface resistance after heat treatment of 5% or less, and a rate of change in resistance before and after heat treatment is 3% or less. Resistive laminated conductor.
前記抵抗層には、不純物として硫黄(S)、炭素(C)、酸素(O)、及び鉄(Fe)のうち選択されたいずれか1つまたは2つ以上が原子総量基準で5000ppm以下含まれたことを特徴とする印刷回路基板用抵抗積層導電体。 In a resistance laminated conductor for a printed circuit board comprising a copper foil and a resistance layer provided on one surface of the copper foil,
The resistance layer includes 5000 ppm or less of any one or more selected from sulfur (S), carbon (C), oxygen (O), and iron (Fe) as impurities. A resistive multilayer conductor for a printed circuit board.
電解銅箔を用意するステップと、
真空スパッタリングを用いて前記電解銅箔の一面に抵抗物質を蒸着して抵抗層を設けるステップと、を含むことを特徴とする印刷回路基板用抵抗積層導電体の製造方法。 In the method for manufacturing a resistance laminated conductor for a printed circuit board,
Preparing an electrolytic copper foil;
Depositing a resistance material on one surface of the electrolytic copper foil using vacuum sputtering and providing a resistance layer. A method for producing a resistance laminated conductor for a printed circuit board, comprising:
前記抵抗層は、
熱処理後の表面抵抗が20〜200Ω/sq、熱処理後の表面抵抗の偏差が5%以下、熱処理前後の抵抗変化率が3%以下であり、
不純物として硫黄(S)、炭素(C)、酸素(O)、及び鉄(Fe)のうち選択されたいずれか1つまたは2つ以上が原子総量基準で5000ppm以下含まれ、前記不純物の偏差が20%未満であり、
厚さ偏差が5%以下であることを特徴とする印刷回路基板。 In a printed circuit board comprising: a base substrate; and a resistive laminated conductor that is embedded in the base substrate and includes a copper foil and a resistive layer laminated on the copper foil.
The resistance layer is
The surface resistance after heat treatment is 20 to 200 Ω / sq, the deviation of the surface resistance after heat treatment is 5% or less, the rate of change in resistance before and after heat treatment is 3% or less,
Any one or two or more selected from sulfur (S), carbon (C), oxygen (O), and iron (Fe) are included as impurities in an amount of 5000 ppm or less based on the total amount of atoms, and the deviation of the impurities is Less than 20%,
A printed circuit board having a thickness deviation of 5% or less.
The printed circuit board according to claim 16, further comprising a silane layer on the resistive laminated conductor.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020080007946A KR100965329B1 (en) | 2008-01-25 | 2008-01-25 | Electric conductor having resistance layer for printed circuit board, fabrication method and printed circuit board thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2009177180A true JP2009177180A (en) | 2009-08-06 |
Family
ID=41031884
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009012139A Pending JP2009177180A (en) | 2008-01-25 | 2009-01-22 | Resistor lamination conductor for print circuit board and its production method, and printed circuit board |
Country Status (2)
Country | Link |
---|---|
JP (1) | JP2009177180A (en) |
KR (1) | KR100965329B1 (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2012132592A1 (en) * | 2011-03-28 | 2012-10-04 | Jx日鉱日石金属株式会社 | Metal foil provided with electrically resistive film, and method for producing same |
WO2012132593A1 (en) * | 2011-03-31 | 2012-10-04 | Jx日鉱日石金属株式会社 | Metal foil provided with electrically resistive layer, and board for printed circuit using said metal foil |
WO2012133439A1 (en) * | 2011-03-28 | 2012-10-04 | Jx日鉱日石金属株式会社 | Metal foil having electrical resistance layer, and manufacturing method for same |
JP2020065038A (en) * | 2018-10-15 | 2020-04-23 | 鼎展電子股▲分▼有限公司 | Copper foil electric resistor and electric circuit board structure comprising copper foil electric resistor |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102260542B1 (en) * | 2015-01-27 | 2021-06-04 | 에스케이이노베이션 주식회사 | EMI shielding film and Circuit board comprising the same |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05205904A (en) * | 1991-08-26 | 1993-08-13 | Gould Inc | Resistance metal layer and its manufacture |
JP2003193291A (en) * | 2001-12-28 | 2003-07-09 | Furukawa Circuit Foil Kk | Copper foil with resistance layer and production method therefor |
JP2003200524A (en) * | 2001-12-28 | 2003-07-15 | Furukawa Circuit Foil Kk | Resistance layer built-in copper clad laminated sheet and printed circuit board using the same |
JP2003200523A (en) * | 2001-12-28 | 2003-07-15 | Furukawa Circuit Foil Kk | Resistance layer built-in copper clad laminated sheet and printed circuit board using the same |
JP2005085907A (en) * | 2003-09-05 | 2005-03-31 | Tdk Corp | Cu-ni thick-film resistor, forming method thereof, and manufacturing method of circuit board |
JP2006005149A (en) * | 2004-06-17 | 2006-01-05 | Furukawa Circuit Foil Kk | Conductive substrate and circuit board material with resistive layer |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4279501B2 (en) * | 2002-03-28 | 2009-06-17 | 小松精練株式会社 | Method for manufacturing resistance film for radio wave absorber |
KR20070060672A (en) * | 2005-12-09 | 2007-06-13 | 삼성전자주식회사 | Embedded printed circuit board having paste type |
KR100747022B1 (en) * | 2006-01-20 | 2007-08-07 | 삼성전기주식회사 | Imbedded circuit board and fabricating method therefore |
KR20070106594A (en) * | 2006-08-07 | 2007-11-02 | 대덕전자 주식회사 | Resistor-embedded printed circuit board embedded with separately fabricated resistor and manufacturing method thereof |
-
2008
- 2008-01-25 KR KR1020080007946A patent/KR100965329B1/en not_active IP Right Cessation
-
2009
- 2009-01-22 JP JP2009012139A patent/JP2009177180A/en active Pending
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05205904A (en) * | 1991-08-26 | 1993-08-13 | Gould Inc | Resistance metal layer and its manufacture |
JP2003193291A (en) * | 2001-12-28 | 2003-07-09 | Furukawa Circuit Foil Kk | Copper foil with resistance layer and production method therefor |
JP2003200524A (en) * | 2001-12-28 | 2003-07-15 | Furukawa Circuit Foil Kk | Resistance layer built-in copper clad laminated sheet and printed circuit board using the same |
JP2003200523A (en) * | 2001-12-28 | 2003-07-15 | Furukawa Circuit Foil Kk | Resistance layer built-in copper clad laminated sheet and printed circuit board using the same |
JP2005085907A (en) * | 2003-09-05 | 2005-03-31 | Tdk Corp | Cu-ni thick-film resistor, forming method thereof, and manufacturing method of circuit board |
JP2006005149A (en) * | 2004-06-17 | 2006-01-05 | Furukawa Circuit Foil Kk | Conductive substrate and circuit board material with resistive layer |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2012132592A1 (en) * | 2011-03-28 | 2012-10-04 | Jx日鉱日石金属株式会社 | Metal foil provided with electrically resistive film, and method for producing same |
WO2012133439A1 (en) * | 2011-03-28 | 2012-10-04 | Jx日鉱日石金属株式会社 | Metal foil having electrical resistance layer, and manufacturing method for same |
JP5346408B2 (en) * | 2011-03-28 | 2013-11-20 | Jx日鉱日石金属株式会社 | Metal foil provided with electric resistance film and method for manufacturing the same |
CN103429788A (en) * | 2011-03-28 | 2013-12-04 | 吉坤日矿日石金属株式会社 | Metal foil provided with electrically resistive film, and method for producing same |
US9099229B2 (en) | 2011-03-28 | 2015-08-04 | Jx Nippon Mining & Metals Corporation | Metal foil having electrical resistance layer, and manufacturing method for same |
WO2012132593A1 (en) * | 2011-03-31 | 2012-10-04 | Jx日鉱日石金属株式会社 | Metal foil provided with electrically resistive layer, and board for printed circuit using said metal foil |
EP2693852A1 (en) * | 2011-03-31 | 2014-02-05 | JX Nippon Mining & Metals Corporation | Metal foil provided with electrically resistive layer, and board for printed circuit using said metal foil |
EP2693852A4 (en) * | 2011-03-31 | 2014-09-03 | Jx Nippon Mining & Metals Corp | Metal foil provided with electrically resistive layer, and board for printed circuit using said metal foil |
US9578739B2 (en) | 2011-03-31 | 2017-02-21 | Jx Nippon Mining & Metals Corporation | Metal foil provided with electrically resistive layer, and board for printed circuit using said metal foil |
JP2020065038A (en) * | 2018-10-15 | 2020-04-23 | 鼎展電子股▲分▼有限公司 | Copper foil electric resistor and electric circuit board structure comprising copper foil electric resistor |
Also Published As
Publication number | Publication date |
---|---|
KR100965329B1 (en) | 2010-06-22 |
KR20090081839A (en) | 2009-07-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN103250217B (en) | Laminated ceramic electronic components | |
TWI633817B (en) | Coreless assembly support substrate | |
JP2009177180A (en) | Resistor lamination conductor for print circuit board and its production method, and printed circuit board | |
JP5399474B2 (en) | Metal foil with electric resistance film and manufacturing method thereof | |
JP2007262493A (en) | Material for flexible printed board and method of manufacturing the same | |
KR101189131B1 (en) | Flexible circuit clad laminate, printed circuit board using it, and method of manufacturing the same | |
KR101525368B1 (en) | Copper foil for flexible printed wiring board, copper-clad laminate, flexible printed wiring board and electronic device | |
JP5555749B2 (en) | Soft circuit copper clad laminate, printed circuit board using the same, and method for manufacturing the same | |
JP6597459B2 (en) | Conductive substrate, method for manufacturing conductive substrate | |
TWI694752B (en) | Embedded passive device structure | |
JP5671902B2 (en) | Method for manufacturing resistive thin film element with copper conductor layer | |
JP2009094438A (en) | Coil component and its manufacturing method | |
TW202114490A (en) | Resistor and capacitor embedded flexible copper foil structure and printed circuit board structure using the same | |
JP2009158382A (en) | Copper foil | |
JP2007317782A (en) | Flexible wiring board | |
JP5346408B2 (en) | Metal foil provided with electric resistance film and method for manufacturing the same | |
JP2020065038A (en) | Copper foil electric resistor and electric circuit board structure comprising copper foil electric resistor | |
JP2007019274A (en) | Resistance thin film, thin film resistor and its manufacturing method | |
JP2004244645A (en) | ROLLED Fe-Ni ALLOY FOIL FOR RESISTOR | |
JP2006019323A (en) | Resistance composition, chip resistor and their manufacturing method | |
KR102461189B1 (en) | Flexible copper clad laminate, printed circuit board using the same | |
KR102514454B1 (en) | Flexible circuit clad laminate, printed circuit board using it, and method of manufacturing the same | |
JP4684983B2 (en) | Laminated body for flexible printed wiring board and copper alloy sputtering target | |
JP4018551B2 (en) | Rolled Fe-Cr-Ni alloy foil for resistor | |
JP4104995B2 (en) | Built-in resistor for multilayer boards |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20100817 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20101109 |
|
A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20101115 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20101217 |
|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20110607 |