JP2003162236A - Image display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To secure necessary functions while suppressing power consumption of an image display device at a low level. <P>SOLUTION: Pixels 110 are provided at the corresponding crossing points of scanning lines 102 and data lines 104. Highly precise display is necessary at the center portion of the screen in order to obtain good focusing. However, at the outer side portion of the screen, focusing is only required to confirm the composition and the object to be imaged and preciseness of the focusing could be made less compared with the center portion. Therefore, the size of the pixels 110 is made larger for the outer side portion than the center portion. Thus, highly precise display is obtained at the center portion of the screen and less precise display is realized at the outer portion. Since the preciseness of the outer portion is less, the constitution to drive the lines 102 and 104 is made simple and as a result, the power consumption is made less. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image display device suitable as a monitor or a viewfinder.

[0002]

2. Description of the Related Art Generally, in a digital image recording apparatus such as a digital still camera or a video camera, a liquid crystal element or EL (Electro Luminescent) is used as a monitor or a viewfinder for focusing and confirming a subject.
An image display device using an electro-optical element is used. In the above-mentioned digital image recording device, since the battery is driven in principle, in order to keep the performance of the image display device as long as possible while suppressing the increase of the battery weight, the power consumption of the image display device can be kept low. Required.

[0003]

However, although, for example, focusing and high definition (resolution) are required,
In the conventional image display device, since the definition in the display area is uniform, it is necessary to have high definition over the entire display area. Therefore, the conventional image display device has a problem that it is difficult to reduce power consumption. In order to solve the above problems, an object of the present invention is to provide an image display device capable of suppressing power consumption without impairing the functions required for focusing and checking a subject.

[0004]

In order to achieve the above object, an image display device according to the present invention is a pixel provided at each intersection of a plurality of scanning lines and a plurality of data lines,
Each has a pixel having a density corresponding to a signal applied to a corresponding data line when a corresponding scanning line is selected, and a portion outside a central portion of a display area for displaying an image is displayed. Is characterized by a low definition. With this configuration, the central portion of the display area has a higher definition than the outer portion, so that the function for focusing is ensured, and the outer portion has a low-definition display. It is possible to keep the power low.

[0005]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a perspective view showing a rear structure of a digital still camera using the image display device according to the embodiment as a monitor. As shown in this figure, in the digital still camera 10, the rear surface (front surface in the figure) of the case 12 having a substantially rectangular parallelepiped shape.
At the center, a display panel 100 such as a liquid crystal panel is provided as a monitor. A shutter button 16 is provided on the upper surface of the case 12, and an optical lens and a CCD (Charge Coupled Devic) are provided on the front surface side (the back surface side in the figure).
Each of the light receiving units 14 including e) is provided.

Next, a structure for causing the display panel 100 to function as a monitor will be described with reference to FIG. In this figure, the control circuit 20 includes a CPU and the like,
Controls the operation of the entire camera. The CCD 140 is an image sensor provided in the light receiving unit 14, and includes the control circuit 20.
Under the control of, the light image of the subject is photoelectrically converted. DSP
The (digital signal processor) 142 is the CCD 1
The signal that is photoelectrically converted by 40 is the gradation (density) of the pixel.
Is converted to digital gradation data WD that defines The display memory 30 is a dedicated memory for displaying an image. On the write side of the display memory 30, the grayscale data WD converted by the DSP 142 is stored under the control of the control circuit 20, while on the read side, the stored grayscale data is vertically scanned with respect to the display panel 100. The data are read out in the order according to the horizontal scanning. Here, for convenience, the storage address of the display memory 30 is 18 lines 22
It corresponds to the column.

The display panel 100 has a pixel at each intersection of a scanning line 102 and a data line 104 provided so as to intersect each other. Y driver 150 is 1
The scanning signals Y1, Y2, Y3, ..., Y18, which are sequentially and exclusively set to the H level, are output in each horizontal scanning period. The X driver 160 uses the grayscale data RD read from the display memory 30, specifically, the grayscale data R for one selected pixel row.
D is an analog data signal X1, X2, X3, ..., X
It is converted to 22 and output. The digital still camera 10 has a function of storing an image picked up by the CCD 140 and a function of calling out an image desired by the user among the stored images and displaying the image on the display panel 100 or the like. Are not directly related, so the description thereof will be omitted.

<Display Panel> Next, details of the above-mentioned display panel will be described. FIG. 3 is a plan view showing the arrangement of pixels in the display panel 100. As shown in this figure, the pitch of the scanning lines 102 in the six rows located at the center of the display panel 100 is half that of the scanning lines 102 in the upper and lower three rows. In other words, from the state in which 18 scanning lines are arranged at an equal pitch, the scanning lines in the 2, 4, 6, 14, 16, and 18th rows counted from the top are in a thinned state. However, the scanning signals Y1, Y2,
Y3, ..., Y18 are decimated or not,
It is supplied in order from the top. That is, even in the thinned out scanning lines of the 2, 4, 6, 14, 16, and 18th rows,
It is assumed that the scanning signals Y2, Y4, Y6, Y14, Y16, and Y18 are virtually supplied, respectively, as shown in parentheses.

Similarly, the pitch of the data lines 104 in the six columns located in the central portion of the display panel 100 is half the pitch of the data lines 104 in each of the left and right four columns. In other words, from the state where 22 data lines are arranged at an equal pitch, counting from the left is 2, 4, 6, 8, 16, 18, 2,
The data lines in the 0th and 22nd columns are thinned out. However, the data signals X1, X2, X3, ..., X22
Are supplied in order from the left regardless of whether or not they have been thinned out. That is, thinned out 2, 4, 6, 8, 1
Data lines X6, X8, X6, X8, X16, X18, X20, and X6, X6, X8, X6, X8, X6, X8, X6, X8, X6, X8, X6, X8, X6, X8, X6, X8, X8, X20, X16, X20, X16, X20, X20, X20, X20, X20, X20, X20, X22
Assume X22 is being supplied.

The pixel 110 is provided corresponding to the intersection of the existing scanning line 102 and data line 104. Further, the size of the pixel 110 is proportional to the product of the pitch of the scan lines 102 and the pitch of the data lines 104 corresponding to the intersection. Therefore, in the present embodiment, when the pixel size corresponding to the intersection of the narrow-pitch scanning line and the narrow-pitch data line is set to "1", the intersection of the narrow-pitch scanning line and the wide-pitch data line. And the pixel size corresponding to the intersection of the wide-pitch scanning line and the narrow-pitch data line is “2”, and the intersection of the wide-pitch scanning line and the wide-pitch data line. The pixel size corresponding to is “4”. Here, the narrow pitch scanning line refers to the scanning line 102 to which the scanning signals Y7 to Y12 are supplied, and the wide pitch scanning line refers to the scanning signal Y1.
The scanning lines 102 to which Y3, Y5, Y13, Y15, and Y17 are supplied. The narrow-pitch data line is the data line 104 to which the data signals X9 to X14 are supplied, and the wide-pitch data line is the data signals X1, X3, and
The data line 104 to which X5, X7, X15, X17, X19, and X22 are supplied.

Next, the pixel 11 in the display panel 100.
Details of 0 will be described. FIG. 4A shows the pixel 110.
3 is a circuit diagram showing the configuration of FIG. In this figure, a pixel 110, which generally corresponds to the intersection of the i-th scanning line 102 and the j-th data line 104, has a TFT 112 and a liquid crystal element LC, respectively. Of these, TFT1
12 is inserted between the data line 104 of the j-th column and one end of the liquid crystal element LC. The gate of the TFT 112 is connected to the i-th scanning line 102. Therefore, the TFT 112 functions as a switch that is turned on when the scanning signal Yi becomes H level.

The liquid crystal element LC forms a kind of capacitance by a rectangular pixel electrode 114 which is one end, a counter electrode 116 which is the other end, and a liquid crystal 118 which is sandwiched between both electrodes, and is stored in the capacitance. The alignment state of the liquid crystal molecules changes according to the amount of electric charge generated. Here, the counter electrode 116 is used for all pixels 1
It is common over 10 and its potential is also constant in time. The drain of the TFT 112 (pixel electrode 11
In 8), a storage capacitor may be additionally provided in order to reduce the leakage of charges accumulated in the liquid crystal element LC.

In the structure shown in FIG. 4A, when the scanning signal Yi becomes H level, the TFTs 112 are turned on in all the pixels 110 located in the i-th row. Therefore, the potential of the pixel electrode 114 of the pixel 110 located in the i-th row and the j-th column becomes the voltage of the data signal Xj, and thus the charge corresponding to the voltage of the data signal Xj is accumulated in the liquid crystal element LC. After the charge is accumulated, the scanning signal Yi becomes L
Even if the TFT 112 is turned off and the TFT 112 is turned off, the accumulation of charges in the liquid crystal element LC is maintained. When the alignment state of the liquid crystal molecules changes according to the amount of charge accumulated in the liquid crystal element LC, the amount of light that passes through the liquid crystal element LC and is emitted from a polarizer (not shown) and is visually recognized by the user is also accumulated. It changes according to the amount of charge. Therefore, the pixel 110
Even if the scanning signal changes from the H level to the L level, the state defined by the data signal Xj at the H level is maintained.

As the pixel 110, as shown in FIG. 4B, a two-terminal type non-linear element such as a thin film diode 113 having a bidirectional diode characteristic and a liquid crystal element LC, a scanning line 102 and a data line. The configuration may be such that it is inserted in series with the line 104. Further, a passive matrix type configuration for driving a liquid crystal element without using a three-terminal type non-linear element such as a TFT or a two-terminal type non-linear element having a bidirectional diode characteristic, specifically, the scanning line 102. A passive matrix type configuration in which the data line 104 itself is used as one end of the liquid crystal element LC and the data line 104 itself is used as the other end of the liquid crystal element LC may be used.

<Y Driver> Next, details of the Y driver 150 described above will be described. FIG. 5 shows the Y driver 1
It is a block diagram which shows the structure of 50. As shown in this figure, the Y driver 150 is a kind of shift register, and includes a transfer circuit (TU) 1515 corresponding to each row including a virtual scanning line.

The Y driver 150 includes a control circuit 20.
The clock signal YCK and the start pulse DY generated by are respectively supplied. Of these, the former clock signal YCK has a frequency represented by the reciprocal of one horizontal scanning period (1H), and the latter start pulse DY.
Defines the start of one vertical scanning period (1F).

Here, the transfer circuit 1515 on the i-th row latches the input signal to the level immediately before the rise of the clock signal YCK, and the latched signal is supplied to the scanning line 102 on the i-th row as the scanning signal Yi. In addition to being supplied, it is supplied as an input signal to the transfer circuit 1515 in the next (i + 1) th row. However, the input signal of the transfer circuit 1515 in the first row is the start pulse DY.

In such a structure, when the start pulse DY is supplied to the transfer circuit 1515 of the first row as an input signal, the start pulse DY is supplied at every rising edge of the clock signal YCK, as shown in FIG. , And the shifted signals are output as scanning signals Y1, Y2, Y3, Y4, ..., Y18, respectively. Therefore, the scanning signals Y1, Y2, Y3, Y
, ..., Y18 sequentially become the H level for one horizontal scanning period (1H) from the timing when the clock signal YCK rises only after the start pulse DY becomes the H level.

<X Driver> Next, details of the X driver 160 described above will be described. FIG. 7 shows the X driver 1
It is a block diagram which shows the structure of 60. As shown in this figure, the X driver 160 has a transfer circuit (TU) 1615 and a register (Reg) corresponding to each column.
1620, a latch circuit (L) 1630, and a D / A converter 1650. However, as will be described later, depending on the column, the register 1620 and the latch circuit 1630 are provided.
Therefore, the D / A converter 1650 becomes unnecessary.

The X driver 160 is supplied with the clock signal XsCK, the start pulse DX, the latch pulse LP, the polarity instruction signal AK generated by the control circuit 20, and the gradation data RD read from the display memory 30. Has been done. Of these, the clock signal XsCK is
This is a signal for transferring an input signal to the transfer circuit 1615, and is synchronized with the reading of grayscale data from the display memory 30. The start pulse DX is output at the read start timing of the grayscale data RD for one row. The latch pulse LP is output at a timing immediately after the gradation data of the last column in one row is read out, and defines the start of one horizontal scanning period.

The transfer circuit 1615 on the j-th column latches the input signal to the level immediately before the rise of the clock signal XsCK, outputs the latched signal as the sampling control signal Xsj, and is the next stage (j +
1) It is supplied as an input signal to the transfer circuit 1615 in the column. However, the input signal of the transfer circuit 1615 in the first column is
This is the start pulse DX. Register in the jth column (Re
g) 1620 samples and holds the gradation data RD supplied via the data bus at the rising edge of the sampling control signal Xsj output from the transfer circuit 1615 in the jth column. Further, the latch circuit (L) 1630 on the j-th column outputs the grayscale data RD held by the register 1620 on the j-th column to the latch pulse LP.
Latch at the rising edge of and output. And j
The D / A converter 1650 of the column also outputs the grayscale data RD latched by the latch circuit 1630 of the jth column,
It is converted into a positive polarity or negative polarity analog voltage instructed by the polarity instructing signal AK, and the analog voltage is output to the data line 104 of the jth column as the data signal Xj. As described above, the counter electrode 116 is common to all the pixels 110, and the potential thereof is also constant in time. Therefore, the positive polarity indicated by the polarity indication signal AK is higher than the potential of the counter electrode 116. It means converting to a side voltage, and the negative polarity means converting to a lower voltage than the potential of the counter electrode 116. In the present embodiment, the polarity indicating signal AK is 1 in the present embodiment.
The same level is maintained for the vertical scanning period, but the level is inverted in the next one vertical scanning period. That is, in each pixel 110, writing of positive polarity and negative polarity is executed every one vertical scanning period. The polarity instruction signal AK is assumed to have various level inversion modes.

FIG. 8 is a timing chart for explaining the operation of the X driver 160. As shown in this figure, when the start pulse DX rises to the H level prior to the timing at which the latch pulse LP is output and the scanning signal Yi transitions to the H level, in the display memory 30, 1 and 2 of the i-th row are displayed. The gradation data RD corresponding to the 3rd, ..., 22nd columns are sequentially read and supplied. Among them, when the sampling control signal Xs1 rises to the H level at the timing when the grayscale data RD corresponding to the i-th row and the 1st column is supplied, the grayscale data is stored in the register 1620 in the first column (“1” in FIG. 6). : Reg ”). Next, when the sampling control signal Xs2 rises to the H level at the timing at which the grayscale data RD corresponding to the i-th row and the 2nd column is supplied, the grayscale data is stored in the register 1620 in the second column (“2 in FIG. 6”). : Reg ”). Similarly, the gradation data RD corresponding to the 3rd, 4th, ..., 22nd columns are respectively sampled by the registers 1620 of the 3rd, 4th ,.

Then, when the latch pulse LP is output, the grayscale data RD sampled by the registers 1620 of each column are latched all at once by the latch circuits 1630 corresponding to the columns. The grayscale data RD latched in the 1st, 2nd, 3rd, ...
Data signal X1, which is converted by the A converter 1650,
X2, X3, ..., X22 are output all at once.

The scanning signal Yi becomes L level in synchronization with the simultaneous output of the data signals for one row, that is, in synchronization with the output of the latch pulse LP, and the scanning line 102 of the i-th row is selected. Will be. Further, here, the output operation of the data signal corresponding to the pixel located in the i-th row has been described, but in reality, such output operation is performed in the first row, the second row, the third row, ... It will be executed in order corresponding to each of the 18th lines.

<Image Display by Display Panel> An actual image display operation by the display panel 100 will be described. First, in the gray scale data read from the display memory 30 corresponding to the 1st row and 1st column to the 1st row and 22nd column in a certain one vertical scanning period, only the scanning signal Y1 becomes the H level.
During the horizontal scanning period, the data signals X1 and X are converted into analog signals of the polarity designated by the polarity designating signal AK.
2, X3, X4, ..., X22 are output. However, among these, the data signals X2, X4, X6, X
The data lines to which 8, X16, X18, X20, and X22 should be supplied do not actually exist. Therefore, for example, the scanning signal Y
The pixel 110 corresponding to the intersection of the scanning line 102 to which 1 is supplied and the data line 104 to which the data signal X3 is supplied.
Is the grayscale designated by the grayscale data of the 1st row and 3rd column in the display memory 30. On the other hand, for example, the pixel 110 corresponding to the intersection of the scanning line 102 supplied with the scanning signal Y1 and the data line 104 supplied with the data signal X11 is
In the display memory 30, the gradation is designated by the gradation data of 1st row and 11th column. Next, from the display memory 30 2 lines 1
The grayscale data read from the second column to the second row and the twenty-second column is an analog signal of the polarity designated by the polarity designating signal AK in one horizontal scanning period in which only the scanning signal Y2 is at the H level. Are converted into data signals X1, X2, X
, X4, ..., X22 are output. However, since the scanning line to which the scanning signal Y2 is to be supplied does not actually exist,
Compared with the period when the scanning signal Y1 is at the H level, the display does not change. Similar operation is performed by scanning signal Y3,
This is performed in each of the two horizontal scanning periods in which Y4 is at the H level and the two horizontal scanning periods in which the scanning signals Y5 and Y6 are at the H level.

From the display memory 30 7th row 1st column 7th row 2
The grayscale data read up to the second column is converted into an analog signal of the polarity designated by the polarity designating signal AK in one horizontal scanning period in which only the scanning signal Y7 is at the H level, The data signals X1, X2, X3, X4, ...
Output as X22, but data signals X2, X4, X
The data lines to which 6, X8, X16, X18, X20, and X22 are to be supplied do not actually exist.
The pixel 110 corresponding to the intersection of the scanning line 102 supplied with the data signal and the data line 104 supplied with the data signal X3.
Corresponds to the gradation designated by the gradation data of 7 rows and 3 columns in the display memory 30. On the other hand, for example, the pixel 110 corresponding to the intersection of the scanning line 102 supplied with the scanning signal Y7 and the data line 104 supplied with the data signal X11 is
In the display memory 30, the gradation is designated by the gradation data of 7th row and 11th column. Similar operation is performed by scanning signals Y7 and Y.
8, Y9, Y10, Y11, Y12 become H level 1
Each is performed in the horizontal scanning period.

Two horizontal scanning periods in which the scanning signals Y13 and Y14 are at the H level, two horizontal scanning periods in which the scanning signals Y15 and Y16 are at the H level, and the scanning signal Y
In the two horizontal scanning periods in which 17 and Y18 are at the H level, the operation is the same as in the two horizontal scanning periods in which the scanning signals Y1 and Y2 are at the H level. Note that the same operation is executed in the next one vertical scanning period, but since the polarity instruction signal AK is inverted, the write polarity for each pixel 110 is also inverted.

In such an embodiment, the display panel 10
In the center part of 0, the pixel size is small and the definition is high, so that it is possible to distinguish and visually recognize a fine display. Therefore, when the image is displayed on the display panel 100, it is possible to make fine adjustments by using the high-definition display of the central portion when focusing. On the other hand, in areas other than the central portion, the pixel size becomes large, so that fine display cannot be performed. However, when it is considered as a monitor or a finder, the definition other than the central portion is sufficient to the extent that the composition of the whole can be known, and thus the high-definition display is not required as much as the central portion. Therefore, even if the pixel size is large in the peripheral portion of the display panel 100 as in the present embodiment, there is little possibility of causing a problem.

Further, in the embodiment, the data signal X2,
Since there are no data lines to which X4, X6, X8, X16, X18, X20, and X22 are supplied, in FIG.
Although described for convenience, 2, 4, 6, 8, 16, 18, 2
The register 1620 corresponding to the 0th and 22nd columns, the latch circuit 1630, and the D / A converter 1650 are unnecessary.
Therefore, the configuration of the X driver 160 can be simplified and the power consumed by them can be suppressed. Furthermore, 2, 4, 6, 8, 16, 18, 2
The storage address of the display memory 30 corresponding to the 0th and 22nd columns is also unnecessary. Therefore, it is possible to reduce the storage capacity required for the display memory 30 and to save the trouble of reading unnecessary grayscale data. The same applies to the Y driver 150 side. That is, if the grayscale data of a row that does not actually exist is not read, the storage capacity of the display memory 30 can be reduced and the power consumed by the read can be reduced. Note that, as shown in FIG. 7, a register 1620 and a latch circuit 1630 are provided for each column.
And the D / A converter 1650, the general-purpose X driver 160 can be used.
Cost increase can be suppressed.

Further, in the present embodiment, as a result of the pixel size being defined according to the product of the scanning line pitch and the data line pitch, the aperture ratio becomes constant over the entire display area.
For this reason, even if all the gradation data indicates the same gradation, no density difference occurs in the display area, and therefore, it is not visually recognized as display unevenness. In the embodiment, the case where the invention is applied to the digital still camera has been described as an example, but it is naturally applicable to the viewfinder of the video camera.

<Application Example> The present invention is not limited to the above-described embodiment, and various applications and modifications are possible. For example, the pixels in the display panel 100 may be arranged as shown in FIG. 9 in addition to the arrangement shown in FIG. In this figure, the arrangement of the data lines 104 is the same as that of FIG. 3, but the scanning signals Y1, Y3, Y5, Y13, Y15, Y.
The scanning line 102 to which each of 17 is supplied is different from that of FIG. 3 in that it is branched into two. And
A total of 12 of these branched scanning lines 102 are arranged at the same pitch as the 6 rows of scanning lines 102 located at the center of the display panel 100. In the configuration shown in FIG. 9, the pixel 110 is provided corresponding to the intersection of the scanning line 102 and the data line 104, and the size of the pixel 110 is the product of the pitch of the scanning line 102 and the pitch of the data line 104. 3 is similar to that of FIG. However, in the configuration shown in FIG. 9, since the scanning line pitches are all the same, the pixel size corresponds to “1” corresponding to the narrow pitch data line and to the wide pitch data line, unlike the embodiment. There are two types, "2". Here, the two pixels 110 corresponding to the intersections of the two branched scanning lines 102 and the wide pitch data lines 104 have the same contents, and as a result, in FIG. 3, the pitch scanning is performed. The pixel is equivalent to the pixel corresponding to the intersection of the line and the wide pitch data line, that is, one pixel having a pixel size of "4".

As described above, in the configuration shown in FIG. 9, there are two pixel sizes. Generally, when a switching element such as a TFT or a TFD is used, if the pixel size is different, the electro-optical characteristics are also different for each pixel, so that display unevenness or the like is likely to occur and the display quality is likely to deteriorate. In 9, it is possible to suppress the occurrence of such display unevenness. Although the scanning line 102 is branched in FIG. 9, the data line 104 may be branched, or both the scanning line 102 and the data line may be branched. Further, the pixel size may be increased by gradually increasing the number of branches from the center toward the outside of the periphery.

As the pixel 110, in addition to the liquid crystal element, for example, an EL element as shown in FIG. 4C can be used. In this figure, the pixel 110 has a switching TFT 115 and a TFT 117 for driving the EL element 119. In this configuration,
When the TFT 115 is turned on, the gate G of the TFT 117 holds the voltage of the data line 104 at the time of turning on by the parasitic capacitance (or holding capacitance) C. Furthermore, T
A current corresponding to the gate voltage is discharged from the FT 117. Here, a scan signal for turning on the TFT 115 is supplied to the scan line 102, and the data line 104 is supplied.
When a data signal having a voltage according to the luminance is applied to the capacitor C, the voltage is retained in the capacitor C even after the TFT 115 is turned off.
Continue to flow to 9. Therefore, similarly to the liquid crystal device L, the EL element 119 continues to emit light with a brightness corresponding to the voltage of the data line 104 when the TFT 115 (112) is on. Since the EL element 119 is driven by direct current in principle, it is not necessary to invert the polarity by the polarity instruction signal AK, unlike the liquid crystal element. In addition, the EL element 119
Can be replaced with a light emitting diode or the like.

[0034]

As described above, according to the present invention, a pixel is provided at each intersection of a plurality of scanning lines and a plurality of data lines, each of which is provided when a corresponding scanning line is selected. The pixel having a density corresponding to the signal applied to the corresponding data line is provided, and the display by the pixel has a low definition in the outer part than the center part, thereby providing a high definition display in the center part. Therefore, while the function for focusing is ensured, the outer portion is displayed in low definition, but it is sufficient for confirming the subject and setting the composition. As a result, the scanning line for driving the pixels in the outer portion. Alternatively, one or both of the data lines can be simplified. Therefore, according to the present invention, it is possible to reduce power consumption by the amount of simplification while ensuring necessary functions.

[Brief description of drawings]

FIG. 1 is a perspective view showing a rear structure of a digital still camera to which an image display device according to a first embodiment of the present invention is applied.

FIG. 2 is a block diagram showing a configuration of the digital still camera.

FIG. 3 is a plan view showing a configuration of a display panel of the digital still camera.

4A to 4C are circuit diagrams each showing a pixel configuration in the display panel.

FIG. 5 is a block diagram showing a configuration of a Y driver of the digital still camera.

FIG. 6 is a timing chart for explaining the operation of the Y driver.

FIG. 7 is a block diagram showing a configuration of an X driver of the digital still camera.

FIG. 8 is a timing chart for explaining the operation of the X driver.

FIG. 9 is a plan view showing a configuration of a display panel according to an application example.

[Explanation of symbols]

10 ... Digital still camera 100 ... Display panel 110 ... Pixels 150 ... Y driver 160 ... X driver

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) G09G 3/36 G09G 3/36 F term (reference) 3K007 AB18 DB03 GA00 5C006 AA01 AA11 AC27 AF35 AF42 AF43 AF46 AF47 AF51 AF53 AF61 AF69 AF71 BB16 BB17 BC03 BC11 BC16 BC20 BF02 BF03 BF04 EC02 EC08 FA47 5C080 AA06 AA10 BB05 DD26 EE17 EE29 FF11 JJ02 JJ03 JJ04 KK43 5C094 AA03 AA22 BA03 BA23 BA27 BA43 CA19 CA20 DB04 FA04

Claims (3)

[Claims] 1. A pixel provided at each intersection of a plurality of scanning lines and a plurality of data lines, each of which is a signal applied to the corresponding data line when the corresponding scanning line is selected. An image display device characterized by having a pixel having a density according to, and displaying a portion of a display area for displaying an image outside a central portion with a low definition. 2. The image display device according to claim 1, wherein the display is made finer as it is closer to the periphery of the display area. 3. The image display device according to claim 1, wherein the pixels in the outer portion share at least one of the scanning line and the data line with each other.