JP2003158780A - Controller - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a controller capable of the Internet connection while securing real time properties of control. SOLUTION: The controller is provided with a bridge LSI 130 connected to a control processor 120 and to a communication processor 110, a memory 140 connected to the LSI 130, a system bus interface 160 for connecting the controller to an object 400 to be controlled through a system bus 200, and a network interface 150 for connecting the controller to a terminal 20 through the Internet 10.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a controller used in a power plant, a traffic control system, a water and wastewater treatment control system, and the like.

[0002]

2. Description of the Related Art With the recent spread of Internet technology, there is an advantage that a plant monitoring terminal can be connected to the Internet for plant monitoring from anywhere. Therefore, the plant control system is connected to the Internet for remote monitoring. Has come to be desired.

Therefore, in the conventional device, a local area network (hereinafter abbreviated as LAN) of the monitoring system is used.
Internet connection was realized by providing a server for Internet connection above. However, providing a dedicated server increases the system price and increases L
Since the plant control status cannot be monitored when an AN line abnormality occurs, recently, as a controller expansion device, a system equipped with a module for connecting to the Internet on the system bus has appeared. There is.

Further, as described in Japanese Patent Laid-Open No. 11-150550, control data is transmitted / received to / from a control device in order to support mutual communication between a dedicated control system network and a general-purpose information system network. A first communication controller connected to a control system network for connecting the computer and a second communication controller connected to an information network for connecting the computer and the peripheral device to each other; Some include protocol conversion means for causing a CPU to execute protocol conversion for passing data between communication controllers. Also, JP-A-9-12825
Japanese Patent No. 5 has a first processor for control and a second processor for communication, and the first processor for control is
A programmable logic controller is disclosed that adjustably executes a communication task period that inherits control parameters for an application program collected during data communication with at least one external system.

[0005]

Since the above-mentioned conventional technique is connected to the system bus, the CPU must process both the plant interface processing and the network interface processing, and the real-time control is not guaranteed. There was a problem.

Further, in the conventional apparatus described in Japanese Patent Laid-Open No. 11-150550, CP is used for protocol conversion for passing data between the first and second communication controllers.
Since it is executed by U, there is a problem that the controller cannot perform real-time control. In addition, JP-A-9-
The one described in Japanese Patent No. 128255 has two processors, one for control and the other for communication, but the processor for control processes communication tasks, so it is difficult to guarantee real-time control, and processing on the Internet or the like is difficult. Was not considered.

[0007] A first object of the present invention is to provide a controller that secures real-time controllability and enables Internet connection.

A second object of the present invention is to provide a controller that secures real-time controllability and suppresses system cost increase.

[0009]

In order to achieve the above object, a controller of the present invention comprises a control processor, a communication processor, and a bridge LSI connected to each of the control processor and the communication processor. , A memory connected to the bridge LSI, a system bus interface for connecting to a control target via a system bus, and a network interface for connecting to a terminal via the Internet.

A control processor, a communication processor, a bridge LSI connected to each of the control processor and the communication processor, and the bridge LS.
A memory connected to I, a system bus interface connected to the control processor via a bridge LSI for the control processor to monitor and control a control target, and a memory connected to the communication processor via a bridge LSI. It is characterized in that the communication processor has an internet interface for internet communication with the terminal.

The software of the communication processor is composed of firmware, a real-time OS including a network interface driver, middle software including an internet protocol such as ftp, tp, and a communication task.

The software of the control processor comprises a firmware, a real-time OS including a controlled interface driver, middle software, and a control task.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION One embodiment of the present invention will be described below with reference to FIGS. 1 to 5 by taking a controller for plant control as an example. As shown in FIG. 1, a controller 100 (also referred to as a CPU board 100) of this embodiment has a plant interface 300 via a system bus 200.
Are connected. A plant monitoring terminal 20 for monitoring a plant control state is connected to the network interface 150 of the controller 100 via the Internet 10, and the plant interface 300 (also referred to as a control target interface 300) of the controller 100 is a control target. Is connected to the plant 400. Here, the Internet 10 may be an intranet.

The controller 100 is provided with two processors, a communication processor 110 and a control processor 120, which are respectively connected to a bridge LSI 130 realized by a gate array and through the bridge LSI 130. It is connected to the memory 140. The control processor 120 is a bridge LS.
System bus interface 160 via I130
It is connected to the. System bus interface 16
The plant 400 to be controlled is controlled and monitored via the system bus 200 and the plant interface 300 connected to 0, and the control state is fed back and stored in the memory 140 as described later. The transmission and reception of this data are performed by addressing each other.

On the other hand, the communication processor 110 is connected to the network interface 150 via the bridge LSI 130. The bridge LSI 130 switches connection between the control processor 120, the system bus interface 160, and the memory 140, disconnects the connection between the system bus interface 160 and the memory 140, the communication processor 110, and the network interface 1.
50, the connection of the memory 140 is switched, and the connection between the network interface 150 and the memory is disconnected. The connection switching and the connection disconnection are performed by the control processor 120, the communication processor 110, the terminal 20, etc. transmitting a control signal having a configuration having setup and data to the bridge LSI 130 to switch the setting inside the bridge LSI 130.

Thus, the control processor 120 is
In order to guarantee real-time control, the communication processor 110 does not perform communication processing but performs communication processing, and is a so-called function-distributed multiprocessor. The communication processor 110 connects the memory 1 to the terminal 20 connected via the Internet 10.
The latest plant information stored in 40 is transmitted.
In this way, the plant monitoring terminal 20 is connected to the Internet 10, and the network interface 150
Via the communication processor 110 and the Internet 1
Since 0 is connected, the degree of freedom of the installation location of the controller is increased, and plant monitoring / control can be performed from a desired location.

The software configuration of the two processors of the communication processor 110 and the control processor 120 provided in the controller 100 will be described with reference to FIG.

The communication processor 110 includes firmware 111, a real-time OS 112, middle software 11
4. It has the software of the communication task 116. The network interface driver 113 is in the real-time OS 112, and the communication task 11 is in the middle software 114.
An internet protocol 115 such as http, ftp, etc. is provided for specially performing the 6 processes.

The control processor 120 includes firmware 121, a real-time OS 122, and middle software 12.
4, the control task 125 software, and the real-time OS 122 has a plant interface driver 123 (control target plant interface driver 1
23) is also provided. Real-time OS 1
An inter-processor interrupt 101 interface is provided between 12 and the real-time OS 122.

The firmware 111 of the communication processor 110 and the firmware 12 of the control processor 120
Both 1 perform initialization processing at power-on, self-diagnosis, and the like.

As described above, the communication processor 110 is
Http, f for specialized processing of the communication task 116
connected to the Internet 10 via middle software 114 provided with an Internet protocol such as tp,
The control processor 120 uses the middle software 124 for specialized processing of the control task 125 to control the plant 4
Since it is connected to 00, conventionally,
By implementing tp, it is necessary to process communication and control serially, and since communication and control are processed serially, the problem that the controller cannot perform real-time control can be solved.

The two processors normally operate independently, but when it is necessary to communicate or synchronize with each other for monitoring and control, the inter-processor interrupt 101 is executed between the real-time OS 112 and the real-time OS 122. Be seen. Instead of this interprocessor interrupt, communication by a memory interface may be used.

Next, a specific processing flow of the software thus configured will be described. FIG. 3 shows a control processing flow of the control processor 120.

The control processor 120, in S500,
After the initialization by the firmware 121 is completed, an operator or the like reads a control program previously downloaded to the memory 140 from the memory 140 according to a control start instruction, and starts processing.

When the processing is started, a read request is made to the plant interface 300 on the system bus 200 in step S510 according to this control program in order to fetch the plant status data. Upon receiving the read request, the plant interface 300 sets S520.
Then, the input data of the plant control target, that is, the state data of the plant is fetched.

In step S530, the status data taken in is CP
Transfer to U100 as response data. Upon receiving the data, the control processor 120 stores (also saves) the read value in the memory 140 in step S540, and in step S550, performs arithmetic processing based on the read data according to the control program. In S560, a data write request is made to the plant interface 300 by using the calculation result as a control instruction. Upon receiving the data write request, the plant interface 300 outputs data to the plant control target according to this request and performs necessary control in S570.

Thus, the control processor 120 is
By repeating the processing from S510 to S570 at a cycle of several milliseconds to several hundreds of milliseconds, real-time control is guaranteed.

Next, a communication processing flow of the communication processor 110 will be described with reference to FIGS. In Figure 4,
A processing flow of monitoring of the communication processor 110 is shown, and FIG. 5 shows an example of a processing flow of operation.

As shown in FIG. 4, the communication processor 11
Similarly to the control processor 120, 0 also reads the communication program from the memory 140 in S600 after the initialization by the firmware 111 is completed, and in S610,
It waits for a request from the terminal 20.

Upon receiving a data transfer request from the terminal 20 in S620, the communication processor 110 reads the plant state data stored in the memory 140 (also referred to as saving) in accordance with the data transfer request in S630. Then
In step S640, the data is transferred to the terminal 20 via the bridge LSI 130, the network interface 150, and the Internet 10.

Here, since the communication processing via the Internet 10 is processed by the communication processor 110, the control program processing of the control processor 120 can be prevented from being hindered and the plant can be monitored. As a result, if the processing of the control processor 120 for a certain period is hindered for some reason, the real-time control is no longer guaranteed, which may damage the plant equipment or, in the worst case, cause social damage such as power failure or water outage. Can be prevented.

Here, the communication processor 110 executes S6.
When memory read processing is performed at 30, if memory bus contention with the control processor 120 occurs, processing of a fixed period is hindered, and real-time control may be impaired. Therefore, in the present embodiment, for memory access from both the control processor 120 and the communication processor 110, the bridge LSI 130 absorbs the overhead at the time of memory access to improve the transfer performance of the memory bus. ing. In addition, when a program is created so that the cache memory built in the control processor 120 is temporarily stored and the cache memory is effectively used, or when a memory bus conflict occurs, a single memory access from the communication processor is performed. Since the amount is limited, the real-time control can be guaranteed even if a memory bus conflict occurs.

Next, an example of operating the plant via the Internet will be described with reference to FIG. Communication processor 11
For initialization of 0 and program loading, refer to FIG.
It is performed in the same manner as in the case of monitoring shown in.

When the supervisor (also referred to as an operator) needs to change the plant control parameters by looking at the monitoring data in FIG. 4, in S700, an instruction to change the parameters is issued on the operation screen or the like on the terminal 20. . This parameter change instruction is sent from the terminal 20 to the Internet 1 in step S710.
It is transmitted to the target controller 100 via 0.

The communication processor 110, in S720,
When the parameter change request is received from the terminal 20, S7
At 30, the inter-processor interrupt signal 101 is sent to the control processor 120 to notify that the parameter change is necessary.

The control processor 120 performs control program processing at a constant cycle, and operates in the interrupt disabled state until the series of processing is completed, and after the series of processing is completed, in S740, As the interrupt can be accepted, the inter-processor interrupt signal 10 is sent at this timing.
1 is accepted, and a response permitting parameter change is sent to the communication processor 110.

The communication processor 110, which has received the response permitting the parameter change, follows the request from the terminal 20.
In S750, the data in the parameter area of the memory 140 is changed, and the inter-processor interrupt signal 101 is performed again,
The control processor 120 is notified of the completion of the parameter change, and the terminal 20 is notified of the completion of the parameter change in step S760.

Here, the memory 14 by changing the parameters
When the access time to 0 is calculated and it is determined that the access time to the memory 140 may affect the real-time processing of the control processor 120, the amount of the parameter to be changed is limited and the control is performed. The control processor 12 sets the amount of parameters to be changed from the cycle time.
Change the parameter to 0. As a result, it is possible to guarantee real-time control even when the control parameter is changed from the terminal.

[0039]

According to the present invention, two CPU modules are provided in the controller, and the bridge LSI switches between the memory and the memory so that the control processor does not perform normal communication processing. It is possible to monitor and control via the Internet while ensuring the above.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a control system that is an embodiment of the present invention.

FIG. 2 is a configuration diagram of a controller according to the present embodiment.

FIG. 3 is a flowchart of control processing of a control processor.

FIG. 4 is a flowchart of a process of monitoring a communication processor.

FIG. 5 is a flowchart of a process of operating a communication processor.

[Explanation of symbols]

10 ... Internet, 20 ... Monitoring operation terminal, 100 ...
Controller, 101 ... Interprocessor interrupt signal, 1
10 ... Communication processor, 111, 121 ... Firmware, 112, 122 ... Real-time OS, 113 ... Network interface driver, 114, 124
... middle software, 115 ... internet protocols such as http, ftp, 116 ... communication task, 120 ... control processor, 123 ... plant interface driver, 125 ... control task, 130 ... bridge LS
I, 140 ... Memory, 150 ... Network interface, 160 ... System bus interface, 20
0 ... System bus, 300 ... Plant interface, 400 ... Plant.

Continued front page    (72) Inventor Koji Masui             5-2-1 Omika-cho, Hitachi City, Ibaraki Prefecture             Information Control Systems Division, Hitachi, Ltd.             Within (72) Inventor Wataru Sasaki             5-2-1 Omika-cho, Hitachi City, Ibaraki Prefecture             Information Control Systems Division, Hitachi, Ltd.             Within F-term (reference) 5H215 AA01 AA02 BB20 CC09 CX08                       CX09 GG03 HH08 JJ20 KK04                       KK06                 5K048 BA23 CA08 DA05 DC04 EA11                       EB02 EB12 EB13 FC01 HA01                       HA02

Claims (8)

[Claims] 1. A control processor, a communication processor, a bridge LSI connected to each of the control processor and the communication processor, and the bridge LSI.
A controller comprising a memory connected to the device, a system bus interface for connecting to a controlled object via a system bus, and a network interface for connecting to a terminal via the Internet. 2. A control processor, a communication processor, a bridge LSI connected to each of the control processor and the communication processor, and the bridge LSI.
A memory connected to the control processor, a system bus interface connected to the control processor via a bridge LSI for the control processor to monitor and control an object to be controlled, and a communication connected to the communication processor via the bridge LSI. A controller characterized in that the processor has an internet interface for internet communication with the terminal. 3. The software of the communication processor comprises:
The controller according to claim 1 or 2, which comprises firmware, a real-time OS including a network interface driver, middle software including an Internet protocol such as ftp, ttp, and a communication task. 4. The software of the control processor is
4. The controller according to claim 1, which comprises firmware, a real-time OS including a controlled interface driver, middle software, and a control task. 5. A real-time OS for the control processor
An inter-processor interrupt interface, a memory interface, or a memory interface between the processor and the real-time OS of the communication processor is provided.
5. The controller according to any one of 4 to 4. 6. The controller according to claim 1, wherein when the memory is accessed from both the control processor and the communication processor, the bridge LSI absorbs the overhead of accessing the memory. 7. The control processor has a built-in cache memory, and when the memory is accessed from both the control processor and the communication processor, the cache memory is temporarily stored. The controller according to any one of Items 1 to 4. 8. The memory access capacity of the communication processor is limited once when the memory is accessed from both the control processor and the communication processor. Controller.