JP2003151770A - Self-emitting display device - Google Patents
Self-emitting display deviceInfo
- Publication number
- JP2003151770A JP2003151770A JP2001343568A JP2001343568A JP2003151770A JP 2003151770 A JP2003151770 A JP 2003151770A JP 2001343568 A JP2001343568 A JP 2001343568A JP 2001343568 A JP2001343568 A JP 2001343568A JP 2003151770 A JP2003151770 A JP 2003151770A
- Authority
- JP
- Japan
- Prior art keywords
- self
- electrode
- display device
- light
- organic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 claims abstract description 22
- 238000005192 partition Methods 0.000 claims description 20
- 229910052751 metal Inorganic materials 0.000 claims description 10
- 239000002184 metal Substances 0.000 claims description 10
- 230000003287 optical effect Effects 0.000 claims description 10
- 239000000463 material Substances 0.000 claims description 4
- 230000001681 protective effect Effects 0.000 abstract description 39
- 239000010408 film Substances 0.000 description 102
- 239000010410 layer Substances 0.000 description 55
- 239000010409 thin film Substances 0.000 description 55
- 239000003990 capacitor Substances 0.000 description 17
- 239000004065 semiconductor Substances 0.000 description 17
- 239000011229 interlayer Substances 0.000 description 15
- 239000004973 liquid crystal related substance Substances 0.000 description 12
- 239000011521 glass Substances 0.000 description 7
- 230000002093 peripheral effect Effects 0.000 description 7
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 7
- 229920005591 polysilicon Polymers 0.000 description 7
- 239000012535 impurity Substances 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- 230000001902 propagating effect Effects 0.000 description 5
- 238000003860 storage Methods 0.000 description 5
- 239000004925 Acrylic resin Substances 0.000 description 4
- 229920000178 Acrylic resin Polymers 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 239000011159 matrix material Substances 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 239000004020 conductor Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 229910000838 Al alloy Inorganic materials 0.000 description 2
- 229910004205 SiNX Inorganic materials 0.000 description 2
- COHCXWLRUISKOO-UHFFFAOYSA-N [AlH3].[Ba] Chemical compound [AlH3].[Ba] COHCXWLRUISKOO-UHFFFAOYSA-N 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000000605 extraction Methods 0.000 description 2
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 2
- 239000011241 protective layer Substances 0.000 description 2
- 238000002834 transmittance Methods 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 229910052784 alkaline earth metal Inorganic materials 0.000 description 1
- 150000001342 alkaline earth metals Chemical class 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 230000009849 deactivation Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 239000000284 extract Substances 0.000 description 1
- 230000005525 hole transport Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 230000002452 interceptive effect Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 229910052761 rare earth metal Inorganic materials 0.000 description 1
- 150000002910 rare earth metals Chemical class 0.000 description 1
- 230000008707 rearrangement Effects 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 229920003002 synthetic resin Polymers 0.000 description 1
- 239000000057 synthetic resin Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/80—Constructional details
- H10K59/875—Arrangements for extracting light from the devices
Landscapes
- Electroluminescent Light Sources (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は各表示画素が光透過
性基板上に形成される有機ＥＬ（Electro Luminescenc
e)素子のような自己発光素子を用いて構成される自己発
光表示装置に関し、特にこの自己発光素子からの光が光
透過性基板を介して外部に取り出される自己発光表示装
置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an organic EL (Electro Luminescenc) in which each display pixel is formed on a light transmissive substrate.
The present invention relates to a self-luminous display device configured by using a self-luminous element such as an element (e), and particularly to a self-luminous display device in which light from the self-luminous element is extracted to the outside through a light transmissive substrate.
【０００２】[0002]
【従来の技術】液晶表示装置に代表される平面表示装置
は、パーソナルコンピュータ、情報携帯端末或いはテレ
ビジョン等の表示装置として広く利用されている。その
中で、アクティブマトリクス型液晶表示装置は、薄型、
軽量かつ低消費電力等の特長を活かし、年々利用範囲は
増加しつつある。2. Description of the Related Art Flat panel display devices represented by liquid crystal display devices are widely used as display devices for personal computers, portable information terminals, televisions and the like. Among them, the active matrix type liquid crystal display device is a thin type,
Utilizing the advantages of light weight and low power consumption, the range of use is increasing year by year.
【０００３】アクティブマトリクス型液晶表示装置は、
例えばマトリクス上に配置される複数の表示画素、これ
ら表示画素の行に沿って配置される複数の走査線、これ
ら表示画素の列に沿って配置される複数の信号線、これ
ら走査線および信号線の交差部近傍にそれぞれ配置され
る複数の画素スイッチング素子を備えた液晶表示パネル
と、ドライバＩＣチップとして液晶表示パネルの端部に
実装されこの液晶表示パネルの動作を制御する表示制御
回路とにより構成される。近年では、液晶表示パネルの
製造コストを低減するため、上述のドライバＩＣチップ
を実装する代わりに表示制御回路を画素スイッチング素
子と同様に例えばＭＯＳ薄膜トランジスタで構成して、
液晶表示パネルに一体形成する駆動回路内蔵型液晶表示
パネルが製品化されている。通常、このＭＯＳ薄膜トラ
ンジスタには、チャネル領域を流れるキャリアが電子で
あるＮチャネル型と、チャネル領域を流れるキャリアが
正孔であるＰチャネル型とがあり、両者の利点を活かし
た相補的な組み合わせで回路が構成される。The active matrix type liquid crystal display device is
For example, a plurality of display pixels arranged on a matrix, a plurality of scanning lines arranged along rows of these display pixels, a plurality of signal lines arranged along columns of these display pixels, these scanning lines and signal lines Composed of a liquid crystal display panel provided with a plurality of pixel switching elements respectively arranged in the vicinity of the intersection of the liquid crystal display panel and a display control circuit mounted on an end portion of the liquid crystal display panel as a driver IC chip and controlling the operation of the liquid crystal display panel. To be done. In recent years, in order to reduce the manufacturing cost of a liquid crystal display panel, instead of mounting the above-mentioned driver IC chip, the display control circuit is configured by a MOS thin film transistor like the pixel switching element,
A liquid crystal display panel with a built-in drive circuit integrally formed with the liquid crystal display panel has been commercialized. Generally, this MOS thin film transistor is classified into an N-channel type in which carriers flowing in the channel region are electrons and a P-channel type in which carriers flowing in the channel region are holes. The circuit is constructed.
【０００４】最近では、有機ＥＬ素子を用いた有機ＥＬ
表示装置が注目され、盛んに研究・開発が行われてい
る。液晶表示素子が印加電圧に応じた光透過率で光を透
過する受動型素子であるのに対し、有機ＥＬ素子は電流
供給量に応じた明るさで発光する能動型素子である。有
機ＥＬ表示装置はこのように自己発光する有機ＥＬ素子
を用いているため、平面表示装置として一般的な液晶表
示装置よりも優れた次のような長所を持つ。すなわち、
第１に、自己発光型であるため鮮明な表示と広い視野角
が得られ、さらにバックライトを必要としないのでより
薄型・軽量・低消費電力化できる。第２に、高速に応答
するので動画再生に適している。第３に、固層による発
光であるため使用温度範囲が広がる可能性がある。Recently, an organic EL using an organic EL element
Display devices have been attracting attention and are being actively researched and developed. The liquid crystal display element is a passive element that transmits light with a light transmittance according to an applied voltage, whereas the organic EL element is an active element that emits light with a brightness according to a current supply amount. Since the organic EL display device uses the organic EL element that self-luminesces in this way, it has the following advantages over a liquid crystal display device which is generally used as a flat display device. That is,
First, since it is a self-luminous type, a clear display and a wide viewing angle can be obtained, and since it does not require a backlight, it can be made thinner, lighter and consume less power. Secondly, since it responds at high speed, it is suitable for moving image reproduction. Thirdly, since the light is emitted by the solid layer, the operating temperature range may be expanded.
【０００５】[0005]
【発明が解決しようとする課題】典型的な有機ＥＬ表示
装置では、複数の有機ＥＬ素子が図９に示す光透過性基
板を覆うゲート絶縁膜上およびこのゲート絶縁膜を覆う
層間膜上で配線される。各有機ＥＬ素子は層間膜上の配
線を覆って形成される保護膜上に積層されるアノード電
極、有機ＥＬ薄膜部、およびカソード電極を有する。こ
の有機ＥＬ薄膜部は例えばアノード電極上に形成される
陽極バッファ層とこの陽極バッファ層上に形成される有
機発光層とを組み合わせて構成され、保護膜上に形成さ
れる隔壁膜により囲まれる。この有機ＥＬ表示装置で
は、有機ＥＬ薄膜部からの光が図９に示すＰ１方向に保
護膜および層間膜を透過して光透過性基板の外部に出射
されるだけでなく、保護膜に対して低屈折率である隔壁
膜および層間膜との界面、およびアノード電極との界面
で反射しながら保護膜内をＰ０方向、つまり隣接画素方
向に伝搬する。有機ＥＬ薄膜部からの光の５０％程度は
Ｐ０方向に伝搬するため、光透過性基板の外部への光出
射効率が低く、充分な輝度を得ることが困難であった。
また、有機ＥＬ薄膜部からの光が保護膜内を平面的に伝
搬して同一発光色の発光層からの光と干渉することもあ
る。In a typical organic EL display device, a plurality of organic EL elements are wired on the gate insulating film covering the light transmissive substrate shown in FIG. 9 and on the interlayer film covering the gate insulating film. To be done. Each organic EL element has an anode electrode, an organic EL thin film portion, and a cathode electrode which are laminated on a protective film formed to cover the wiring on the interlayer film. The organic EL thin film portion is configured by combining, for example, an anode buffer layer formed on the anode electrode and an organic light emitting layer formed on the anode buffer layer, and is surrounded by a partition film formed on the protective film. In this organic EL display device, not only the light from the organic EL thin film portion is transmitted to the outside of the light transmissive substrate through the protective film and the interlayer film in the P1 direction shown in FIG. The light propagates in the protective film in the P0 direction, that is, in the direction of the adjacent pixel while reflecting at the interface with the partition film and the interlayer film having a low refractive index and the interface with the anode electrode. Since about 50% of the light from the organic EL thin film portion propagates in the P0 direction, the light emission efficiency to the outside of the light transmissive substrate is low and it is difficult to obtain sufficient brightness.
In addition, the light from the organic EL thin film portion may propagate in the protective film in a plane and interfere with the light from the light emitting layer of the same emission color.
【０００６】本発明はこのような事情に鑑みなさられた
もので、外部への光出射効率を向上することができる自
己発光表示装置を提供することを目的とする。The present invention has been made in view of the above circumstances, and an object thereof is to provide a self-luminous display device capable of improving the efficiency of light emission to the outside.
【０００７】[0007]
【課題を解決するための手段】本発明によれば、光透過
性基板上に形成される光透過性の誘電体層と、この誘電
体層上に形成されこの誘電体層を透過する光を発生する
自己発光素子を備えた複数の表示画素とを備え、一表示
画素から隣接する他の表示画素に向かう光の伝搬範囲を
制限する構造部を誘電体層と同一平面上でかつ一表示画
素と他の表示画素間に設けた自己発光表示装置が提供さ
れる。According to the present invention, a light-transmissive dielectric layer formed on a light-transmissive substrate and light transmitted through the dielectric layer formed on the dielectric layer are provided. A plurality of display pixels each having a self-luminous element that emits light, and a structure portion that limits the propagation range of light traveling from one display pixel to another adjacent display pixel is on the same plane as the dielectric layer and one display pixel And a self-luminous display device provided between other display pixels.
【０００８】この自己発光表示装置では、誘電体層が各
自己発光素子により発生され誘電体層内を伝搬する光の
向きを変化させてこの光の平面的な伝搬範囲を制限する
構造部により区画される。これにより、誘電体層内を平
面的に伝搬する光の一部が誘電体層の外部に出射される
ようになるため、外部への光出射効率が向上して、高い
輝度を得ることが可能となる。また、誘電体層内を平面
的に伝搬する光が同一発光色の自己発光素子間で干渉す
ることも避けられる。In this self-luminous display device, the dielectric layer is partitioned by a structure portion that changes the direction of light generated by each self-luminous element and propagating in the dielectric layer to limit the planar propagation range of this light. To be done. As a result, part of the light propagating in a plane in the dielectric layer is emitted to the outside of the dielectric layer, so that the efficiency of emitting light to the outside is improved and high brightness can be obtained. Becomes It is also possible to prevent light that propagates in a plane in the dielectric layer from interfering between self-luminous elements of the same emission color.
【０００９】[0009]
【発明の実施の形態】以下、本発明の一実施形態に係る
有機ＥＬ表示装置について図面を参照して説明する。BEST MODE FOR CARRYING OUT THE INVENTION An organic EL display device according to an embodiment of the present invention will be described below with reference to the drawings.
【００１０】図１は有機ＥＬ表示装置全体の回路構成例
を示す。この有機ＥＬ表示装置は有機ＥＬパネルＰＮＬ
および外部駆動回路ＤＲＶを備える。FIG. 1 shows a circuit configuration example of the entire organic EL display device. This organic EL display device is an organic EL panel PNL.
And an external drive circuit DRV.
【００１１】外部駆動回路ＤＲＶは、パーソナルコンピ
ュータ等の信号源から出力されたデータを受けとり、有
機ＥＬパネルＰＮＬを駆動するための制御信号の生成
や、映像信号の並び替え等のデジタル処理を行うコント
ローラ部１と、映像信号をデジタル／アナログ変換する
複数のドライバＩＣ２と、コントローラ部１、ドライバ
ＩＣ２および有機ＥＬパネルＰＮＬの駆動用電源電圧等
を生成するＤＣ／ＤＣコンバータ３により構成される。The external drive circuit DRV is a controller that receives data output from a signal source such as a personal computer and generates a control signal for driving the organic EL panel PNL and performs digital processing such as rearrangement of video signals. It is composed of a section 1, a plurality of driver ICs 2 for converting a video signal into digital / analog, a controller section 1, a driver IC 2 and a DC / DC converter 3 for generating a power supply voltage for driving the organic EL panel PNL.
【００１２】有機ＥＬパネルＰＮＬは、外部駆動回路Ｄ
ＲＶから供給される映像信号を対応する信号線にサンプ
リングする信号線駆動回路５、所定タイミングで走査線
に走査信号を出力する走査線駆動回路６、および表示領
域７により構成される。表示領域７では、複数の表示画
素ＰＸがマトリクス状に配置され、複数の信号線Ｘ（Ｘ
１〜Ｘｍ）が複数の表示画素ＰＸの行に沿って配置さ
れ、複数の走査線Ｙ（Ｙ１〜Ｙｎ）が複数の表示画素Ｐ
Ｘの列に沿って配置される。行方向に隣接する３個の表
示画素ＰＸは１個のカラー表示画素を構成し、それぞれ
赤、緑、および青色に対応する波長の光を発する。各表
示画素ＰＸは対応信号線Ｘおよび対応走査線Ｙに割り当
てられるスイッチング用素子として例えばＮチャネル型
薄膜トランジスタＮ11、映像信号電圧保持用コンデンサ
Ｃ11、有機ＥＬ素子駆動用素子として例えばＰチャネル
型薄膜トランジスタＰ11、および有機ＥＬ素子OLEDで構
成される。有機ＥＬ素子OLEDは第１電源線Ｖddおよび第
２電源線Ｖss間でＰチャネル型薄膜トランジスタＰ11と
直列に接続される。Ｎチャネル型薄膜トランジスタＮ11
は走査線Ｙから供給される走査信号の制御により信号線
Ｘ上の映像信号を取り込み、Ｐチャネル型薄膜トランジ
スタＰ11のゲートに印加する。映像信号電圧保持用コン
デンサＣ11は第１電源線ＶddとＰチャネル型薄膜トラン
ジスタＰ11のゲート間に形成され、薄膜トランジスタＮ
11が非導通状態である間映像信号を保持する。The organic EL panel PNL has an external drive circuit D.
A signal line driving circuit 5 that samples the video signal supplied from the RV to the corresponding signal line, a scanning line driving circuit 6 that outputs a scanning signal to a scanning line at a predetermined timing, and a display area 7. In the display area 7, a plurality of display pixels PX are arranged in a matrix and a plurality of signal lines X (X
1 to Xm) are arranged along the rows of the plurality of display pixels PX, and the plurality of scanning lines Y (Y1 to Yn) are arranged in the plurality of display pixels P.
Arranged along the X column. The three display pixels PX adjacent to each other in the row direction form one color display pixel, and emit light of wavelengths corresponding to red, green, and blue, respectively. Each display pixel PX is, for example, an N-channel thin film transistor N11 as a switching element assigned to the corresponding signal line X and the corresponding scanning line Y, a video signal voltage holding capacitor C11, and an P-channel thin film transistor P11 as an organic EL element driving element. And an organic EL element OLED. The organic EL element OLED is connected in series with the P-channel type thin film transistor P11 between the first power supply line Vdd and the second power supply line Vss. N-channel thin film transistor N11
Controls the scanning signal supplied from the scanning line Y to take in the video signal on the signal line X and apply it to the gate of the P-channel type thin film transistor P11. The video signal voltage holding capacitor C11 is formed between the first power supply line Vdd and the gate of the P-channel type thin film transistor P11, and is connected to the thin film transistor N11.
Holds the video signal while 11 is non-conductive.
【００１３】次に、各表示画素ＰＸの駆動方法について
説明する。図２は一例として表示画素ＰＸの回路構成を
示し、図３はこの回路の動作波形を示す。Next, a method of driving each display pixel PX will be described. FIG. 2 shows the circuit configuration of the display pixel PX as an example, and FIG. 3 shows the operation waveform of this circuit.
【００１４】走査線Ｙの走査信号Ｖscanが高レベルの期
間は、Ｎチャネル型薄膜トランジスタＮ11がアクティブ
状態であるため、Ｎチャネル型薄膜トランジスタＮ11を
介して信号線Ｘの映像信号電圧ＶsigがコンデンサＣ11
の一端側電極に印加され、このコンデンサＣ11を充電す
る。尚、映像信号電圧保持用コンデンサＣ11の一端側電
極に最終的にホールドされる電圧は、走査線の走査信号
Ｖscanが低レベルとなった時に信号線Ｘに設定されてい
る映像信号電圧Ｖsigである。映像信号電圧保持用コン
デンサＣ11の一端側電極はさらにＰチャネル型薄膜トラ
ンジスタＰ11のゲート電極Ｇに接続され、他端側電極は
Ｐチャネル型薄膜トランジスタＰ11のソース電極Ｓに接
続されているため、映像信号電圧保持用コンデンサＣ11
に充電された電圧は、Ｐチャネル型薄膜トランジスタＰ
11のゲート-ソース間電圧Ｖgsとなる。While the scanning signal Vscan of the scanning line Y is at a high level, the N-channel type thin film transistor N11 is in an active state, so that the video signal voltage Vsig of the signal line X is passed through the N-channel type thin film transistor N11 and the capacitor C11.
Is applied to the electrode on one end side to charge the capacitor C11. The voltage finally held at the one end side electrode of the video signal voltage holding capacitor C11 is the video signal voltage Vsig set on the signal line X when the scanning signal Vscan of the scanning line becomes low level. . One end side electrode of the video signal voltage holding capacitor C11 is further connected to the gate electrode G of the P-channel type thin film transistor P11, and the other end side electrode is connected to the source electrode S of the P-channel type thin film transistor P11. Holding capacitor C11
The voltage charged in the P-channel thin film transistor P
It becomes the gate-source voltage Vgs of 11.
【００１５】Ｐチャネル型薄膜トランジスタＰ11のドレ
イン−ソース間電流Ｉｄｓはゲート−ソース間電圧Ｖｇ
ｓによって増減し、Ｉds＝ＩELであるから、映像信号電
圧Ｖsigによって有機EL素子OLEDに流れる電流ＩELが変
化し、所望の輝度で発光することができる。The drain-source current Ids of the P-channel type thin film transistor P11 is the gate-source voltage Vg.
Since it increases or decreases according to s and Ids = IEL, the current IEL flowing through the organic EL element OLED changes according to the video signal voltage Vsig, and light can be emitted with a desired brightness.
【００１６】図４は有機ＥＬパネルの１カラー画素の平
面構造を示す。図４に示すように、表示画素ＰＸは走査
線Ｙと信号線Ｘとに囲まれた領域に形成され、Ｎチャネ
ル型薄膜トランジスタＮ11が走査線Ｙおよび信号線Ｘの
交差位置付近に配置される。Ｎチャネル型薄膜トランジ
スタＮ11のソース電極Ｓは信号線Ｘに接続され、ゲート
電極Ｇは走査線Ｙに接続され、ドレイン電極ＤはＰチャ
ネル型薄膜トランジスタＰ11のゲート電極Ｇに接続され
る。薄膜トランジスタＮ11のドレイン電極Ｄおよび薄膜
トランジスタＰ11のゲート電極Ｇ間のノードＮＤは第１
電源線Ｖddに容量結合して蓄積容量を構成する容量電極
を兼ねる。この蓄積容量はＰチャネル型薄膜トランジス
タＰ11のゲート電極Ｇに印加される映像信号電圧を保持
する映像信号電圧保持用コンデンサＣ11として設けられ
ている。Ｐチャネル型薄膜トランジスタＰ11のソース電
極Ｓは有機ＥＬ素子OLEDを駆動する第１電源線Ｖddに接
続され、他方のドレイン電極Ｄは有機ＥＬ素子OLEDの第
１電極、ここではアノード電極ＡＤに接続される。FIG. 4 shows a planar structure of one color pixel of the organic EL panel. As shown in FIG. 4, the display pixel PX is formed in a region surrounded by the scanning line Y and the signal line X, and the N-channel thin film transistor N11 is arranged near the intersection of the scanning line Y and the signal line X. The source electrode S of the N-channel type thin film transistor N11 is connected to the signal line X, the gate electrode G is connected to the scanning line Y, and the drain electrode D is connected to the gate electrode G of the P-channel type thin film transistor P11. The node ND between the drain electrode D of the thin film transistor N11 and the gate electrode G of the thin film transistor P11 is the first
It also serves as a capacitance electrode that is capacitively coupled to the power supply line Vdd to form a storage capacitance. This storage capacitor is provided as a video signal voltage holding capacitor C11 for holding the video signal voltage applied to the gate electrode G of the P-channel thin film transistor P11. The source electrode S of the P-channel type thin film transistor P11 is connected to the first power supply line Vdd for driving the organic EL element OLED, and the other drain electrode D is connected to the first electrode of the organic EL element OLED, here the anode electrode AD. .
【００１７】図５は図４に示すV-V線に沿った断面を示
し、図６は図４に示すVI-VI線に沿った断面を示す。図
５および図６に示すように、有機ＥＬパネルＰＮＬは、
ガラス等の光透過性絶縁基板１０上に、薄膜トランジス
タＰ11,Ｎ11および有機ＥＬ素子OLEDを順に積層した構
造を持つ。ガラス基板１０は例えば合成樹脂のようなの
絶縁材、導電材、または半導体等の基板に置き換えても
よいが、導電材または半導体を用いる場合には、基板１
０をＳｉＯ2やＳｉＮなどの絶縁膜で覆いこの絶縁膜上
に薄膜トランジスタＰ11,Ｎ11および有機ＥＬ素子OLED
を形成する必要がある。Ｎチャネル型薄膜トランジスタ
Ｎ11およびＰチャネル型薄膜トランジスタＰ11の各々は
ゲート電極Ｇを半導体層ＰＳの上方にゲート絶縁膜１１
を介して設けたトップゲート型である。半導体層ＰＳは
島状の能動層としてガラス基板１０上に形成される例え
ばポリシリコン（Poly-Silicon）薄膜であり、ゲート電
極Ｇに対応する位置に配置されるチャネル領域、および
所定濃度の不純物を含んだ導電領域であるソースおよび
ドレイン領域を有する。ゲート絶縁膜１１は薄膜トラン
ジスタＰ11，Ｎ11の半導体層ＰＳと共にガラス基板１０
を覆うように形成される。走査線Ｙおよび映像信号電圧
保持用コンデンサＣ11の容量電極は薄膜トランジスタＰ
11,Ｎ11のゲート電極Ｇと共に同一材料でゲート絶縁膜
１１上に形成され、例えば屈折率１．５のＳｉＯｘから
なる層間膜１２により覆われる。薄膜トランジスタＰ1
1,Ｎ11のソース電極Ｓ，ドレイン電極Ｄ並びに第１電源
線Ｖddは層間膜１２上に形成される。層間膜１２は半導
体層ＰＳのソース領域およびドレイン領域、映像信号電
圧保持用コンデンサＣ11の容量電極を部分的に露出する
複数のコンタクトホールを有し、薄膜トランジスタＰ1
1,Ｎ11のソース電極Ｓ，ドレイン電極Ｄがこれらコンタ
クトホールを介して半導体層ＰＳのソース領域およびド
レイン領域に接続される。また、Ｎチャネル型薄膜トラ
ンジスタＮ11のドレイン電極Ｄは映像信号電圧保持用コ
ンデンサＣ11の容量電極に接続される。薄膜トランジス
タＰ11,Ｎ11のソース電極Ｓ，ドレイン電極Ｄ並びに第1
電源線Ｖddは例えば屈折率１．９のＳｉＮｘでなる保護
膜１３により覆われる。FIG. 5 shows a cross section taken along line VV shown in FIG. 4, and FIG. 6 shows a cross section taken along line VI-VI shown in FIG. As shown in FIGS. 5 and 6, the organic EL panel PNL is
It has a structure in which thin film transistors P11 and N11 and an organic EL element OLED are sequentially stacked on a light-transmissive insulating substrate 10 such as glass. The glass substrate 10 may be replaced with a substrate made of, for example, an insulating material such as synthetic resin, a conductive material, or a semiconductor. When a conductive material or a semiconductor is used, the substrate 1 is used.
0 is covered with an insulating film such as SiO 2 or SiN, and thin film transistors P11, N11 and an organic EL element OLED are formed on this insulating film.
Need to be formed. In each of the N-channel type thin film transistor N11 and the P-channel type thin film transistor P11, the gate electrode G is formed above the semiconductor layer PS.
It is a top gate type provided through. The semiconductor layer PS is, for example, a polysilicon (Poly-Silicon) thin film formed on the glass substrate 10 as an island-shaped active layer, and has a channel region arranged at a position corresponding to the gate electrode G and impurities of a predetermined concentration. It has source and drain regions which are the conductive regions included. The gate insulating film 11 is formed on the glass substrate 10 together with the semiconductor layers PS of the thin film transistors P11 and N11.
Is formed so as to cover. The scanning line Y and the capacitance electrode of the video signal voltage holding capacitor C11 are thin film transistors P.
It is formed on the gate insulating film 11 by the same material as the gate electrodes G of 11, 11 and is covered with the interlayer film 12 made of SiOx having a refractive index of 1.5, for example. Thin film transistor P1
The source electrode S, the drain electrode D, and the first power supply line Vdd of 1, N11 are formed on the interlayer film 12. The interlayer film 12 has a plurality of contact holes which partially expose the source region and the drain region of the semiconductor layer PS and the capacitance electrode of the video signal voltage holding capacitor C11, and the thin film transistor P1.
The source electrode S and the drain electrode D of N1 are connected to the source region and the drain region of the semiconductor layer PS through these contact holes. The drain electrode D of the N-channel thin film transistor N11 is connected to the capacitance electrode of the video signal voltage holding capacitor C11. Source electrodes S and drain electrodes D of the thin film transistors P11 and N11 and the first
The power supply line Vdd is covered with a protective film 13 made of SiNx having a refractive index of 1.9, for example.
【００１８】有機ＥＬ素子OLEDは有機ＥＬ薄膜部１４が
光取出し電極となる第1電極および第１電極に対向配置
される第２電極間に保持される構造を有する。第１電極
は本実施例ではアノード電極ＡＤであり、例えば屈折率
２．０のＩＴＯ（Indium TinOxide）のような透明電極
材料から成り、保護膜１３上で島状に形成される。有機
ＥＬ薄膜部１４は例えばアノード電極ＡＤ上に形成され
る陽極バッファ層ＢＦおよびこの陽極バッファ層ＢＦ上
に形成される有機発光層ＥＭを組み合わせて構成され、
保護膜１３上に形成され、第１電極を部分的にあるいは
全部を露出する例えば屈折率１．４の有機材料からなる
隔壁膜１５により囲まれる。第２電極はここではカソー
ド電極ＣＤであって、例えばバリウム・アルミ合金から
成り、発光層ＥＭ上に配線金属層として全画素共通に連
続して形成される。有機ＥＬ素子OLEDでは、アノード電
極ＡＤから注入されたホールと、カソード電極ＣＤから
注入された電子とが有機ＥＬ薄膜部１４の内部で再結合
したときに、有機分子を励起して励起子を発生させる。
この励起子が放射失活する過程で発光し、この光が有機
ＥＬ薄膜部１４から光透過性を有するアノード電極ＡＤ
および透明絶縁基板１０を介して外部へ放出される。The organic EL element OLED has a structure in which the organic EL thin film portion 14 is held between a first electrode which serves as a light extraction electrode and a second electrode which is arranged to face the first electrode. The first electrode is the anode electrode AD in this embodiment, is made of a transparent electrode material such as ITO (Indium Tin Oxide) having a refractive index of 2.0, and is formed in an island shape on the protective film 13. The organic EL thin film portion 14 is configured by combining, for example, an anode buffer layer BF formed on the anode electrode AD and an organic light emitting layer EM formed on this anode buffer layer BF,
The first electrode is surrounded by a partition film 15 formed on the protective film 13 and partially or entirely exposing the first electrode and made of an organic material having a refractive index of 1.4, for example. Here, the second electrode is the cathode electrode CD, made of, for example, barium-aluminum alloy, and is continuously formed as a wiring metal layer on the light emitting layer EM in common to all pixels. In the organic EL element OLED, when holes injected from the anode electrode AD and electrons injected from the cathode electrode CD are recombined inside the organic EL thin film portion 14, the organic molecules are excited to generate excitons. Let
The excitons emit light in the process of radiation deactivation, and this light is transmitted from the organic EL thin film portion 14 to the anode electrode AD having a light transmitting property.
And, it is released to the outside through the transparent insulating substrate 10.
【００１９】上記の構造の有機ＥＬ表示装置において
は、隣接する表示画素間にこれらの第１電極を電気的に
絶縁する隔壁膜１５が配置され、全表示画素の第２電極
として共通に設けられる第２電極が隔壁膜１５を覆うよ
うに構成されるため、隔壁膜１５の開口の内側面のテー
パー角を制御し、隣接表示画素方向に向かう光を光出射
面側に取り出すことができる。つまり、透過回折してカ
ソード電極ＣＤで全反射されてＰ３方向から外部に取り
出すことが可能となる。In the organic EL display device having the above structure, the partition wall film 15 for electrically insulating these first electrodes is arranged between the adjacent display pixels and is commonly provided as the second electrode of all the display pixels. Since the second electrode is configured to cover the partition film 15, it is possible to control the taper angle of the inner side surface of the opening of the partition film 15 and extract the light traveling in the direction of the adjacent display pixel to the light emission surface side. In other words, the light can be transmitted and diffracted, totally reflected by the cathode electrode CD, and taken out from the P3 direction.
【００２０】また、この有機ＥＬ表示装置は保護膜１３
が各有機ＥＬ素子OLEDの有機ＥＬ薄膜部１４から発生さ
れ保護膜１３内を伝搬する光の向きを変化させてこの光
の平面的な伝搬範囲を制限する構造部により区画され
る。この構造部は、例えば隣接表示画素間に形成された
光路変更面と、この光路変更面を介して保護膜１３に密
接して配置され保護膜１３よりも屈折率の小さい層とに
より構成され、保護層と同一平面上に形成されるもので
ある。ここでは、行方向に隣り合う表示画素間および列
方向に隣り合う表示画素間の保護膜１３に形成された溝
ＧＲとこの溝ＧＲに収容される隔壁膜１５の一部により
構成される。つまりここでは、溝ＧＲの内壁面が光路変
更面を形成し、隔壁膜の一部が保護層よりも屈折率の小
さい層を形成する。図４に示すように信号線と平行な方
向に配置される溝ＧＲは各表示画素間にそれぞれ配置さ
れ、走査線と平行な方向に配置される溝ＧＲは行方向の
画素に共通に連続して配置される。The organic EL display device has a protective film 13
Are divided by a structure portion that changes the direction of light generated from the organic EL thin film portion 14 of each organic EL element OLED and propagates in the protective film 13 to limit the planar propagation range of this light. This structure portion is composed of, for example, an optical path changing surface formed between adjacent display pixels, and a layer which is arranged in close contact with the protective film 13 via the optical path changing surface and has a refractive index smaller than that of the protective film 13. It is formed on the same plane as the protective layer. Here, the groove GR formed in the protective film 13 between the display pixels adjacent to each other in the row direction and between the display pixels adjacent to each other in the column direction and a part of the partition film 15 housed in the groove GR are formed. That is, here, the inner wall surface of the groove GR forms an optical path changing surface, and a part of the partition film forms a layer having a smaller refractive index than the protective layer. As shown in FIG. 4, the grooves GR arranged in the direction parallel to the signal line are arranged between the respective display pixels, and the grooves GR arranged in the direction parallel to the scanning line are continuous in common to the pixels in the row direction. Are arranged.
【００２１】隔壁膜１５は保護膜１３よりも低い屈折率
の材料で構成されので、有機ＥＬ薄膜部１４からの光が
保護膜１３を透過してＰ１方向から外部に出射されず、
屈折率１．９の保護膜１３と屈折率１．５の層間膜１２
の界面で反射され保護膜１３内を隣接表示画素に向かっ
て伝播しても、構造部を形成する屈折率１．４の隔壁膜
１５と屈折率１．９の保護膜１３の界面で反射されてＰ
２方向から外部に出射することが可能となる。Since the partition film 15 is made of a material having a refractive index lower than that of the protective film 13, the light from the organic EL thin film portion 14 does not pass through the protective film 13 and is not emitted to the outside from the P1 direction.
A protective film 13 having a refractive index of 1.9 and an interlayer film 12 having a refractive index of 1.5
Even if it is reflected at the interface of the protective film 13 and propagates through the protective film 13 toward the adjacent display pixel, it is reflected at the interface between the partition film 15 having a refractive index of 1.4 and the protective film 13 having a refractive index of 1.9 that form the structure portion. P
It is possible to emit light from two directions.
【００２２】すなわち、Ｐ１方向に加えてＰ２方向およ
びＰ３方向からも外部へ光を出射できるようになるた
め、外部への光出射効率を向上させて、高い輝度を表示
パネルＰＮＬにおいて得ることか可能となる。That is, since light can be emitted to the outside from the P2 direction and the P3 direction in addition to the P1 direction, it is possible to improve the efficiency of light emission to the outside and obtain high brightness in the display panel PNL. Becomes
【００２３】本実施形態のように、２．０という高屈折
率のＩＴＯからなるアノード電極ＡＤを使用し、その直
下に屈折率１．８以上の高屈折率の保護膜１３を配置
し、さらに、この保護膜１３の屈折率が表示画素ＰＸ間
で非連続となるように構造部を設けた場合、光出射効率
を約１５％高めることができた。As in the present embodiment, the anode electrode AD made of ITO having a high refractive index of 2.0 is used, and the high-refractive-index protective film 13 having a refractive index of 1.8 or more is arranged immediately below the anode electrode AD. When the structure portion is provided so that the refractive index of the protective film 13 is discontinuous between the display pixels PX, the light emission efficiency can be increased by about 15%.
【００２４】尚、本実施形態では保護膜１３と層間膜１
２の界面で反射して入射する光を反射／透過回折させる
保護膜１３と隔壁膜１５の界面となる溝ＧＲの傾斜面
が、この傾斜面と基板１０平面とのなす角θが９０°以
上となる逆テーパとすることが輝度を向上するために好
ましいが、９０°未満であってもかなりの効果が得られ
る。In this embodiment, the protective film 13 and the interlayer film 1 are
The inclined surface of the groove GR, which is the interface between the protective film 13 for reflecting / transmitting and diffracting the incident light reflected by the interface of 2 and the partition film 15, forms an angle θ of 90 ° or more between the inclined surface and the plane of the substrate 10. It is preferable that the taper is an inverse taper to improve the brightness, but even if it is less than 90 °, a considerable effect can be obtained.
【００２５】以上説明したように、本発明によれば光出
射面への光取り出し効率の向上された自己発光表示装置
を実現できる。赤、青、緑でなる一カラー画素からの光
がこれに隣接するカラー画素へ向かうのを防止すること
ができ、隣接カラー画素間での混色を抑制することがで
きる。また、赤白、青白、緑白等２値表示に際しては、
隣接画素間でのクロストークを抑制し、コントラストを
向上させることができる。As described above, according to the present invention, it is possible to realize a self-luminous display device in which the light extraction efficiency to the light emitting surface is improved. It is possible to prevent light from one color pixel composed of red, blue, and green from going to the color pixel adjacent thereto, and it is possible to suppress color mixture between adjacent color pixels. Also, when displaying binary such as red white, blue white, green white,
It is possible to suppress crosstalk between adjacent pixels and improve the contrast.
【００２６】また、この実施形態においては、第１電極
をアノード電極ＡＤ、第２電極をカソード電極ＣＤとす
る場合について説明したが、カソード電極ＣＤを第１電
極、アノード電極ＡＤを第２電極としてもよい。いずれ
の場合も光出射面側を透明導電材料で形成する必要があ
り、例えばカソード電極ＣＤを光出射面側に配置する場
合には、アルカリ土類金属、希土類金属を光透過性を有
する程度に薄く形成することで達成できる。Further, although the case where the first electrode is the anode electrode AD and the second electrode is the cathode electrode CD has been described in this embodiment, the cathode electrode CD is the first electrode and the anode electrode AD is the second electrode. Good. In either case, it is necessary to form the light emitting surface side with a transparent conductive material. For example, when the cathode electrode CD is arranged on the light emitting surface side, an alkaline earth metal or a rare earth metal is provided to such an extent that it has light transmittance. It can be achieved by forming it thin.
【００２７】ここで、自己発光表示装置の製造方法につ
いて説明する。Here, a method of manufacturing the self-luminous display device will be described.
【００２８】最初に、一主表面をアンダーコートしたガ
ラス基板１０が用意され、例えば膜厚５０ｎｍのポリシ
リコン膜がガラス基板１０のアンダーコート表面上に形
成される。ここで、Ｐ型不純物をポリシリコン膜全面に
低濃度注入してもよい。薄膜トランジスタＰ11，Ｎ11の
半導体層ＰＳはこのポリシリコン膜をパターニングする
ことによって形成される。First, a glass substrate 10 having one main surface undercoated is prepared, and a polysilicon film having a film thickness of 50 nm, for example, is formed on the undercoated surface of the glass substrate 10. Here, P-type impurities may be implanted at a low concentration over the entire surface of the polysilicon film. The semiconductor layer PS of the thin film transistors P11 and N11 is formed by patterning this polysilicon film.
【００２９】次に、膜厚８０ｎｍのＳｉＯｘ膜がポリシ
リコンの半導体層ＰＳおよびアンダーコート層を全体的
に覆うゲート絶縁膜１１として形成され、さらにＮ型薄
膜トランジスタの導電領域となる部分、ＭＯＳ構造の蓄
積容量の半導体層を露出し、Ｐ型薄膜トランジスタを構
成する半導体層ＰＳの全面を覆うレジスト膜が形成さ
れ、このレジスト膜をマスクとしてリン等のｎ型不純物
が半導体層ＰＳへ高濃度注入される。Next, a SiOx film having a film thickness of 80 nm is formed as a gate insulating film 11 which entirely covers the semiconductor layer PS and the undercoat layer of polysilicon, and a portion which becomes a conductive region of the N-type thin film transistor, a MOS structure. A resist film that exposes the semiconductor layer of the storage capacitor and covers the entire surface of the semiconductor layer PS forming the P-type thin film transistor is formed, and an n-type impurity such as phosphorus is highly-concentrated into the semiconductor layer PS using this resist film as a mask. .
【００３０】レジスト膜を剥離した後、ＭｏＷが３００
ｎｍの厚さでゲート絶縁膜１１上に堆積される。Ｐ型薄
膜トランジスタのゲート電極Ｇおよび容量電極はこの結
果として得られたＭｏＷ層をパターニングすることによ
って形成される。この時、Ｎ型薄膜トランジスタの半導
体層ＰＳ、周辺回路の蓄積容量の半導体層はＭｏＷ層で
覆われている。After stripping the resist film, MoW is 300
It is deposited on the gate insulating film 11 with a thickness of nm. The gate electrode G and the capacitive electrode of the P-type thin film transistor are formed by patterning the resulting MoW layer. At this time, the semiconductor layer PS of the N-type thin film transistor and the semiconductor layer of the storage capacitor of the peripheral circuit are covered with the MoW layer.
【００３１】次に、ボロン等のＰ型不純物がゲート電極
Ｇをマスクとして用いたイオン注入によりゲート絶縁膜
１１を介してＰ型薄膜トランジスタを構成するポリシリ
コンの半導体層ＰＳに注入され、これによりゲート電極
Ｇ下方のチャネル領域を除く領域に導電領域としてソー
ス領域とドレイン領域を形成する。Next, a P-type impurity such as boron is implanted into the semiconductor layer PS of polysilicon forming the P-type thin film transistor through the gate insulating film 11 by ion implantation using the gate electrode G as a mask, whereby the gate is formed. A source region and a drain region are formed as conductive regions in the region below the electrode G except the channel region.
【００３２】次に、ＭｏＷをパターニングして、Ｎ型薄
膜トランジスタのゲート電極Ｇ、周辺回路の蓄積容量の
上部電極が形成される。Ｎ型薄膜トランジスタのゲート
電極Ｇは導電領域よりも幅狭に形成される。そして、こ
のゲート電極をマスクとしてＮ型不純物が低濃度注入さ
れ、チャネル領域とソース・ドレイン領域間にＬＤＤ領
域を形成する。Next, MoW is patterned to form the gate electrode G of the N-type thin film transistor and the upper electrode of the storage capacitor of the peripheral circuit. The gate electrode G of the N-type thin film transistor is formed narrower than the conductive region. Then, a low concentration of N-type impurities is implanted using this gate electrode as a mask to form an LDD region between the channel region and the source / drain region.
【００３３】次に、膜厚４００ｎｍのＳｉＯｘ膜がゲー
ト電極Ｇ、容量電極およびゲート絶縁膜１１を覆う層間
膜１２として形成される。続いて、複数のコンタクトホ
ールが層間膜１２を貫通して容量電極を露出すると共
に、層間膜１２およびゲート絶縁膜１１を貫通して半導
体層ＰＳのソース領域、ドレイン領域を露出するように
形成され、さらに例えば膜厚５０ｎｍのＭｏ、膜厚４５
０ｎｍのＡｌ、および膜厚１００ｎｍのＭｏが層間膜１
２上に積層される。これら積層金属層はコンタクトホー
ルを介して半導体層ＰＳのソース領域、ドレイン領域に
コンタクトするソース電極Ｓおよびドレイン電極Ｄ、第
1電源線Ｖdd、および信号線Ｘ等を残すようにパターニ
ングされる。Then, a SiOx film having a film thickness of 400 nm is formed as an interlayer film 12 covering the gate electrode G, the capacitor electrode and the gate insulating film 11. Then, a plurality of contact holes are formed so as to penetrate the interlayer film 12 to expose the capacitor electrode and to penetrate the interlayer film 12 and the gate insulating film 11 to expose the source region and the drain region of the semiconductor layer PS. Further, for example, Mo having a film thickness of 50 nm and a film thickness of 45
Al of 0 nm and Mo of 100 nm in thickness are interlayer films 1
2 is laminated on top. These laminated metal layers are connected to the source region and the drain region of the semiconductor layer PS through the contact holes, and the source electrode S and the drain electrode D, the first electrode
Patterning is performed so as to leave one power supply line Vdd, signal line X, and the like.
【００３４】次に、例えば膜厚４５０ｎｍのＳｉＮｘ膜
がソース電極Ｓ、ドレイン電極Ｄ、電源線Ｖdd、信号線
Ｘ等と共に層間膜１２を覆う保護膜１３として形成され
る。次にドライエッチングにより、保護膜１３に有機Ｅ
Ｌ駆動用素子として配置される薄膜トランジスタＰ11の
ドレイン電極Ｄを露出するコンタクトホールを形成し、
同時に構造部の溝ＧＲを形成する。この溝ＧＲは、信号
線および第1電源線ＶＤＤを部分的に露出するよう構成
される。Next, a SiNx film having a film thickness of 450 nm, for example, is formed as a protective film 13 for covering the source electrode S, the drain electrode D, the power supply line Vdd, the signal line X and the like and the interlayer film 12. Next, dry etching is applied to the protective film 13 to form an organic E
Forming a contact hole exposing the drain electrode D of the thin film transistor P11 arranged as an L driving element,
At the same time, the groove GR of the structure portion is formed. The groove GR is configured to partially expose the signal line and the first power supply line VDD.
【００３５】この時、コンタクトホールおよび溝ＧＲは
開口の内側面がガラス基板１０に対して９０°以上とな
るような傾斜を有する。このように形成することで、コ
ンタクトホールでのＩＴＯの段切れを効果的に防止する
ことが可能となる。At this time, the contact hole and the groove GR are inclined such that the inner surface of the opening is 90 ° or more with respect to the glass substrate 10. By forming in this way, it becomes possible to effectively prevent disconnection of ITO in the contact hole.
【００３６】続いて、例えば、ＩＴＯ（Ｉｎｄｉｕｍ
Ｔｉｎ Ｏｘｉｄｅ）がこのコンタクトホールで薄膜ト
ランジスタＰ11のソース電極Ｄにコンタクトする第1電
極として島状に形成される。Then, for example, ITO (Indium)
Tin oxide) is formed in an island shape as a first electrode that contacts the source electrode D of the thin film transistor P11 through this contact hole.
【００３７】次に、例えば膜厚３０００ｎｍのアクリル
樹脂層が第1電極および保護膜１３を覆って形成され
る。ここで、保護膜１３の溝ＧＲはこの溝ＧＲに収容さ
れるアクリル樹脂層により塞がれる。Next, an acrylic resin layer having a film thickness of 3000 nm, for example, is formed to cover the first electrode and the protective film 13. Here, the groove GR of the protective film 13 is closed by the acrylic resin layer accommodated in the groove GR.
【００３８】こうして、保護膜１３に形成された溝ＧＲ
およびこの溝に収容されるアクリル樹脂層とにより、上
述の構造部が形成される。溝ＧＲおよびコンタクトホー
ルを同一工程で形成するため、プロセスを増大させるこ
となく構造部を形成することができる。Thus, the groove GR formed in the protective film 13
Further, the above-mentioned structural portion is formed by the acrylic resin layer housed in this groove. Since the groove GR and the contact hole are formed in the same step, the structure portion can be formed without increasing the number of processes.
【００３９】この後、アクリル樹脂層は第1電極上に開
口ＯＰを形成するようにパターニングされ、隔壁膜１５
として残される。開口ＯＰは第1電極に向かって傾斜し
た内壁を持つテーパ状であり、第1電極の端部は第２電
極との短絡を防止するために隔壁膜１５により覆われ
る。Thereafter, the acrylic resin layer is patterned so as to form the opening OP on the first electrode, and the partition film 15 is formed.
Left as. The opening OP has a tapered shape having an inner wall inclined toward the first electrode, and an end portion of the first electrode is covered with a partition film 15 to prevent a short circuit with the second electrode.
【００４０】次に、第1電極上に有機ＥＬ薄膜部１４、
第2電極を形成する工程について説明する。ここでは、
第1電極がアノード電極ＡＤをなす。隔壁膜１５の開口
ＯＰ内において、ホール輸送層もしくはホール注入層か
らなる陽極バッファ層ＢＦがアノード電極ＡＤ上に形成
され、さらに有機発光層ＥＭがこの陽極バッファ層ＢＦ
上に積層される。さらにバリウム・アルミ合金が全有機
ＥＬ素子OLEDに共通に接続される配線金属層として有機
発光層ＥＭおよび隔壁膜１５を覆って形成される。すな
わち、配線金属層は各有機発光層ＥＭにコンタクトする
領域で第２電極（ここではカソード電極ＣＤ）を構成す
る。Next, on the first electrode, the organic EL thin film portion 14,
The step of forming the second electrode will be described. here,
The first electrode forms the anode electrode AD. In the opening OP of the partition film 15, an anode buffer layer BF composed of a hole transport layer or a hole injection layer is formed on the anode electrode AD, and further the organic light emitting layer EM is the anode buffer layer BF.
Stacked on top. Further, a barium-aluminum alloy is formed as a wiring metal layer commonly connected to all the organic EL elements OLED so as to cover the organic light emitting layer EM and the partition film 15. That is, the wiring metal layer constitutes the second electrode (here, the cathode electrode CD) in a region in contact with each organic light emitting layer EM.
【００４１】このように、上述の構造部は、複雑な製造
プロセスを追加せずに形成できるため、極めて容易に光
出射効率を高めることができる。As described above, since the above-mentioned structure can be formed without adding a complicated manufacturing process, it is possible to enhance the light emission efficiency extremely easily.
【００４２】また、本発明は上述の実施形態に限定され
ず、その要旨を逸脱しない範囲で様々に変形可能であ
る。Further, the present invention is not limited to the above-mentioned embodiment, and can be variously modified without departing from the gist thereof.
【００４３】図７は図５に示す表示画素周辺構造の第１
変形例を示す。上述の実施形態では、保護膜１３と層間
膜１２との界面（光路変更面）で反射した光を屈折率の
差を利用して反射／透過回折させたが、横方向に伝播す
る全ての光を基板１０表示面から出射させることは困難
である。これに着目し、この変形例では、保護膜１３内
を横方向に伝播する光が保護膜１３と同一平面上に形成
された構造部で全反射してＰ２方向から外部に出射す
る。すなわち、この構造部は隣接表示画素ＰＸ間に形成
された光路変更面と、光路変更面を介して保護膜１３に
密接して配置された反射金属膜により構成される。ここ
では各有機ＥＬ素子OLEDの周囲において保護膜１３に形
成される溝ＧＲおよび少なくとも溝ＧＲの内壁を覆う反
射金属膜１６により構成される。このような構成にする
ことにより、反射金属膜１６を形成するプロセスが増加
するが、図５に示した実施形態よりも外部への光出射効
率を増加させることができる。FIG. 7 shows the first structure of the display pixel peripheral structure shown in FIG.
A modified example is shown. In the above-described embodiment, the light reflected at the interface (optical path changing surface) between the protective film 13 and the interlayer film 12 is reflected / transmitted and diffracted by utilizing the difference in refractive index, but all the light propagating in the lateral direction is transmitted. Is difficult to emit from the display surface of the substrate 10. Paying attention to this, in this modification, the light propagating in the protective film 13 in the lateral direction is totally reflected by the structural portion formed on the same plane as the protective film 13 and emitted from the P2 direction to the outside. That is, this structure portion is composed of an optical path changing surface formed between the adjacent display pixels PX and a reflective metal film arranged in close contact with the protective film 13 via the optical path changing surface. Here, it is constituted by a groove GR formed in the protective film 13 around each organic EL element OLED and a reflective metal film 16 covering at least the inner wall of the groove GR. With such a configuration, the number of processes for forming the reflective metal film 16 is increased, but the light emission efficiency to the outside can be increased as compared with the embodiment shown in FIG.
【００４４】図８は図５に示す表示画素周辺構造の第２
変形例を示す。有機ＥＬ素子OLEDがインクジェット方式
で成膜することが一般的な高分子型である場合には、親
水膜１７が隔壁膜１５の下地として形成され開口ＯＰ内
に延出する。この様な場合には、図８に示すように構造
部が各有機ＥＬ素子OLEDの周囲において保護膜１３に形
成される溝ＧＲおよび少なくとも溝ＧＲの内壁を覆う親
水膜１７により構成される。親水膜１７の屈折率は１．
４程度であるため、上述の実施形態と同様に機能するこ
とが可能である。FIG. 8 shows a second structure of the display pixel peripheral structure shown in FIG.
A modified example is shown. When the organic EL element OLED is of a polymer type that is generally formed by an inkjet method, the hydrophilic film 17 is formed as a base of the partition film 15 and extends into the opening OP. In such a case, as shown in FIG. 8, the structural portion is constituted by the groove GR formed in the protective film 13 around each organic EL element OLED and the hydrophilic film 17 covering at least the inner wall of the groove GR. The hydrophilic film 17 has a refractive index of 1.
Since the number is about 4, it is possible to function similarly to the above-described embodiment.
【００４５】また、上述の第１および第２変形例は組み
合わせて用いても良い。さらに、親水層１７は第1電極
に隣接した開口ＯＰの下端部のみに形成してもよい。The first and second modified examples described above may be used in combination. Further, the hydrophilic layer 17 may be formed only on the lower end portion of the opening OP adjacent to the first electrode.
【００４６】また、上述の実施例では、溝ＧＲが信号線
Ｘおよび第1電源線Ｖdd上に配置されたが、信号線Ｘ、
走査線Ｙおよび第1電源線Ｖddのいずれの上に配置され
てもよい。さらに、同一カラー画素内では、横方向に伝
搬する光の干渉は無視できるため、例えばカラー画素と
して赤、緑、および青でそれぞれ発光する３個の有機Ｅ
Ｌ素子OLEDを一組として平面的に取り囲むあるいは挟む
ように複数の溝ＧＲを形成してもよい。Further, in the above-mentioned embodiment, the groove GR is arranged on the signal line X and the first power supply line Vdd, but the signal line X,
It may be arranged on either the scanning line Y or the first power supply line Vdd. Further, in the same color pixel, since interference of light propagating in the lateral direction can be ignored, for example, three organic Es that respectively emit red, green, and blue as color pixels.
A plurality of grooves GR may be formed so as to surround or sandwich the L element OLED as one set in a plane.
【００４７】尚、上述の実施の形態は、有機ＥＬ表示装
置について説明したが、本発明は配線等の形成される基
板側に光を出射する自己発光型表示装置全般に適用して
同様の効果をえることが可能である。Although the above-described embodiments have been described with respect to the organic EL display device, the present invention is applied to all self-luminous display devices that emit light to the substrate side on which wirings and the like are formed, and similar effects are obtained. It is possible to obtain
【００４８】[0048]
【発明の効果】以上のように本発明によれば、外部への
光出射効率を向上することができる自己発光表示装置を
提供することができる。As described above, according to the present invention, it is possible to provide a self-luminous display device capable of improving the efficiency of light emission to the outside.
【図１】本発明の一実施形態に係る有機ＥＬ表示装置全
体の構成例を示す回路図である。FIG. 1 is a circuit diagram showing a configuration example of an entire organic EL display device according to an embodiment of the present invention.
【図２】図１に示す表示画素の構成を示す回路図であ
る。FIG. 2 is a circuit diagram showing a configuration of a display pixel shown in FIG.
【図３】図２に示す表示画素の回路動作を示す波形図で
ある。FIG. 3 is a waveform diagram showing a circuit operation of the display pixel shown in FIG.
【図４】図２に示す有機ＥＬパネルの１カラー画素の平
面構造を示す図である。FIG. 4 is a diagram showing a planar structure of one color pixel of the organic EL panel shown in FIG.
【図５】図４に示すV-V線に沿った断面図である。5 is a cross-sectional view taken along line VV shown in FIG.
【図６】図４に示すVI-VI線に沿った断面図である。6 is a sectional view taken along line VI-VI shown in FIG.
【図７】図５に示す表示画素周辺構造の第１変形例を示
す断面図である。FIG. 7 is a cross-sectional view showing a first modification of the display pixel peripheral structure shown in FIG.
【図８】図５に示す表示画素周辺構造の第２変形例を示
す断面図である。8 is a cross-sectional view showing a second modification of the display pixel peripheral structure shown in FIG.
【図９】従来のＥＬ表示装置の表示画素周辺構造を示す
断面図である。FIG. 9 is a cross-sectional view showing a display pixel peripheral structure of a conventional EL display device.
１０…光透過性基板 １３…保護膜 １５…隔壁膜 １６…反射金属膜 １７…親水膜 OLED…有機ＥＬ素子 ＰＸ…表示画素 ＧＲ…溝 10 ... Light transmissive substrate 13 ... Protective film 15 ... Partition film 16 ... Reflective metal film 17 ... Hydrophilic film OLED: Organic EL element PX ... Display pixel GR ... groove
Claims (5)
誘電体層と、前記誘電体層上に形成されこの誘電体層を
透過する光を発生する自己発光素子を備えた複数の表示
画素とを備え、一表示画素から隣接する他の表示画素に
向かう光の伝搬範囲を制限する構造部を前記誘電体層と
同一平面上でかつ前記一表示画素と前記他の表示画素間
に設けたことを特徴とする自己発光表示装置。1. A plurality of light-transmitting dielectric layers formed on a light-transmitting substrate, and a plurality of self-luminous elements, which are formed on the dielectric layer and generate light transmitted through the dielectric layers. A display pixel is provided, and a structure portion for limiting the propagation range of light traveling from one display pixel to another display pixel adjacent thereto is provided on the same plane as the dielectric layer and between the one display pixel and the other display pixel. A self-luminous display device provided.
上に前記複数の自己発光素子をそれぞれ取り囲む隔壁膜
をさらに備え、前記隔壁膜は前記複数の自己発光素子に
共通に接続される配線金属層で覆われることを特徴とす
る請求項１に記載の自己発光表示装置。2. The self-luminous display device further comprises a partition film surrounding the plurality of self-luminous elements on the dielectric layer, and the partition film is commonly connected to the plurality of self-luminous elements. The self-luminous display device according to claim 1, wherein the self-luminous display device is covered with a metal layer.
光路変更面および前記光路変更面を介して前記誘電体層
に密接配置され、前記誘電体層よりも低い屈折率の材料
でなる層で構成されることを特徴とする請求項２に記載
の自己発光表示装置。3. The structure portion is arranged in close contact with the dielectric layer via the optical path changing surface formed on the dielectric layer and the optical path changing surface, and is made of a material having a refractive index lower than that of the dielectric layer. The self-luminous display device according to claim 2, wherein the self-luminous display device is composed of layers.
も低い屈折率の材料でなる前記層は、前記隔壁膜である
ことを特徴とする請求項３に記載の自己発光表示装置。4. The self-luminous display device according to claim 3, wherein the layer made of a material having a refractive index lower than that of the dielectric layer forming the structure section is the partition film.
光路変更面および少なくとも前記光路変更面を介して前
記誘電体層に密接配置される反射金属膜により構成され
ることを特徴とする請求項１に記載の自己発光表示装
置。5. The structure portion is composed of an optical path changing surface formed on the dielectric layer and a reflective metal film disposed in close contact with the dielectric layer via at least the optical path changing surface. The self-luminous display device according to claim 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001343568A JP3943901B2 (en) | 2001-11-08 | 2001-11-08 | Self-luminous display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001343568A JP3943901B2 (en) | 2001-11-08 | 2001-11-08 | Self-luminous display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2003151770A true JP2003151770A (en) | 2003-05-23 |
| JP3943901B2 JP3943901B2 (en) | 2007-07-11 |
Family
ID=19157236
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001343568A Expired - Lifetime JP3943901B2 (en) | 2001-11-08 | 2001-11-08 | Self-luminous display device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3943901B2 (en) |
Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006040881A (en) * | 2004-06-25 | 2006-02-09 | Semiconductor Energy Lab Co Ltd | Display device |
| JP2006190640A (en) * | 2004-12-31 | 2006-07-20 | Lg Philips Lcd Co Ltd | Liquid crystal display and its manufacturing method |
| JP2007200907A (en) * | 2003-11-07 | 2007-08-09 | Seiko Epson Corp | Light emitting device, and electronic equipment |
| JP2007287346A (en) * | 2006-04-12 | 2007-11-01 | Mitsubishi Electric Corp | Organic el display and manufacturing method thereof |
| US7868543B2 (en) | 2003-11-07 | 2011-01-11 | Seiko Epson Corporation | Light-emitting device having openings in electrode |
| JP2012190802A (en) * | 2004-03-25 | 2012-10-04 | Semiconductor Energy Lab Co Ltd | Manufacturing method for light-emitting device |
| WO2013186917A1 (en) * | 2012-06-15 | 2013-12-19 | パイオニア株式会社 | Organic electroluminescence device |
| TWI557897B (en) * | 2012-02-17 | 2016-11-11 | 杰奧萊德股份有限公司 | Display apparatus and method for manufacturing display apparatus |
| KR20170052467A (en) * | 2015-10-30 | 2017-05-12 | 엘지디스플레이 주식회사 | Organic Light Emitting Diode Display Device |
| KR20170064126A (en) * | 2015-11-30 | 2017-06-09 | 엘지디스플레이 주식회사 | Organic Light Emitting Display Device and Method of Manufacturing the same |
| JP2020532820A (en) * | 2017-09-06 | 2020-11-12 | 京東方科技集團股▲ふん▼有限公司Ｂｏｅ Ｔｅｃｈｎｏｌｏｇｙ Ｇｒｏｕｐ Ｃｏ．，Ｌｔｄ． | Array board and display device |
| KR20220061080A (en) * | 2016-07-26 | 2022-05-12 | 삼성디스플레이 주식회사 | Display device |
| US11963391B2 (en) | 2015-10-30 | 2024-04-16 | Lg Display Co., Ltd. | Organic light emitting diode display device |
| KR102679028B1 (en) * | 2015-10-30 | 2024-06-27 | 엘지디스플레이 주식회사 | Organic Light Emitting Diode Display Device |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07272859A (en) * | 1994-03-30 | 1995-10-20 | Nippondenso Co Ltd | Electroluminescent element and its manufacture |
| JP2000357584A (en) * | 1999-06-14 | 2000-12-26 | Seiko Epson Corp | Circuit board for luminescent element, electronic equipment and display |
| JP2001507503A (en) * | 1996-12-23 | 2001-06-05 | ザ トラスティーズ オブ プリンストン ユニバーシテイ | Light-emitting body provided with light reflecting structure |
| JP2002229482A (en) * | 2001-01-30 | 2002-08-14 | Semiconductor Energy Lab Co Ltd | Light emitting device |
-
2001
- 2001-11-08 JP JP2001343568A patent/JP3943901B2/en not_active Expired - Lifetime
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07272859A (en) * | 1994-03-30 | 1995-10-20 | Nippondenso Co Ltd | Electroluminescent element and its manufacture |
| JP2001507503A (en) * | 1996-12-23 | 2001-06-05 | ザ トラスティーズ オブ プリンストン ユニバーシテイ | Light-emitting body provided with light reflecting structure |
| JP2000357584A (en) * | 1999-06-14 | 2000-12-26 | Seiko Epson Corp | Circuit board for luminescent element, electronic equipment and display |
| JP2002229482A (en) * | 2001-01-30 | 2002-08-14 | Semiconductor Energy Lab Co Ltd | Light emitting device |
Cited By (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007200907A (en) * | 2003-11-07 | 2007-08-09 | Seiko Epson Corp | Light emitting device, and electronic equipment |
| US7868543B2 (en) | 2003-11-07 | 2011-01-11 | Seiko Epson Corporation | Light-emitting device having openings in electrode |
| US8674369B2 (en) | 2004-03-25 | 2014-03-18 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device, method for manufacturing thereof and electronic appliance |
| JP2012190802A (en) * | 2004-03-25 | 2012-10-04 | Semiconductor Energy Lab Co Ltd | Manufacturing method for light-emitting device |
| JP2006040881A (en) * | 2004-06-25 | 2006-02-09 | Semiconductor Energy Lab Co Ltd | Display device |
| JP2006190640A (en) * | 2004-12-31 | 2006-07-20 | Lg Philips Lcd Co Ltd | Liquid crystal display and its manufacturing method |
| JP4490885B2 (en) * | 2004-12-31 | 2010-06-30 | エルジー ディスプレイ カンパニー リミテッド | Electroluminescent display device and manufacturing method thereof |
| US7830476B2 (en) | 2004-12-31 | 2010-11-09 | Lg Display Co., Ltd. | Electroluminescence display device comprising a drain electrode being directly contacted with the upper surface of the first transparent conductive layer and the side surface of the second conductive layer and fabricating methods thereof |
| JP2007287346A (en) * | 2006-04-12 | 2007-11-01 | Mitsubishi Electric Corp | Organic el display and manufacturing method thereof |
| TWI557897B (en) * | 2012-02-17 | 2016-11-11 | 杰奧萊德股份有限公司 | Display apparatus and method for manufacturing display apparatus |
| WO2013186917A1 (en) * | 2012-06-15 | 2013-12-19 | パイオニア株式会社 | Organic electroluminescence device |
| KR20170052467A (en) * | 2015-10-30 | 2017-05-12 | 엘지디스플레이 주식회사 | Organic Light Emitting Diode Display Device |
| KR102651166B1 (en) * | 2015-10-30 | 2024-03-27 | 엘지디스플레이 주식회사 | Organic Light Emitting Diode Display Device |
| US11963391B2 (en) | 2015-10-30 | 2024-04-16 | Lg Display Co., Ltd. | Organic light emitting diode display device |
| KR102679028B1 (en) * | 2015-10-30 | 2024-06-27 | 엘지디스플레이 주식회사 | Organic Light Emitting Diode Display Device |
| KR20170064126A (en) * | 2015-11-30 | 2017-06-09 | 엘지디스플레이 주식회사 | Organic Light Emitting Display Device and Method of Manufacturing the same |
| KR102593451B1 (en) * | 2015-11-30 | 2023-10-25 | 엘지디스플레이 주식회사 | Organic Light Emitting Display Device and Method of Manufacturing the same |
| KR20220061080A (en) * | 2016-07-26 | 2022-05-12 | 삼성디스플레이 주식회사 | Display device |
| KR102539076B1 (en) * | 2016-07-26 | 2023-06-02 | 삼성디스플레이 주식회사 | Display device |
| JP2020532820A (en) * | 2017-09-06 | 2020-11-12 | 京東方科技集團股▲ふん▼有限公司Ｂｏｅ Ｔｅｃｈｎｏｌｏｇｙ Ｇｒｏｕｐ Ｃｏ．，Ｌｔｄ． | Array board and display device |
| US11430841B2 (en) | 2017-09-06 | 2022-08-30 | Boe Technology Group Co., Ltd. | Array substrate having light wave partition grooves and display device |
| JP7452775B2 (en) | 2017-09-06 | 2024-03-19 | 京東方科技集團股▲ふん▼有限公司 | Array substrate and display device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3943901B2 (en) | 2007-07-11 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US11600234B2 (en) | Display substrate and driving method thereof | |
| US11580904B2 (en) | Transparent display panels and display panels | |
| TWI522987B (en) | Light emitting device, electronic apparatus, and method of driving light emitting device | |
| JP6056082B2 (en) | Display device and electronic device | |
| US8749464B2 (en) | Display device, and method of operation thereof | |
| KR102615707B1 (en) | Organic light emitting display panel and organic light emitting display apparatus using the same | |
| KR100846711B1 (en) | Organic light emitting display and method of manufacturing thesame | |
| US20200321409A1 (en) | Display panel, display device and method for driving display panel | |
| JP2007335253A (en) | Organic el display device | |
| JP2003229283A (en) | Flat-panel display device and manufacturing method of the same | |
| JP3943901B2 (en) | Self-luminous display device | |
| JP2003332560A (en) | Semiconductor device and microprocessor | |
| US10665820B2 (en) | Display device | |
| JP2008226483A (en) | Organic el display device | |
| EP4020596A1 (en) | Display device and manufacturing method therefor | |
| KR20190038143A (en) | Electroluminescence display | |
| EP4020449A1 (en) | Display device and manufacturing method thereof | |
| US20060220580A1 (en) | Array substrate | |
| KR101438687B1 (en) | Organic electroluminescent device | |
| US20240179955A1 (en) | Display device | |
| KR20040078560A (en) | Electro luminescence display device | |
| US20240164177A1 (en) | Display device and manufacturing method of the same | |
| JP2006292832A (en) | Tft substrate and its manufacturing method, and active matrix type display device using the tft substrate | |
| EP4020575A1 (en) | Display device and manufacturing method therefor | |
| KR20240106293A (en) | Light emitting display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20041105 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20061222 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20070109 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20070307 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20070403 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20070406 |
|
| R151 | Written notification of patent or utility model registration |
Ref document number: 3943901 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R151 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100413 Year of fee payment: 3 |
|
| S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313113 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100413 Year of fee payment: 3 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| S533 | Written request for registration of change of name |
Free format text: JAPANESE INTERMEDIATE CODE: R313533 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100413 Year of fee payment: 3 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100413 Year of fee payment: 3 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110413 Year of fee payment: 4 |
|
| S531 | Written request for registration of change of domicile |
Free format text: JAPANESE INTERMEDIATE CODE: R313531 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120413 Year of fee payment: 5 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130413 Year of fee payment: 6 |
|
| S533 | Written request for registration of change of name |
Free format text: JAPANESE INTERMEDIATE CODE: R313533 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130413 Year of fee payment: 6 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140413 Year of fee payment: 7 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313111 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| EXPY | Cancellation because of completion of term |