JP2008226483A - Organic el display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide organic electroluminescent (EL) display technology capable of achieving high light extraction efficiency. <P>SOLUTION: This organic EL device is equipped with a reflective layer REF, one main side of which includes a recessed part, a translucent first electrode PE facing the bottom face of the recessed part, a translucent second electrode facing the bottom face with the first electrode PE held between, and a luminescent layer ACT intervening between the first electrode PE and the second electrode CE. The main side of the second electrode which faces the bottom face is either in the same plane as the opening of the recessed part or is positioned between the opening and the bottom face, and the first electrode PE includes an end face positioned between the opening and the bottom face. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an organic electroluminescence (EL) display technique.

The luminance of the organic EL element increases according to the magnitude of the current flowing through it. However, when the current density is increased, the power consumption is increased and the lifetime of the organic EL element is remarkably shortened. Therefore, in order to achieve high luminance, low power consumption, and long life at the same time, as described in Patent Document 1, it is more efficient to extract light emitted from the light emitting layer to the outside, that is, extraction of light. Improving efficiency is important.
JP 2002-202737 A

  An object of the present invention is to make it possible to achieve high light extraction efficiency.

  According to the first aspect of the present invention, one main surface includes a reflective layer including a recess, a light-transmitting first electrode facing the bottom surface of the recess, and the bottom surface sandwiching the first electrode. A light-transmitting second electrode facing each other and a light emitting layer interposed between the first and second electrodes, the main surface facing the bottom surface of the second electrode being flush with the opening of the recess An organic EL display device is provided, wherein the organic EL display device is located inside or located between the opening and the bottom surface, and the first electrode includes an end surface located between the opening and the bottom surface. Is done.

  According to the second aspect of the present invention, the first main surface includes a reflective layer, a light-transmitting first electrode facing the bottom surface of the concave portion, and the bottom surface with the first electrode interposed therebetween. A light-transmitting second electrode facing each other and a light emitting layer interposed between the first and second electrodes, the main surface facing the bottom surface of the second electrode being flush with the opening of the recess An organic EL display device is provided, wherein the first electrode includes a side wall of the recess or an end surface facing the opening. The

  According to the present invention, it is possible to achieve high light extraction efficiency.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In addition, in each figure, the same referential mark is attached | subjected to the component which exhibits the same or similar function, and the overlapping description is abbreviate | omitted.

  FIG. 1 is a plan view schematically showing an organic EL display device according to an aspect of the present invention. FIG. 2 is a cross-sectional view schematically showing the display panel of the organic EL display device shown in FIG.

  The display device shown in FIG. 1 is a top emission organic EL display device adopting an active matrix driving method. This display device includes a display panel DP, a video signal line driver XDR, and a scanning signal line driver YDR.

  As shown in FIGS. 1 and 2, the display panel DP includes an array substrate AS and a sealing substrate CS. The array substrate AS and the sealing substrate CS face each other and form a hollow body. Specifically, the central portion of the sealing substrate CS is separated from the array substrate AS. The peripheral edge of the sealing substrate CS is attached to one main surface of the array substrate AS via a frame-shaped seal layer SS shown in FIG.

  The array substrate AS includes the insulating substrate SUB shown in FIGS. The insulating substrate SUB is, for example, a glass substrate.

  An undercoat layer UC shown in FIG. 2 is formed on the substrate SUB. For example, the undercoat layer UC is formed by laminating a silicon nitride layer and a silicon oxide layer in this order on the substrate SUB.

  A semiconductor pattern (not shown) is formed on the undercoat layer UC. The semiconductor pattern is made of polysilicon containing impurities, for example. A part of this semiconductor pattern is used as a semiconductor layer of a thin film transistor. In each semiconductor layer, impurity diffusion regions used as a source and a drain are formed. Further, another part of the semiconductor pattern is used as a lower electrode of a capacitor C described later. The lower electrodes are arranged corresponding to the pixels PX described later.

  The semiconductor pattern is covered with a gate insulating film GI. The gate insulating film GI can be formed using, for example, TEOS (tetraethyl orthosilicate).

  On the gate insulating film GI, the scanning signal lines SL1 and SL2 shown in FIG. 1 are formed. The scanning signal lines SL1 and SL2 extend in the X direction along the row of the pixels PX, and are alternately arranged in the Y direction along the column of the pixels PX. The scanning signal lines SL1 and SL2 are made of, for example, MoW. The Z direction is a direction perpendicular to the X direction and the Y direction.

  An upper electrode of the capacitor C is further disposed on the gate insulating film GI. These upper electrodes are arranged corresponding to the pixels PX and face the lower electrode of the capacitor C. The upper electrode is made of, for example, MoW, and can be formed in the same process as the scanning signal lines SL1 and SL2.

  The scanning signal lines SL1 and SL2 intersect the semiconductor layer. The intersection between the scanning signal line SL1 and the semiconductor layer constitutes the switching transistor SWa shown in FIG. The intersection between the scanning signal line SL2 and the semiconductor layer constitutes switching transistors SWb and SWc. Further, the lower electrode and the upper electrode described above and the insulating film GI interposed therebetween constitute a capacitor C. The upper electrode includes a protrusion protruding from the capacitor C in a direction perpendicular to the Z direction, and the protrusion intersects with the semiconductor layer. This intersection constitutes the drive transistor DR. In this example, the drive transistor DR and the switching transistors SWa to SWc are top-gate p-channel thin film transistors.

  The gate insulating film GI, the scanning signal lines SL1 and SL2, and the upper electrode are covered with an interlayer insulating film II shown in FIG. The interlayer insulating film II is made of, for example, silicon oxide deposited by a plasma CVD method.

  On the interlayer insulating film II, the video signal line DL and the power supply line PSL shown in FIG. 1 are formed. The video signal lines DL extend in the Y direction and are arranged in the X direction. For example, the power supply line PSL extends in the Y direction and is arranged in the X direction.

  A source electrode and a drain electrode (not shown) are further formed on the interlayer insulating film II. The source electrode and the drain electrode connect the elements in each pixel PX.

  The video signal line DL, the power supply line PSL, the source electrode, and the drain electrode have, for example, a three-layer structure of Mo / Al / Mo. These can be formed in the same process.

  The video signal line DL, the power supply line PSL, the source electrode, and the drain electrode are covered with a passivation film PS shown in FIG. A through hole is formed in the passivation film PS at a position corresponding to the drain electrode connected to the drain of the switching transistor SWa. The passivation film is made of, for example, silicon nitride.

  The passivation film PS is covered with a relief layer RL having a concavo-convex structure on the surface. The relief layer RL may be a continuous film, and may be patterned in a plurality of portions. Here, as an example, the relief layer RL patterned corresponding to the pixel PX is arranged on the passivation film PS.

  The relief layer RL can be formed using a dispersion containing a resin and particles. Alternatively, the relief layer RL may be formed using a plate provided with an uneven structure. The relief layer RL is typically made of an insulator. The relief layer RL may be omitted.

  The passivation film PS is further covered with a side wall forming layer SWF. The side wall forming layer SWF is provided with a through hole at a position corresponding to a pixel electrode PE described later. Typically, the side wall of each through hole is inclined so that the diameter of the through hole increases from the passivation film PS side toward the opening side. The sidewall forming layer SWF may be a continuous film or may be patterned in a plurality of portions. Here, as an example, on the passivation film PS, side wall forming layers SWF each having a frame shape are arranged, and each side wall forming layer SWF covers the peripheral portion of the relief layer RL. To do.

  The relief layer RL and the sidewall formation layer SWF constitute a recess formation layer RF in which a recess is provided at a position corresponding to the pixel electrode PE. The recess forming layer RF may be formed of a single layer instead of the relief layer RL and the sidewall forming layer SWF.

  The bottom and side walls of each recess provided in the recess forming layer RF are covered with the reflective layer REF. The reflective layer REF is made of, for example, a metal or alloy such as aluminum and silver.

  The recess forming layer RF forms a recess on the surface of the reflective layer REF. The bottom surface of the recess provided in the reflective layer REF includes the same uneven structure as that provided in the relief layer RL, and serves as a light scattering surface. The side walls of these recesses are typically inclined so as to increase in diameter from the passivation film PS side toward the opening side.

  The reflective layer REF may be a continuous film and may be patterned in a plurality of portions. Here, as an example, it is assumed that the reflective layer REF is patterned corresponding to the recesses provided in the recess formation layer RF.

  The reflective layer REF is covered with a planarizing layer FL. In the recess provided in the reflective layer REF, the surface of the planarization layer FL is substantially flat and is located between the opening and the bottom surface of the previous recess. Typically, the planarization layer FL further covers the sidewall-based layer SWF and the passivation film PS. The planarization layer FL is made of, for example, a hard resin such as an acrylic resin. The flattening layer FL may be omitted when the bottom surface of the recess provided in the reflective layer REF does not include the uneven structure.

  On the planarizing layer FL, pixel electrodes PE which are light-transmissive first electrodes are arranged. The pixel electrode PE is made of a transparent conductive material such as indium tin oxide (ITO), for example.

  The pixel electrode PE faces the bottom surface of the recess provided in the reflective layer REF. Further, the pixel electrode PE includes an end face located between the opening and the bottom face of the recess provided in the reflective layer REF. That is, the pixel electrode PE includes an end surface facing the side wall or opening of the recess provided in the reflective layer REF.

  Typically, the pixel electrode PE includes an electrode body and an extension for electrically connecting the electrode body to the drain of the switching transistor SWa. In this case, typically, the entire electrode body is positioned in a recess provided in the reflective layer REF.

  On the planarizing layer FL, a partition insulating layer PI is further provided. In the partition insulating layer PI, through holes are provided at positions corresponding to the pixel electrodes PE, or slits are provided at positions corresponding to the columns formed by the pixel electrodes PE. Here, as an example, the partition insulating layer PI is provided with a through hole at a position corresponding to the pixel electrode PE.

  The partition insulating layer PI is, for example, an organic insulating layer. The partition insulating layer PI can be formed using, for example, a photolithography technique.

  An active layer ACT is formed on each pixel electrode PE. Each layer included in the active layer ACT may be patterned corresponding to the pixel PX. Alternatively, each layer included in the active layer ACT may be connected between the pixels PX. In any case, each portion of the active layer ACT corresponding to the recess provided in the recess forming layer RF is located between the opening and the bottom surface of the recess. Typically, each portion of the active layer ACT corresponding to the recess provided in the recess forming layer RF is positioned 1 μm or more away from the opening of the recess.

  The active layer ACT includes a light emitting layer (not shown). The light emitting layer is made of a luminescent organic material. The active layer ACT may further include at least one of a hole injection layer, a hole transport layer, an electron blocking layer, a hole blocking layer, an electron transport layer, and an electron injection layer in addition to the light emitting layer.

  Each layer included in the active layer ACT is typically made of an organic material. A part of the layer included in the active layer ACT such as the electron injection layer may be an inorganic layer.

  The partition insulating layer PI and the active layer ACT are covered with a light transmissive counter electrode CE. In this aspect, the counter electrode CE is a common electrode shared between the pixels PX. In this embodiment, the counter electrode CE is a cathode. The counter electrode CE is, for example, an electrode wiring (not shown) formed on the same layer as the video signal line DL through a contact hole provided in the partition insulating layer PI, the planarization layer FL, and the passivation film PS. ) Is electrically connected.

  The counter electrode CE may have a single layer structure or a multilayer structure. The counter electrode CE having a single layer structure is a layer made of an alloy such as an alloy of magnesium and silver or a metal. The counter electrode CE having a multilayer structure is, for example, a laminate of a layer made of the above alloy or metal and a layer made of a transparent conductive material such as ITO.

  The pixel electrode PE, the active layer ACT, and the counter electrode CE constitute a plurality of organic EL elements OLED. These organic EL elements OLED are arranged in a matrix.

  Each of the pixels PX includes a drive transistor DR, switching transistors SWa to SWc, an organic EL element OLED, and a capacitor C as shown in FIG. As described above, in this example, the drive transistor DR and the switching transistors SWa to SWc are p-channel thin film transistors.

  The drive transistor DR, the switching transistor SWa, and the organic EL element OLED are connected in series in this order between the first power supply terminal ND1 and the second power supply terminal ND2. In this example, the power supply terminal ND1 is a high potential power supply terminal, and the power supply terminal ND2 is a low potential power supply terminal.

  The gate of the switching transistor SWa is connected to the scanning signal line SL1. The switching transistor SWb is connected between the video signal line DL and the drain of the drive transistor DR, and its gate is connected to the scanning signal line SL2. The switching transistor SWc is connected between the drain and gate of the driving transistor DR, and the gate is connected to the scanning signal line SL2.

  The capacitor C is connected between the gate of the driving transistor DR and the constant potential terminal ND1 '. In this example, the constant potential terminal ND1 'is connected to the power supply terminal ND1.

  As shown in FIG. 2, the sealing substrate CS faces the substrate SUB with the organic EL element OLED interposed therebetween. The sealing substrate CS is, for example, a glass substrate.

  As described above, the seal layer SS has a frame shape, and is interposed between the array substrate AS and the peripheral portion of the sealing substrate CS. The seal layer SS surrounds a pixel group constituted by all the pixels PX. As a material of the sealing layer SS, for example, frit glass and an adhesive can be used.

  The video signal line driver XDR and the scanning signal line driver YDR are mounted on the array substrate AS as shown in FIG. A video signal line DL is connected to the video signal line driver XDR. In this example, a power supply line PSL is further connected to the video signal line driver XDR. The video signal line driver XDR outputs the video signal as a current signal to the video signal line DL and supplies a power supply voltage to the power supply line PSL. Scanning signal lines SL1 and SL2 are connected to the scanning signal line driver YDR. The scanning signal line driver YDR outputs the first and second scanning signals as voltage signals to the scanning signal lines SL1 and SL2, respectively.

  When displaying an image on this organic EL display device, for example, the pixels PX are sequentially selected for each row. In a selection period in which a certain pixel PX is selected, a writing operation is performed on the pixel PX. In a non-selection period in which a certain pixel PX is not selected, a display operation is performed on the non-selected pixel PX.

Specifically, in the selection period in which the pixels PX in a certain row are selected, first, the switching transistor SWa is opened from the scanning signal line driver YDR to the scanning signal line SL1 to which the previous pixel PX is connected (non-conducting state). The scanning signal is output as a voltage signal. Subsequently, the scanning signal line driver YDR outputs, as a voltage signal, a scanning signal that closes the switching transistors SWb and SWc (sets the conductive state) to the scanning signal line SL2 to which the previous pixel PX is connected. In this state, the video signal line driver YDR outputs the video signal to the video signal line DL as a current signal (write current) I _sig , and the gate-source voltage V _gs of the drive transistor DR is changed to the previous video signal. Set to a size corresponding to I _sig . Thereafter, a scanning signal for opening the switching transistors SWb and SWc is output as a voltage signal from the scanning signal line driver YDR to the scanning signal line SL2 to which the previous pixel PX is connected. Subsequently, a scanning signal for closing the switching transistor SWa is output as a voltage signal from the scanning signal line driver YDR to the scanning signal line SL1 to which the previous pixel PX is connected. This ends the selection period.

In the non-selection period following the selection period, a scanning signal for closing the switching transistor SWa is output as a voltage signal from the scanning signal line driver YDR to the scanning signal line SL1 to which the previous pixel PX is connected. The switching transistor SWa remains closed, and the switching transistors SWb and SWc remain open. In the non-selection period, a drive current I _drv having a magnitude corresponding to the gate-source voltage V _gs of the drive transistor DR flows through the organic EL element OLED. The organic EL element OLED emits light with a luminance corresponding to the magnitude of the drive current I _drv .

  When the structure described above is employed, high light extraction efficiency can be achieved. This will be described with reference to FIGS.

  3 is an enlarged cross-sectional view of a part of the display panel shown in FIG. FIG. 4 is a cross-sectional view of a display panel according to a comparative example.

  A part of the light emitted from the light emitting layer propagates between the counter electrode CE and the reflective layer REF in a direction substantially perpendicular to the Z direction. When the reflective layer REF does not cover the side wall of the recess forming layer RF, light propagated in a direction substantially perpendicular to the Z direction cannot be used for display.

  On the other hand, when the side wall of the recess forming layer RF is covered with the reflective layer REF as shown in FIG. 3, light propagating in a direction substantially perpendicular to the Z direction is reflected in the recess forming layer RF of the reflective layer REF. Reflected forward by the portion covering the side wall. That is, when the structure shown in FIG. 3 is adopted, light propagating in a direction substantially perpendicular to the Z direction can be used for display, and therefore high light extraction efficiency can be achieved.

  Further, a portion of the pixel electrode PE sandwiched between the partition insulating layer PI and the reflective layer REF can behave as a waveguide. Therefore, as shown in FIG. 4, when the end portion of the pixel electrode PE covers the upper surface of the sidewall formation layer SWF, the light emitted from the end surface of the pixel electrode PE travels in a direction substantially perpendicular to the Z direction. Since it progresses, it cannot be used for display.

  On the other hand, when the end of the pixel electrode PE is located between the opening of the concave portion provided in the reflective layer REF and the bottom as shown in FIG. 3, the light emitted from the end surface of the pixel electrode PE Or toward the reflective layer REF. Therefore, when the structure shown in FIG. 3 is adopted, light emitted from the end face of the pixel electrode PE can be used for display. That is, when the structure shown in FIG. 3 is adopted, higher light extraction efficiency can be achieved as compared with the case where the structure shown in FIG. 4 is adopted.

  Various modifications can be made to the organic EL display device described above. For example, in this aspect, a configuration in which a current signal is written as a video signal in the organic EL display device is employed, but a configuration in which a voltage signal is written as a video signal in the organic EL display device may be employed. In this aspect, the active matrix driving method is adopted for the organic EL display device, but other driving methods such as a passive matrix driving method and a segment driving method may be adopted.

1 is a plan view schematically showing an organic EL display device according to one embodiment of the present invention. Sectional drawing which shows schematically the display panel of the organic electroluminescence display shown in FIG. Sectional drawing which expands and shows a part of display panel shown in FIG. Sectional drawing of the display panel which concerns on a comparative example.

Explanation of symbols

  ACT ... active layer, AS ... array substrate, C ... capacitor, CE ... counter electrode, CS ... sealing substrate, DL ... video signal line, DP ... display panel, DR ... drive transistor, FL ... flattening layer, GI ... gate Insulating film, II ... interlayer insulating film, ND1 ... power supply terminal, ND1 '... constant potential terminal, ND2 ... power supply terminal, OLED ... organic EL element, PE ... pixel electrode, PI ... partition insulating layer, PS ... passivation film, PSL ... Power line, PX ... pixel, REF ... reflective layer, RF ... recessed layer, RL ... relief layer, SL1 ... scan signal line, SL2 ... scan signal line, SS ... seal layer, SUB ... insulating substrate, SWa ... switching transistor, SWb ... switching transistor, SWc ... switching transistor, SWF ... sidewall formation layer, UC ... undercoat layer, XDR ... video signal line driver, DR ... scanning signal line driver.

Claims (3)

A reflective layer including a concave portion on one main surface;
A light transmissive first electrode facing the bottom surface of the recess,
A light transmissive second electrode facing the bottom surface with the first electrode in between,
A light emitting layer interposed between the first and second electrodes,
The main surface facing the bottom surface of the second electrode is in the same plane as the opening of the recess or is located between the opening and the bottom surface,
The organic EL display device, wherein the first electrode includes an end surface located between the opening and the bottom surface. A reflective layer including a concave portion on one main surface;
A light transmissive first electrode facing the bottom surface of the recess,
A light transmissive second electrode facing the bottom surface with the first electrode in between,
A light emitting layer interposed between the first and second electrodes,
The main surface facing the bottom surface of the second electrode is in the same plane as the opening of the recess or is located between the opening and the bottom surface,
The organic EL display device, wherein the first electrode includes a side wall of the recess or an end face facing the opening.   The organic material according to claim 1, further comprising a planarizing layer interposed between the reflective layer and the first electrode, wherein the bottom surface is a light scattering surface provided with an uneven structure. EL display device.

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