JP2003099324A5 - - Google Patents

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Publication number
JP2003099324A5
JP2003099324A5 JP2002201010A JP2002201010A JP2003099324A5 JP 2003099324 A5 JP2003099324 A5 JP 2003099324A5 JP 2002201010 A JP2002201010 A JP 2002201010A JP 2002201010 A JP2002201010 A JP 2002201010A JP 2003099324 A5 JP2003099324 A5 JP 2003099324A5
Authority
JP
Japan
Prior art keywords
bus
data
cache memory
memory
external
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002201010A
Other languages
English (en)
Japanese (ja)
Other versions
JP2003099324A (ja
Filing date
Publication date
Priority claimed from US09/903,008 external-priority patent/US20030014596A1/en
Application filed filed Critical
Publication of JP2003099324A publication Critical patent/JP2003099324A/ja
Publication of JP2003099324A5 publication Critical patent/JP2003099324A5/ja
Pending legal-status Critical Current

Links

JP2002201010A 2001-07-10 2002-07-10 マルチメディアプロセッサ用のストリーミングデータキャッシュ Pending JP2003099324A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/903,008 US20030014596A1 (en) 2001-07-10 2001-07-10 Streaming data cache for multimedia processor
US09/903008 2001-07-10

Publications (2)

Publication Number Publication Date
JP2003099324A JP2003099324A (ja) 2003-04-04
JP2003099324A5 true JP2003099324A5 (enExample) 2005-10-20

Family

ID=25416776

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002201010A Pending JP2003099324A (ja) 2001-07-10 2002-07-10 マルチメディアプロセッサ用のストリーミングデータキャッシュ

Country Status (2)

Country Link
US (1) US20030014596A1 (enExample)
JP (1) JP2003099324A (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7155572B2 (en) * 2003-01-27 2006-12-26 Advanced Micro Devices, Inc. Method and apparatus for injecting write data into a cache
WO2004102971A1 (en) * 2003-05-19 2004-11-25 Koninklijke Philips Electronics N.V. Video processing device with low memory bandwidth requirements
US7366845B2 (en) * 2004-06-29 2008-04-29 Intel Corporation Pushing of clean data to one or more processors in a system having a coherency protocol
US20060004965A1 (en) * 2004-06-30 2006-01-05 Tu Steven J Direct processor cache access within a system having a coherent multi-processor protocol
US7290107B2 (en) * 2004-10-28 2007-10-30 International Business Machines Corporation Direct deposit using locking cache
KR100847066B1 (ko) 2006-09-29 2008-07-17 에스케이건설 주식회사 홈 멀티미디어 센터를 이용한 웹 스토리지 서비스 시스템및 서비스 방법
JP5101128B2 (ja) * 2007-02-21 2012-12-19 株式会社東芝 メモリ管理システム
US9785545B2 (en) * 2013-07-15 2017-10-10 Cnex Labs, Inc. Method and apparatus for providing dual memory access to non-volatile memory

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5787472A (en) * 1995-07-31 1998-07-28 Ibm Corporation Disk caching system for selectively providing interval caching or segment caching of vided data
US5898892A (en) * 1996-05-17 1999-04-27 Advanced Micro Devices, Inc. Computer system with a data cache for providing real-time multimedia data to a multimedia engine
US6438652B1 (en) * 1998-10-09 2002-08-20 International Business Machines Corporation Load balancing cooperating cache servers by shifting forwarded request

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