JP2003037365A - Multilayer wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem due to the fact that a via hole conductor is deformed and disconnected by heat and pressure applied when insulating film layers are laminated and bonded together in a multilayer wiring board where an insulating film layer is formed on a board to serve as an insulating layer. SOLUTION: In a multilayer wiring board, insulating layers each composed of an insulating film layer 4 and an insulating adhesive layer 5 and wiring conductor layers 3 are laminated on a board 1, the wiring conductor layers are electrically connected together with via hole conductors 7 provided to via holes 6 bored in the insulating layers each interposed between the wiring conductor layers 3. Provided that the thickness of the via hole conductor 7 at the bottom of the via hole 6 is represented by tv , the thickness of the insulating adhesive layer 5 is represented by tad , and the thickness of the insulating film layer 4 is represented by tf , tad , tv , and tf are so set as to satisfy a relational expression, tad <=tv <=0.6(tf +tad ). The lower insulating adhesive layer 5 is restrained from being deformed due to heat and pressure applied when the insulating film layers 4 are laminated and bonded together by the via hole conductors 7, so that the via hole conductors 7 are hardly deformed and disconnected.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board, and more particularly to a multilayer wiring board used for a hybrid integrated circuit device and a semiconductor element housing package for housing semiconductor elements.

[0002]

2. Description of the Related Art Conventionally, as a multilayer wiring board used for a hybrid integrated circuit device, a package for accommodating semiconductor elements, etc.
For the purpose of forming the wiring conductors at a high density, a multilayer wiring board in which a multilayer wiring portion including a thin insulating layer and a wiring conductor layer is formed on the substrate has been adopted.

Such a multilayer wiring board comprises a thin film insulating layer made of a polyimide resin or the like formed by a spin coating method or the like on the upper surface of a substrate made of an aluminum oxide sintered body or the like, and a metal such as copper or aluminum. It has a structure in which a wiring conductor layer formed by adopting a thin film forming technique such as a plating method or a vapor deposition method and a photolithography technique are alternately laminated in multiple layers.

However, when an insulating layer made of a polyimide resin is formed by a spin coating method, it is necessary to apply the polyimide resin precursor in a number of times in order to form the insulating layer with a desired thickness. In addition, there is a problem that the manufacturing process becomes long because a curing process for polyimidizing the precursor of the polyimide resin is required.

Therefore, a multilayer wiring board using an insulating layer formed by laminating a plurality of insulating film layers made of polyimide resin or the like with an insulating adhesive layer made of bismaleimide triazine resin or the like interposed therebetween has been adopted. .

In order to form the insulating layer of such a multilayer wiring board, first, an insulating film is coated with an insulating adhesive using a doctor blade method or the like and dried to prepare an insulating film layer for insulating the substrate and the lower layer. It is carried out by stacking the insulating adhesive layer on the upper surface of the film layer so as to be disposed between them, and heating and pressurizing this by using a heating press device to bond them.

For electrical connection between the wiring conductor layers located above and below, a through hole (via hole) is formed in the insulating film layer and the insulating adhesive layer by a method such as laser or dry etching, and then the inner wall of the via hole is formed. Is formed by forming a via-hole conductor by a vacuum film forming method or a plating method.

This via-hole conductor has the following (1) to (3) in a high-density wiring board such as a build-up board.
It is formed by a manufacturing method including the step (5). (1) The inside of the via hole opened by the laser is roughened with a roughening solution such as a potassium permanganate solution. (2) Pd or the like is applied as a plating catalyst to the roughened surface, and then a base conductor film is formed by electroless plating. (3) Next, a photoresist is applied on the underlying conductor film, and the photoresist is exposed and developed to form a window portion having a predetermined shape in a portion of the underlying conductor layer where the upper main conductor layer is formed. To do. (4) Next, an electrolytic plating film having a thickness of 3 to 10 μm is formed using the underlying conductor layer exposed in the window portion of the photoresist as an electrode. As a result, a plating film is formed on the exposed underlying conductor layer corresponding to the portion of the upper main conductor layer, and the plating film is not formed on the other portions because it is covered with photoresist. And the main conductor layer is formed only in the portion corresponding to the via hole conductor. (5) After the main conductor layer having a predetermined thickness is formed in this manner, the photoresist is peeled and removed, and then the main conductor layer is used as an etching resist for the base conductor layer previously used as the electrode for electrolytic plating. By partially etching, the wiring conductor layer and the via hole conductor are formed.

According to this method, since the wiring conductor layer and the via-hole conductor are integrally formed, the via-hole conductor is uniformly formed on the inner wall of the via-hole with substantially the same thickness as the wiring conductor layer.

[0010]

However, in a multilayer wiring board in which the insulating film layers as described above are heated and pressed through an insulating adhesive layer to bond them, a hot pressing step for forming the insulating film layers into multiple layers. Therefore, a mechanical load is applied to the insulating layer in a high temperature state. Therefore, the insulative adhesive layer is largely deformed compared to normal temperature and pressure, and the via-hole conductor formed on the inner wall of the via hole is also deformed following the deformation of the insulative adhesive layer. As a result, there is a problem that the via-hole conductor uniformly formed on the inner wall of the via-hole is deformed or ruptured, resulting in poor conduction between the wiring conductor layers located above and below.

In particular, when the insulating adhesive layer is made of a thermoplastic resin, the above-mentioned defective conduction is remarkable. However, when a mechanical load is applied at a high temperature close to the glass transition temperature of the adhesive, such as in a hot pressing process, even if the insulating adhesive layer is a thermosetting resin, deformation of the via-hole conductor occurs. I have something to do.

When the inside of the via hole is completely filled with a conductor, there is a large difference in the coefficient of thermal expansion between the conductor filled in the via hole and the insulating layer, so that when mounting a chip component or the like on the multilayer wiring board. In the environment resistance test such as the heating step or the temperature cycle test, there is a problem that cracks occur in the insulating layer or peeling occurs between the conductor filled with the via hole and the lower wiring conductor layer.

The present invention has been made in view of the above problems in the prior art, and an object of the present invention is to provide a via-hole conductor formed on the inner wall of a via-hole generated in a hot-pressing step when forming an insulating film layer into multiple layers. Suppresses deformation and breakage, as well as peeling between the via-hole conductor and the underlying wiring conductor layer that occurs in environmental resistance tests such as heating processes and temperature cycle tests when mounting chip parts, etc., and excellent electrical connection reliability Another object is to provide a multilayer wiring board.

[0014]

A multilayer wiring board according to the present invention comprises a plurality of insulating film layers made of an organic resin and a wiring conductor layer, which are laminated on the board, and are electrically bonded to each other above and below the insulating film layers. A multi-layer wiring board which is adhered via an adhesive layer, and the wiring conductor layers located above and below are electrically connected by arranging via hole conductors in via holes provided in an insulating film layer and an insulating adhesive layer between them. And
When the thickness of the via-hole conductor at the bottom of the via-hole is t _v , the thickness of the insulating adhesive layer is t _ad , and the thickness of the insulating film layer is t _f , t _ad ≤t _v ≤0.6
It is characterized by satisfying (t _f + t _ad ).

Further, in the multilayer wiring board of the present invention having the above-mentioned constitution, the storage elastic modulus of the insulating film layer at 250 ° C. is 1000 MPa or more, and the insulating adhesive layer of 250 is used.
The storage elastic modulus at ° C is 0.1 MPa or more and 50 MPa or less.

Further, in the multilayer wiring board of the present invention having the above structure, the insulating film layer is made of polyimide, the insulating adhesive layer is made of polyimidesiloxane or siloxane modified polyamideimide, and the via-hole conductor is made of copper or copper alloy. It is characterized by that.

According to the multilayer wiring board of the present invention, since the thickness of the via-hole conductor at the bottom of the via-hole is t _ad ≤t _v , the via-hole conductor is formed to be thicker than the insulating adhesive layer. Even when a mechanical load is applied to the insulating layer in a high temperature state during the hot pressing process when the insulating film layer is multilayered, the deformation of the insulating adhesive layer is suppressed by the via hole conductor, so the inner wall of the via hole is suppressed. The formed via-hole conductor does not deform or break.

Further, by setting the thickness of the via hole conductor at the bottom of the via hole to t _v ≤0.6 (t _f + t _ad ), the inside of the via hole is not completely filled with the via hole conductor, and the upper portion of the via hole is located inside the via hole conductor. A recess is formed. The recesses in the via holes are filled with an insulating adhesive layer when an insulating film layer is further laminated on the insulating layer on which the via hole conductor is formed by a heat press machine to form a multilayer structure. As a result, the coefficient of thermal expansion of the recess in the via hole approaches that of the insulating layer, so that the stress generated around the via hole can be reduced even when the temperature changes. As a result, cracks in the insulating layer and peeling between the via-hole conductor and the lower wiring conductor layer, which occur in an environment resistance test such as a heating process or a temperature cycle test when mounting a chip component on a multilayer wiring board, are eliminated.

As a result, a conductive failure between the upper and lower wiring conductor layers does not occur, and the multilayer wiring board has excellent electrical connection reliability.

Further, according to the multilayer wiring board of the present invention,
Storage elastic modulus of insulating film layer at 250 ℃ is 1000MP
When the storage elastic modulus at 250 ° C. of the insulating adhesive layer is 0.1 MPa or more and 50 MPa or less, a mechanical load is applied to the insulating layer at a high temperature in the hot pressing step when the insulating film layer is multilayered. Even when added, the elastic modulus of the insulating film layer is maintained at a high level so that it is hardly deformed. Further, the insulating adhesive layer is also in the rubber elastic region, so that it is not significantly deformed. As a result, the pressing pressure does not concentrate on the via-hole conductor, and the via-hole conductor formed on the inner wall of the via-hole does not deform or break.

As a result, a conductive failure between the upper and lower wiring conductor layers does not occur, and the multilayer wiring board is further excellent in electrical connection reliability.

Further, according to the multilayer wiring board of the present invention,
When the insulating film layer is formed of polyimide, the insulating adhesive layer is formed of polyimide siloxane or siloxane-modified polyamideimide, and the via-hole conductor is formed of copper or a copper alloy, the difference in thermal expansion coefficient between the insulating adhesive layer and the via-hole conductor is reduced, The stress generated around the via hole when the temperature changes can be reduced. As a result, cracks in the insulating layer and peeling between the via-hole conductor and the lower wiring conductor layer, which occur in an environment resistance test such as a heating process or a temperature cycle test when mounting a chip component on a multilayer wiring board, are eliminated.

Further, polyimide, polyimide siloxane, and siloxane-modified polyamide-imide have low dielectric constant and dielectric loss tangent in a wide range of high frequencies, and can be formed into an insulating layer having excellent high frequency characteristics.

As a result, it is possible to prevent the occurrence of conduction defects between the upper and lower wiring conductor layers and to form an insulating layer having excellent high frequency characteristics, and to provide a multilayer wiring board having excellent electrical connection reliability and high frequency characteristics. Become.

[0025]

BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be described in detail below with reference to the drawings.

FIG. 1 is a sectional view showing an example of an embodiment of a multilayer wiring board of the present invention, and FIG. 2 is an enlarged sectional view of an essential part showing a state around a via-hole conductor in the multilayer wiring board shown in FIG. is there. In these figures, 1 is a substrate, 2 is a multilayer wiring part, 3 is a wiring conductor layer, 4 is an insulating film layer, 5
Is an insulating adhesive layer, 6 is a via hole, and 7 is a via hole conductor.

The substrate 1 is provided with a multilayer wiring portion 2 on the upper surface of which a plurality of insulating film layers 4 are laminated via an insulating adhesive layer 5 and a wiring conductor layer 3 are laminated in multiple layers. And functions as a support member that supports the multilayer wiring section 2.

The substrate 1 is made of an oxide-based ceramic such as an aluminum oxide-based sintered body or a mullite-based sintered body, or an aluminum nitride-based sintered body having an oxide film on its surface, or a non-silicon carbide-based sintered body. It is made of oxide-based ceramics, or an electrically insulating material such as glass epoxy resin in which a base material made of glass fiber is impregnated with epoxy resin, or a base material made of glass fiber impregnated with bismaleimide triazine resin. .

For example, in the case of being formed of an aluminum oxide sintered body, an appropriate organic solvent or solvent is added to and mixed with a raw material powder of alumina, silica, calcia, magnesia or the like to form a slurry. A ceramic green sheet (ceramic green sheet) is formed by adopting the conventionally well-known doctor blade method or calendar roll method, and then this ceramic green sheet is subjected to appropriate punching processing to form a predetermined shape and high temperature (about The raw material powder is prepared by firing at 1600 ° C) or by adding and mixing an appropriate organic solvent or solvent to the raw material powder such as alumina, and the raw material powder is molded into a predetermined shape by a press molding machine. It is manufactured by firing a compact at a high temperature (about 1600 ° C). In the case of glass epoxy resin, for example, a base material made of glass fiber is impregnated with a precursor of epoxy resin,
It is manufactured by thermally curing the epoxy resin precursor at a predetermined temperature.

The substrate 1 has a multilayer wiring portion 2 in which a plurality of insulating film layers 4 are laminated on the upper surface of the substrate 1 with an insulating adhesive layer 5 interposed therebetween and a wiring conductor layer 3 are laminated in multiple layers.
Is provided. The insulating film layer 4 forming the multilayer wiring portion 2 electrically insulates the wiring conductor layers 3 located above and below, and the wiring conductor layer 3 functions as a transmission path for transmitting an electric signal.

The insulating layer of the multilayer wiring part 2 is the insulating film layer 4
The insulating film layer 4 is composed of a polyimide resin, a polyphenylene sulfide resin, a wholly aromatic polyester resin, a fluororesin and the like. The insulating adhesive layer 5 is made of polyamide-imide resin, polyimide-siloxane resin, bismaleimide-triazine resin,
It is made of epoxy resin. First, the insulating layer is 12.5 to 50 μm
The insulating film is coated with an insulating adhesive to a dry thickness of about 5 to 20 μm using a doctor blade method or the like and dried, and this insulating film is applied between the substrate 1 and the upper surface of the lower insulating layer. It is formed by stacking so that an insulating adhesive is placed on the sheet, and heating and pressurizing it by using a heating press device to bond them.

Above all, the via-hole conductor 7 is made of copper or a copper alloy, and the insulating film layer 4 is made of polyimide resin.
In the combination where the insulating adhesive layer 5 is a polyimide siloxane resin or a siloxane modified polyamide imide resin, the polyimide siloxane resin or the siloxane modified polyamide imide resin has good adhesiveness to the insulating film layer 4 and high heat resistance, Moreover, since the coefficient of thermal expansion is relatively close to that of copper, the difference in thermal expansion between the via-hole conductor 7 and the insulating layer is small, which is suitable for the present invention.

If the storage elastic modulus of the insulating film layer 4 at 250 ° C. is set to less than 1000 MPa and the storage elastic modulus of the insulating adhesive layer 5 at 250 ° C. is set to less than 0.1 MPa, the insulating film layer 4 is formed. When a mechanical load is applied to the insulating layer in a high temperature state in the hot pressing step for forming a multilayer, the insulating film layer 4 and the insulating adhesive layer 5 tend to be significantly deformed. Further, if the storage elastic modulus at 250 ° C. of the insulating adhesive layer 5 is set to be larger than 50 MPa, the embedding property of the wiring conductor layer 3 is deteriorated in the hot pressing step when the insulating film layer 4 is multilayered, and the insulation The adhesiveness between the film layer 4 and the wiring conductor layer 3 tends to decrease. Therefore, the storage elastic modulus of the insulating film layer 4 at 250 ° C. is 1000 MPa or more, and the storage elastic modulus of the insulating adhesive layer 5 is 25 MPa or more.
The storage elastic modulus at 0 ° C. is preferably 0.1 MPa or more and 50 MPa or less. The storage elastic modulus here is J
According to the dynamic storage elastic modulus measured by the tensile vibration method (1 Hz) of IS K7198.

A via hole 6 which is a through hole penetrating the insulating film layer 4 and the insulating adhesive layer 5 is formed at a predetermined position in the insulating layer, and a via hole conductor 7 is formed in the via hole 6. As a result, a connection path for electrically connecting each of the wiring conductor layers 3 located above and below the insulating film layer 4 is formed.

The via hole 6 is formed by removing a part of the insulating film layer 4 and the insulating adhesive layer 5 by using, for example, a laser. In particular, when the opening diameter of the via hole 6 is small, it is desirable to form the via hole with an ultraviolet laser that allows easy control of the via hole shape and the inner wall surface of the via hole 6 to be processed smoothly.

The wiring conductor layer 3 provided on the upper surface of each insulating film layer 4 and the via hole conductor 7 provided in the via hole 6 are copper, gold, aluminum, nickel, chromium, molybdenum, titanium and alloys thereof. It is possible to form a metal material such as by using a thin film forming technique such as a sputtering method, a vapor deposition method, or a plating method.

The via-hole conductor 7 may be formed separately from the wiring conductor layer 3, but if they are formed at the same time, the number of steps can be reduced and the electrical connection reliability between the two is good. Further, when the wiring conductor layer 3 and the via-hole conductor 7 are integrally formed, the electrolytic plating method is mainly used so that a plating film having a desired thickness can be adjusted and formed. Good.

A method of forming the wiring conductor layer 3 and the via-hole conductor 7 is, for example, that a copper layer is mainly used in a large area, and chromium, molybdenum, and a diffusion prevention layer (barrier layer) are formed on at least one main surface of the copper layer. Titanium or the like is deposited to form a base conductor layer. Next, a photoresist is formed in a desired pattern on this, and the main conductor layer portion is formed by plating to a desired thickness using this photoresist as a mask. After that, the photoresist is peeled off, and the underlying conductor layer is removed by etching, whereby a desired pattern can be formed.

At this time, if the thickness of the via-hole conductor 7 at the bottom of the via-hole 6 is made thinner than the thickness of the insulating adhesive layer 5, the insulating film layer 4 becomes a high-temperature insulating layer in the hot pressing step. Since the mechanical load is applied, the insulating adhesive layer 5 is largely deformed as compared with normal temperature and pressure, and the via hole conductor 7 formed on the inner wall of the via hole 6 is also deformed following the deformation of the insulating adhesive layer 5. Becomes As a result, the via-hole conductor 7 formed uniformly on the inner wall of the via-hole 6 is deformed or fractured, and there is a tendency for defective conduction to occur between the wiring conductor layers 3 located above and below.

If the thickness of the via-hole conductor 7 at the bottom of the via-hole 6 is made thicker than 60% of the total thickness of the insulating film layer 4 and the insulating adhesive layer 5, the coefficient of thermal expansion between the via-hole conductor 7 and the insulating layer is increased. Because there is a big difference in
In an environment resistance test such as a heating process or a temperature cycle test when mounting a chip component, a crack is likely to occur in the insulating layer or peeling is likely to occur between the via-hole conductor 7 and the lower wiring conductor layer 3. was there.

Therefore, the thickness t _v of the via hole conductor 7 at the bottom of the via hole 6 is t _ad ≤t _v ≤0.6 (t _f +
It is preferable to set the range to satisfy the relational expression of (t _ad ).

The uppermost main conductor layer of the insulating film layer 4 is formed from the viewpoints of mountability of chip parts and environmental resistance.
When the main conductor layer is a copper layer, a nickel layer or a gold layer may be formed thereon.

Thus, according to the multilayer wiring board of the present invention, electronic components such as a semiconductor element, a capacitive element, and a resistor are mounted and mounted on the multilayer wiring part 2 attached to the upper surface of the substrate 1.
By electrically connecting each electrode of the electronic component to the wiring conductor layer 3, a semiconductor device, a hybrid integrated circuit device, or the like is obtained.

The present invention is not limited to the above example, and various modifications can be made without departing from the scope of the present invention. For example, in the above-described embodiment, the multilayer wiring portion 2 including the insulating layer and the wiring conductor layer 3 is provided only on the upper surface of the substrate 1, but even if the multilayer wiring portion 2 is provided only on the lower surface side of the substrate 1, the upper and lower portions are It may be provided on both sides of.

[0045]

EXAMPLES Example 1 Upilex S (polyimide film manufactured by Ube Industries, Ltd., product name) having a thickness of 20 μm as an insulating film, and Upitite (polyimide siloxane manufactured by Ube Industries, product name) as an insulating adhesive Was applied to a thickness of 5 μm to prepare an insulating film layer with an insulating adhesive layer. Next, pressure 2M is applied to the alumina substrate (100 mm square) on which the wiring conductor layer (first conductor layer) is formed.
Under the heating and pressurizing conditions of Pa, 230 ° C., 30 minutes, the above insulating film layer is laminated with an insulating adhesive layer in between to form an insulating layer (first
An insulating layer). After that, φ30 with excimer laser
A via hole of μm was processed, and then a multilayer film of Cr and Cu was formed by a sputtering method to form a base conductor layer for electrolytic plating. Next, a photoresist was masked on the portions other than where the wiring conductor layer and the via-hole conductor were formed, and electrolytic copper plating was used to form a plating film for the wiring conductor layer and the main conductor layer of the via-hole conductor. afterwards,
By removing the photoresist and removing the underlying conductor layer for electrolytic copper plating, a wiring conductor layer (second conductor layer) and a via-hole conductor (connecting the first conductor layer and the second conductor layer) were formed. At this time, the thickness of the via-hole conductor at the bottom of the via-hole was changed to 1,4 by changing the additive for electrolytic copper sulfate plating (Sulcup AC-90 manufactured by Uemura Kogyo Co., Ltd. and Cubelite VF manufactured by Ebara-Udylite Co., Ltd.) and the plating time. , 6,10,15,20,25μm
So that

Next, a second insulating layer, a third wiring conductor layer, and a via-hole conductor connecting the second wiring conductor layer and the third wiring conductor layer were formed by the same method as the above procedure. Furthermore, the third
A nickel layer and a gold layer were sequentially formed on the wiring conductor layer as a surface protective film.

A test piece capable of measuring the connection resistance value of a via hole conductor of 900 holes was manufactured by the above-mentioned method, and a reflow furnace test (260 ° C peak), a temperature cycle test (-55 ° C ⇔ 125
High-temperature storage test (150 ° C, 1000 hours) was performed to evaluate the rate of change in the connection resistance value of the via-hole conductor. Judgment was judged to be a failure if it showed a change of ± 10% or more from the initial value. Table 1 shows a summary of the results of the number of failures / the number of samples in each test.

[0048]

[Table 1]

As shown in Table 1, when the thickness of the via-hole conductor at the bottom of the via-hole is smaller than the thickness of the insulating adhesive layer, a large change in the connection resistance value of the via-hole conductor was observed at the initial stage and after the reflow furnace test. It was Therefore,
As a result of the analysis of this failed via hole,
Deformation and breakage of the via-hole conductor, which was considered to have occurred during the pressing process when laminating the insulating layers, were confirmed.

Further, when the thickness of the via-hole conductor at the bottom of the via-hole was 60% or more of the thickness of the insulating layer penetrating the via-hole, a large change in the connection resistance value of the via-hole conductor was observed after each test. Then, as a result of analyzing the failed via hole portion, peeling between the via hole conductor and the first wiring conductor layer was confirmed. It is considered that the cause of this peeling is that the via hole conductor was pushed up and peeled off due to the difference in thermal expansion between the insulating layer and the via hole conductor.

Further, the thickness t _{v of the} via-hole conductor is t _ad ≤
No significant change in the connection resistance value of the via-hole conductor was observed in the test pieces within the range of t _v ≦ 0.6 (t _f + t _ad ).

Example 2 Upilex S (polyimide film manufactured by Ube Industries, Ltd.) having a thickness of 12.5 μm as an insulating film was coated with siloxane-modified polyamideimide as an insulating adhesive to a thickness of 10 μm to obtain an insulating property. An insulating film layer with an adhesive layer was prepared. next,
Alumina substrate with a wiring conductor layer (first conductor layer) (10
The above insulating film layer was laminated with an insulating adhesive layer in between under a pressure of 3 MPa, 260 ° C., and heating / pressurizing conditions for 60 minutes to form an insulating layer (first insulating layer). After that, a via hole of φ30 μm was processed by an excimer laser, and then a multilayer film of Cr and Cu was formed by a sputtering method to form a base conductor layer for electrolytic plating. Next, photoresist was masked on the portions other than the area where the wiring conductor layer and the via-hole conductor were formed, and electrolytic copper plating was used to form a plating film for the wiring conductor layer and the main conductor layer of the via-hole conductor. Then, the photoresist is peeled off, and the underlying conductor layer for electrolytic copper plating is removed to remove the wiring conductor layer (second
A conductor layer) and a via-hole conductor (connecting the first conductor layer and the second conductor layer) were formed. At this time, an additive for electrolytic copper sulfate plating (Sulcup AC-90 manufactured by Uemura Industry Co., Ltd.
And Ebara Light Cubelight V
By changing F) and plating time, the thickness of the via hole conductor at the bottom of the via hole is 1, 6, 10, 15,
It was set to 22 μm.

Then, a second insulating layer, a third wiring conductor layer, and a via-hole conductor connecting the second wiring conductor layer and the third wiring conductor layer were formed by the same method as the above procedure. Furthermore, the third
A nickel layer and a gold layer were sequentially formed on the wiring conductor layer as a surface protective film.

A test piece capable of measuring the connection resistance value of a via-hole conductor of 900 holes was manufactured by the above method, and a reflow furnace test (260 ° C peak) and a temperature cycle test (-55 ° C ⇔ 125
High-temperature storage test (150 ° C, 1000 hours) was performed to evaluate the rate of change in the connection resistance value of the via-hole conductor. Judgment was judged to be a failure if it showed a change of ± 10% or more from the initial value. Table 2 shows a summary of the results of the number of failures / the number of samples in each test.

[0055]

[Table 2]

As shown in Table 2, when the thickness of the via-hole conductor at the bottom of the via-hole is smaller than the thickness of the insulating adhesive layer, a large change in the connection resistance value of the via-hole conductor was observed at the initial stage and after the reflow furnace test. It was Therefore,
As a result of the analysis of this failed via hole,
Deformation and breakage of the via-hole conductor, which was considered to have occurred during the pressing process when laminating the insulating layers, were confirmed.

Further, when the thickness of the via-hole conductor at the bottom of the via-hole was 60% or more of the thickness of the insulating layer penetrating the via-hole, a large change in the connection resistance value of the via-hole conductor was observed after each test. Then, as a result of analyzing the failed via hole portion, peeling between the via hole conductor and the first wiring conductor layer was confirmed. It is considered that the cause of this peeling is that the via hole conductor was pushed up and peeled off due to the difference in thermal expansion between the insulating layer and the via hole conductor.

Further, the thickness t _{v of the} via-hole conductor is t _ad ≤
No significant change in the connection resistance value of the via-hole conductor was observed in the test pieces within the range of t _v ≦ 0.6 (t _f + t _ad ).

[0059]

As described above, according to the multilayer wiring board of the present invention, the thickness of the via-hole conductor at the bottom of the via-hole is set to t _ad ≤t _v , so that the via-hole conductor is thicker than the insulating adhesive layer. Since it is formed, the deformation of the insulating adhesive layer is suppressed by the via-hole conductor even when a mechanical load is applied to the insulating layer in a high temperature state in the hot pressing process when the insulating film layer is multilayered. Therefore, the via-hole conductor formed on the inner wall of the via-hole does not deform or break.

Since the thickness of the via-hole conductor at the bottom of the via-hole is t _v ≤0.6 (t _f + t _ad ), the inside of the via-hole is not completely filled with the via-hole conductor, and the upper part of the via-hole is recessed inside the via-hole conductor. Is formed. An insulating adhesive layer is filled in the concave portion of the via hole when an insulating film layer is further laminated on the insulating layer on which the via hole conductor is formed by a heat press to form a multilayer structure. As a result, the coefficient of thermal expansion of the recess in the via hole approaches that of the insulating layer, so that the stress generated around the via hole can be reduced even when the temperature changes. As a result, cracks in the insulating layer and peeling between the via-hole conductor and the lower wiring conductor layer, which occur in an environment resistance test such as a heating process or a temperature cycle test when mounting a chip component on a multilayer wiring board, are eliminated.

As a result, the occurrence of conduction failure between the upper and lower wiring conductor layers is eliminated, and the multilayer wiring board has excellent electrical connection reliability.

Further, according to the multilayer wiring board of the present invention,
Storage elastic modulus of insulating film layer at 250 ℃ is 1000MP
When the storage elastic modulus at 250 ° C. of the insulating adhesive layer is 0.1 MPa or more and 50 MPa or less, a mechanical load is applied to the insulating layer at a high temperature in the hot pressing step when the insulating film layer is multilayered. Even when added, the elastic modulus of the insulating film layer is maintained high, so that it is hardly deformed. Further, the insulating adhesive layer is also in the rubber elastic region, so that it is not significantly deformed. As a result, the pressing pressure does not concentrate on the via-hole conductor, and the via-hole conductor formed on the inner wall of the via-hole does not deform or break.

As a result, the occurrence of conduction defects between the wiring conductor layers located above and below is eliminated, and the multilayer wiring board has further excellent electrical connection reliability.

Further, according to the multilayer wiring board of the present invention,
When the insulating film layer is formed of polyimide, the insulating adhesive layer is formed of polyimide siloxane or siloxane-modified polyamideimide, and the via-hole conductor is formed of copper or a copper alloy, the difference in thermal expansion coefficient between the insulating adhesive layer and the via-hole conductor is reduced, The stress generated around the via hole when the temperature changes can be reduced. As a result, cracks in the insulating layer and peeling between the via-hole conductor and the lower wiring conductor layer, which occur in an environment resistance test such as a heating process or a temperature cycle test when mounting a chip component on a multilayer wiring board, are eliminated.

Further, polyimide, polyimide siloxane, and siloxane-modified polyamide-imide have low dielectric constant and dielectric loss tangent in a wide range of high frequencies, and can be formed into an insulating layer having excellent high frequency characteristics.

As a result, it is possible to prevent the occurrence of conduction defects between the upper and lower wiring conductor layers and to form an insulating layer having excellent high frequency characteristics, and to provide a multilayer wiring board having excellent electrical connection reliability and high frequency characteristics. Become.

[Brief description of drawings]

FIG. 1 is a sectional view showing an example of an embodiment of a multilayer wiring board of the present invention.

FIG. 2 is an enlarged sectional view of an essential part showing a state around a via-hole conductor in the multilayer wiring board shown in FIG.

[Explanation of symbols]

1 ... substrate 2 ... Multi-layer wiring part 3 ... Wiring conductor layer 4 ... Insulating film layer 5 ... Insulating adhesive layer 6 ... Beer hall 7 ... Via-hole conductor

Claims (3)

[Claims] 1. A plurality of insulating film layers made of an organic resin and a wiring conductor layer are laminated on a substrate, and the insulating film layers are adhered to each other with an insulating adhesive layer interposed therebetween.
A multilayer wiring board in which via wiring conductors are electrically connected by arranging the wiring conductive layers located above and below in via holes provided in an insulating film layer and an insulating adhesive layer between the wiring conductive layers, the bottom portion of the via holes being provided. Where t _{v is} the thickness of the via-hole conductor, t _{ad is} the thickness of the insulating adhesive layer, and t _f is the thickness of the insulating film layer,
A multilayer wiring board characterized by satisfying _ad ≤t _v ≤0.6 (t _f + t _ad ). 2. The storage elastic modulus at 250 ° C. of the insulating film layer is 1000 MPa or more, and the storage elastic modulus at 250 ° C. of the insulating adhesive layer is 0.1 MPa or more and 50 MPa or less. 1. The multilayer wiring board according to 1. 3. The multilayer wiring according to claim 1, wherein the insulating film layer is formed of polyimide, the insulating adhesive layer is formed of polyimide siloxane or siloxane modified polyamide imide, and the via hole conductor is formed of copper or copper alloy. substrate.