JP2003031764A - Power semiconductor device - Google Patents

Power semiconductor device

Info

Publication number
JP2003031764A
JP2003031764A JP2001210636A JP2001210636A JP2003031764A JP 2003031764 A JP2003031764 A JP 2003031764A JP 2001210636 A JP2001210636 A JP 2001210636A JP 2001210636 A JP2001210636 A JP 2001210636A JP 2003031764 A JP2003031764 A JP 2003031764A
Authority
JP
Japan
Prior art keywords
main surface
semiconductor device
control
power semiconductor
case
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2001210636A
Other languages
Japanese (ja)
Other versions
JP4432288B2 (en
Inventor
Takashi Marumo
高志 丸茂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2001210636A priority Critical patent/JP4432288B2/en
Publication of JP2003031764A publication Critical patent/JP2003031764A/en
Application granted granted Critical
Publication of JP4432288B2 publication Critical patent/JP4432288B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires

Landscapes

  • Dc-Dc Converters (AREA)
  • Structure Of Printed Boards (AREA)
  • Inverter Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To reduce in planar dimension and size a power semiconductor device due to a reduction in size of a planar dimension of a control substrate in the power semiconductor device, in which the control substrate for mounting a control component for controlling a power switching semiconductor element is mounted on a front main surface, in a larger planar dimension of the main surface than that of an insulating cylindrical case for housing the power switching element at an opening end of the case. SOLUTION: The power semiconductor device comprises the control component mounted on a rear main surface of the control substrate as well, and an opening space formed in the opening of the case in such a manner that the component is housed in the space. Thus, a mounting density of the substrate is increased, and the planar dimension of the semiconductor device is reduced in size.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、電力用スイッチン
グ半導体素子を収納した絶縁性の筒状のケースの開口端
に前記電力用スイッチング半導体素子を制御する制御基
板を固着する電力用半導体装置の改良に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement of a power semiconductor device in which a control board for controlling the power switching semiconductor element is fixed to the opening end of an insulating cylindrical case accommodating the power switching semiconductor element. It is about.

【0002】[0002]

【従来の技術】従来のこの種の電力用半導体装置を図2
に基づき説明する。なお、図2は従来の電力用半導体装
置の部分縦断面図である。
2. Description of the Related Art A conventional power semiconductor device of this type is shown in FIG.
It will be explained based on. 2 is a partial vertical cross-sectional view of a conventional power semiconductor device.

【0003】図2において、1は表主面1aと裏主面1
bとを有する金属ベース板、2は金属ベース板上に配設
された電力用絶縁基板で、セラミック基板2aと、該セ
ラミック基板2aの表主面に形成された主回路パターン
2bと、セラミック基板2aの裏主面に形成された金属
製の裏面パターン2cとで構成され、該裏面パターン2
cが表主面1aに半田(図示せず)にて半田付けされて
なるものである。3aおよび3bは主回路パターン2b
上に半田(図示せず)にて半田付けされた電力用半導体
素子で、具体的には電力用スイッチング半導体素子とし
てのIGBTと、該IGBTと逆並列に接続されたフラ
イホイールダイオードとからなるものである。4は絶縁
基板2や電力用半導体素子3a、3bを囲繞するよう
に、その一端4aが表主面1a上に固着されると共に、
他端4bに開口を有し筒状をなす樹脂製のケース、5は
電力用半導体素子3a、3bに対する入力用主端子でケ
ース4にインサートされ、その一端5aがケース4内の
一端4a近傍に露出し、他端5bが他端4bに露出して
なるものである。6は電力用半導体素子3a、3bに接
続される出力用主端子でケース4にインサートされ、そ
の一端6aがケース4内の一端4a近傍に露出し、他端
6bが他端4bに露出してなるものである。7は制御端
子でケース4にインサートされ、その一端7aがケース
4内の一端4a近傍に露出し、他端7bが他端4bに露
出してなるものである。8は電力用半導体素子3a、3
bを一端5a、一端6a、一端7aに適宜接続するアル
ミ製のボンディングワイヤ、9は電力用半導体素子3
a、3bやボンディングワイヤ8を封止するためケース
4内に充填された封止樹脂、10はケース4の他端4b
に固着された制御基板で、基板本体10aと、基板本体
10aの表主面に形成された回路パターン(図示せず)
に実装された制御IC等からなる制御部品10bとで構
成されてなるものである。
In FIG. 2, reference numeral 1 is a front main surface 1a and a back main surface 1
2 is a metal base plate having b and 2 is an insulating substrate for electric power disposed on the metal base plate, and includes a ceramic substrate 2a, a main circuit pattern 2b formed on the front main surface of the ceramic substrate 2a, and a ceramic substrate. 2a and a metal back surface pattern 2c formed on the back main surface of the back surface 2a.
c is soldered to the front main surface 1a with solder (not shown). 3a and 3b are main circuit patterns 2b
A power semiconductor element soldered on the above with a solder (not shown), specifically, an IGBT as a power switching semiconductor element, and a flywheel diode connected in antiparallel with the IGBT. Is. An end 4a is fixed to the front main surface 1a so as to surround the insulating substrate 2 and the power semiconductor elements 3a and 3b.
A cylindrical resin case 5 having an opening at the other end 4b is a main input terminal for the power semiconductor elements 3a and 3b, and is inserted into the case 4, and one end 5a thereof is located near the one end 4a in the case 4. The other end 5b is exposed and the other end 4b is exposed. Reference numeral 6 denotes an output main terminal connected to the power semiconductor elements 3a and 3b, which is inserted into the case 4, one end 6a of which is exposed near the one end 4a in the case 4 and the other end 6b of which is exposed at the other end 4b. It will be. A control terminal 7 is inserted into the case 4, one end 7a of which is exposed near the one end 4a in the case 4 and the other end 7b is exposed to the other end 4b. 8 is a power semiconductor element 3a, 3
An aluminum bonding wire for properly connecting b to one end 5a, one end 6a, and one end 7a, and 9 is a power semiconductor element 3
Sealing resin 10 filled in case 4 for sealing a, 3b and bonding wire 8 is the other end 4b of case 4.
The control substrate fixed to the substrate main body 10a, and a circuit pattern (not shown) formed on the front main surface of the substrate main body 10a.
And a control component 10b including a control IC mounted on the.

【0004】なお、基板本体10aの表主面に形成され
た回路パターン(図示せず)に制御端子7の他端7bが
半田付けにて接続されており、制御基板10からの制御
信号によって電力用スイッチング半導体素子3aがスイ
ッチング動作を行い、該スイッチング動作によって、P
WM制御された出力が出力用主端子6を介し負荷に供給
される。
The other end 7b of the control terminal 7 is soldered to a circuit pattern (not shown) formed on the front main surface of the substrate body 10a, and power is supplied by a control signal from the control substrate 10. Switching semiconductor element 3a performs a switching operation, and by the switching operation, P
The WM-controlled output is supplied to the load via the output main terminal 6.

【0005】[0005]

【発明が解決しようとする課題】従来の電力用半導体装
置は、以上のように構成されているので、制御基板に対
する制御部品が制御基板本体の表主面のみであり、制御
部品の数が多くなると基板本体の表主面を広くする必要
があり高価になったり、電力用半導体装置としての平面
寸法が大きくなると言う問題があった。
Since the conventional power semiconductor device is configured as described above, the control parts for the control board are only the front main surface of the control board body, and the number of control parts is large. In that case, there is a problem that the front main surface of the substrate main body needs to be widened and the cost becomes high, and the plane size of the power semiconductor device becomes large.

【0006】本発明は、以上のような従来の実情に鑑み
てなされたもので、平面寸法が小型の電力用半導体装置
を提供することを目的とするものである。
The present invention has been made in view of the above conventional circumstances, and an object thereof is to provide a power semiconductor device having a small planar dimension.

【0007】[0007]

【課題を解決するための手段】この発明に係わる電力用
半導体装置は、電力用スイッチング半導体素子を収納し
た絶縁性の筒状のケースの開口端に、表主面の寸法が前
記ケースの平面寸法より大で、前記電力用スイッチング
半導体素子を制御する制御用部品を前記表主面に実装し
た制御基板を固着する電力用半導体装置において、前記
制御基板の裏主面にも前記制御用部品を実装すると共
に、前記ケースの開口部に開口空間部を形成し、該開口
空間部に前記制御用部品の一部を配設したものである。
According to another aspect of the present invention, there is provided a power semiconductor device in which a front main surface has a plane dimension at the opening end of an insulating cylindrical case accommodating a power switching semiconductor element. In a power semiconductor device having a larger size, a control board for mounting the control parts for controlling the power switching semiconductor element mounted on the front main surface, and a control board fixed, the control parts are also mounted on the back main surface of the control board. In addition, an opening space is formed in the opening of the case, and a part of the control component is arranged in the opening space.

【0008】また、制御基板の裏主面の前記ケースの外
側領域にも制御部品を実装したものである。
Further, the control component is mounted also on the outer main region of the back main surface of the control board.

【0009】[0009]

【発明の実施の形態】実施の形態1.この発明の実施の
形態1を図1に基づき説明する。図において11はケー
ス4の他端4b側の開口部に形成された開口空間部で、
該開口空間部11に基板本体10aの裏主面に実装した
制御部品10bを配設すると共に、基板本体10aの裏
主面のケース4の外側領域にも制御部品10bを配設し
てなるものである。
BEST MODE FOR CARRYING OUT THE INVENTION Embodiment 1. Embodiment 1 of the present invention will be described with reference to FIG. In the figure, 11 is an opening space formed in the opening on the other end 4b side of the case 4,
A control component 10b mounted on the back main surface of the substrate body 10a is arranged in the opening space 11, and a control component 10b is also arranged on an area outside the case 4 on the back main surface of the substrate body 10a. Is.

【0010】なお、その他の符号の説明は、図2の符号
の説明と同一のため説明を省略する。
The other reference numerals are the same as those of FIG. 2 and will not be described.

【0011】また、動作も従来のものと同じにつき説明
を省略する。
The operation is also the same as the conventional one, and the description thereof is omitted.

【0012】このように構成された電力用半導体装置に
おいては、制御基板10の基板本体10aの裏主面にも
制御部品10bを実装し、ケース4の開口端部に開口空
間部11を形成し該開口空間部11に制御部品10bを
配設したことで、基板本体10aに対する制御部品10
bの実装密度が高まる。
In the power semiconductor device thus configured, the control component 10b is also mounted on the back main surface of the substrate body 10a of the control substrate 10, and the opening space 11 is formed at the opening end of the case 4. By disposing the control component 10b in the opening space portion 11, the control component 10 for the substrate body 10a is provided.
The packaging density of b is increased.

【0013】また、基板本体10aの裏主面のケース4
の外側領域にも制御部品10bを配設したことで、基板
本体10aに対する制御部品10bの実装密度が更に高
まる。
The case 4 on the back main surface of the substrate body 10a
By disposing the control component 10b also in the outer region of the board, the mounting density of the control component 10b on the substrate body 10a is further increased.

【0014】[0014]

【発明の効果】この発明は、以上のように構成されてい
るので、以下に記載されるような効果を奏する。
Since the present invention is constituted as described above, it has the following effects.

【0015】第1の発明によれば、電力用スイッチング
半導体素子を収納した絶縁性の筒状のケースの開口端
に、表主面の寸法が前記ケースの平面寸法より大で、前
記電力用スイッチング半導体素子を制御する制御用部品
を前記表主面に実装した制御基板を固着する電力用半導
体装置において、前記制御基板の裏主面にも前記制御用
部品を実装すると共に、前記ケースの開口部に開口空間
部を形成し、該開口空間部に前記制御用部品の一部を配
設したので、前記制御基板に対する前記制御用部品の実
装密度を従来に比して高めることが出来、従来に比し平
面寸法が小型の電力用半導体装置を提供できる高価があ
る。
According to the first aspect of the invention, at the opening end of the insulating cylindrical case accommodating the power switching semiconductor element, the dimension of the front main surface is larger than the plane dimension of the case, and the power switching is performed. In a power semiconductor device in which a control board having a control part for controlling a semiconductor element mounted on the front main surface is fixed, the control part is also mounted on the back main surface of the control board, and the opening of the case is formed. Since the opening space portion is formed in and the part of the control component is disposed in the opening space portion, the mounting density of the control component on the control board can be increased as compared with the conventional one. In comparison, it is expensive to provide a power semiconductor device having a small plane size.

【0016】また、第2の発明によれば、制御基板の裏
主面の前記ケースの外側領域にも制御部品を実装したの
で、制御基板に対する前記制御用部品の実装密度を更に
高めることが出来、平面寸法が極めて小型の電力用半導
体装置を提供できる高価がある。
Further, according to the second aspect of the invention, since the control component is also mounted on the outer main region of the back main surface of the control substrate, the mounting density of the control component on the control substrate can be further increased. However, it is expensive to provide a power semiconductor device having a very small planar size.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の実施の形態1を示す縦断面図であ
る。
FIG. 1 is a vertical sectional view showing a first embodiment of the present invention.

【図2】 従来の電力用半導体装置を示す縦断面図であ
る。
FIG. 2 is a vertical sectional view showing a conventional power semiconductor device.

【符号の説明】[Explanation of symbols]

4 ケース、10 制御基板、10b 制御部品、11
開口空間部
4 cases, 10 control boards, 10b control parts, 11
Open space

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 電力用スイッチング半導体素子を収納し
た絶縁性の筒状のケースの開口端に、表主面の寸法が前
記ケースの平面寸法より大で、前記電力用スイッチング
半導体素子を制御する制御用部品を前記表主面に実装し
た制御基板を固着する電力用半導体装置において、前記
制御基板の裏主面にも前記制御用部品を実装すると共
に、前記ケースの開口部に開口空間部を形成し、該開口
空間部に前記制御用部品の一部を配設したことを特徴と
する電力用半導体装置。
1. A control for controlling the power switching semiconductor element, wherein a dimension of a front main surface is larger than a plane dimension of the case at an opening end of an insulating cylindrical case accommodating the power switching semiconductor element. In a power semiconductor device in which a control board having component parts mounted on the front main surface is fixed, the control component is also mounted on the back main surface of the control board, and an opening space is formed in the opening of the case. The power semiconductor device is characterized in that a part of the control component is provided in the opening space.
【請求項2】 制御基板の裏主面の前記ケースの外側領
域にも制御部品を実装したことを特徴とする請求項1記
載の電力用半導体装置。
2. The power semiconductor device according to claim 1, wherein a control component is also mounted on an area outside the case on the back main surface of the control board.
JP2001210636A 2001-07-11 2001-07-11 Power semiconductor device Expired - Lifetime JP4432288B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001210636A JP4432288B2 (en) 2001-07-11 2001-07-11 Power semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001210636A JP4432288B2 (en) 2001-07-11 2001-07-11 Power semiconductor device

Publications (2)

Publication Number Publication Date
JP2003031764A true JP2003031764A (en) 2003-01-31
JP4432288B2 JP4432288B2 (en) 2010-03-17

Family

ID=19046074

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001210636A Expired - Lifetime JP4432288B2 (en) 2001-07-11 2001-07-11 Power semiconductor device

Country Status (1)

Country Link
JP (1) JP4432288B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007012839A (en) * 2005-06-30 2007-01-18 Honda Motor Co Ltd Electric circuit unit
JP2010034374A (en) * 2008-07-30 2010-02-12 Denso Corp Electronic apparatus
US7723846B2 (en) 2004-09-22 2010-05-25 Fuji Electric Device Technology Co., Ltd. Power semiconductor module and method of manufacturing the same

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7723846B2 (en) 2004-09-22 2010-05-25 Fuji Electric Device Technology Co., Ltd. Power semiconductor module and method of manufacturing the same
US8158458B2 (en) 2004-09-22 2012-04-17 Fuji Electric Co., Ltd. Power semiconductor module and method of manufacturing the same
DE102005040058B4 (en) * 2004-09-22 2019-02-21 Fuji Electric Co., Ltd. Power semiconductor module and method for producing the same
JP2007012839A (en) * 2005-06-30 2007-01-18 Honda Motor Co Ltd Electric circuit unit
JP4486556B2 (en) * 2005-06-30 2010-06-23 本田技研工業株式会社 Electric circuit unit
JP2010034374A (en) * 2008-07-30 2010-02-12 Denso Corp Electronic apparatus

Also Published As

Publication number Publication date
JP4432288B2 (en) 2010-03-17

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