JP2003017706A - Tft substrate, liquid crystal display device using the same, and its manufacturing method - Google Patents
Tft substrate, liquid crystal display device using the same, and its manufacturing methodInfo
- Publication number
- JP2003017706A JP2003017706A JP2001200710A JP2001200710A JP2003017706A JP 2003017706 A JP2003017706 A JP 2003017706A JP 2001200710 A JP2001200710 A JP 2001200710A JP 2001200710 A JP2001200710 A JP 2001200710A JP 2003017706 A JP2003017706 A JP 2003017706A
- Authority
- JP
- Japan
- Prior art keywords
- film
- tft substrate
- metal
- thin film
- buffer layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 51
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 15
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 11
- 239000010408 film Substances 0.000 claims abstract description 84
- 229910052751 metal Inorganic materials 0.000 claims abstract description 82
- 239000002184 metal Substances 0.000 claims abstract description 82
- 239000010409 thin film Substances 0.000 claims abstract description 44
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 18
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 14
- 238000005530 etching Methods 0.000 claims abstract description 9
- 239000000463 material Substances 0.000 claims description 16
- 229910045601 alloy Inorganic materials 0.000 claims description 12
- 239000000956 alloy Substances 0.000 claims description 12
- 150000002739 metals Chemical class 0.000 claims description 10
- 229910052718 tin Inorganic materials 0.000 claims description 7
- 229910052719 titanium Inorganic materials 0.000 claims description 7
- 229910052725 zinc Inorganic materials 0.000 claims description 7
- 229910052804 chromium Inorganic materials 0.000 claims description 6
- 229910052738 indium Inorganic materials 0.000 claims description 6
- 229910052733 gallium Inorganic materials 0.000 claims description 5
- 229910052763 palladium Inorganic materials 0.000 claims description 5
- 229910052697 platinum Inorganic materials 0.000 claims description 5
- 229910052703 rhodium Inorganic materials 0.000 claims description 4
- 239000010410 layer Substances 0.000 abstract description 42
- 238000000034 method Methods 0.000 abstract description 23
- 239000011241 protective layer Substances 0.000 abstract description 4
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 239000007789 gas Substances 0.000 description 14
- 239000007864 aqueous solution Substances 0.000 description 11
- 238000004544 sputter deposition Methods 0.000 description 10
- MUBZPKHOEPUJKR-UHFFFAOYSA-N Oxalic acid Chemical compound OC(=O)C(O)=O MUBZPKHOEPUJKR-UHFFFAOYSA-N 0.000 description 9
- 229910052750 molybdenum Inorganic materials 0.000 description 6
- 239000011701 zinc Substances 0.000 description 6
- 229910000838 Al alloy Inorganic materials 0.000 description 5
- 229910004205 SiNX Inorganic materials 0.000 description 5
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 4
- 239000011229 interlayer Substances 0.000 description 4
- 238000001259 photo etching Methods 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- LXFUCSMCVAEMCD-UHFFFAOYSA-N acetic acid;nitric acid;phosphoric acid Chemical compound CC(O)=O.O[N+]([O-])=O.OP(O)(O)=O LXFUCSMCVAEMCD-UHFFFAOYSA-N 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 235000006408 oxalic acid Nutrition 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 229910052709 silver Inorganic materials 0.000 description 3
- 238000007740 vapor deposition Methods 0.000 description 3
- 239000011787 zinc oxide Substances 0.000 description 3
- OAKJQQAXSVQMHS-UHFFFAOYSA-N Hydrazine Chemical compound NN OAKJQQAXSVQMHS-UHFFFAOYSA-N 0.000 description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- CPELXLSAUQHCOX-UHFFFAOYSA-N Hydrogen bromide Chemical compound Br CPELXLSAUQHCOX-UHFFFAOYSA-N 0.000 description 2
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- 229910052786 argon Inorganic materials 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 2
- 238000001755 magnetron sputter deposition Methods 0.000 description 2
- 229910044991 metal oxide Inorganic materials 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 238000001771 vacuum deposition Methods 0.000 description 2
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 2
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 1
- 102100032244 Dynein axonemal heavy chain 1 Human genes 0.000 description 1
- 101000592773 Halobacterium salinarum (strain ATCC 700922 / JCM 11081 / NRC-1) 50S ribosomal protein L22 Proteins 0.000 description 1
- 101001016198 Homo sapiens Dynein axonemal heavy chain 1 Proteins 0.000 description 1
- 101000984186 Homo sapiens Leukocyte immunoglobulin-like receptor subfamily B member 4 Proteins 0.000 description 1
- 101001099381 Homo sapiens Peroxisomal biogenesis factor 19 Proteins 0.000 description 1
- 101000854908 Homo sapiens WD repeat-containing protein 11 Proteins 0.000 description 1
- 102100025578 Leukocyte immunoglobulin-like receptor subfamily B member 4 Human genes 0.000 description 1
- 229910052779 Neodymium Inorganic materials 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- 102100038883 Peroxisomal biogenesis factor 19 Human genes 0.000 description 1
- 102100020705 WD repeat-containing protein 11 Human genes 0.000 description 1
- 238000002441 X-ray diffraction Methods 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- QZPSXPBJTPJTSZ-UHFFFAOYSA-N aqua regia Chemical compound Cl.O[N+]([O-])=O QZPSXPBJTPJTSZ-UHFFFAOYSA-N 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 229910001882 dioxygen Inorganic materials 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 229910000042 hydrogen bromide Inorganic materials 0.000 description 1
- 229910003437 indium oxide Inorganic materials 0.000 description 1
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 1
- 239000004615 ingredient Substances 0.000 description 1
- 229910052740 iodine Inorganic materials 0.000 description 1
- 238000007733 ion plating Methods 0.000 description 1
- 238000001659 ion-beam spectroscopy Methods 0.000 description 1
- IQUGDGIIAQZHGL-UHFFFAOYSA-L iron(2+);dichloride;hydrochloride Chemical compound Cl.[Cl-].[Cl-].[Fe+2] IQUGDGIIAQZHGL-UHFFFAOYSA-L 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000002294 plasma sputter deposition Methods 0.000 description 1
- 229920001690 polydopamine Polymers 0.000 description 1
- 238000001552 radio frequency sputter deposition Methods 0.000 description 1
- 238000005477 sputtering target Methods 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/456—Ohmic electrodes on silicon
- H01L29/458—Ohmic electrodes on silicon for thin film silicon, e.g. source or drain electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
- H01L29/7866—Non-monocrystalline silicon transistors
- H01L29/78663—Amorphous silicon transistors
- H01L29/78669—Amorphous silicon transistors with inverted-type structure, e.g. with bottom gate
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、ＴＦＴ基板、それ
を用いた液晶表示装置及びその製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a TFT substrate, a liquid crystal display device using the same, and a manufacturing method thereof.
【０００２】[0002]
【従来の技術】液晶ディスプレイ（ＬＣＤ）や有機ＥＬ
ディスプレイ等のフラットパネルディスプレイは、表示
性能や省エネルギー化等の点から、携帯電話、ＰＤＡ、
携帯用パソコン、ラップトップパソコン及びテレビ等の
表示機として主流を占めるに至った。これらの装置には
駆動用スイッチング素子としてＴＦＴ基板等が使用され
ている。ＴＦＴ基板において、低抵抗の電極・配線材料
としては、アルミニウム合金が主流を占めている。ま
た、透明電極の材料としてはインジウム・スズ酸化物
（ＩＴＯ）やインジウム・亜鉛酸化物（ＩＺＯ）等が主
に使用されている。2. Description of the Related Art Liquid crystal displays (LCD) and organic EL
Flat panel displays such as displays are used for mobile phones, PDAs,
It has become the mainstream as a display device for portable personal computers, laptop computers, televisions and the like. A TFT substrate or the like is used as a driving switching element in these devices. In TFT substrates, aluminum alloys are the mainstream as low resistance electrode / wiring materials. Further, as a material of the transparent electrode, indium tin oxide (ITO), indium zinc oxide (IZO), etc. are mainly used.
【０００３】しかし、アルミニウム合金からなる電極上
に、層間絶縁膜のスルーホールを介して透明電極を直接
形成した場合、アルミニウムの酸化が起こり、電極と透
明電極との間で接触抵抗が発生するため、このような材
料で製造されたＴＦＴ基板を含む液晶表示装置は正常に
作動しないことが知られている。However, when a transparent electrode is directly formed on an electrode made of an aluminum alloy via a through hole of an interlayer insulating film, aluminum is oxidized and a contact resistance is generated between the electrode and the transparent electrode. It is known that a liquid crystal display device including a TFT substrate manufactured from such a material does not operate normally.
【０００４】この問題を解決するため、アルミニウム合
金からなる電極をＭｏ、Ｔｉ、Ｃｒ等の金属で挟み込ん
だ三層構造にして、アルミニウム合金が透明電極と直接
接触することを防止することで接触抵抗の増加を抑える
ということが一般的に行なわれている。In order to solve this problem, the electrode made of an aluminum alloy is sandwiched between metals such as Mo, Ti and Cr to prevent the aluminum alloy from directly contacting with the transparent electrode to form a contact resistance. It is generally practiced to suppress the increase in
【０００５】[0005]
【発明が解決しようとする課題】しかし、アルミニウム
合金をＭｏ、Ｔｉ、Ｃｒ等の金属を用いて三層構造とす
るためには、金属を三回成膜する必要があり、また、こ
れに伴いエッチング操作も三回行なう必要が生じるた
め、このような方法では、ＴＦＴ基板の製造工程が複雑
になってしまうという課題があった。However, in order to form an aluminum alloy into a three-layer structure using a metal such as Mo, Ti, or Cr, it is necessary to deposit the metal three times. Since it is necessary to perform the etching operation three times, such a method has a problem that the manufacturing process of the TFT substrate becomes complicated.
【０００６】本発明は、安定して作動するＴＦＴ基板と
液晶表示装置及びその効率的な製造方法を提供すること
を目的とする。An object of the present invention is to provide a TFT substrate which operates stably, a liquid crystal display device and an efficient manufacturing method thereof.
【０００７】本発明者等は、鋭意研究した結果、ソース
・ドレイン電極と、透明電極との間に金属薄膜バッファ
ー層を設け、これらが直接接触することを防止すること
により、上記の目的を達成できることを見出した。As a result of intensive studies, the present inventors achieved the above object by providing a metal thin film buffer layer between a source / drain electrode and a transparent electrode and preventing them from directly contacting each other. I found that I could do it.
【０００８】[0008]
【課題を解決するための手段】本発明によれば、ソース
・ドレイン電極と透明電極の間に絶縁層が介在し、絶縁
層に形成されたスルーホールによりソース・ドレイン電
極と透明電極が電気的に接続されているＴＦＴ基板にお
いて、ソース・ドレイン電極が金属アルミニウムを主成
分とし、スルーホールにおいて、ソース・ドレイン電極
と透明電極との間に金属薄膜バッファー層を有するＴＦ
Ｔ基板が提供される。ソース・ドレイン電極と透明電極
との間に、金属薄膜バッファー層を設けることにより、
電極間の接触抵抗の増加が防止できるため、安定して作
動できる。According to the present invention, an insulating layer is interposed between a source / drain electrode and a transparent electrode, and the source / drain electrode and the transparent electrode are electrically connected by a through hole formed in the insulating layer. In the TFT substrate connected to the TF, the source / drain electrodes have metal aluminum as a main component, and the through hole has a metal thin film buffer layer between the source / drain electrodes and the transparent electrode.
A T substrate is provided. By providing a metal thin film buffer layer between the source / drain electrode and the transparent electrode,
Since the contact resistance between the electrodes can be prevented from increasing, stable operation can be achieved.
【０００９】尚、本発明のＴＦＴ基板の具体的構造の一
例では、基板上に、ゲート電極（ゲート配線）、ゲート
絶縁膜、第一のシリコン層、チャンネル保護層、第二の
シリコン層、ソース・ドレイン電極、層間絶縁膜、金属
薄膜バッファー層、透明電極が配置される。この場合、
層間絶縁膜のスルーホールを介してソース・ドレイン電
極及び透明電極が電気的に接続される。尚、チャンネル
保護層が無いタイプも知られている。In an example of a specific structure of the TFT substrate of the present invention, a gate electrode (gate wiring), a gate insulating film, a first silicon layer, a channel protection layer, a second silicon layer, a source are formed on the substrate. -A drain electrode, an interlayer insulating film, a metal thin film buffer layer, and a transparent electrode are arranged. in this case,
The source / drain electrodes and the transparent electrode are electrically connected via the through holes of the interlayer insulating film. A type without a channel protective layer is also known.
【００１０】また、本発明のＴＦＴ基板において、金属
薄膜バッファー層が、透明電極と同一のエッチャントで
エッチング可能な物質からなることが好ましい。金属薄
膜バッファー層を透明電極と同一のエッチャントが使用
できるため、エッチング工程を簡略化することができ
る。In the TFT substrate of the present invention, it is preferable that the metal thin film buffer layer is made of a material that can be etched with the same etchant as the transparent electrode. Since the same etchant as the transparent electrode can be used for the metal thin film buffer layer, the etching process can be simplified.
【００１１】また、上記の金属薄膜バッファー層は、ア
ルミニウムより酸化されやすい金属を主成分とすること
が好ましい。アルミニウムより酸化されやすい金属を使
用すると、アルミニウムの酸化がより抑制され、アルミ
ニウムと透明電極間の導電性が良くなる。また、アルミ
ニウムスパッタリング後にアルミニウム表面に生成した
酸化アルムニウムが還元されるため、酸化されにくい金
属を用いた場合よりも、接触抵抗が下がることがある。The metal thin film buffer layer preferably contains a metal which is more easily oxidized than aluminum as a main component. When a metal that is more easily oxidized than aluminum is used, the oxidation of aluminum is further suppressed, and the conductivity between aluminum and the transparent electrode is improved. Moreover, since the aluminum oxide generated on the aluminum surface after aluminum sputtering is reduced, the contact resistance may be lower than that when a metal that is not easily oxidized is used.
【００１２】さらに、上記の金属が、酸化されたときに
導電性を示す金属であることが好ましく、透明性を示す
金属であることがより好ましい。金属酸化物が導電性で
あると、ソース・ドレイン電極と透明電極との間の接触
抵抗をより小さくすることができる。また、透明性であ
ると、金属薄膜バッファー層全体の透明性が良くなり、
画素部分の透明性も向上する。Further, the above metal is preferably a metal which exhibits conductivity when oxidized, and more preferably a metal which exhibits transparency. When the metal oxide is conductive, the contact resistance between the source / drain electrode and the transparent electrode can be further reduced. In addition, the transparency improves the transparency of the entire metal thin film buffer layer,
The transparency of the pixel portion is also improved.
【００１３】また、本発明のＴＦＴ基板において、金属
薄膜バッファー層が、Ａｇ、Ａｕ、Ｐｔ、Ｒｈ、Ｐｄ、
Ｃｒ、Ｉｎ、Ｇａ、Ｚｎ、Ｍｏ、Ｔｉ及びＳｎより選ば
れた一種以上の金属又は合金からなることが好ましい。
このような金属又は合金は、成膜性に優れている。ま
た、得られた薄膜の安定性にも優れている。Further, in the TFT substrate of the present invention, the metal thin film buffer layer comprises Ag, Au, Pt, Rh, Pd,
It is preferably made of one or more metals or alloys selected from Cr, In, Ga, Zn, Mo, Ti and Sn.
Such a metal or alloy has excellent film forming properties. Moreover, the stability of the obtained thin film is also excellent.
【００１４】また、本発明のＴＦＴ基板において、金属
薄膜バッファー層が、Ｃｒ、Ｉｎ、Ｇａ、Ｚｎ、Ｍｏ、
Ｔｉ及びＳｎより選ばれた一種以上の金属又は合金から
なることが好ましい。このような金属又は合金は、酸化
されたときの酸化物が導電性に優れるためである。さら
に、本発明のＴＦＴ基板において、金属薄膜バッファー
層が、Ｉｎ、Ｇａ、Ｚｎ及びＳｎより選ばれた一種以上
の金属又は合金からなることが好ましい。このような金
属又は合金は、アルミニウムより酸化され易く、その酸
化物が透明性や導電性に優れるためである。In the TFT substrate of the present invention, the metal thin film buffer layer comprises Cr, In, Ga, Zn, Mo,
It is preferably made of one or more metals or alloys selected from Ti and Sn. This is because such a metal or alloy has excellent conductivity when it is oxidized. Further, in the TFT substrate of the present invention, the metal thin film buffer layer is preferably made of one or more metals or alloys selected from In, Ga, Zn and Sn. This is because such a metal or alloy is more easily oxidized than aluminum, and the oxide is excellent in transparency and conductivity.
【００１５】また、本発明のＴＦＴ基板において、金属
薄膜バッファー層の膜厚を３０〜３００Åとすることが
好ましい。電極間における接触抵抗の増加の防止及び金
属薄膜バッファー層の透明性の点から、膜厚をこのよう
な範囲とすることが好ましい。Further, in the TFT substrate of the present invention, it is preferable that the metal thin film buffer layer has a film thickness of 30 to 300 Å. From the viewpoint of preventing an increase in contact resistance between the electrodes and the transparency of the metal thin film buffer layer, it is preferable to set the film thickness in such a range.
【００１６】本発明の別の態様は、上記のＴＦＴ基板を
含む液晶表示装置である。この液晶表示装置は、このよ
うなＴＦＴ基板を用いることにより、性能が劣化しない
で安定して作動できる。Another aspect of the present invention is a liquid crystal display device including the above-mentioned TFT substrate. By using such a TFT substrate, this liquid crystal display device can operate stably without deterioration in performance.
【００１７】本発明の別の態様は、ソース・ドレイン電
極上に、絶縁膜を形成し、絶縁膜にスルーホールを形成
し、絶縁膜及び前記スルーホールの上に、金属バッファ
ー膜と透明導電膜を成膜し、金属バッファー膜と透明導
電膜を同時にエッチングして金属薄膜バッファー層と透
明電極を形成する工程を含むことを特徴とするＴＦＴ基
板の製造方法である。金属バッファー膜を成膜すること
により、ソース・ドレイン電極を多層構造にする必要が
なくなり、さらに、金属バッファー膜及び透明導電膜を
同一のエッチャントでエッチングすることができるた
め、エッチングを繰り返し行なう必要もなくなり、ＴＦ
Ｔ基板を効率的に製造することができる。また、材料使
用量が低減することにより、より安価にＴＦＴ基板を製
造できる。According to another aspect of the present invention, an insulating film is formed on the source / drain electrodes, a through hole is formed in the insulating film, and a metal buffer film and a transparent conductive film are formed on the insulating film and the through hole. And a metal buffer film and a transparent conductive film are simultaneously etched to form a metal thin film buffer layer and a transparent electrode. By forming the metal buffer film, it is not necessary to form the source / drain electrodes in a multi-layer structure, and since the metal buffer film and the transparent conductive film can be etched with the same etchant, repeated etching is also required. Gone, TF
The T substrate can be manufactured efficiently. Further, since the amount of material used is reduced, the TFT substrate can be manufactured at a lower cost.
【００１８】[0018]
【発明の実施の形態】以下、本発明のＴＦＴ基板、それ
を用いた液晶表示装置及びその製造方法について説明す
る。
１．ＴＦＴ基板及び液晶表示装置BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, a TFT substrate of the present invention, a liquid crystal display device using the same, and a manufacturing method thereof will be described. 1. TFT substrate and liquid crystal display device
【００１９】（１）ソース・ドレイン電極
ソース・ドレイン電極の材料は、金属アルミニウムが主
成分であれば特に制限されない。金属アルミニウム以外
の成分及びその量も特に限定されない。金属アルミニウ
ム以外の成分としては、例えば、Ｎｄ、Ｐｔ、Ｐｄ、Ｚ
ｎ、Ｎｉ等の金属が挙げられる。(1) Source / Drain Electrode The material of the source / drain electrode is not particularly limited as long as metallic aluminum is the main component. Ingredients other than metallic aluminum and their amounts are not particularly limited. Examples of components other than metallic aluminum include Nd, Pt, Pd, and Z.
Examples of the metal include n and Ni.
【００２０】（２）金属薄膜バッファー層
金属薄膜バッファー層は、ソース・ドレイン電極及び透
明電極との間に設けられ、これらの電極間の接触抵抗の
増加を防止する。金属薄膜バッファー層は、導電性であ
り、酸化されやすくても酸化されにくくても良い。酸化
されやすい場合は、酸化物が導電性であることが好まし
く、透明であることがより好ましい。(2) Metal thin film buffer layer The metal thin film buffer layer is provided between the source / drain electrode and the transparent electrode and prevents an increase in contact resistance between these electrodes. The metal thin film buffer layer is electrically conductive and may be easily or hardly oxidized. When it is easily oxidized, the oxide is preferably conductive, and more preferably transparent.
【００２１】金属薄膜バッファー層の材料は、電極間の
接触抵抗の増加が防止できれば特に制限されない。この
ような例として、Ａｇ、Ａｕ、Ｐｔ、Ｒｈ、Ｐｄ及びＣ
ｒより選ばれた一種以上の金属又は合金が挙げられる。The material of the metal thin film buffer layer is not particularly limited as long as the contact resistance between the electrodes can be prevented from increasing. Such examples include Ag, Au, Pt, Rh, Pd and C.
Examples include one or more metals or alloys selected from r.
【００２２】また、これらの金属又は合金は、透明電極
と同一のエッチャントでエッチングが可能なものが好ま
しい。さらに、アルミニウムより酸化されやすいものが
好ましく、その金属酸化物が透明性及び導電性であるこ
とがより好ましい。It is preferable that these metals or alloys can be etched with the same etchant as the transparent electrode. Further, those that are more easily oxidized than aluminum are preferable, and it is more preferable that the metal oxide is transparent and conductive.
【００２３】上記のエッチャントとしては、特に限定さ
れないが、例えば、蓚酸水溶液、硝酸−酢酸−リン酸系
水溶液、塩酸水溶液、臭化水素水溶液、塩化鉄-塩酸水
溶液、王水等が挙げられる。The above-mentioned etchant is not particularly limited, and examples thereof include oxalic acid aqueous solution, nitric acid-acetic acid-phosphoric acid aqueous solution, hydrochloric acid aqueous solution, hydrogen bromide aqueous solution, iron chloride-hydrochloric acid aqueous solution, and aqua regia.
【００２４】また、同時エッチング可能な材料として
は、例えば、Ａｇ、Ａｕ、Ｐｔ、Ｒｈ、Ｐｄ、Ｃｒ、Ｉ
ｎ、Ｇａ、Ｚｎ、Ｍｏ、Ｔｉ、及びＳｎより選ばれた一
種以上の金属又は合金が挙げられる。さらに、アルミニ
ウムより酸化されやすくその酸化物が透明性及び導電性
である材料としては、例えば、Ｃｒ、Ｉｎ、Ｇａ、Ｚ
ｎ、Ｍｏ、Ｔｉ及びＳｎより選ばれた一種以上の金属又
は合金が挙げられる。The materials that can be simultaneously etched are, for example, Ag, Au, Pt, Rh, Pd, Cr and I.
Examples include one or more metals or alloys selected from n, Ga, Zn, Mo, Ti, and Sn. Further, as a material which is more easily oxidized than aluminum and whose oxide is transparent and conductive, for example, Cr, In, Ga, Z
One or more metals or alloys selected from n, Mo, Ti and Sn may be mentioned.
【００２５】金属薄膜バッファー層の膜厚は３０〜３０
０Åであることが好ましい。この理由は、膜厚が３０Å
未満になると、薄膜が薄すぎて、金属薄膜バッファー層
の効果が発揮されない場合があるためである。一方、膜
厚が３００Åを超えると、透明性に劣る場合があるため
である。The thickness of the metal thin film buffer layer is 30 to 30.
It is preferably 0Å. The reason for this is that the film thickness is 30Å
If it is less than the range, the thin film may be too thin to exert the effect of the metal thin film buffer layer. On the other hand, if the film thickness exceeds 300Å, the transparency may be poor.
【００２６】尚、金属薄膜バッファー層の材料に、酸化
されやすい金属を使用する場合は、透明性が良くなるた
め、膜厚を厚くすることができる。また、酸化されにく
い金属を使用する場合は、その膜厚を３０〜１００Åに
する。この理由は、膜厚が３０Å以下になると、薄膜が
薄すぎてソース・ドレイン電極中のアルミニウムが酸化
されて、透明電極との接触抵抗が高くなる場合があるた
めである。一方、膜厚が１００Å以上になると、光線透
過率が低下する場合があるためである。When a metal that is easily oxidized is used as the material of the metal thin film buffer layer, the transparency is improved, so that the film thickness can be increased. If a metal that is difficult to oxidize is used, its film thickness is set to 30 to 100Å. The reason for this is that when the film thickness is 30 Å or less, the thin film is too thin and aluminum in the source / drain electrodes may be oxidized to increase the contact resistance with the transparent electrode. On the other hand, if the film thickness is 100 Å or more, the light transmittance may decrease.
【００２７】さらに、金属薄膜バッファー層の材料に、
酸化物が透明性で導電性の金属を使用する場合は、その
膜厚を３０〜３００Åとするのが好ましい。この理由
は、膜厚が３０Å以下になると、薄膜が薄すぎて接触抵
抗の増加を防止する効果が発揮されない場合があるため
である。一方、膜厚が３００Å以上になると、酸化度合
いが低く、透明性が低下する場合があるためである。Further, as the material of the metal thin film buffer layer,
When the oxide is a transparent and conductive metal, the film thickness is preferably 30 to 300 Å. The reason for this is that if the film thickness is 30 Å or less, the thin film may be too thin to exert the effect of preventing an increase in contact resistance. On the other hand, when the film thickness is 300 Å or more, the degree of oxidation is low and the transparency may be lowered.
【００２８】（３）透明電極
透明電極の材料としては、例えば、インジウム・スズ酸
化物（ＩＴＯ）やインジウム・亜鉛酸化物（ＩＺＯ）等
の酸化物が挙げられる。
（４）その他
本発明のＴＦＴ基板は、基板やゲート電極等の、上記以
外の構成部分は特に限定されず、通常用いられる構成及
び材料を使用できる。また、液晶表示装置についても、
上記のＴＦＴ基板以外の構成部分は特に限定されず、通
常用いられる構成及び材料を使用できる。(3) Transparent Electrode Examples of materials for the transparent electrode include oxides such as indium tin oxide (ITO) and indium zinc oxide (IZO). (4) Others The TFT substrate of the present invention is not particularly limited in the components other than the above, such as the substrate and the gate electrode, and the components and materials usually used can be used. Also for liquid crystal display devices,
The components other than the above-mentioned TFT substrate are not particularly limited, and commonly used components and materials can be used.
【００２９】２．ＴＦＴ基板の製造方法
本発明のＴＦＴ基板の製造方法において、金属バッファ
ー膜と透明導電膜を同一のエッチャントを用いて同時に
エッチングして金属薄膜バッファー層と透明電極を形成
する。このように同時にエッチングするため、エッチン
グ工程の回数を少なくでき、材料の使用量を抑えること
ができる。2. Method for Manufacturing TFT Substrate In the method for manufacturing a TFT substrate of the present invention, the metal buffer film and the transparent conductive film are simultaneously etched using the same etchant to form the metal thin film buffer layer and the transparent electrode. Since the etching is performed at the same time, the number of etching steps can be reduced and the amount of material used can be suppressed.
【００３０】また、金属薄膜バッファー層及び透明電極
を含むＴＦＴ基板の各成分の形成工程は特に制限されな
い。例えば、各成分の成膜方法としては、真空蒸着法又
はスパッタリング法等を用いることができる。また、こ
の場合、真空蒸着やスパッタリングの方法及び装置は特
に制限されない。真空蒸着法の例としては、エレクトロ
ンビーム法、イオンプレーティング法、抵抗加熱法等が
挙げられる。また、スパッタリング法の例としては、高
周波スパッタリング法、ＤＣスパッタリング法、ＲＦス
パッタリング法、ＤＣマグネトロンスパッタリング法、
ＲＦマグネトロンスパッタリング法、ＥＣＲプラズマス
パッタリング法、イオンビームスパッタリング法等が挙
げられる。また、これらの方法で成膜した金属薄膜を、
目的の電極形状にパターニングする手段及びスルーホー
ルの形成手段は特に制限されず、通常のフォトリソグラ
フィー法等を用いて行なうことができる。The step of forming each component of the TFT substrate including the metal thin film buffer layer and the transparent electrode is not particularly limited. For example, as a film forming method of each component, a vacuum vapor deposition method, a sputtering method, or the like can be used. Further, in this case, the method and apparatus for vacuum vapor deposition or sputtering are not particularly limited. Examples of the vacuum vapor deposition method include an electron beam method, an ion plating method, and a resistance heating method. Examples of the sputtering method include a high frequency sputtering method, a DC sputtering method, an RF sputtering method, a DC magnetron sputtering method,
An RF magnetron sputtering method, an ECR plasma sputtering method, an ion beam sputtering method and the like can be mentioned. In addition, the metal thin film formed by these methods,
The means for patterning the desired electrode shape and the means for forming the through holes are not particularly limited, and ordinary photolithography or the like can be used.
【００３１】[0031]
【実施例】以下、実施例に基づき本発明をさらに詳しく
説明するが、本発明はこの実施例に限定されない。The present invention will be described in more detail based on the following examples, but the invention is not intended to be limited to these examples.
【００３２】実施例１
図１を用いて本発明の一実施例を説明する。図１は本発
明のＴＦＴ基板の一実施形態であるα−ＳｉＴＦＴ基板
の断面図である。Embodiment 1 An embodiment of the present invention will be described with reference to FIG. FIG. 1 is a sectional view of an α-Si TFT substrate which is an embodiment of the TFT substrate of the present invention.
【００３３】透光性のガラス基板２上に、Ｎｄを１ａｔ
％含有する金属Ａｌ（抵抗率：５μΩ・ｃｍ）を高周波
スパッタリング法により膜厚１，５００Åに堆積した。
この層を硝酸−酢酸−リン酸系水溶液をエッチング液と
して用いたホトエッチング法により、所望の形状のゲー
ト電極４及びゲート配線（図示せず）を形成した。1 atm of Nd is formed on the transparent glass substrate 2.
% Metal Al (resistivity: 5 μΩ · cm) was deposited to a film thickness of 1,500 Å by the high frequency sputtering method.
A gate electrode 4 and a gate wiring (not shown) having a desired shape were formed on this layer by a photoetching method using a nitric acid-acetic acid-phosphoric acid aqueous solution as an etching solution.
【００３４】次に、放電ガスとしてＳｉＨ4−ＮＨ3−Ｎ
2系ガスを用いて、第一の窒化シリコン（ＳｉＮｘ）膜
からなるゲート絶縁膜６を膜厚３，０００Åに堆積し
た。続いて、放電ガスとして、ＳｉＨ4−Ｎ2系の混合ガ
スを用いて、α−Ｓｉ：Ｈ（ｉ）膜（第一のシリコン
層）８を膜厚３，５００Åに堆積した。Next, as discharge gas, SiH 4 --NH 3 --N is used.
A gate insulating film 6 made of a first silicon nitride (SiNx) film was deposited to a film thickness of 3,000 Å using a 2 system gas. Then, using a SiH 4 —N 2 -based mixed gas as a discharge gas, an α-Si: H (i) film (first silicon layer) 8 was deposited to a film thickness of 3,500 Å.
【００３５】さらに、この上に、放電ガスとして、Ｓｉ
Ｈ4−ＮＨ3−Ｎ2系ガスを用いて、第二の窒化シリコン
（ＳｉＮｘ）膜を膜厚７００Åに堆積した。この第二の
ＳｉＮｘ膜から、ＣＦ4ガスを用いたドライエッチング
により所望のチャンネル保護層１０を形成した。On top of this, Si is used as a discharge gas.
A second silicon nitride (SiNx) film was deposited to a film thickness of 700 Å using H 4 —NH 3 —N 2 system gas. A desired channel protective layer 10 was formed from this second SiNx film by dry etching using CF 4 gas.
【００３６】続いて、α−Ｓｉ：Ｈ（ｎ）膜（第二のシ
リコン層）１２を、ＳｉＨ4−Ｈ2−ＰＨ3系の混合ガス
を用いて膜厚１，０００Åに堆積した。尚、ゲート絶縁
膜６、α−Ｓｉ：Ｈ（ｉ）膜８、チャンネル保護層１０
及びα−Ｓｉ：Ｈ（ｎ）膜１２は、グロー放電ＣＶＤ法
で堆積した。Subsequently, an α-Si: H (n) film (second silicon layer) 12 was deposited to a film thickness of 1,000 Å by using a mixed gas of SiH 4 -H 2 -PH 3 system. The gate insulating film 6, the α-Si: H (i) film 8, the channel protective layer 10
The α-Si: H (n) film 12 was deposited by the glow discharge CVD method.
【００３７】次に、この上にＮｄを１ａｔ％含有するＡ
ｌ（抵抗率：５μΩ・cm）を真空蒸着法又はスパッタリ
ング法により膜厚０．３μｍに堆積した。このＡｌ層を
硝酸−酢酸−リン酸水溶液系エッチング液を用いて、ホ
トエッチング法で所望のソース・ドレイン電極１４，１
５及びソース・ドレイン配線（図示せず）のパターンと
した。Next, A containing Nd in an amount of 1 at% was added.
1 (resistivity: 5 μΩ · cm) was deposited in a film thickness of 0.3 μm by a vacuum evaporation method or a sputtering method. This Al layer is formed into a desired source / drain electrode 14, 1 by a photoetching method using a nitric acid / acetic acid / phosphoric acid aqueous solution etching solution.
5 and source / drain wiring (not shown).
【００３８】さらに、α−Ｓｉ：Ｈ膜をＣＦ4ガスを用
いたドライエッチング及びヒドラジン（ＮＨ2ＮＨ2・Ｈ
2Ｏ）水溶液を用いたウェットエッチングを併用するこ
とにより、α−Ｓｉ：Ｈ（ｉ）膜８のパターン及びα−
Ｓｉ：Ｈ（ｎ）膜１２のパターンを、所望のパターンと
した。Further, the α-Si: H film is dry-etched using CF 4 gas and hydrazine (NH 2 NH 2 .H) is used.
2 O) By using wet etching with an aqueous solution together, the pattern of α-Si: H (i) film 8 and α-Si: H (i) film 8
The pattern of the Si: H (n) film 12 was a desired pattern.
【００３９】この上に、グロー放電ＣＶＤ法により、第
三の窒化シリコン（ＳｉＮｘ）膜であるソース・ドレイ
ン絶縁膜（層間絶縁膜）１６を膜厚３，０００Åに堆積
した。このとき、放電ガスとして、第三のＳｉＮｘ膜に
はＳｉＨ4−ＮＨ3−Ｎ2系ガスを用いた。A source / drain insulating film (interlayer insulating film) 16, which is a third silicon nitride (SiNx) film, was deposited thereon by a glow discharge CVD method to a film thickness of 3,000 Å. At this time, as discharge gas, SiH 4 —NH 3 —N 2 based gas was used for the third SiNx film.
【００４０】さらに、ＣＦ4ガスを用いたドライエッチ
ング法を用いたホトエッチング法により、ゲート電極の
取出し口２４、ソース電極の取出し口（図示せず）、ソ
ース・ドレイン電極１５と透明電極（画素電極）２０と
の電気的接触点としての所望のスルーホール２２を形成
した。Further, by a photo-etching method using a dry etching method using CF 4 gas, a gate electrode outlet 24, a source electrode outlet (not shown), a source / drain electrode 15 and a transparent electrode (pixel). A desired through hole 22 was formed as an electrical contact point with the electrode 20.
【００４１】その後、ソース・ドレイン絶縁膜１６の全
面に、金属バッファー膜として、金属Ｉｎを真空蒸着法
又はスパッタリング法を用いて膜厚１００Åで成膜し
た。そして、その上に、酸化インジウムと酸化亜鉛を主
成分とする非晶質透明導電膜をスパッタリング法で堆積
した。スパッタリングターゲットとして、ＩｎとＺｎの
原子比［Ｉｎ／（Ｉ＋Ｚｎ）］を０．８３に調整したＩ
ｎ2Ｏ3−ＺｎＯ焼結体をプレーナマグネトロン型のカゾ
ードに設置して用い、放電ガスとして、純アルゴン又は
１Ｖｏｌ％程度の微量の酸素ガスを混入させたアルゴン
ガスを用いて、透明導電膜を膜厚１，０００Åに堆積し
た。After that, metal In was formed as a metal buffer film on the entire surface of the source / drain insulating film 16 by a vacuum deposition method or a sputtering method to a film thickness of 100 Å. Then, an amorphous transparent conductive film containing indium oxide and zinc oxide as main components was deposited thereon by a sputtering method. As a sputtering target, the atomic ratio [In / (I + Zn)] of In and Zn was adjusted to 0.83 I
The n 2 O 3 —ZnO sintered body was installed in a planar magnetron type cathode and used, and as a discharge gas, pure argon or argon gas mixed with a small amount of oxygen gas of about 1 Vol% was used to form a transparent conductive film. It was deposited to a film thickness of 1,000Å.
【００４２】このＩｎ2Ｏ3−ＺｎＯ膜は、Ｘ線回折法で
分析するとピークは観察されず非晶質であった。金属バ
ッファー膜及び透明導電膜の薄膜を蓚酸３．４ｗｔ％の
水溶液を用いて、ホトエッチング法により所望の金属薄
膜バッファー層１８、透明電極２０及び取出し電極にパ
ターンニングし、さらに遮光膜パターンを形成して、α
−ＳｉＴＦＴ基板１を完成させた。この基板を用いてＴ
ＦＴ−ＬＣＤ方式平面ディスプレイを製造した後、ビデ
オ信号を入力して表示性能を確認したところ、表示性能
は良好であった。This In 2 O 3 —ZnO film was amorphous with no peak observed when analyzed by X-ray diffraction. The thin film of the metal buffer film and the transparent conductive film is patterned into the desired metal thin film buffer layer 18, the transparent electrode 20 and the extraction electrode by a photoetching method using an aqueous solution of 3.4 wt% oxalic acid, and further a light shielding film pattern is formed. And α
-SiTFT substrate 1 was completed. T using this substrate
After the FT-LCD type flat panel display was manufactured, a video signal was inputted and the display performance was confirmed. The display performance was good.
【００４３】実施例２
実施例１の金属薄膜バッファー層１８を膜厚１００Åの
金属Ｉｎから膜厚５０Åの金属Ａｇとし、金属薄膜バッ
ファー層１８及び透明電極２０のエッチャントを蓚酸
３．４ｗｔ％の水溶液から硝酸−酢酸−リン酸系水溶液
に代えた以外は、実施例１と同様にしてＴＦＴ−ＬＣＤ
方式平面ディスプレイを製造した。得られた液晶表示装
置にビデオ信号を入力して表示性能を確認したところ、
表示性能は良好であった。Example 2 The metal thin film buffer layer 18 of Example 1 was changed from metal In having a film thickness of 100Å to metal Ag having a film thickness of 50Å, and an etchant for the metal thin film buffer layer 18 and the transparent electrode 20 was an aqueous solution of 3.4 wt% oxalic acid. TFT-LCD in the same manner as in Example 1 except that the nitric acid-acetic acid-phosphoric acid-based aqueous solution was replaced with
A flat panel display was manufactured. When the video signal was input to the obtained liquid crystal display device and the display performance was confirmed,
The display performance was good.
【００４４】比較例１
実施例１の金属薄膜バッファー層１８の成膜工程を省略
した以外は、実施例１と同様にしてＴＦＴ−ＬＣＤ方式
平面ディスプレイを製造した。得られた液晶表示装置に
ビデオ信号を入力して表示性能を確認したところ、信号
入力ができず、表示性能は不良であった。Comparative Example 1 A TFT-LCD type flat display was manufactured in the same manner as in Example 1 except that the film forming step of the metal thin film buffer layer 18 of Example 1 was omitted. When a video signal was input to the obtained liquid crystal display device and the display performance was confirmed, no signal could be input and the display performance was poor.
【００４５】[0045]
【発明の効果】本発明によれば、安定して作動するＴＦ
Ｔ基板と液晶表示装置及びその効率的な製造方法が提供
できる。According to the present invention, the TF which operates stably.
A T substrate, a liquid crystal display device, and an efficient manufacturing method thereof can be provided.
【図１】本発明のＴＦＴ基板の一実施形態であるα−Ｓ
ｉＴＦＴ基板の断面図である。1 is an embodiment of a TFT substrate of the present invention α-S
It is sectional drawing of an iTFT substrate.
１ α−ＳｉＴＦＴ基板 １４，１５ ソース・ドレイン電極 １６ 絶縁膜 １８ 金属薄膜バッファー層 ２０ 透明電極 ２２ スルーホール 1 α-Si TFT substrate 14,15 Source / drain electrodes 16 Insulating film 18 Metal thin film buffer layer 20 Transparent electrode 22 through hole
フロントページの続き (51)Int.Cl.7 識別記号 ＦＩ テーマコート゛(参考） Ｈ０１Ｌ 21/3205 Ｈ０１Ｌ 29/78 ６１６Ｖ 21/88 Ｒ Ｆターム(参考） 2H092 GA25 GA27 JA26 JA37 JA41 JA46 JB24 JB33 JB56 KA05 KA12 KB04 KB14 KB25 MA05 MA07 MA13 MA18 NA27 NA29 4M104 AA01 BB02 BB04 BB05 BB06 BB07 BB08 BB09 BB13 BB36 CC01 DD08 DD17 DD34 DD36 DD37 DD38 DD64 EE08 EE17 EE20 FF17 FF22 GG09 GG10 GG14 GG20 5C094 AA43 BA03 BA43 CA19 DA09 DA13 DB01 EA05 GB10 JA08 5F033 HH07 HH09 HH13 HH14 HH17 HH38 JJ01 JJ07 JJ09 JJ13 JJ14 JJ17 JJ38 KK01 KK09 MM05 MM13 NN06 NN07 PP15 PP19 PP20 QQ08 QQ09 QQ10 QQ11 QQ19 QQ37 RR06 SS11 VV06 VV15 XX32 XX33 5F110 AA16 BB01 CC07 DD02 EE06 EE44 FF03 FF29 FF30 GG02 GG15 GG25 GG44 GG45 HK06 HK09 HK16 HK25 HK32 HK33 HK34 HK35 HL02 HL04 HL06 HL07 HL11 HL22 HL23 HM18 NN04 NN14 NN24 NN35 Front page continuation (51) Int.Cl. 7 Identification code FI theme code (reference) H01L 21/3205 H01L 29/78 616V 21/88 RF term (reference) 2H092 GA25 GA27 JA26 JA37 JA41 JA46 JB24 JB33 JB56 KA05 KA12 KB04 KB14 KB25 MA05 MA07 MA13 MA18 NA27 NA29 4M104 AA01 BB02 BB04 BB05 BB06 BB07 BB08 BB09 BB13 BB36 CC01 DD08 DD17 DD34 DD36 DD37 DD38 DD64. HH09 HH13 HH14 HH17 HH38 JJ01 JJ07 JJ09 JJ13 JJ14 JJ17 JJ38 KK01 KK09 MM05 MM13 NN06 NN07 PP15 PP19 PP20 QQ08 QQ09 QQ10 QQ11 QQ06QGQGGQQQQGQGGQQQQQEQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQ7Q7Q7Q7Q7Q7Q7Q7Q7DD07FF25 XX32 XX33 XX32 HK16 HK25 HK32 HK33 HK34 HK35 HL02 HL04 HL06 HL07 HL11 HL22 HL23 HM18 NN04 NN14 NN24 NN35
Claims (9)
絶縁層が介在し、前記絶縁層に形成されたスルーホール
により前記ソース・ドレイン電極と前記透明電極が電気
的に接続されているＴＦＴ基板において、 前記ソース・ドレイン電極が金属アルミニウムを主成分
とし、前記スルーホールにおいて、前記ソース・ドレイ
ン電極と前記透明電極との間に金属薄膜バッファー層を
有するＴＦＴ基板。1. A TFT substrate in which an insulating layer is interposed between a source / drain electrode and a transparent electrode, and the source / drain electrode and the transparent electrode are electrically connected by a through hole formed in the insulating layer. In the TFT substrate, the source / drain electrodes are composed mainly of metallic aluminum, and a metal thin film buffer layer is provided between the source / drain electrodes and the transparent electrode in the through hole.
電極と同一のエッチャントでエッチング可能な物質から
なることを特徴とする請求項１に記載のＴＦＴ基板。2. The TFT substrate according to claim 1, wherein the metal thin film buffer layer is made of a material that can be etched with the same etchant as the transparent electrode.
ウムより酸化されやすい金属を主成分とすることを特徴
とする請求項１又は２に記載のＴＦＴ基板。3. The TFT substrate according to claim 1, wherein the metal thin film buffer layer contains a metal that is more easily oxidized than aluminum as a main component.
び導電性を示す金属であることを特徴とする請求項３に
記載のＴＦＴ基板。4. The TFT substrate according to claim 3, wherein the metal is a metal that exhibits transparency and conductivity when oxidized.
ｕ、Ｐｔ、Ｒｈ、Ｐｄ、Ｃｒ、Ｉｎ、Ｇａ、Ｚｎ、Ｍ
ｏ、Ｔｉ及びＳｎより選ばれた一種以上の金属又は合金
からなることを特徴とする請求項１又は２に記載のＴＦ
Ｔ基板。5. The metal thin film buffer layer comprises Ag, A
u, Pt, Rh, Pd, Cr, In, Ga, Zn, M
The TF according to claim 1 or 2, which is composed of one or more metals or alloys selected from o, Ti and Sn.
T substrate.
ａ、Ｚｎ及びＳｎより選ばれた一種以上の金属又は合金
からなることを特徴とする請求項３又は４に記載のＴＦ
Ｔ基板。6. The metal thin film buffer layer comprises In, G
The TF according to claim 3 or 4, wherein the TF is made of one or more metals or alloys selected from a, Zn and Sn.
T substrate.
〜３００Åであることを特徴とする請求項１〜６のいず
れか一項に記載のＴＦＴ基板。7. The film thickness of the metal thin film buffer layer is 30.
7. The TFT substrate according to claim 1, wherein the TFT substrate has a thickness of ˜300 Å.
ＦＴ基板を含むことを特徴とする液晶表示装置。8. The T according to claim 1.
A liquid crystal display device comprising an FT substrate.
ＦＴ基板の製造方法において、 ソース・ドレイン電極上に、絶縁膜を形成し、 前記絶縁膜にスルーホールを形成し、 前記絶縁膜及び前記スルーホールの上に、金属バッファ
ー膜と透明導電膜を成膜し、 前記金属バッファー膜と前記透明導電膜を同時にエッチ
ングして金属薄膜バッファー層と透明電極を形成する工
程を含むことを特徴とするＴＦＴ基板の製造方法。9. T according to any one of claims 1 to 7.
In the method of manufacturing an FT substrate, an insulating film is formed on the source / drain electrodes, a through hole is formed in the insulating film, and a metal buffer film and a transparent conductive film are formed on the insulating film and the through hole. A method of manufacturing a TFT substrate, comprising the steps of forming a film, and simultaneously etching the metal buffer film and the transparent conductive film to form a metal thin film buffer layer and a transparent electrode.
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001200710A JP2003017706A (en) | 2001-07-02 | 2001-07-02 | Tft substrate, liquid crystal display device using the same, and its manufacturing method |
| PCT/JP2002/005057 WO2003005453A1 (en) | 2001-07-02 | 2002-05-24 | Tft substrate, liquid crystal display using the same, and its manufacturing method |
| KR10-2003-7017295A KR20040016908A (en) | 2001-07-02 | 2002-05-24 | Tft substrate, liquid crystal display using the same, and its manufacturing method |
| CNB028132793A CN1279623C (en) | 2001-07-02 | 2002-05-24 | TFT substrate, liquid crystal display device using the same, and method of manufacturing the same |
| TW091112014A TWI293208B (en) | 2001-07-02 | 2002-06-04 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001200710A JP2003017706A (en) | 2001-07-02 | 2001-07-02 | Tft substrate, liquid crystal display device using the same, and its manufacturing method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2003017706A true JP2003017706A (en) | 2003-01-17 |
Family
ID=19037787
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001200710A Withdrawn JP2003017706A (en) | 2001-07-02 | 2001-07-02 | Tft substrate, liquid crystal display device using the same, and its manufacturing method |
Country Status (5)
| Country | Link |
|---|---|
| JP (1) | JP2003017706A (en) |
| KR (1) | KR20040016908A (en) |
| CN (1) | CN1279623C (en) |
| TW (1) | TWI293208B (en) |
| WO (1) | WO2003005453A1 (en) |
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-
2001
- 2001-07-02 JP JP2001200710A patent/JP2003017706A/en not_active Withdrawn
-
2002
- 2002-05-24 WO PCT/JP2002/005057 patent/WO2003005453A1/en active Application Filing
- 2002-05-24 KR KR10-2003-7017295A patent/KR20040016908A/en not_active Application Discontinuation
- 2002-05-24 CN CNB028132793A patent/CN1279623C/en not_active Expired - Fee Related
- 2002-06-04 TW TW091112014A patent/TWI293208B/zh active
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Also Published As
| Publication number | Publication date |
|---|---|
| KR20040016908A (en) | 2004-02-25 |
| WO2003005453A1 (en) | 2003-01-16 |
| TWI293208B (en) | 2008-02-01 |
| CN1279623C (en) | 2006-10-11 |
| CN1522470A (en) | 2004-08-18 |
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